diff options
517 files changed, 11255 insertions, 3847 deletions
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 0fa92479b4c..d78a170d0c5 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -243,6 +243,9 @@ stages: sandbox_clang: TEST_PY_BD: "sandbox" OVERRIDE: "-O clang-13" + sandbox_nolto: + TEST_PY_BD: "sandbox" + BUILD_ENV: "NO_LTO=1" sandbox_spl: TEST_PY_BD: "sandbox_spl" TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl" @@ -354,6 +357,7 @@ stages: export TEST_PY_ID="${TEST_PY_ID}" export TEST_PY_TEST_SPEC="${TEST_PY_TEST_SPEC}" export OVERRIDE="${OVERRIDE}" + export BUILD_ENV="${BUILD_ENV}" EOF cat << "EOF" >> test.sh # the below corresponds to .gitlab-ci.yml "before_script" diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index cebd76d050b..29af8c645ee 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -33,6 +33,7 @@ stages: script: # If we've been asked to use clang only do one configuration. - export UBOOT_TRAVIS_BUILD_DIR=/tmp/${TEST_PY_BD} + - echo BUILD_ENV ${BUILD_ENV} - tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e --board ${TEST_PY_BD} ${OVERRIDE} - cp ~/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/ @@ -254,6 +255,12 @@ sandbox with clang test.py: OVERRIDE: "-O clang-13" <<: *buildman_and_testpy_dfn +sandbox without LTO test.py: + variables: + TEST_PY_BD: "sandbox" + BUILD_ENV: "NO_LTO=1" + <<: *buildman_and_testpy_dfn + sandbox_spl test.py: variables: TEST_PY_BD: "sandbox_spl" diff --git a/MAINTAINERS b/MAINTAINERS index 83346183ee4..e4fd099f87b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -725,6 +725,13 @@ S: Maintained F: drivers/pci/pcie_phytium.c F: arch/arm/dts/phytium-durian.dts +ASPEED FMC SPI DRIVER +M: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> +M: Cédric Le Goater <clg@kaod.org> +R: Aspeed BMC SW team <BMC-SW@aspeedtech.com> +S: Maintained +F: drivers/spi/spi-aspeed-smc.c + BINMAN M: Simon Glass <sjg@chromium.org> M: Alper Nebi Yasak <alpernebiyasak@gmail.com> @@ -789,6 +796,13 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-coldfire.git F: arch/m68k/ F: doc/arch/m68k.rst +CYCLIC +M: Stefan Roese <sr@denx.de> +S: Maintained +F: cmd/cyclic.c +F: common/cyclic.c +F: include/cyclic.h + DFU M: Lukasz Majewski <lukma@denx.de> S: Maintained @@ -1376,8 +1390,12 @@ F: configs/k2g_hs_evm_defconfig F: configs/k2l_hs_evm_defconfig F: configs/am65x_hs_evm_r5_defconfig F: configs/am65x_hs_evm_a53_defconfig -F: configs/j721e_hs_evm_r5_defconfig +F: configs/j7200_hs_evm_a72_defconfig +F: configs/j7200_hs_evm_r5_defconfig F: configs/j721e_hs_evm_a72_defconfig +F: configs/j721e_hs_evm_r5_defconfig +F: configs/j721s2_hs_evm_a72_defconfig +F: configs/j721s2_hs_evm_r5_defconfig TPM DRIVERS M: Ilias Apalodimas <ilias.apalodimas@linaro.org> @@ -521,8 +521,8 @@ env_h := include/generated/environment.h no-dot-config-targets := clean clobber mrproper distclean \ help %docs check% coccicheck \ - ubootversion backup tests check qcheck tcheck pylint \ - pylint_err + ubootversion backup tests check pcheck qcheck tcheck \ + pylint pylint_err config-targets := 0 mixed-targets := 0 @@ -643,6 +643,13 @@ export CFLAGS_EFI # Compiler flags to add when building EFI app export CFLAGS_NON_EFI # Compiler flags to remove when building EFI app export EFI_TARGET # binutils target if EFI is natively supported +export LTO_ENABLE + +# This is y if LTO is enabled for this build. See NO_LTO=1 to disable LTO +ifeq ($(NO_LTO),) +LTO_ENABLE=$(if $(CONFIG_LTO),y) +endif + # If board code explicitly specified LDSCRIPT or CONFIG_SYS_LDSCRIPT, use # that (or fail if absent). Otherwise, search for a linker script in a # standard location. @@ -708,16 +715,16 @@ endif LTO_CFLAGS := LTO_FINAL_LDFLAGS := export LTO_CFLAGS LTO_FINAL_LDFLAGS -ifdef CONFIG_LTO +ifeq ($(LTO_ENABLE),y) ifeq ($(cc-name),clang) - LTO_CFLAGS += -flto + LTO_CFLAGS += -DLTO_ENABLE -flto LTO_FINAL_LDFLAGS += -flto AR = $(shell $(CC) -print-prog-name=llvm-ar) NM = $(shell $(CC) -print-prog-name=llvm-nm) else NPROC := $(shell nproc 2>/dev/null || echo 1) - LTO_CFLAGS += -flto=$(NPROC) + LTO_CFLAGS += -DLTO_ENABLE -flto=$(NPROC) LTO_FINAL_LDFLAGS += -fuse-linker-plugin -flto=$(NPROC) # use plugin aware tools @@ -1724,7 +1731,7 @@ ARCH_POSTLINK := $(wildcard $(srctree)/arch/$(ARCH)/Makefile.postlink) # Generate linker list symbols references to force compiler to not optimize # them away when compiling with LTO -ifdef CONFIG_LTO +ifeq ($(LTO_ENABLE),y) u-boot-keep-syms-lto := keep-syms-lto.o u-boot-keep-syms-lto_c := $(patsubst %.o,%.c,$(u-boot-keep-syms-lto)) @@ -1746,7 +1753,7 @@ endif # Rule to link u-boot # May be overridden by arch/$(ARCH)/config.mk -ifdef CONFIG_LTO +ifeq ($(LTO_ENABLE),y) quiet_cmd_u-boot__ ?= LTO $@ cmd_u-boot__ ?= \ $(CC) -nostdlib -nostartfiles \ @@ -2318,6 +2325,7 @@ help: @echo 'Test targets:' @echo '' @echo ' check - Run all automated tests that use sandbox' + @echo ' pcheck - Run quick automated tests in parallel' @echo ' qcheck - Run quick automated tests that use sandbox' @echo ' tcheck - Run quick automated tests on tools' @echo ' pylint - Run pylint on all Python files' @@ -2363,6 +2371,9 @@ help: tests check: $(srctree)/test/run +pcheck: + $(srctree)/test/run parallel + qcheck: $(srctree)/test/run quick @@ -415,8 +415,6 @@ The following options need to be configured: the defaults discussed just above. - Cache Configuration for ARM: - CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache - controller CONFIG_SYS_PL310_BASE - Physical base address of PL310 controller register space diff --git a/arch/Kconfig b/arch/Kconfig index c4dc47dccb4..994fd3b7f86 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -146,7 +146,6 @@ config SANDBOX select DM_SPI select DM_SPI_FLASH select GZIP_COMPRESSED - select HAVE_BLOCK_DEVICE select LZO select OF_BOARD_SETUP select PCI_ENDPOINT diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 82cd456f51f..f3a3c0f9a9f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -488,6 +488,15 @@ config TPL_SYS_THUMB_BUILD density. For ARM architectures that support Thumb2 this flag will result in Thumb2 code generated by GCC. +config SYS_L2_PL310 + bool "ARM PL310 L2 cache controller" + help + Enable support for ARM PL310 L2 cache controller in U-Boot + +config SPL_SYS_L2_PL310 + bool "ARM PL310 L2 cache controller in SPL" + help + Enable support for ARM PL310 L2 cache controller in SPL config SYS_L2CACHE_OFF bool "L2cache off" @@ -989,6 +998,7 @@ config ARCH_MX6 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_LE + select SYS_L2_PL310 if !SYS_L2CACHE_OFF imply MXC_GPIO imply SYS_THUMB_BUILD imply SPL_SEPARATE_BSS @@ -1016,7 +1026,6 @@ config ARCH_NPCM config ARCH_APPLE bool "Apple SoCs" select ARM64 - select BLK select CLK select CMD_USB select DM @@ -1249,6 +1258,7 @@ config ARCH_VF610 config ARCH_ZYNQ bool "Xilinx Zynq based platform" + select ARM_TWD_TIMER select CLK select CLK_ZYNQ select CPU_V7A @@ -1268,7 +1278,9 @@ config ARCH_ZYNQ select SPL_DM_SPI_FLASH if SPL select SPL_OF_CONTROL if SPL select SPL_SEPARATE_BSS if SPL + select SPL_TIMER if SPL select SUPPORT_SPL + select TIMER imply ARCH_EARLY_INIT_R imply BOARD_LATE_INIT imply CMD_CLK diff --git a/arch/arm/config.mk b/arch/arm/config.mk index b3548ce2439..2065438d053 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -15,11 +15,11 @@ CFLAGS_NON_EFI := -fno-pic -ffixed-r9 -ffunction-sections -fdata-sections \ -fstack-protector-strong CFLAGS_EFI := -fpic -fshort-wchar -ifneq ($(CONFIG_LTO)$(CONFIG_USE_PRIVATE_LIBGCC),yy) +ifneq ($(LTO_ENABLE)$(CONFIG_USE_PRIVATE_LIBGCC),yy) LDFLAGS_FINAL += --gc-sections endif -ifndef CONFIG_LTO +ifneq ($(LTO_ENABLE),y) PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections endif diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 965895bc2a3..7c407144500 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -388,8 +388,6 @@ dtb-$(CONFIG_AM33XX) += \ am335x-boneblack-wireless.dtb \ am335x-boneblue.dtb \ am335x-brppt1-mmc.dtb \ - am335x-brppt1-nand.dtb \ - am335x-brppt1-spi.dtb \ am335x-brxre1.dtb \ am335x-brsmarc1.dtb \ am335x-draco.dtb \ diff --git a/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi b/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi new file mode 100644 index 00000000000..a3d5650e488 --- /dev/null +++ b/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 B&R Industrial Automation GmbH - + * https://www.br-automation.com/ + */ + +/ { + ocp { + u-boot,dm-pre-reloc; + }; +}; + +&l4_wkup { + u-boot,dm-pre-reloc; + segment@200000 { + u-boot,dm-pre-reloc; + target-module@0 + { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + }; + target-module@7000 { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + }; + target-module@9000 { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + }; + }; +}; + +&wkup_cm { + u-boot,dm-pre-reloc; +}; + +&l4_wkup_clkctrl { + u-boot,dm-pre-reloc; +}; + +&l4_per { + u-boot,dm-pre-reloc; + segment@0 { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + target-module@4c000 { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + }; + }; + + segment@100000 { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + target-module@ac000 { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + }; + target-module@ae000 { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + }; + }; +}; + +&prcm { + u-boot,dm-pre-reloc; +}; + +&gpio0_target { + u-boot,dm-pre-reloc; +}; + +&prcm_clocks { + compatible = "simple-bus"; +}; + +&scm_clocks { + compatible = "simple-bus"; +}; + +&i2c0 { + u-boot,dm-pre-reloc; +}; + +&uart0 { + u-boot,dm-pre-reloc; +}; + +&mmc1 { + u-boot,dm-pre-reloc; +}; + +&mmc2 { + u-boot,dm-pre-reloc; +}; + +&gpio0 { + u-boot,dm-pre-reloc; +}; + +&gpio1 { + u-boot,dm-pre-reloc; +}; + +&gpio2 { + u-boot,dm-pre-reloc; +}; + +&gpio3 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/am335x-brppt1-mmc.dts b/arch/arm/dts/am335x-brppt1-mmc.dts index bd2f6c2e3e1..4db279b65e5 100644 --- a/arch/arm/dts/am335x-brppt1-mmc.dts +++ b/arch/arm/dts/am335x-brppt1-mmc.dts @@ -12,25 +12,10 @@ model = "BRPPT1 (MMC) Panel"; compatible = "ti,am33xx"; - fset: factory-settings { - bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890"; - version = <0x0100>; - order-no = "6PPT30 (MMC)"; - hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890"; - serial-no = "0"; - device-id = <0x0>; - parent-id = <0x0>; - hw-variant = <0x1>; - }; aliases { - ds1bkl0 = &pwmbacklight; - ds1bkl1 = &tps_bl; - ds1timing = &timing0; - ds1ctrl = &lcdc; gpmc = &gpmc; mmc = &mmc2; - fset = &fset; }; chosen { @@ -43,110 +28,21 @@ reg = <0x80000000 0x10000000>; /* 256 MB */ }; - panel { - status = "disabled"; - - compatible = "ti,tilcdc,panel"; - enable-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; - - backlight = <&pwmbacklight>; - bkl-pwm = <&pwmbacklight>; - bkl-tps = <&tps_bl>; - - panel-info { - ac-bias = <255>; - ac-bias-intrpt = <0>; - dma-burst-sz = <16>; - bpp = <32>; - fdd = <0x80>; - sync-edge = <0>; - sync-ctrl = <1>; - raster-order = <0>; - fifo-th = <0>; - }; - - display-timings { - native-mode = <&timing0>; - timing0: lcd { - clock-frequency = <32000000>; - hactive = <800>; - vactive = <480>; - hfront-porch = <2>; - hback-porch = <192>; - hsync-len = <1>; - vfront-porch = <20>; - vback-porch = <2>; - vsync-len = <1>; - hsync-active = <1>; - vsync-active = <1>; - pupdelay = <10>; - pondelay = <10>; - }; - }; - }; - vmmcsd_fixed: fixedregulator@0 { compatible = "regulator-fixed"; regulator-name = "vmmcsd_fixed"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - - pwm0: omap-pwm@timer5 { - compatible = "ti,omap-dmtimer-pwm"; - ti,timers = <&timer5>; - #pwm-cells = <3>; - }; - - pwm1: omap-pwm@timer6 { - compatible = "ti,omap-dmtimer-pwm"; - ti,timers = <&timer6>; - #pwm-cells = <3>; - }; - - beeper: pwm-beep { - compatible = "pwm-beeper"; - pwms = <&pwm0 0 0 0>; - }; - - pwmbacklight: pwm-bkl { - compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000 0>; - - default-brightness-level = <255>; - brightness-levels = <0 16 32 64 128 170 202 234 255>; - - power-supply = <&vmmcsd_fixed>; - enable-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; - }; }; &uart0 { /* console uart */ - u-boot,dm-spl; - status = "okay"; -}; - -&uart1 { status = "okay"; }; &i2c0 { - u-boot,dm-spl; status = "okay"; clock-frequency = <400000>; - - tps: tps@24 { /* PMIC controller */ - u-boot,dm-spl; - reg = <0x24>; - compatible = "ti,tps65217"; - - tps_bl: backlight { - compatible = "ti,tps65217-bl"; - isel = <1>; /* 1 - ISET1, 2 ISET2 */ - fdim = <1000>; /* TPS65217_BL_FDIM_1kHZ */ - default-brightness = <50>; - }; - }; }; &i2c2 { @@ -158,10 +54,6 @@ status = "okay"; }; -&cppi41dma { - status = "okay"; -}; - &usb { status = "okay"; }; @@ -217,7 +109,6 @@ }; &mmc1 { - u-boot,dm-spl; vmmc-supply = <&vmmcsd_fixed>; bus-width = <0x4>; ti,non-removable; @@ -227,7 +118,6 @@ }; &mmc2 { - u-boot,dm-spl; vmmc-supply = <&vmmcsd_fixed>; bus-width = <0x8>; ti,non-removable; @@ -236,77 +126,20 @@ status = "okay"; }; -&l4_per { - - segment@300000 { - - target-module@e000 { - u-boot,dm-pre-reloc; - - lcdc: lcdc@0 { - u-boot,dm-pre-reloc; - status = "disabled"; - }; - }; - }; -}; - -&elm { - status = "okay"; -}; - -&sham { - status = "okay"; -}; - -&aes { - status = "okay"; -}; - &gpio0 { - u-boot,dm-spl; ti,no-reset-on-init; }; &gpio1 { - u-boot,dm-spl; ti,no-reset-on-init; }; &gpio2 { - u-boot,dm-spl; ti,no-reset-on-init; }; &gpio3 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&wdt2 { ti,no-reset-on-init; - ti,no-idle-on-init; -}; - -&tscadc { - status = "okay"; - tsc { - ti,wires = <4>; - ti,x-plate-resistance = <200>; - ti,zx-cutoff-ratio = <40>; - ti,min_deviation = <60>; - ti,max_deviation = <600>; - ti,coordinate-readouts = <5>; - ti,wire-config = <0x00 0x11 0x22 0x33>; - - bnr-buttons { - Home-Button {}; - }; - }; - - adc { - ti,adc-channels = <5 6 7>; - }; }; &timer6 { /* used for cpsw end device */ @@ -320,37 +153,3 @@ ti,no-reset-on-init; ti,no-idle-on-init; }; - -&wdt2 { - status = "okay"; - ti,no-reset-on-init; - ti,no-idle-on-init; -}; - -&epwmss0 { - status = "okay"; -}; - -&tscadc { - status = "okay"; -}; - -&dcan0 { - status = "okay"; -}; - -&dcan1 { - status = "okay"; -}; - -&sham { - status = "disabled"; -}; - -&aes { - status = "disabled"; -}; - -&rng { - status = "disabled"; -}; diff --git a/arch/arm/dts/am335x-brppt1-nand.dts b/arch/arm/dts/am335x-brppt1-nand.dts deleted file mode 100644 index 67c609739fc..00000000000 --- a/arch/arm/dts/am335x-brppt1-nand.dts +++ /dev/null @@ -1,374 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2018 B&R Industrial Automation GmbH - * http://www.br-automation.com - * - */ -/dts-v1/; - -#include "am33xx.dtsi" - -/ { - model = "BRPPT1 (NAND) Panel"; - compatible = "ti,am33xx"; - - fset: factory-settings { - bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890"; - version = <0x0100>; - order-no = "6PPT30 (NAND)"; - hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890"; - serial-no = "0"; - device-id = <0x0>; - parent-id = <0x0>; - hw-variant = <0x1>; - }; - - aliases { - ds1bkl0 = &pwmbacklight; - ds1bkl1 = &tps_bl; - ds1timing = &timing0; - ds1ctrl = &lcdc; - gpmc = &gpmc; - mmc = &mmc2; - fset = &fset; - }; - - chosen { - bootargs = "console=ttyO0,115200 earlyprintk"; - stdout-path = &uart0; - }; - - memory { - device_type = "memory"; - reg = <0x80000000 0x10000000>; /* 256 MB */ - }; - - panel { - status = "disabled"; - - compatible = "ti,tilcdc,panel"; - enable-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; - - backlight = <&pwmbacklight>; - bkl-pwm = <&pwmbacklight>; - bkl-tps = <&tps_bl>; - - panel-info { - ac-bias = <255>; - ac-bias-intrpt = <0>; - dma-burst-sz = <16>; - bpp = <32>; - fdd = <0x80>; - sync-edge = <0>; - sync-ctrl = <1>; - raster-order = <0>; - fifo-th = <0>; - }; - - display-timings { - native-mode = <&timing0>; - timing0: lcd { - clock-frequency = <32000000>; - hactive = <800>; - vactive = <480>; - hfront-porch = <2>; - hback-porch = <192>; - hsync-len = <1>; - vfront-porch = <20>; - vback-porch = <2>; - vsync-len = <1>; - hsync-active = <1>; - vsync-active = <1>; - pupdelay = <10>; - pondelay = <10>; - }; - }; - }; - - vmmcsd_fixed: fixedregulator@0 { - compatible = "regulator-fixed"; - regulator-name = "vmmcsd_fixed"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - pwm0: omap-pwm@timer5 { - compatible = "ti,omap-dmtimer-pwm"; - ti,timers = <&timer5>; - #pwm-cells = <3>; - }; - - pwm1: omap-pwm@timer6 { - compatible = "ti,omap-dmtimer-pwm"; - ti,timers = <&timer6>; - #pwm-cells = <3>; - }; - - beeper: pwm-beep { - compatible = "pwm-beeper"; - pwms = <&pwm0 0 0 0>; - }; - - pwmbacklight: pwm-bkl { - compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000 0>; - - default-brightness-level = <255>; - brightness-levels = <0 16 32 64 128 170 202 234 255>; - - power-supply = <&vmmcsd_fixed>; - enable-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; - }; -}; - -&uart0 { /* console uart */ - u-boot,dm-spl; - status = "okay"; -}; - -&uart1 { - status = "okay"; -}; - -&i2c0 { - u-boot,dm-spl; - status = "okay"; - clock-frequency = <400000>; - - tps: tps@24 { /* PMIC controller */ - u-boot,dm-spl; - reg = <0x24>; - compatible = "ti,tps65217"; - - tps_bl: backlight { - compatible = "ti,tps65217-bl"; - isel = <1>; /* 1 - ISET1, 2 ISET2 */ - fdim = <1000>; /* TPS65217_BL_FDIM_1kHZ */ - default-brightness = <50>; - }; - }; -}; - -&i2c2 { - status = "okay"; - clock-frequency = <100000>; -}; - -&edma { - status = "okay"; -}; - -&cppi41dma { - status = "okay"; -}; - -&usb { - status = "okay"; -}; - -&usb_ctrl_mod { - status = "okay"; -}; - -&usb0_phy { - status = "okay"; -}; - -&usb1_phy { - status = "okay"; -}; - -&usb0 { - status = "okay"; - dr_mode = "host"; -}; - -&usb1 { - status = "okay"; - dr_mode = "host"; -}; - -&davinci_mdio { - status = "okay"; - - phy0: ethernet-phy@0 { - reg = <1>; - }; - - phy1: ethernet-phy@1 { - reg = <2>; - }; -}; - -&mac { - dual_emac; - status = "okay"; -}; - -&cpsw_emac0 { - phy-handle = <&phy0>; - dual_emac_res_vlan = <1>; - phy-mode = "mii"; -}; - -&cpsw_emac1 { - phy-handle = <&phy1>; - dual_emac_res_vlan = <2>; - phy-mode = "mii"; -}; - -&mmc2 { - vmmc-supply = <&vmmcsd_fixed>; - bus-width = <0x4>; - ti,non-removable; - ti,needs-special-hs-handling; - ti,vcc-aux-disable-is-sleep; - status = "disabled"; -}; - -&l4_per { - - segment@300000 { - - target-module@e000 { - u-boot,dm-pre-reloc; - - lcdc: lcdc@0 { - u-boot,dm-pre-reloc; - status = "disabled"; - }; - }; - }; -}; - -&elm { - status = "okay"; -}; - -&sham { - status = "okay"; -}; - -&aes { - status = "okay"; -}; - -&gpio0 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&gpio1 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&gpio2 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&gpio3 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&wdt2 { - ti,no-reset-on-init; - ti,no-idle-on-init; -}; - -&tscadc { - status = "okay"; - tsc { - ti,wires = <4>; - ti,x-plate-resistance = <200>; - ti,zx-cutoff-ratio = <40>; - ti,min_deviation = <60>; - ti,max_deviation = <600>; - ti,coordinate-readouts = <5>; - ti,wire-config = <0x00 0x11 0x22 0x33>; - - bnr-buttons { - Home-Button {}; - }; - }; - - adc { - ti,adc-channels = <5 6 7>; - }; -}; - -&gpmc { - u-boot,dm-spl; - status = "okay"; - pinctrl-names = "default"; - ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ - nand@0,0 { - compatible = "ti,omap2-nand"; - reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ - interrupt-parent = <&gpmc>; - rb-gpios = <&gpmc 1 GPIO_ACTIVE_HIGH>; /* gpmc_wait1 */ - ti,nand-ecc-opt = "bch8"; - ti,elm-id = <&elm>; - nand-bus-width = <8>; - gpmc,device-width = <1>; - gpmc,sync-clk-ps = <0>; - gpmc,cs-on-ns = <0>; - gpmc,cs-rd-off-ns = <44>; - gpmc,cs-wr-off-ns = <44>; - gpmc,adv-on-ns = <6>; - gpmc,adv-rd-off-ns = <34>; - gpmc,adv-wr-off-ns = <44>; - gpmc,we-on-ns = <0>; - gpmc,we-off-ns = <40>; - gpmc,oe-on-ns = <0>; - gpmc,oe-off-ns = <54>; - gpmc,access-ns = <64>; - gpmc,rd-cycle-ns = <82>; - gpmc,wr-cycle-ns = <82>; - gpmc,wait-on-read = "true"; - gpmc,wait-on-write = "true"; - gpmc,bus-turnaround-ns = <0>; - gpmc,cycle2cycle-delay-ns = <0>; - gpmc,clk-activation-ns = <0>; - gpmc,wait-monitoring-ns = <0>; - gpmc,wr-access-ns = <40>; - gpmc,wr-data-mux-bus-ns = <0>; - gpmc,wait-pin = <1>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "NAND.MLO"; - reg = <0x00000000 0x000020000>; - }; - partition@1 { - label = "NAND.cfgscr"; - reg = <0x00020000 0x00020000>; - }; - partition@2 { - label = "NAND.dtb"; - reg = <0x00040000 0x00020000>; - }; - partition@3 { - label = "NAND.u-boot-env"; - reg = <0x00060000 0x00020000>; - }; - partition@4 { - label = "NAND.u-boot"; - reg = <0x00080000 0x00080000>; - }; - partition@5 { - label = "NAND.kernel"; - reg = <0x00100000 0x00400000>; - }; - partition@6 { - label = "NAND.rootfs"; - reg = <0x00500000 0x08000000>; - }; - partition@7 { - label = "NAND.user"; - reg = <0x08500000 0x17b00000>; - }; - }; -}; diff --git a/arch/arm/dts/am335x-brppt1-spi.dts b/arch/arm/dts/am335x-brppt1-spi.dts deleted file mode 100644 index ce3dce204d6..00000000000 --- a/arch/arm/dts/am335x-brppt1-spi.dts +++ /dev/null @@ -1,377 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2018 B&R Industrial Automation GmbH - * http://www.br-automation.com - * - */ -/dts-v1/; - -#include "am33xx.dtsi" - -/ { - model = "BRPPT1 (MMC) Panel"; - compatible = "ti,am33xx"; - - fset: factory-settings { - bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890"; - version = <0x0100>; - order-no = "6PPT30 (SPI)"; - hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890"; - serial-no = "0"; - device-id = <0x0>; - parent-id = <0x0>; - hw-variant = <0x1>; - }; - - aliases { - ds1bkl0 = &pwmbacklight; - ds1bkl1 = &tps_bl; - ds1timing = &timing0; - ds1ctrl = &lcdc; - gpmc = &gpmc; - mmc = &mmc2; - spi0 = &spi0; - fset = &fset; - }; - - chosen { - bootargs = "console=ttyO0,115200 earlyprintk"; - stdout-path = &uart0; - }; - - memory { - device_type = "memory"; - reg = <0x80000000 0x10000000>; /* 256 MB */ - }; - - panel { - status = "disabled"; - - compatible = "ti,tilcdc,panel"; - enable-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; - - backlight = <&pwmbacklight>; - bkl-pwm = <&pwmbacklight>; - bkl-tps = <&tps_bl>; - - panel-info { - ac-bias = <255>; - ac-bias-intrpt = <0>; - dma-burst-sz = <16>; - bpp = <32>; - fdd = <0x80>; - sync-edge = <0>; - sync-ctrl = <1>; - raster-order = <0>; - fifo-th = <0>; - }; - - display-timings { - native-mode = <&timing0>; - timing0: lcd { - clock-frequency = <32000000>; - hactive = <800>; - vactive = <480>; - hfront-porch = <2>; - hback-porch = <192>; - hsync-len = <1>; - vfront-porch = <20>; - vback-porch = <2>; - vsync-len = <1>; - hsync-active = <1>; - vsync-active = <1>; - pupdelay = <10>; - pondelay = <10>; - }; - }; - }; - - vmmcsd_fixed: fixedregulator@0 { - compatible = "regulator-fixed"; - regulator-name = "vmmcsd_fixed"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - pwm0: omap-pwm@timer5 { - compatible = "ti,omap-dmtimer-pwm"; - ti,timers = <&timer5>; - #pwm-cells = <3>; - }; - - pwm1: omap-pwm@timer6 { - compatible = "ti,omap-dmtimer-pwm"; - ti,timers = <&timer6>; - #pwm-cells = <3>; - }; - - beeper: pwm-beep { - compatible = "pwm-beeper"; - pwms = <&pwm0 0 0 0>; - }; - - pwmbacklight: pwm-bkl { - compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000 0>; - - default-brightness-level = <255>; - brightness-levels = <0 16 32 64 128 170 202 234 255>; - - power-supply = <&vmmcsd_fixed>; - enable-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; - }; -}; - -&uart0 { /* console uart */ - u-boot,dm-spl; - status = "okay"; -}; - -&uart1 { - status = "okay"; -}; - -&i2c0 { - u-boot,dm-spl; - status = "okay"; - clock-frequency = <400000>; - - tps: tps@24 { /* PMIC controller */ - u-boot,dm-spl; - reg = <0x24>; - compatible = "ti,tps65217"; - - tps_bl: backlight { - compatible = "ti,tps65217-bl"; - isel = <1>; /* 1 - ISET1, 2 ISET2 */ - fdim = <1000>; /* TPS65217_BL_FDIM_1kHZ */ - default-brightness = <50>; - }; - }; -}; - -&i2c2 { - status = "okay"; - clock-frequency = <100000>; -}; - -&spi0 { - u-boot,dm-spl; - status = "okay"; - - cs-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>, - <&gpio0 6 GPIO_ACTIVE_HIGH>, - <0>, - <0>; - - spi-max-frequency = <24000000>; - - spi_flash: spiflash@0 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; - compatible = "spidev", "jedec,spi-nor"; - spi-max-frequency = <24000000>; - reg = <0>; - }; -}; - -&edma { - status = "okay"; -}; - -&cppi41dma { - status = "okay"; -}; - -&usb { - status = "okay"; -}; - -&usb_ctrl_mod { - status = "okay"; -}; - -&usb0_phy { - status = "okay"; -}; - -&usb1_phy { - status = "okay"; -}; - -&usb0 { - status = "okay"; - dr_mode = "host"; -}; - -&usb1 { - status = "okay"; - dr_mode = "host"; -}; - -&davinci_mdio { - status = "okay"; - - phy0: ethernet-phy@0 { - reg = <1>; - }; - - phy1: ethernet-phy@1 { - reg = <2>; - }; -}; - -&mac { - status = "okay"; -}; - -&cpsw_emac0 { - phy-handle = <&phy0>; - dual_emac_res_vlan = <1>; - phy-mode = "mii"; -}; - -&cpsw_emac1 { - phy-handle = <&phy1>; - dual_emac_res_vlan = <2>; - phy-mode = "mii"; -}; - -&mmc1 { - u-boot,dm-spl; - vmmc-supply = <&vmmcsd_fixed>; - bus-width = <0x4>; - ti,non-removable; - ti,needs-special-hs-handling; - ti,vcc-aux-disable-is-sleep; - status = "okay"; -}; - -&mmc2 { - u-boot,dm-spl; - vmmc-supply = <&vmmcsd_fixed>; - bus-width = <0x8>; - ti,non-removable; - ti,needs-special-hs-handling; - ti,vcc-aux-disable-is-sleep; - status = "okay"; -}; - -&l4_per { - - segment@300000 { - - target-module@e000 { - u-boot,dm-pre-reloc; - - lcdc: lcdc@0 { - u-boot,dm-pre-reloc; - status = "disabled"; - }; - }; - }; -}; - -&elm { - status = "okay"; -}; - -&sham { - status = "okay"; -}; - -&aes { - status = "okay"; -}; - -&gpio0 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&gpio1 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&gpio2 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&gpio3 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&wdt2 { - ti,no-reset-on-init; - ti,no-idle-on-init; -}; - -&tscadc { - status = "okay"; - tsc { - ti,wires = <4>; - ti,x-plate-resistance = <200>; - ti,zx-cutoff-ratio = <40>; - ti,min_deviation = <60>; - ti,max_deviation = <600>; - ti,coordinate-readouts = <5>; - ti,wire-config = <0x00 0x11 0x22 0x33>; - - bnr-buttons { - Home-Button {}; - }; - }; - - adc { - ti,adc-channels = <5 6 7>; - }; -}; - -&timer6 { /* used for cpsw end device */ - status = "okay"; - ti,no-reset-on-init; - ti,no-idle-on-init; -}; - -&timer7 { /* used for cpsw end device */ - status = "okay"; - ti,no-reset-on-init; - ti,no-idle-on-init; -}; - -&wdt2 { - status = "okay"; - ti,no-reset-on-init; - ti,no-idle-on-init; -}; - -&epwmss0 { - status = "okay"; -}; - -&tscadc { - status = "okay"; -}; - -&dcan0 { - status = "okay"; -}; - -&dcan1 { - status = "okay"; -}; - -&sham { - status = "disabled"; -}; - -&aes { - status = "disabled"; -}; - -&rng { - status = "disabled"; -}; diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts index cc577761fa6..1fbacf985f6 100644 --- a/arch/arm/dts/ast2500-evb.dts +++ b/arch/arm/dts/ast2500-evb.dts @@ -78,6 +78,39 @@ pinctrl-0 = <&pinctrl_sd2_default>; }; +&fmc { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fwspics1_default>; + + flash@0 { + status = "okay"; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <2>; + spi-rx-bus-width = <2>; + }; + + flash@1 { + status = "okay"; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <2>; + spi-rx-bus-width = <2>; + }; +}; + +&spi1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1cs1_default>; + + flash@0 { + status = "okay"; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <2>; + spi-rx-bus-width = <2>; + }; +}; + &i2c3 { status = "okay"; diff --git a/arch/arm/dts/ast2500.dtsi b/arch/arm/dts/ast2500.dtsi index cea08e6f08d..320d2e5340a 100644 --- a/arch/arm/dts/ast2500.dtsi +++ b/arch/arm/dts/ast2500.dtsi @@ -57,23 +57,26 @@ ranges; fmc: flash-controller@1e620000 { - reg = < 0x1e620000 0xc4 - 0x20000000 0x10000000 >; + reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2500-fmc"; + clocks = <&scu ASPEED_CLK_AHB>; + num-cs = <3>; status = "disabled"; - interrupts = <19>; + flash@0 { reg = < 0 >; compatible = "jedec,spi-nor"; status = "disabled"; }; + flash@1 { reg = < 1 >; compatible = "jedec,spi-nor"; status = "disabled"; }; + flash@2 { reg = < 2 >; compatible = "jedec,spi-nor"; @@ -82,17 +85,20 @@ }; spi1: flash-controller@1e630000 { - reg = < 0x1e630000 0xc4 - 0x30000000 0x08000000 >; + reg = <0x1e630000 0xc4>, <0x30000000 0x08000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2500-spi"; + clocks = <&scu ASPEED_CLK_AHB>; + num-cs = <2>; status = "disabled"; + flash@0 { reg = < 0 >; compatible = "jedec,spi-nor"; status = "disabled"; }; + flash@1 { reg = < 1 >; compatible = "jedec,spi-nor"; @@ -101,17 +107,20 @@ }; spi2: flash-controller@1e631000 { - reg = < 0x1e631000 0xc4 - 0x38000000 0x08000000 >; + reg = <0x1e631000 0xc4>, <0x38000000 0x08000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2500-spi"; + clocks = <&scu ASPEED_CLK_AHB>; + num-cs = <2>; status = "disabled"; + flash@0 { reg = < 0 >; compatible = "jedec,spi-nor"; status = "disabled"; }; + flash@1 { reg = < 1 >; compatible = "jedec,spi-nor"; diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts index a9bba968160..a097f320e4c 100644 --- a/arch/arm/dts/ast2600-evb.dts +++ b/arch/arm/dts/ast2600-evb.dts @@ -72,12 +72,10 @@ &fmc { status = "okay"; - pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fmcquad_default>; flash@0 { - compatible = "spi-flash", "sst,w25q256"; status = "okay"; spi-max-frequency = <50000000>; spi-tx-bus-width = <4>; @@ -85,7 +83,6 @@ }; flash@1 { - compatible = "spi-flash", "sst,w25q256"; status = "okay"; spi-max-frequency = <50000000>; spi-tx-bus-width = <4>; @@ -93,7 +90,6 @@ }; flash@2 { - compatible = "spi-flash", "sst,w25q256"; status = "okay"; spi-max-frequency = <50000000>; spi-tx-bus-width = <4>; @@ -103,14 +99,12 @@ &spi1 { status = "okay"; - pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default &pinctrl_spi1cs1_default &pinctrl_spi1wp_default &pinctrl_spi1wp_default &pinctrl_spi1quad_default>; flash@0 { - compatible = "spi-flash", "sst,w25q256"; status = "okay"; spi-max-frequency = <50000000>; spi-tx-bus-width = <4>; @@ -120,13 +114,11 @@ &spi2 { status = "okay"; - pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default &pinctrl_spi2cs2_default &pinctrl_spi2quad_default>; flash@0 { - compatible = "spi-flash", "sst,w25q256"; status = "okay"; spi-max-frequency = <50000000>; spi-tx-bus-width = <4>; diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index ac8cd4d67d8..8d91eedc176 100644 --- a/arch/arm/dts/ast2600.dtsi +++ b/arch/arm/dts/ast2600.dtsi @@ -129,74 +129,78 @@ }; fmc: flash-controller@1e620000 { - reg = < 0x1e620000 0xc4 - 0x20000000 0x10000000 >; + reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2600-fmc"; status = "disabled"; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; clocks = <&scu ASPEED_CLK_AHB>; num-cs = <3>; + flash@0 { - reg = < 0 >; + reg = <0>; compatible = "jedec,spi-nor"; status = "disabled"; }; + flash@1 { - reg = < 1 >; + reg = <1>; compatible = "jedec,spi-nor"; status = "disabled"; }; + flash@2 { - reg = < 2 >; + reg = <2>; compatible = "jedec,spi-nor"; status = "disabled"; }; }; spi1: flash-controller@1e630000 { - reg = < 0x1e630000 0xc4 - 0x30000000 0x08000000 >; + reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2600-spi"; clocks = <&scu ASPEED_CLK_AHB>; num-cs = <2>; status = "disabled"; + flash@0 { - reg = < 0 >; + reg = <0>; compatible = "jedec,spi-nor"; status = "disabled"; }; + flash@1 { - reg = < 1 >; + reg = <1>; compatible = "jedec,spi-nor"; status = "disabled"; }; }; spi2: flash-controller@1e631000 { - reg = < 0x1e631000 0xc4 - 0x50000000 0x08000000 >; + reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>; #address-cells = <1>; #size-cells = <0>; compatible = "aspeed,ast2600-spi"; clocks = <&scu ASPEED_CLK_AHB>; num-cs = <3>; status = "disabled"; + flash@0 { - reg = < 0 >; + reg = <0>; compatible = "jedec,spi-nor"; status = "disabled"; }; + flash@1 { - reg = < 1 >; + reg = <1>; compatible = "jedec,spi-nor"; status = "disabled"; }; + flash@2 { - reg = < 2 >; + reg = <2>; compatible = "jedec,spi-nor"; status = "disabled"; }; diff --git a/arch/arm/dts/dragonboard410c-uboot.dtsi b/arch/arm/dts/dragonboard410c-uboot.dtsi index 9c1be2566fd..e4fecaa19e6 100644 --- a/arch/arm/dts/dragonboard410c-uboot.dtsi +++ b/arch/arm/dts/dragonboard410c-uboot.dtsi @@ -14,7 +14,7 @@ soc { u-boot,dm-pre-reloc; - qcom,tlmm@1000000 { + pinctrl@1000000 { u-boot,dm-pre-reloc; uart { diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts index 50523712cb3..59cf45eb175 100644 --- a/arch/arm/dts/dragonboard410c.dts +++ b/arch/arm/dts/dragonboard410c.dts @@ -60,9 +60,13 @@ reg = <0x60000 0x8000>; }; - pinctrl: qcom,tlmm@1000000 { - compatible = "qcom,tlmm-apq8016"; + soc_gpios: pinctrl@1000000 { + compatible = "qcom,msm8916-pinctrl"; reg = <0x1000000 0x400000>; + gpio-controller; + gpio-count = <122>; + gpio-bank-name="soc"; + #gpio-cells = <2>; blsp1_uart: uart { function = "blsp1_uart"; @@ -86,15 +90,6 @@ pinctrl-0 = <&blsp1_uart>; }; - soc_gpios: pinctrl@1000000 { - compatible = "qcom,apq8016-pinctrl"; - reg = <0x1000000 0x300000>; - gpio-controller; - gpio-count = <122>; - gpio-bank-name="soc"; - #gpio-cells = <2>; - }; - ehci@78d9000 { compatible = "qcom,ehci-host"; reg = <0x78d9000 0x400>; diff --git a/arch/arm/dts/dragonboard820c-uboot.dtsi b/arch/arm/dts/dragonboard820c-uboot.dtsi index 8610d7ec37c..2270ac73bfc 100644 --- a/arch/arm/dts/dragonboard820c-uboot.dtsi +++ b/arch/arm/dts/dragonboard820c-uboot.dtsi @@ -13,7 +13,7 @@ soc { u-boot,dm-pre-reloc; - qcom,tlmm@1010000 { + pinctrl@1010000 { u-boot,dm-pre-reloc; uart { diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts index b72a2471cfa..aaca681d2e1 100644 --- a/arch/arm/dts/dragonboard820c.dts +++ b/arch/arm/dts/dragonboard820c.dts @@ -64,8 +64,8 @@ reg = <0x300000 0x90000>; }; - pinctrl: qcom,tlmm@1010000 { - compatible = "qcom,tlmm-apq8096"; + pinctrl: pinctrl@1010000 { + compatible = "qcom,msm8996-pinctrl"; reg = <0x1010000 0x400000>; blsp8_uart: uart { diff --git a/arch/arm/dts/qcom-ipq4019.dtsi b/arch/arm/dts/qcom-ipq4019.dtsi index 7a52ea2c4e4..181732d2622 100644 --- a/arch/arm/dts/qcom-ipq4019.dtsi +++ b/arch/arm/dts/qcom-ipq4019.dtsi @@ -75,9 +75,13 @@ u-boot,dm-pre-reloc; }; - pinctrl: qcom,tlmm@1000000 { - compatible = "qcom,tlmm-ipq4019"; + soc_gpios: pinctrl@1000000 { + compatible = "qcom,ipq4019-pinctrl"; reg = <0x1000000 0x300000>; + gpio-controller; + gpio-count = <100>; + gpio-bank-name="soc"; + #gpio-cells = <2>; u-boot,dm-pre-reloc; }; @@ -90,16 +94,6 @@ u-boot,dm-pre-reloc; }; - soc_gpios: pinctrl@1000000 { - compatible = "qcom,ipq4019-pinctrl"; - reg = <0x1000000 0x300000>; - gpio-controller; - gpio-count = <100>; - gpio-bank-name="soc"; - #gpio-cells = <2>; - u-boot,dm-pre-reloc; - }; - blsp1_spi1: spi@78b5000 { compatible = "qcom,spi-qup-v2.2.1"; reg = <0x78b5000 0x600>; diff --git a/arch/arm/dts/qcs404-evb-uboot.dtsi b/arch/arm/dts/qcs404-evb-uboot.dtsi index c18080a4834..c73d71e8c7c 100644 --- a/arch/arm/dts/qcs404-evb-uboot.dtsi +++ b/arch/arm/dts/qcs404-evb-uboot.dtsi @@ -22,3 +22,9 @@ }; }; }; + +&pms405_gpios { + usb_vbus_boost_pin { + gpios = <&pms405_gpios 2 0>; + }; +}; diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts index 4f0ae20bdb3..0639af8fe33 100644 --- a/arch/arm/dts/qcs404-evb.dts +++ b/arch/arm/dts/qcs404-evb.dts @@ -38,7 +38,7 @@ compatible = "simple-bus"; pinctrl_north@1300000 { - compatible = "qcom,tlmm-qcs404"; + compatible = "qcom,qcs404-pinctrl"; reg = <0x1300000 0x200000>; blsp1_uart2: uart { @@ -52,6 +52,13 @@ reg = <0x1800000 0x80000>; #address-cells = <0x1>; #size-cells = <0x0>; + #clock-cells = <1>; + }; + + reset: gcc-reset@1800000 { + compatible = "qcom,gcc-reset-qcs404"; + reg = <0x1800000 0x80000>; + #reset-cells = <1>; }; debug_uart: serial@78b1000 { @@ -75,6 +82,117 @@ mmc-ddr-1_8v; mmc-hs400-1_8v; }; + + usb3_phy: phy@78000 { + compatible = "qcom,usb-ss-28nm-phy"; + #phy-cells = <0>; + reg = <0x78000 0x400>; + clocks = <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB3_PHY_PIPE_CLK>; + clock-names = "ahb", "pipe"; + resets = <&reset GCC_USB3_PHY_BCR>, + <&reset GCC_USB3PHY_PHY_BCR>; + reset-names = "com", "phy"; + }; + + usb2_phy_prim: phy@7a000 { + compatible = "qcom,usb-hs-28nm-femtophy"; + #phy-cells = <0>; + reg = <0x7a000 0x200>; + clocks = <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ahb", "sleep"; + resets = <&reset GCC_USB_HS_PHY_CFG_AHB_BCR>, + <&reset GCC_USB2A_PHY_BCR>; + reset-names = "phy", "por"; + }; + + usb2_phy_sec: phy@7c000 { + compatible = "qcom,usb-hs-28nm-femtophy"; + #phy-cells = <0>; + reg = <0x7c000 0x200>; + clocks = <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ahb", "sleep"; + resets = <&reset GCC_QUSB2_PHY_BCR>, + <&reset GCC_USB2_HS_PHY_ONLY_BCR>; + reset-names = "phy", "por"; + }; + + usb3: usb@7678800 { + compatible = "qcom,dwc3"; + reg = <0x7678800 0x400>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&gcc GCC_USB30_MASTER_CLK>, + <&gcc GCC_SYS_NOC_USB3_CLK>, + <&gcc GCC_USB30_SLEEP_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>; + clock-names = "core", "iface", "sleep", "mock_utmi"; + + dwc3@7580000 { + compatible = "snps,dwc3"; + reg = <0x7580000 0xcd00>; + phys = <&usb2_phy_prim>, <&usb3_phy>; + phy-names = "usb2-phy", "usb3-phy"; + dr_mode = "host"; + snps,has-lpm-erratum; + snps,hird-threshold = /bits/ 8 <0x10>; + snps,usb3_lpm_capable; + maximum-speed = "super-speed"; + }; + }; + + usb2: usb@79b8800 { + compatible = "qcom,dwc3"; + reg = <0x79b8800 0x400>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>, + <&gcc GCC_PCNOC_USB2_CLK>, + <&gcc GCC_USB_HS_INACTIVITY_TIMERS_CLK>, + <&gcc GCC_USB20_MOCK_UTMI_CLK>; + clock-names = "core", "iface", "sleep", "mock_utmi"; + + dwc3@78c0000 { + compatible = "snps,dwc3"; + reg = <0x78c0000 0xcc00>; + phys = <&usb2_phy_sec>; + phy-names = "usb2-phy"; + dr_mode = "peripheral"; + snps,has-lpm-erratum; + snps,hird-threshold = /bits/ 8 <0x10>; + snps,usb3_lpm_capable; + maximum-speed = "high-speed"; + }; + }; + + spmi@200f000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x200f000 0x1000 + 0x2400000 0x400000 + 0x2c00000 0x400000>; + #address-cells = <0x1>; + #size-cells = <0x1>; + + pms405_0: pms405@0 { + compatible = "qcom,spmi-pmic"; + reg = <0x0 0x1>; + #address-cells = <0x1>; + #size-cells = <0x1>; + + pms405_gpios: pms405_gpios@c000 { + compatible = "qcom,pms405-gpio"; + reg = <0xc000 0x400>; + gpio-controller; + gpio-count = <12>; + #gpio-cells = <2>; + gpio-bank-name="pmic"; + }; + }; + }; }; }; diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi index df5b6dfcfc3..607af277f8b 100644 --- a/arch/arm/dts/sdm845.dtsi +++ b/arch/arm/dts/sdm845.dtsi @@ -37,7 +37,7 @@ }; tlmm_north: pinctrl_north@3900000 { - compatible = "qcom,tlmm-sdm845"; + compatible = "qcom,sdm845-pinctrl"; reg = <0x3900000 0x400000>; gpio-count = <150>; gpio-controller; diff --git a/arch/arm/dts/total_compute.dts b/arch/arm/dts/total_compute.dts index 4399269a441..96edacda0b3 100644 --- a/arch/arm/dts/total_compute.dts +++ b/arch/arm/dts/total_compute.dts @@ -45,4 +45,8 @@ clock-frequency = <24000000>; clock-output-names = "bp:clock24mhz"; }; + psci { + compatible = "arm,psci-1.0", "arm,psci-0.2"; + method = "smc"; + }; }; diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index 37155df0fd4..edc147d63f1 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -192,6 +192,17 @@ reg = <0xf8006000 0x1000>; }; + ocm: sram@fffc0000 { + compatible = "mmio-sram"; + reg = <0xfffc0000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xfffc0000 0x10000>; + ocm-sram@0 { + reg = <0x0 0x10000>; + }; + }; + uart0: serial@e0000000 { compatible = "xlnx,xuartps", "cdns,uart-r1p8"; status = "disabled"; @@ -235,19 +246,19 @@ }; qspi: spi@e000d000 { - clock-names = "ref_clk", "pclk"; - clocks = <&clkc 10>, <&clkc 43>; compatible = "xlnx,zynq-qspi-1.0"; - status = "disabled"; + reg = <0xe000d000 0x1000>; interrupt-parent = <&intc>; interrupts = <0 19 4>; - reg = <0xe000d000 0x1000>; + clocks = <&clkc 10>, <&clkc 43>; + clock-names = "ref_clk", "pclk"; + status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; gem0: ethernet@e000b000 { - compatible = "cdns,zynq-gem", "cdns,gem"; + compatible = "xlnx,zynq-gem", "cdns,zynq-gem", "cdns,gem"; reg = <0xe000b000 0x1000>; status = "disabled"; interrupts = <0 22 4>; @@ -258,7 +269,7 @@ }; gem1: ethernet@e000c000 { - compatible = "cdns,zynq-gem", "cdns,gem"; + compatible = "xlnx,zynq-gem", "cdns,zynq-gem", "cdns,gem"; reg = <0xe000c000 0x1000>; status = "disabled"; interrupts = <0 45 4>; @@ -378,9 +389,9 @@ devcfg: devcfg@f8007000 { compatible = "xlnx,zynq-devcfg-1.0"; + reg = <0xf8007000 0x100>; interrupt-parent = <&intc>; interrupts = <0 8 4>; - reg = <0xf8007000 0x100>; clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>; clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3"; syscon = <&slcr>; @@ -416,6 +427,7 @@ }; scutimer: timer@f8f00600 { + u-boot,dm-pre-reloc; interrupt-parent = <&intc>; interrupts = <1 13 0x301>; compatible = "arm,cortex-a9-twd-timer"; diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts index f2e05a55b95..1bd4f8c9f66 100644 --- a/arch/arm/dts/zynq-zc702.dts +++ b/arch/arm/dts/zynq-zc702.dts @@ -64,19 +64,6 @@ }; }; -&amba { - ocm: sram@fffc0000 { - compatible = "mmio-sram"; - reg = <0xfffc0000 0x10000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0xfffc0000 0x10000>; - ocm-sram@0 { - reg = <0x0 0x10000>; - }; - }; -}; - &can0 { status = "okay"; pinctrl-names = "default"; diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 7b09d751518..b99eb07b00a 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -260,11 +260,19 @@ assigned-clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; }; +&dwc3_0 { + clocks = <&zynqmp_clk USB3_DUAL_REF>; +}; + &usb1 { clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; assigned-clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; }; +&dwc3_1 { + clocks = <&zynqmp_clk USB3_DUAL_REF>; +}; + &watchdog0 { clocks = <&zynqmp_clk WDT>; }; diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index 37c56181c9c..3fa18f560c9 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -155,8 +155,12 @@ phy-handle = <&phy0>; phy-mode = "sgmii"; is-internal-pcspma; - phy0: ethernet-phy@0 { /* u131 M88E1512 */ - reg = <0>; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@0 { /* u131 M88E1512 */ + reg = <0>; + }; }; }; @@ -203,6 +207,18 @@ &i2c0 { /* MIO 34-35 - can't stay here */ status = "okay"; clock-frequency = <400000>; + + tca6416_u233: gpio@20 { /* u233 */ + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; /* interrupt not connected */ + #gpio-cells = <2>; + gpio-line-names = "MAX6643_OT_B", "MAX6643_FANFAIL_B", "", "", /* 0 - 3 */ + "PMBUS2_INA226_ALERT", "", "", "MAX6643_FULLSPD", /* 4 - 7 */ + "FMCP1_FMC_PRSNT_M2C_B", "FMCP2_FMC_PRSNT_M2C_B", "FMCP1_FMCP_PRSNT_M2C_B", "FMCP2_FMCP_PRSNT_M2C_B", /* 10 - 13 */ + "VCCINT_VRHOT_B", "8A34001_EXP_RST_B", "PMBUS_ALERT", "PMBUS1_INA226_ALERT"; /* 14 - 17 */ + }; + i2c-mux@74 { /* u33 */ compatible = "nxp,pca9548"; #address-cells = <1>; diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index ac349a9dcc5..bae24aabdbd 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -214,13 +214,17 @@ }; partition@2240000 { label = "SHA256"; - reg = <0x2240000 0x10000>; /* 256B but 64KB sector */ + reg = <0x2240000 0x40000>; /* 256B but 256KB sector */ read-only; lock; }; - partition@2250000 { + partition@2280000 { + label = "Secure OS Storage"; + reg = <0x2280000 0x20000>; /* 128KB */ + }; + partition@22A0000 { label = "User"; - reg = <0x2250000 0x1db0000>; /* 29.5 MB */ + reg = <0x22A0000 0x1db0000>; /* 29.5 MB */ }; }; }; diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index fbc6e752da9..f4184f79a57 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -529,7 +529,7 @@ }; gem0: ethernet@ff0b0000 { - compatible = "cdns,zynqmp-gem", "cdns,gem"; + compatible = "xlnx,zynqmp-gem", "cdns,zynqmp-gem", "cdns,gem"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 57 4>, <0 57 4>; @@ -543,7 +543,7 @@ }; gem1: ethernet@ff0c0000 { - compatible = "cdns,zynqmp-gem", "cdns,gem"; + compatible = "xlnx,zynqmp-gem", "cdns,zynqmp-gem", "cdns,gem"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 59 4>, <0 59 4>; @@ -557,7 +557,7 @@ }; gem2: ethernet@ff0d0000 { - compatible = "cdns,zynqmp-gem", "cdns,gem"; + compatible = "xlnx,zynqmp-gem", "cdns,zynqmp-gem", "cdns,gem"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 61 4>, <0 61 4>; @@ -571,7 +571,7 @@ }; gem3: ethernet@ff0e0000 { - compatible = "cdns,zynqmp-gem", "cdns,gem"; + compatible = "xlnx,zynqmp-gem", "cdns,zynqmp-gem", "cdns,gem"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 63 4>, <0 63 4>; @@ -869,6 +869,7 @@ iommus = <&smmu 0x860>; snps,quirk-frame-length-adjustment = <0x20>; snps,refclk_fladj; + clock-names = "ref"; snps,enable_guctl1_resume_quirk; snps,enable_guctl1_ipd_quirk; snps,xhci-stream-quirk; @@ -900,6 +901,7 @@ iommus = <&smmu 0x861>; snps,quirk-frame-length-adjustment = <0x20>; snps,refclk_fladj; + clock-names = "ref"; snps,enable_guctl1_resume_quirk; snps,enable_guctl1_ipd_quirk; snps,xhci-stream-quirk; diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index b1469185860..8d42ef4823e 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h @@ -58,16 +58,22 @@ #endif /* - * We only support cores that support at least Thumb-1 and thus we use - * 'bx lr' + * Use 'bx lr' everywhere except ARMv4 (without 'T') where only 'mov pc, lr' + * works */ .irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo .macro ret\c, reg + + /* ARMv4- don't know bx lr but the assembler fails to see that */ +#ifdef __ARM_ARCH_4__ + mov\c pc, \reg +#else .ifeqs "\reg", "lr" bx\c \reg .else mov\c pc, \reg .endif +#endif .endm .endr diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 6ee2a767615..cd6112dfcda 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -101,7 +101,7 @@ struct arch_global_data { #include <asm-generic/global_data.h> -#if defined(__clang__) || defined(CONFIG_LTO) +#if defined(__clang__) || defined(LTO_ENABLE) #define DECLARE_GLOBAL_DATA_PTR #define gd get_gd() diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index c603fe61bc4..62cf80f3739 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -33,10 +33,12 @@ obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o obj-$(CONFIG_CMD_BOOTI) += bootm.o image.o obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_BOOTZ) += bootm.o zimage.o -obj-$(CONFIG_SYS_L2_PL310) += cache-pl310.o else obj-$(CONFIG_$(SPL_TPL_)FRAMEWORK) += spl.o -obj-$(CONFIG_SPL_FRAMEWORK) += zimage.o +ifdef CONFIG_SPL_FRAMEWORK +obj-$(CONFIG_CMD_BOOTI) += image.o +obj-$(CONFIG_CMD_BOOTZ) += zimage.o +endif obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o endif ifdef CONFIG_ARM64 @@ -46,6 +48,7 @@ else obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset.o obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o endif +obj-$(CONFIG_$(SPL_TPL_)SYS_L2_PL310) += cache-pl310.o obj-$(CONFIG_$(SPL_TPL_)SEMIHOSTING) += semihosting.o ifneq ($(filter y,$(CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR) $(CONFIG_SAVE_PREV_BL_FDT_ADDR)),) diff --git a/arch/arm/lib/lib1funcs.S b/arch/arm/lib/lib1funcs.S index 700eee5fbbe..7ff4446dd64 100644 --- a/arch/arm/lib/lib1funcs.S +++ b/arch/arm/lib/lib1funcs.S @@ -377,7 +377,7 @@ ENTRY(__gnu_thumb1_case_sqi) lsls r1, r1, #1 add lr, lr, r1 pop {r1} - bx lr + ret lr ENDPROC(__gnu_thumb1_case_sqi) .popsection @@ -391,7 +391,7 @@ ENTRY(__gnu_thumb1_case_uqi) lsls r1, r1, #1 add lr, lr, r1 pop {r1} - bx lr + ret lr ENDPROC(__gnu_thumb1_case_uqi) .popsection @@ -406,7 +406,7 @@ ENTRY(__gnu_thumb1_case_shi) lsls r1, r1, #1 add lr, lr, r1 pop {r0, r1} - bx lr + ret lr ENDPROC(__gnu_thumb1_case_shi) .popsection @@ -421,7 +421,7 @@ ENTRY(__gnu_thumb1_case_uhi) lsls r1, r1, #1 add lr, lr, r1 pop {r0, r1} - bx lr + ret lr ENDPROC(__gnu_thumb1_case_uhi) .popsection #endif diff --git a/arch/arm/lib/memcpy.S b/arch/arm/lib/memcpy.S index eee7a219ce3..a1c996f94ef 100644 --- a/arch/arm/lib/memcpy.S +++ b/arch/arm/lib/memcpy.S @@ -59,7 +59,7 @@ #endif ENTRY(memcpy) cmp r0, r1 - bxeq lr + reteq lr enter r4, lr @@ -148,7 +148,7 @@ ENTRY(memcpy) str1b r0, ip, cs, abort=21f exit r4, lr - bx lr + ret lr 9: rsb ip, ip, #4 cmp ip, #2 @@ -258,7 +258,7 @@ ENTRY(memcpy) .macro copy_abort_end ldmfd sp!, {r4, lr} - bx lr + ret lr .endm ENDPROC(memcpy) diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S index 5102bfabde4..dd6f2e3bd5e 100644 --- a/arch/arm/lib/relocate.S +++ b/arch/arm/lib/relocate.S @@ -61,7 +61,7 @@ ENTRY(relocate_vectors) stmia r1!, {r2-r8,r10} #endif #endif - bx lr + ret lr ENDPROC(relocate_vectors) @@ -127,13 +127,7 @@ relocate_done: mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */ #endif - /* ARMv4- don't know bx lr but the assembler fails to see that */ - -#ifdef __ARM_ARCH_4__ - mov pc, lr -#else - bx lr -#endif + ret lr ENDPROC(relocate_code) diff --git a/arch/arm/lib/setjmp.S b/arch/arm/lib/setjmp.S index 176a1d5315b..2f041aeef01 100644 --- a/arch/arm/lib/setjmp.S +++ b/arch/arm/lib/setjmp.S @@ -17,7 +17,7 @@ ENTRY(setjmp) mov ip, sp stm a1, {v1-v8, ip, lr} mov a1, #0 - bx lr + ret lr ENDPROC(setjmp) .popsection @@ -31,6 +31,6 @@ ENTRY(longjmp) bne 1f mov a1, #1 1: - bx lr + ret lr ENDPROC(longjmp) .popsection diff --git a/arch/arm/mach-at91/phy.c b/arch/arm/mach-at91/phy.c index 6101eee3589..f4484a77c7d 100644 --- a/arch/arm/mach-at91/phy.c +++ b/arch/arm/mach-at91/phy.c @@ -42,7 +42,7 @@ void at91_phy_reset(void) /* Wait for end of hardware reset */ while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) { /* avoid shutdown by watchdog */ - WATCHDOG_RESET(); + schedule(); mdelay(10); /* timeout for not getting stuck in an endless loop */ diff --git a/arch/arm/mach-imx/i2c-mxv7.c b/arch/arm/mach-imx/i2c-mxv7.c index d36347d8e82..85d648b56ed 100644 --- a/arch/arm/mach-imx/i2c-mxv7.c +++ b/arch/arm/mach-imx/i2c-mxv7.c @@ -46,7 +46,7 @@ int force_idle_bus(void *priv) scl = gpio_get_value(p->scl.gp); if ((sda & scl) == 1) break; - WATCHDOG_RESET(); + schedule(); elapsed = get_timer(start_time); if (elapsed > (CONFIG_SYS_HZ / 5)) { /* .2 seconds */ ret = -EBUSY; diff --git a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c index c51a75ee94b..036fec93d72 100644 --- a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c +++ b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c @@ -14,6 +14,8 @@ #include <dm.h> #include <errno.h> #include <asm/io.h> +#include <dm/device_compat.h> +#include <dm/lists.h> #include <dm/pinctrl.h> #include <linux/bitops.h> #include "pinctrl-snapdragon.h" @@ -110,6 +112,32 @@ static int msm_pinconf_set(struct udevice *dev, unsigned int pin_selector, return 0; } +static int msm_pinctrl_bind(struct udevice *dev) +{ + ofnode node = dev_ofnode(dev); + const char *name; + int ret; + + ofnode_get_property(node, "gpio-controller", &ret); + if (ret < 0) + return 0; + + /* Get the name of gpio node */ + name = ofnode_get_name(node); + if (!name) + return -EINVAL; + + /* Bind gpio node */ + ret = device_bind_driver_to_node(dev, "gpio_msm", + name, node, NULL); + if (ret) + return ret; + + dev_dbg(dev, "bind %s\n", name); + + return 0; +} + static struct pinctrl_ops msm_pinctrl_ops = { .get_pins_count = msm_get_pins_count, .get_pin_name = msm_get_pin_name, @@ -123,7 +151,7 @@ static struct pinctrl_ops msm_pinctrl_ops = { }; static const struct udevice_id msm_pinctrl_ids[] = { - { .compatible = "qcom,tlmm-ipq4019", .data = (ulong)&ipq4019_data }, + { .compatible = "qcom,ipq4019-pinctrl", .data = (ulong)&ipq4019_data }, { } }; @@ -134,4 +162,5 @@ U_BOOT_DRIVER(pinctrl_snapdraon) = { .priv_auto = sizeof(struct msm_pinctrl_priv), .ops = &msm_pinctrl_ops, .probe = msm_pinctrl_probe, + .bind = msm_pinctrl_bind, }; diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index a81b8e2b0df..2ebe341ed1b 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -14,6 +14,7 @@ config ARMADA_32BIT select SPL_SKIP_LOWLEVEL_INIT if SPL select SPL_SIMPLE_BUS if SPL select SUPPORT_SPL + select SYS_L2_PL310 if !SYS_L2CACHE_OFF select TRANSLATION_OFFSET select SPL_SYS_NO_VECTOR_TABLE if SPL select ARCH_VERY_EARLY_INIT diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index 4add0d9e103..0bba0a4cf9b 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -25,8 +25,6 @@ #define MV88F78X60 /* for the DDR training bin_hdr code */ #endif -#define CONFIG_SYS_L2_PL310 - #define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE /* Needed for SPI NOR booting in SPL */ diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 914d43b0496..78317e474db 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -96,6 +96,7 @@ config TI816X config AM43XX bool "AM43XX SoC" select SPECIFY_CONSOLE_INDEX + select SYS_L2_PL310 if !SYS_L2CACHE_OFF imply NAND_OMAP_ELM imply NAND_OMAP_GPMC imply SPL_DM diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile index 0d31f10f68a..cbaaf23f6b5 100644 --- a/arch/arm/mach-snapdragon/Makefile +++ b/arch/arm/mach-snapdragon/Makefile @@ -16,6 +16,6 @@ obj-y += pinctrl-snapdragon.o obj-y += pinctrl-apq8016.o obj-y += pinctrl-apq8096.o obj-y += pinctrl-qcs404.o -obj-$(CONFIG_SDM845) += pinctrl-sdm845.o +obj-y += pinctrl-sdm845.o obj-$(CONFIG_TARGET_QCS404EVB) += clock-qcs404.o obj-$(CONFIG_TARGET_QCS404EVB) += sysmap-qcs404.o diff --git a/arch/arm/mach-snapdragon/clock-apq8016.c b/arch/arm/mach-snapdragon/clock-apq8016.c index 6e4a0ccb90a..23a37a1714d 100644 --- a/arch/arm/mach-snapdragon/clock-apq8016.c +++ b/arch/arm/mach-snapdragon/clock-apq8016.c @@ -111,3 +111,8 @@ ulong msm_set_rate(struct clk *clk, ulong rate) return 0; } } + +int msm_enable(struct clk *clk) +{ + return 0; +} diff --git a/arch/arm/mach-snapdragon/clock-apq8096.c b/arch/arm/mach-snapdragon/clock-apq8096.c index e5011be8f2e..66184596d56 100644 --- a/arch/arm/mach-snapdragon/clock-apq8096.c +++ b/arch/arm/mach-snapdragon/clock-apq8096.c @@ -93,3 +93,8 @@ ulong msm_set_rate(struct clk *clk, ulong rate) return 0; } } + +int msm_enable(struct clk *clk) +{ + return 0; +} diff --git a/arch/arm/mach-snapdragon/clock-qcs404.c b/arch/arm/mach-snapdragon/clock-qcs404.c index bb8a6fe0677..6fe92afe8dc 100644 --- a/arch/arm/mach-snapdragon/clock-qcs404.c +++ b/arch/arm/mach-snapdragon/clock-qcs404.c @@ -47,6 +47,14 @@ static struct pll_vote_clk gpll0_vote_clk = { .vote_bit = BIT(0), }; +static const struct bcr_regs usb30_master_regs = { + .cfg_rcgr = USB30_MASTER_CFG_RCGR, + .cmd_rcgr = USB30_MASTER_CMD_RCGR, + .M = USB30_MASTER_M, + .N = USB30_MASTER_N, + .D = USB30_MASTER_D, +}; + ulong msm_set_rate(struct clk *clk, ulong rate) { struct msm_clk_priv *priv = dev_get_priv(clk->dev); @@ -77,3 +85,35 @@ ulong msm_set_rate(struct clk *clk, ulong rate) return 0; } + +int msm_enable(struct clk *clk) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + + switch (clk->id) { + case GCC_USB30_MASTER_CLK: + clk_enable_cbc(priv->base + USB30_MASTER_CBCR); + clk_rcg_set_rate_mnd(priv->base, &usb30_master_regs, 4, 0, 0, + CFG_CLK_SRC_GPLL0); + break; + case GCC_SYS_NOC_USB3_CLK: + clk_enable_cbc(priv->base + SYS_NOC_USB3_CBCR); + break; + case GCC_USB30_SLEEP_CLK: + clk_enable_cbc(priv->base + USB30_SLEEP_CBCR); + break; + case GCC_USB30_MOCK_UTMI_CLK: + clk_enable_cbc(priv->base + USB30_MOCK_UTMI_CBCR); + break; + case GCC_USB_HS_PHY_CFG_AHB_CLK: + clk_enable_cbc(priv->base + USB_HS_PHY_CFG_AHB_CBCR); + break; + case GCC_USB2A_PHY_SLEEP_CLK: + clk_enable_cbc(priv->base + USB_HS_PHY_CFG_AHB_CBCR); + break; + default: + return 0; + } + + return 0; +} diff --git a/arch/arm/mach-snapdragon/clock-sdm845.c b/arch/arm/mach-snapdragon/clock-sdm845.c index f69be808983..d6df0365afc 100644 --- a/arch/arm/mach-snapdragon/clock-sdm845.c +++ b/arch/arm/mach-snapdragon/clock-sdm845.c @@ -91,3 +91,8 @@ ulong msm_set_rate(struct clk *clk, ulong rate) return 0; } } + +int msm_enable(struct clk *clk) +{ + return 0; +} diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.c b/arch/arm/mach-snapdragon/clock-snapdragon.c index 5652d2fa36e..fda7098274f 100644 --- a/arch/arm/mach-snapdragon/clock-snapdragon.c +++ b/arch/arm/mach-snapdragon/clock-snapdragon.c @@ -20,6 +20,7 @@ #define CBCR_BRANCH_OFF_BIT BIT(31) extern ulong msm_set_rate(struct clk *clk, ulong rate); +extern int msm_enable(struct clk *clk); /* Enable clock controlled by CBC soft macro */ void clk_enable_cbc(phys_addr_t cbcr) @@ -126,8 +127,14 @@ static ulong msm_clk_set_rate(struct clk *clk, ulong rate) return msm_set_rate(clk, rate); } +static int msm_clk_enable(struct clk *clk) +{ + return msm_enable(clk); +} + static struct clk_ops msm_clk_ops = { .set_rate = msm_clk_set_rate, + .enable = msm_clk_enable, }; static const struct udevice_id msm_clk_ids[] = { diff --git a/arch/arm/mach-snapdragon/include/mach/sysmap-qcs404.h b/arch/arm/mach-snapdragon/include/mach/sysmap-qcs404.h index 4dc96b9fbc3..e448faad2d6 100644 --- a/arch/arm/mach-snapdragon/include/mach/sysmap-qcs404.h +++ b/arch/arm/mach-snapdragon/include/mach/sysmap-qcs404.h @@ -37,4 +37,21 @@ #define SDCC_APPS_CBCR(n) (((n) * 0x1000) + 0x41018) #define SDCC_AHB_CBCR(n) (((n) * 0x1000) + 0x4101C) +/* USB-3.0 controller clock control registers */ +#define SYS_NOC_USB3_CBCR (0x26014) +#define USB30_BCR (0x39000) +#define USB3PHY_BCR (0x39008) +#define USB30_MASTER_CBCR (0x3900C) +#define USB30_SLEEP_CBCR (0x39010) +#define USB30_MOCK_UTMI_CBCR (0x39014) +#define USB30_MOCK_UTMI_CMD_RCGR (0x3901C) +#define USB30_MOCK_UTMI_CFG_RCGR (0x39020) +#define USB30_MASTER_CMD_RCGR (0x39028) +#define USB30_MASTER_CFG_RCGR (0x3902C) +#define USB30_MASTER_M (0x39030) +#define USB30_MASTER_N (0x39034) +#define USB30_MASTER_D (0x39038) +#define USB2A_PHY_SLEEP_CBCR (0x4102C) +#define USB_HS_PHY_CFG_AHB_CBCR (0x41030) + #endif diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c index c2148a5d0a0..ab884ab6bf9 100644 --- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c @@ -10,6 +10,8 @@ #include <dm.h> #include <errno.h> #include <asm/io.h> +#include <dm/device_compat.h> +#include <dm/lists.h> #include <dm/pinctrl.h> #include <linux/bitops.h> #include "pinctrl-snapdragon.h" @@ -113,13 +115,37 @@ static struct pinctrl_ops msm_pinctrl_ops = { .get_function_name = msm_get_function_name, }; +static int msm_pinctrl_bind(struct udevice *dev) +{ + ofnode node = dev_ofnode(dev); + const char *name; + int ret; + + ofnode_get_property(node, "gpio-controller", &ret); + if (ret < 0) + return 0; + + /* Get the name of gpio node */ + name = ofnode_get_name(node); + if (!name) + return -EINVAL; + + /* Bind gpio node */ + ret = device_bind_driver_to_node(dev, "gpio_msm", + name, node, NULL); + if (ret) + return ret; + + dev_dbg(dev, "bind %s\n", name); + + return 0; +} + static const struct udevice_id msm_pinctrl_ids[] = { - { .compatible = "qcom,tlmm-apq8016", .data = (ulong)&apq8016_data }, - { .compatible = "qcom,tlmm-apq8096", .data = (ulong)&apq8096_data }, -#ifdef CONFIG_SDM845 - { .compatible = "qcom,tlmm-sdm845", .data = (ulong)&sdm845_data }, -#endif - { .compatible = "qcom,tlmm-qcs404", .data = (ulong)&qcs404_data }, + { .compatible = "qcom,msm8916-pinctrl", .data = (ulong)&apq8016_data }, + { .compatible = "qcom,msm8996-pinctrl", .data = (ulong)&apq8096_data }, + { .compatible = "qcom,sdm845-pinctrl", .data = (ulong)&sdm845_data }, + { .compatible = "qcom,qcs404-pinctrl", .data = (ulong)&qcs404_data }, { } }; @@ -130,4 +156,5 @@ U_BOOT_DRIVER(pinctrl_snapdraon) = { .priv_auto = sizeof(struct msm_pinctrl_priv), .ops = &msm_pinctrl_ops, .probe = msm_pinctrl_probe, + .bind = msm_pinctrl_bind, }; diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c index ec67a5b0eb7..2c567edd502 100644 --- a/arch/arm/mach-socfpga/spl_a10.c +++ b/arch/arm/mach-socfpga/spl_a10.c @@ -117,7 +117,7 @@ void spl_board_init(void) /* enable console uart printing */ preloader_console_init(); - WATCHDOG_RESET(); + schedule(); arch_early_init_r(); @@ -203,7 +203,7 @@ void spl_board_init(void) */ set_regular_boot(true); - WATCHDOG_RESET(); + schedule(); reset_cpu(); } @@ -268,11 +268,11 @@ void board_init_f(ulong dummy) /* reconfigure and enable the watchdog */ hw_watchdog_init(); - WATCHDOG_RESET(); + schedule(); #endif /* CONFIG_HW_WATCHDOG */ config_dedicated_pins(gd->fdt_blob); - WATCHDOG_RESET(); + schedule(); } /* board specific function prior loading SSBL / U-Boot proper */ diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c index c391b6c7abb..a720d0ba717 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c @@ -1823,7 +1823,7 @@ static int part_delete(struct stm32prog_data *data, * need to switch to associated hwpart 1 or 2 */ if (part->part_id < 0) - if (blk_select_hwpart_devnum(IF_TYPE_MMC, + if (blk_select_hwpart_devnum(UCLASS_MMC, part->dev->dev_id, -part->part_id)) return -1; @@ -1832,7 +1832,7 @@ static int part_delete(struct stm32prog_data *data, /* return to user partition */ if (part->part_id < 0) - blk_select_hwpart_devnum(IF_TYPE_MMC, + blk_select_hwpart_devnum(UCLASS_MMC, part->dev->dev_id, 0); if (blks != blks_size) { ret = -1; diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c index 2932eae7578..1a69bc38979 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c @@ -247,7 +247,7 @@ static int stm32prog_serial_getc_err(void) err = ops->getc(down_serial_dev); if (err == -EAGAIN) { ctrlc(); - WATCHDOG_RESET(); + schedule(); } } while ((err == -EAGAIN) && (!had_ctrlc())); @@ -276,7 +276,7 @@ static bool stm32prog_serial_get_buffer(u8 *buffer, u32 *count) *count -= 1; } else if (err == -EAGAIN) { ctrlc(); - WATCHDOG_RESET(); + schedule(); if (get_timer(start) > TIMEOUT_SERIAL_BUFFER) { err = -ETIMEDOUT; break; @@ -852,7 +852,7 @@ bool stm32prog_serial_loop(struct stm32prog_data *data) stm32prog_serial_result(ACK_BYTE); cmd_func[counter](data); } - WATCHDOG_RESET(); + schedule(); } /* clean device */ diff --git a/arch/arm/mach-versal/include/mach/sys_proto.h b/arch/arm/mach-versal/include/mach/sys_proto.h index 05934c28d67..8e5712e0c9e 100644 --- a/arch/arm/mach-versal/include/mach/sys_proto.h +++ b/arch/arm/mach-versal/include/mach/sys_proto.h @@ -3,6 +3,8 @@ * Copyright 2016 - 2018 Xilinx, Inc. */ +#include <linux/build_bug.h> + enum { TCM_LOCK, TCM_SPLIT, @@ -10,3 +12,9 @@ enum { void tcm_init(u8 mode); void mem_map_fill(void); + +static inline int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value) +{ + BUILD_BUG(); + return -EINVAL; +} diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile index 8737f434d93..d9b2b999e10 100644 --- a/arch/arm/mach-zynq/Makefile +++ b/arch/arm/mach-zynq/Makefile @@ -6,7 +6,6 @@ # (C) Copyright 2008 # Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> -obj-y := timer.o obj-y += cpu.o obj-y += ddrc.o obj-y += slcr.o diff --git a/arch/arm/mach-zynq/clk.c b/arch/arm/mach-zynq/clk.c index 27f6bf21832..1945f60e08f 100644 --- a/arch/arm/mach-zynq/clk.c +++ b/arch/arm/mach-zynq/clk.c @@ -52,10 +52,12 @@ int set_cpu_clk_info(void) return ret; rate = clk_get_rate(&clk) / 1000000; - if (i) + if (i) { gd->bd->bi_ddr_freq = rate; - else + } else { gd->bd->bi_arm_freq = rate; + gd->cpu_clk = clk_get_rate(&clk); + } clk_free(&clk); } diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c deleted file mode 100644 index a51822a5305..00000000000 --- a/arch/arm/mach-zynq/timer.c +++ /dev/null @@ -1,113 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2017 Weidmüller Interface GmbH & Co. KG - * Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> - * - * Copyright (C) 2012 Michal Simek <monstr@monstr.eu> - * Copyright (C) 2011-2017 Xilinx, Inc. All rights reserved. - * - * (C) Copyright 2008 - * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> - * - * (C) Copyright 2004 - * Philippe Robin, ARM Ltd. <philippe.robin@arm.com> - * - * (C) Copyright 2002-2004 - * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> - * - * (C) Copyright 2003 - * Texas Instruments <www.ti.com> - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Alex Zuepke <azu@sysgo.de> - */ - -#include <clk.h> -#include <common.h> -#include <div64.h> -#include <dm.h> -#include <init.h> -#include <time.h> -#include <malloc.h> -#include <asm/global_data.h> -#include <asm/io.h> -#include <asm/arch/hardware.h> -#include <asm/arch/clk.h> - -DECLARE_GLOBAL_DATA_PTR; - -struct scu_timer { - u32 load; /* Timer Load Register */ - u32 counter; /* Timer Counter Register */ - u32 control; /* Timer Control Register */ -}; - -static struct scu_timer *timer_base = - (struct scu_timer *)ZYNQ_SCUTIMER_BASEADDR; - -#define SCUTIMER_CONTROL_PRESCALER_MASK 0x0000FF00 /* Prescaler */ -#define SCUTIMER_CONTROL_PRESCALER_SHIFT 8 -#define SCUTIMER_CONTROL_AUTO_RELOAD_MASK 0x00000002 /* Auto-reload */ -#define SCUTIMER_CONTROL_ENABLE_MASK 0x00000001 /* Timer enable */ - -#define TIMER_LOAD_VAL 0xFFFFFFFF -#define TIMER_PRESCALE 255 - -int timer_init(void) -{ - const u32 emask = SCUTIMER_CONTROL_AUTO_RELOAD_MASK | - (TIMER_PRESCALE << SCUTIMER_CONTROL_PRESCALER_SHIFT) | - SCUTIMER_CONTROL_ENABLE_MASK; - - struct udevice *dev; - struct clk clk; - int ret; - - ret = uclass_get_device_by_driver(UCLASS_CLK, - DM_DRIVER_GET(zynq_clk), &dev); - if (ret) - return ret; - - clk.id = cpu_6or4x_clk; - ret = clk_request(dev, &clk); - if (ret < 0) - return ret; - - gd->cpu_clk = clk_get_rate(&clk); - - clk_free(&clk); - - gd->arch.timer_rate_hz = (gd->cpu_clk / 2) / (TIMER_PRESCALE + 1); - - /* Load the timer counter register */ - writel(0xFFFFFFFF, &timer_base->load); - - /* - * Start the A9Timer device - * Enable Auto reload mode, Clear prescaler control bits - * Set prescaler value, Enable the decrementer - */ - clrsetbits_le32(&timer_base->control, SCUTIMER_CONTROL_PRESCALER_MASK, - emask); - - /* Reset time */ - gd->arch.lastinc = readl(&timer_base->counter) / - (gd->arch.timer_rate_hz / CONFIG_SYS_HZ); - gd->arch.tbl = 0; - - return 0; -} - -/* - * This function is derived from PowerPC code (timebase clock frequency). - * On ARM it returns the number of timer ticks per second. - */ -ulong get_tbclk(void) -{ - return gd->arch.timer_rate_hz; -} diff --git a/arch/arm/mach-zynq/u-boot.lds b/arch/arm/mach-zynq/u-boot.lds index a5169fd9150..3b7c9d515f8 100644 --- a/arch/arm/mach-zynq/u-boot.lds +++ b/arch/arm/mach-zynq/u-boot.lds @@ -75,7 +75,7 @@ SECTIONS *(.__efi_runtime_rel_stop) } - . = ALIGN(4); + . = ALIGN(8); .image_copy_end : { *(.__image_copy_end) @@ -114,7 +114,7 @@ SECTIONS .bss __bss_base (OVERLAY) : { *(.bss*) - . = ALIGN(4); + . = ALIGN(8); __bss_limit = .; } diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c index ebb2ac54db5..cd7437b3e22 100644 --- a/arch/m68k/lib/time.c +++ b/arch/m68k/lib/time.c @@ -72,7 +72,7 @@ void dtimer_interrupt(void *not_used) #if defined(CONFIG_WATCHDOG) || defined (CONFIG_HW_WATCHDOG) if (CONFIG_SYS_WATCHDOG_FREQ && (timestamp % (CONFIG_SYS_WATCHDOG_FREQ)) == 0) { - WATCHDOG_RESET (); + schedule(); } #endif /* CONFIG_WATCHDOG || CONFIG_HW_WATCHDOG */ return; diff --git a/arch/microblaze/lib/Makefile b/arch/microblaze/lib/Makefile index 05f447abba9..dfd8135f4f2 100644 --- a/arch/microblaze/lib/Makefile +++ b/arch/microblaze/lib/Makefile @@ -4,4 +4,5 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_CMD_BDI) += bdinfo.o obj-y += muldi3.o diff --git a/arch/microblaze/lib/bdinfo.c b/arch/microblaze/lib/bdinfo.c new file mode 100644 index 00000000000..41b7a216a43 --- /dev/null +++ b/arch/microblaze/lib/bdinfo.c @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022, Ovidiu Panait <ovpanait@gmail.com> + */ +#include <init.h> +#include <asm/cpuinfo.h> +#include <asm/global_data.h> + +DECLARE_GLOBAL_DATA_PTR; + +void arch_print_bdinfo(void) +{ + struct microblaze_cpuinfo *ci = gd_cpuinfo(); + + if (ci->icache_size) { + bdinfo_print_size("icache", ci->icache_size); + bdinfo_print_size("icache line", ci->icache_line_length); + } + + if (ci->dcache_size) { + bdinfo_print_size("dcache", ci->dcache_size); + bdinfo_print_size("dcache line", ci->dcache_line_length); + } +} diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c b/arch/powerpc/cpu/mpc8xx/cpu_init.c index c8d06b0508d..86b08a61749 100644 --- a/arch/powerpc/cpu/mpc8xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c @@ -31,7 +31,7 @@ void cpu_init_f(immap_t __iomem *immr) out_be32(&immr->im_siu_conf.sc_sypcr, CONFIG_SYS_SYPCR & ~SYPCR_SWE); #endif - WATCHDOG_RESET(); + schedule(); /* SIUMCR - contains debug pin configuration (11-6) */ setbits_be32(&immr->im_siu_conf.sc_siumcr, CONFIG_SYS_SIUMCR); diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c index e52aa75703f..b92df9543eb 100644 --- a/arch/powerpc/lib/bootm.c +++ b/arch/powerpc/lib/bootm.c @@ -84,7 +84,7 @@ static void boot_jump_linux(bootm_headers_t *images) * r9: 0 */ debug(" Booting using OF flat tree...\n"); - WATCHDOG_RESET (); + schedule(); (*kernel) ((struct bd_info *)of_flat_tree, 0, 0, EPAPR_MAGIC, env_get_bootm_mapsize(), 0, 0); /* does not return */ @@ -108,7 +108,7 @@ static void boot_jump_linux(bootm_headers_t *images) struct bd_info *kbd = images->kbd; debug(" Booting using board info...\n"); - WATCHDOG_RESET (); + schedule(); (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end, 0, 0); /* does not return */ @@ -319,7 +319,7 @@ void boot_jump_vxworks(bootm_headers_t *images) * r9: 0 * TCR: WRC = 0, no watchdog timer reset will occur */ - WATCHDOG_RESET(); + schedule(); ((void (*)(void *, ulong, ulong, ulong, ulong, ulong, ulong))images->ep)(images->ft_addr, diff --git a/arch/powerpc/lib/cache.c b/arch/powerpc/lib/cache.c index 19162511cea..c4c5c2d4513 100644 --- a/arch/powerpc/lib/cache.c +++ b/arch/powerpc/lib/cache.c @@ -13,7 +13,7 @@ static ulong maybe_watchdog_reset(ulong flushed) { flushed += CONFIG_SYS_CACHELINE_SIZE; if (flushed >= CONFIG_CACHE_FLUSH_WATCHDOG_THRESHOLD) { - WATCHDOG_RESET(); + schedule(); flushed = 0; } return flushed; diff --git a/arch/powerpc/lib/interrupts.c b/arch/powerpc/lib/interrupts.c index 5ba4cd0c13a..bdb8030c27f 100644 --- a/arch/powerpc/lib/interrupts.c +++ b/arch/powerpc/lib/interrupts.c @@ -81,7 +81,7 @@ void timer_interrupt(struct pt_regs *regs) #if defined(CONFIG_WATCHDOG) || defined (CONFIG_HW_WATCHDOG) if (CONFIG_SYS_WATCHDOG_FREQ && (timestamp % (CONFIG_SYS_WATCHDOG_FREQ)) == 0) - WATCHDOG_RESET (); + schedule(); #endif /* CONFIG_WATCHDOG || CONFIG_HW_WATCHDOG */ #ifdef CONFIG_LED_STATUS diff --git a/arch/powerpc/lib/ticks.S b/arch/powerpc/lib/ticks.S index c487f938fa8..8647d77cc9a 100644 --- a/arch/powerpc/lib/ticks.S +++ b/arch/powerpc/lib/ticks.S @@ -9,7 +9,6 @@ #include <ppc_asm.tmpl> #include <ppc_defs.h> #include <config.h> -#include <watchdog.h> /* * unsigned long long get_ticks(void); @@ -42,7 +41,9 @@ wait_ticks: addc r14, r4, r14 /* Compute end time lower */ addze r15, r3 /* and end time upper */ - WATCHDOG_RESET /* Trigger watchdog, if needed */ +#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) + bl schedule /* Trigger watchdog, if needed */ +#endif 1: bl get_ticks /* Get current time */ subfc r4, r4, r14 /* Subtract current time from end time */ subfe. r3, r3, r15 diff --git a/arch/sandbox/cpu/spl.c b/arch/sandbox/cpu/spl.c index fe5d44d36ed..1d49a9bd102 100644 --- a/arch/sandbox/cpu/spl.c +++ b/arch/sandbox/cpu/spl.c @@ -89,7 +89,7 @@ void spl_board_init(void) int ret; ret = ut_run_list("spl", NULL, tests, count, - state->select_unittests); + state->select_unittests, 1); /* continue execution into U-Boot */ } } diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 2761588f0da..c7fffa2da27 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -233,6 +233,8 @@ test5-gpios = <&gpio_a 19>; bool-value; + int8-value = /bits/ 8 <0x12>; + int16-value = /bits/ 16 <0x1234>; int-value = <1234>; uint-value = <(-1234)>; int64-value = /bits/ 64 <0x1111222233334444>; diff --git a/board/BuR/brppt1/board.c b/board/BuR/brppt1/board.c index 7df37e4e66a..c8dc186cddf 100644 --- a/board/BuR/brppt1/board.c +++ b/board/BuR/brppt1/board.c @@ -151,9 +151,7 @@ int board_init(void) hw_watchdog_init(); #endif gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; -#ifdef CONFIG_MTD_RAW_NAND - gpmc_init(); -#endif + return 0; } diff --git a/board/BuR/brppt1/mux.c b/board/BuR/brppt1/mux.c index b863d373350..5d2c7a201ea 100644 --- a/board/BuR/brppt1/mux.c +++ b/board/BuR/brppt1/mux.c @@ -26,6 +26,7 @@ static struct module_pin_mux uart0_pin_mux[] = { {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, {-1}, }; + static struct module_pin_mux uart1_pin_mux[] = { /* UART1_RTS as I2C2-SCL */ {OFFSET(uart1_rtsn), (MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE)}, @@ -37,7 +38,7 @@ static struct module_pin_mux uart1_pin_mux[] = { {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, {-1}, }; -#ifdef CONFIG_MMC + static struct module_pin_mux mmc1_pin_mux[] = { {OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT7 */ {OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT6 */ @@ -54,7 +55,7 @@ static struct module_pin_mux mmc1_pin_mux[] = { {OFFSET(gpmc_advn_ale), (MODE(7) | RXACTIVE | PULLUP_EN)},/* MMC1_CD */ {-1}, }; -#endif + static struct module_pin_mux i2c0_pin_mux[] = { /* I2C_DATA */ {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)}, @@ -118,26 +119,7 @@ static struct module_pin_mux mii2_pin_mux[] = { {OFFSET(gpmc_be1n), (MODE(1) | RXACTIVE)},/* MII1_COL */ {-1}, }; -#ifdef CONFIG_MTD_RAW_NAND -static struct module_pin_mux nand_pin_mux[] = { - {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ - {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ - {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */ - {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */ - {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */ - {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */ - {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */ - {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */ - {OFFSET(gpmc_clk), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */ - {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */ - {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ - {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ - {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */ - {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ - {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */ - {-1}, -}; -#endif + static struct module_pin_mux gpIOs[] = { /* GPIO0_6 (SPI0_CS1) - 3v3_PWR_nEN (Display Power Supply) */ {OFFSET(spi0_cs1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, @@ -180,14 +162,6 @@ static struct module_pin_mux gpIOs[] = { {OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS) }, /* GPIO3_17 (MCASP0_AHCLKR) - ETH2_LEDY */ {OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS) }, -#ifndef CONFIG_MTD_RAW_NAND - /* GPIO2_3 - NAND_OE */ - {OFFSET(gpmc_oen_ren), (MODE(7) | PULLDOWN_EN | RXACTIVE)}, - /* GPIO2_4 - NAND_WEN */ - {OFFSET(gpmc_wen), (MODE(7) | PULLDOWN_EN | RXACTIVE)}, - /* GPIO2_5 - NAND_BE_CLE */ - {OFFSET(gpmc_be0n_cle), (MODE(7) | PULLDOWN_EN | RXACTIVE)}, -#endif {-1}, }; @@ -222,7 +196,6 @@ static struct module_pin_mux lcd_pin_mux[] = { {OFFSET(lcd_hsync), (MODE(0) | PULLUDDIS)}, /* LCD-HSync */ {OFFSET(lcd_ac_bias_en), (MODE(0) | PULLUDDIS)},/* LCD-DE */ {OFFSET(lcd_pclk), (MODE(0) | PULLUDDIS)}, /* LCD-CLK */ - {-1}, }; @@ -241,11 +214,7 @@ void enable_board_pin_mux(void) configure_module_pin_mux(i2c0_pin_mux); configure_module_pin_mux(mii1_pin_mux); configure_module_pin_mux(mii2_pin_mux); -#ifdef CONFIG_MTD_RAW_NAND - configure_module_pin_mux(nand_pin_mux); -#elif defined(CONFIG_MMC) configure_module_pin_mux(mmc1_pin_mux); -#endif configure_module_pin_mux(spi0_pin_mux); configure_module_pin_mux(lcd_pin_mux); configure_module_pin_mux(uart1_pin_mux); diff --git a/board/Marvell/octeon_nic23/board.c b/board/Marvell/octeon_nic23/board.c index 3e2c5444439..08b1aa4b6ef 100644 --- a/board/Marvell/octeon_nic23/board.c +++ b/board/Marvell/octeon_nic23/board.c @@ -3,8 +3,10 @@ * Copyright (C) 2021-2022 Stefan Roese <sr@denx.de> */ +#include <cyclic.h> #include <dm.h> #include <ram.h> +#include <time.h> #include <asm/gpio.h> #include <mach/octeon_ddr.h> @@ -15,11 +17,90 @@ #include <mach/cvmx-helper-cfg.h> #include <mach/cvmx-helper-util.h> #include <mach/cvmx-bgxx-defs.h> +#include <mach/cvmx-dtx-defs.h> #include "board_ddr.h" +/** + * cvmx_spem#_cfg_rd + * + * This register allows read access to the configuration in the PCIe core. + * + */ +union cvmx_spemx_cfg_rd { + u64 u64; + struct cvmx_spemx_cfg_rd_s { + u64 data : 32; + u64 addr : 32; + } s; + struct cvmx_spemx_cfg_rd_s cn73xx; +}; + +/** + * cvmx_spem#_cfg_wr + * + * This register allows write access to the configuration in the PCIe core. + * + */ +union cvmx_spemx_cfg_wr { + u64 u64; + struct cvmx_spemx_cfg_wr_s { + u64 data : 32; + u64 addr : 32; + } s; + struct cvmx_spemx_cfg_wr_s cn73xx; +}; + +/** + * cvmx_spem#_flr_pf_stopreq + * + * PF function level reset stop outbound requests register. + * Hardware automatically sets the STOPREQ bit for the PF when it enters a + * function level reset (FLR). Software is responsible for clearing the STOPREQ + * bit but must not do so prior to hardware taking down the FLR, which could be + * as long as 100ms. It may be appropriate for software to wait longer before clearing + * STOPREQ, software may need to drain deep DPI queues for example. + * Whenever SPEM receives a PF or child VF request mastered by CNXXXX over S2M (i.e. P or NP), + * when STOPREQ is set for the function, SPEM will discard the outgoing request + * before sending it to the PCIe core. If a NP, SPEM will schedule an immediate + * SWI_RSP_ERROR completion for the request - no timeout is required. + * In both cases, SPEM()_DBG_PF()_INFO[P()_BMD_E] will be set and a error + * interrupt is generated. + * + * STOPREQ mimics the behavior of PCIEEP()_CFG001[ME] for outbound requests that will + * master the PCIe bus (P and NP). + * + * STOPREQ will have no effect on completions returned by CNXXXX over the S2M, + * nor on M2S traffic. + * + * When a PF()_STOPREQ is set, none of the associated + * PEM()_FLR_PF()_VF_STOPREQ[VF_STOPREQ] will be set. + * + * STOPREQ is reset when the MAC is reset, and is not reset after a chip soft reset. + */ +union cvmx_spemx_flr_pf_stopreq { + u64 u64; + struct cvmx_spemx_flr_pf_stopreq_s { + u64 reserved_3_63 : 61; + u64 pf2_stopreq : 1; + u64 pf1_stopreq : 1; + u64 pf0_stopreq : 1; + } s; + struct cvmx_spemx_flr_pf_stopreq_s cn73xx; +}; + +#define CVMX_SPEMX_CFG_WR(offset) 0x00011800C0000028ull +#define CVMX_SPEMX_CFG_RD(offset) 0x00011800C0000030ull +#define CVMX_SPEMX_FLR_PF_STOPREQ(offset) 0x00011800C0000218ull + +#define DTX_SELECT_LTSSM 0x0 +#define DTX_SELECT_LTSSM_ENA 0x3ff +#define LTSSM_L0 0x11 + #define NIC23_DEF_DRAM_FREQ 800 +static u32 pci_cfgspace_reg0[2] = { 0, 0 }; + static u8 octeon_nic23_cfg0_spd_values[512] = { OCTEON_NIC23_CFG0_SPD_VALUES }; @@ -145,8 +226,118 @@ void board_configure_qlms(void) cvmx_qlm_measure_clock(4), cvmx_qlm_measure_clock(5)); } +/** + * If there is a PF FLR then the PCI EEPROM is not re-read. In this case + * we need to re-program the vendor and device ID immediately after hardware + * completes FLR. + * + * PCI spec requires FLR to be completed within 100ms. The user who triggered + * FLR expects hardware to finish FLR within 100ms, otherwise the user will + * end up reading DEVICE_ID incorrectly from the reset value. + * CN23XX exits FLR at any point between 66 and 99ms, so U-Boot has to wait + * 99ms to let hardware finish its part, then finish reprogramming the + * correct device ID before the end of 100ms. + * + * Note: this solution only works properly when there is no other activity + * within U-Boot for 100ms from the time FLR is triggered. + * + * This function gets called every 100usec. If FLR happens during any + * other activity like bootloader/image update then it is possible that + * this function does not get called for more than the FLR period which will + * cause the PF device ID restore to happen after whoever initiated the FLR to + * read the incorrect device ID 0x9700 (reset value) instead of 0x9702 + * (restored value). + */ +static void octeon_board_restore_pf(void *ctx) +{ + union cvmx_spemx_flr_pf_stopreq stopreq; + static bool start_initialized[2] = {false, false}; + bool pf0_flag, pf1_flag; + u64 ltssm_bits; + const u64 pf_flr_wait_usecs = 99700; + u64 elapsed_usecs; + union cvmx_spemx_cfg_wr cfg_wr; + union cvmx_spemx_cfg_rd cfg_rd; + static u64 start_us[2]; + int pf_num; + + csr_wr(CVMX_DTX_SPEM_SELX(0), DTX_SELECT_LTSSM); + csr_rd(CVMX_DTX_SPEM_SELX(0)); + csr_wr(CVMX_DTX_SPEM_ENAX(0), DTX_SELECT_LTSSM_ENA); + csr_rd(CVMX_DTX_SPEM_ENAX(0)); + ltssm_bits = csr_rd(CVMX_DTX_SPEM_DATX(0)); + if (((ltssm_bits >> 3) & 0x3f) != LTSSM_L0) + return; + + stopreq.u64 = csr_rd(CVMX_SPEMX_FLR_PF_STOPREQ(0)); + pf0_flag = stopreq.s.pf0_stopreq; + pf1_flag = stopreq.s.pf1_stopreq; + /* See if PF interrupt happened */ + if (!(pf0_flag || pf1_flag)) + return; + + if (pf0_flag && !start_initialized[0]) { + start_initialized[0] = true; + start_us[0] = get_timer_us(0); + } + + /* Store programmed PCIe DevID SPEM0 PF0 */ + if (pf0_flag && !pci_cfgspace_reg0[0]) { + cfg_rd.s.addr = (0 << 24) | 0x0; + csr_wr(CVMX_SPEMX_CFG_RD(0), cfg_rd.u64); + cfg_rd.u64 = csr_rd(CVMX_SPEMX_CFG_RD(0)); + pci_cfgspace_reg0[0] = cfg_rd.s.data; + } + + if (pf1_flag && !start_initialized[1]) { + start_initialized[1] = true; + start_us[1] = get_timer_us(0); + } + + /* Store programmed PCIe DevID SPEM0 PF1 */ + if (pf1_flag && !pci_cfgspace_reg0[1]) { + cfg_rd.s.addr = (1 << 24) | 0x0; + csr_wr(CVMX_SPEMX_CFG_RD(0), cfg_rd.u64); + cfg_rd.u64 = csr_rd(CVMX_SPEMX_CFG_RD(0)); + pci_cfgspace_reg0[1] = cfg_rd.s.data; + } + + /* For PF, rewrite pci config space reg 0 */ + for (pf_num = 0; pf_num < 2; pf_num++) { + if (!start_initialized[pf_num]) + continue; + + elapsed_usecs = get_timer_us(0) - start_us[pf_num]; + + if (elapsed_usecs > pf_flr_wait_usecs) { + /* Here, our measured FLR duration has passed; + * check if device ID has been reset, + * which indicates FLR completion (per MA team). + */ + cfg_rd.s.addr = (pf_num << 24) | 0x0; + csr_wr(CVMX_SPEMX_CFG_RD(0), cfg_rd.u64); + cfg_rd.u64 = csr_rd(CVMX_SPEMX_CFG_RD(0)); + /* if DevID has NOT been reset, FLR is not yet + * complete + */ + if (cfg_rd.s.data != pci_cfgspace_reg0[pf_num]) { + stopreq.s.pf0_stopreq = (pf_num == 0) ? 1 : 0; + stopreq.s.pf1_stopreq = (pf_num == 1) ? 1 : 0; + csr_wr(CVMX_SPEMX_FLR_PF_STOPREQ(0), stopreq.u64); + + cfg_wr.u64 = 0; + cfg_wr.s.addr = (pf_num << 24) | 0; + cfg_wr.s.data = pci_cfgspace_reg0[pf_num]; + csr_wr(CVMX_SPEMX_CFG_WR(0), cfg_wr.u64); + start_initialized[pf_num] = false; + } + } + } +} + int board_late_init(void) { + struct cyclic_info *cyclic; struct gpio_desc gpio = {}; ofnode node; @@ -164,6 +355,12 @@ int board_late_init(void) board_configure_qlms(); + /* Register cyclic function for PCIe FLR fixup */ + cyclic = cyclic_register(octeon_board_restore_pf, 100, + "pcie_flr_fix", NULL); + if (!cyclic) + printf("Registering of cyclic function failed\n"); + return 0; } diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c index 50a3830b857..f85737432b3 100644 --- a/board/astro/mcf5373l/fpga.c +++ b/board/astro/mcf5373l/fpga.c @@ -123,7 +123,7 @@ int altera_write_fn(const void *buf, size_t len, int flush, int cookie) if (bytecount % len_40 == 0) { #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) - WATCHDOG_RESET(); + schedule(); #endif #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK putc('.'); /* let them know we are alive */ @@ -343,7 +343,7 @@ int xilinx_fastwr_config_fn(void *buf, size_t len, int flush, int cookie) } if (bytecount % len_40 == 0) { #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) - WATCHDOG_RESET(); + schedule(); #endif #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK putc('.'); /* let them know we are alive */ diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c index e49e97724a5..20a330cce62 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c @@ -6,6 +6,7 @@ */ #include <common.h> +#include <cpu_func.h> #include <init.h> #include <asm/arch/clock.h> #include <asm/arch/crm_regs.h> @@ -14,11 +15,13 @@ #include <asm/arch/mx6-ddr.h> #include <asm/arch/mx6-pins.h> #include <asm/arch/sys_proto.h> +#include <asm/cache.h> #include <asm/gpio.h> #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/mxc_i2c.h> #include <asm/io.h> +#include <asm/system.h> #include <errno.h> #include <fuse.h> #include <fsl_esdhc_imx.h> @@ -610,6 +613,20 @@ static void dhcom_spl_dram_init(void) } } +void dram_bank_mmu_setup(int bank) +{ + int i; + + set_section_dcache(ROMCP_ARB_BASE_ADDR >> MMU_SECTION_SHIFT, DCACHE_DEFAULT_OPTION); + set_section_dcache(IRAM_BASE_ADDR >> MMU_SECTION_SHIFT, DCACHE_DEFAULT_OPTION); + + for (i = MMDC0_ARB_BASE_ADDR >> MMU_SECTION_SHIFT; + i < ((MMDC0_ARB_BASE_ADDR >> MMU_SECTION_SHIFT) + + (SZ_1G >> MMU_SECTION_SHIFT)); + i++) + set_section_dcache(i, DCACHE_DEFAULT_OPTION); +} + void board_init_f(ulong dummy) { /* setup AIPS and disable watchdog */ @@ -636,9 +653,33 @@ void board_init_f(ulong dummy) /* DDR3 initialization */ dhcom_spl_dram_init(); + /* Set up early MMU tables at the beginning of DRAM and start d-cache */ + gd->arch.tlb_addr = MMDC0_ARB_BASE_ADDR + SZ_32M; + gd->arch.tlb_size = PGTABLE_SIZE; + enable_caches(); + /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); /* load/boot image from boot device */ board_init_r(NULL, 0); } + +void spl_board_prepare_for_boot(void) +{ + /* + * Flush and disable dcache. Without it, the following bootstage might fail randomly because + * dirty cache lines may not have been written back to DRAM. + * + * If dcache_disable() would be omitted, the following scenario may occur: + * + * The SPL enables dcache and cachelines get populated with data. Then dcache gets disabled + * in U-Boot proper, but still contains dirty data, i.e. the corresponding DRAM locations + * have not yet been updated. When U-Boot reads these locations, it sees an (incorrect) old + * state of the content. + * + * Furthermore, the DRAM contents have likely been modified by U-Boot while dcache was + * disabled. Thus, U-Boot flushing dcache would corrupt DRAM with stale data. + */ + dcache_disable(); /* implies flush_dcache_all() */ +} diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c index 9188f5381eb..2bc0d7b943a 100644 --- a/board/dhelectronics/dh_stm32mp1/board.c +++ b/board/dhelectronics/dh_stm32mp1/board.c @@ -423,7 +423,7 @@ static void __maybe_unused led_error_blink(u32 nb_blink) for (i = 0; i < 2 * nb_blink; i++) { led_set_state(led, LEDST_TOGGLE); mdelay(125); - WATCHDOG_RESET(); + schedule(); } } #endif diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c index 5c1af1a7720..4219d002fec 100644 --- a/board/liebherr/display5/spl.c +++ b/board/liebherr/display5/spl.c @@ -329,7 +329,7 @@ void board_init_f(ulong dummy) /* Initialize and reset WDT in SPL */ #ifdef CONFIG_SPL_WATCHDOG hw_watchdog_init(); - WATCHDOG_RESET(); + schedule(); #endif /* load/boot image from boot device */ diff --git a/board/nokia/rx51/lowlevel_init.S b/board/nokia/rx51/lowlevel_init.S index c1785bc3f72..1cf8f8d8b2f 100644 --- a/board/nokia/rx51/lowlevel_init.S +++ b/board/nokia/rx51/lowlevel_init.S @@ -46,7 +46,6 @@ save_boot_params: * (CONFIG_SYS_TEXT_BASE). */ -copy_kernel_start: /* r0 - start of kernel before */ adr r0, kernoffs /* r0 - current address of kernoffs section */ ldr r1, kernoffs /* r1 - offset of kernel image from kernoffs section */ @@ -77,7 +76,7 @@ copy_kernel_start: ldr r4, [r0, #36] /* r4 - 4 bytes header of kernel at offset 36 */ ldr r5, z_magic /* r5 - LINUX_ARM_ZIMAGE_MAGIC */ cmp r4, r5 - bne copy_kernel_end /* skip if invalid image */ + bne skip_copy /* skip if invalid image */ copy_kernel_loop: ldmdb r1!, {r3 - r10} @@ -85,12 +84,12 @@ copy_kernel_loop: cmp r1, r0 bhi copy_kernel_loop -copy_kernel_end: - /* remove header in source kernel image */ mov r5, #0 str r5, [r0] /* remove 4 bytes header of kernel uImage */ str r5, [r0, #36] /* remove 4 bytes header of kernel zImage */ +skip_copy: + /* Returns */ b save_boot_params_ret diff --git a/board/nokia/rx51/rx51.c b/board/nokia/rx51/rx51.c index 460d248eaae..9548c3c7be7 100644 --- a/board/nokia/rx51/rx51.c +++ b/board/nokia/rx51/rx51.c @@ -722,7 +722,7 @@ static int rx51_kp_getc(struct udevice *dev) { keybuf_head %= KEYBUF_SIZE; while (!rx51_kp_tstc(dev)) - WATCHDOG_RESET(); + schedule(); return keybuf[keybuf_head++]; } diff --git a/board/qualcomm/qcs404-evb/qcs404-evb.c b/board/qualcomm/qcs404-evb/qcs404-evb.c index f1e6e7f7eb5..249dca7e72f 100644 --- a/board/qualcomm/qcs404-evb/qcs404-evb.c +++ b/board/qualcomm/qcs404-evb/qcs404-evb.c @@ -11,6 +11,7 @@ #include <env.h> #include <init.h> #include <asm/cache.h> +#include <asm/gpio.h> #include <asm/global_data.h> #include <fdt_support.h> #include <asm/arch/dram.h> @@ -24,6 +25,34 @@ int dram_init(void) int board_init(void) { + struct udevice *pmic_gpio; + struct gpio_desc usb_vbus_boost_pin; + int ret, node; + + ret = uclass_get_device_by_name(UCLASS_GPIO, + "pms405_gpios@c000", + &pmic_gpio); + if (ret < 0) { + printf("Failed to find pms405_gpios@c000 node.\n"); + return ret; + } + + node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pmic_gpio), + "usb_vbus_boost_pin"); + if (node < 0) { + printf("Failed to find usb_hub_reset_pm dt node.\n"); + return node; + } + ret = gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0, + &usb_vbus_boost_pin, 0); + if (ret < 0) { + printf("Failed to request usb_hub_reset_pm gpio.\n"); + return ret; + } + + dm_gpio_set_dir_flags(&usb_vbus_boost_pin, + GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); + return 0; } diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 8c162b42a59..581a4df1cc4 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -289,7 +289,7 @@ static void __maybe_unused led_error_blink(u32 nb_blink) for (i = 0; i < 2 * nb_blink; i++) { led_set_state(led, LEDST_TOGGLE); mdelay(125); - WATCHDOG_RESET(); + schedule(); } led_set_state(led, LEDST_ON); } diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c index 22c67c6e388..11f4d5e14a8 100644 --- a/board/toradex/common/tdx-cfg-block.c +++ b/board/toradex/common/tdx-cfg-block.c @@ -211,7 +211,7 @@ static int tdx_cfg_block_mmc_storage(u8 *config_block, int write) return -EINVAL; } if (part != mmc_get_blk_desc(mmc)->hwpart) { - if (blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part)) { + if (blk_select_hwpart_devnum(UCLASS_MMC, dev, part)) { puts("MMC partition switch failed\n"); ret = -ENODEV; goto out; @@ -239,7 +239,7 @@ static int tdx_cfg_block_mmc_storage(u8 *config_block, int write) out: /* Switch back to regular eMMC user partition */ - blk_select_hwpart_devnum(IF_TYPE_MMC, 0, 0); + blk_select_hwpart_devnum(UCLASS_MMC, 0, 0); return ret; } diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 9b4aded466a..e1f71049603 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -8,6 +8,8 @@ #include <efi.h> #include <efi_loader.h> #include <env.h> +#include <image.h> +#include <lmb.h> #include <log.h> #include <asm/global_data.h> #include <asm/sections.h> @@ -583,8 +585,33 @@ bool __maybe_unused __weak board_detection(void) return false; } +bool __maybe_unused __weak soc_detection(void) +{ + return false; +} + +char * __maybe_unused __weak soc_name_decode(void) +{ + return NULL; +} + int embedded_dtb_select(void) { + if (soc_detection()) { + char *soc_local_name; + + soc_local_name = soc_name_decode(); + if (soc_local_name) { + board_name = soc_local_name; + printf("Detected SOC name: %s\n", board_name); + + /* Time to change DTB on fly */ + /* Both ways should work here */ + /* fdtdec_resetup(&rescan); */ + return fdtdec_setup(); + } + } + if (board_detection()) { char *board_local_name; @@ -602,3 +629,30 @@ int embedded_dtb_select(void) return 0; } #endif + +#if defined(CONFIG_LMB) +ulong board_get_usable_ram_top(ulong total_size) +{ + phys_size_t size; + phys_addr_t reg; + struct lmb lmb; + + if (!total_size) + return gd->ram_top; + + if (!IS_ALIGNED((ulong)gd->fdt_blob, 0x8)) + panic("Not 64bit aligned DT location: %p\n", gd->fdt_blob); + + /* found enough not-reserved memory to relocated U-Boot */ + lmb_init(&lmb); + lmb_add(&lmb, gd->ram_base, gd->ram_size); + boot_fdt_add_mem_rsv_regions(&lmb, (void *)gd->fdt_blob); + size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE); + reg = lmb_alloc(&lmb, size, MMU_SECTION_SIZE); + + if (!reg) + reg = gd->ram_top - size; + + return reg + size; +} +#endif diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c index f58ecd1590c..a427ac94a17 100644 --- a/board/xilinx/microblaze-generic/microblaze-generic.c +++ b/board/xilinx/microblaze-generic/microblaze-generic.c @@ -14,8 +14,6 @@ #include <config.h> #include <env.h> #include <init.h> -#include <image.h> -#include <lmb.h> #include <log.h> #include <asm/global_data.h> #include <dm/lists.h> @@ -38,25 +36,6 @@ int dram_init(void) return 0; }; -ulong board_get_usable_ram_top(ulong total_size) -{ - phys_size_t size; - phys_addr_t reg; - struct lmb lmb; - - /* found enough not-reserved memory to relocated U-Boot */ - lmb_init(&lmb); - lmb_add(&lmb, gd->ram_base, gd->ram_size); - boot_fdt_add_mem_rsv_regions(&lmb, (void *)gd->fdt_blob); - size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE); - reg = lmb_alloc(&lmb, size, MMU_SECTION_SIZE); - - if (!reg) - reg = gd->ram_top - size; - - return reg + size; -} - int board_late_init(void) { ulong max_size; diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c index d8f39be56c8..f9f5457ed20 100644 --- a/board/xilinx/versal/board.c +++ b/board/xilinx/versal/board.c @@ -9,7 +9,6 @@ #include <env.h> #include <fdtdec.h> #include <init.h> -#include <image.h> #include <env_internal.h> #include <log.h> #include <malloc.h> @@ -270,28 +269,6 @@ int dram_init(void) return 0; } -ulong board_get_usable_ram_top(ulong total_size) -{ - phys_size_t size; - phys_addr_t reg; - struct lmb lmb; - - if (!total_size) - return gd->ram_top; - - /* found enough not-reserved memory to relocated U-Boot */ - lmb_init(&lmb); - lmb_add(&lmb, gd->ram_base, gd->ram_size); - boot_fdt_add_mem_rsv_regions(&lmb, (void *)gd->fdt_blob); - size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE); - reg = lmb_alloc(&lmb, size, MMU_SECTION_SIZE); - - if (!reg) - reg = gd->ram_top - size; - - return reg + size; -} - void reset_cpu(void) { } diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 63aff0474be..c96433be693 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -168,8 +168,7 @@ void set_dfu_alt_info(char *interface, char *devstr) { ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN); - if (!CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) && - env_get("dfu_alt_info")) + if (env_get("dfu_alt_info")) return; memset(buf, 0, sizeof(buf)); @@ -177,13 +176,14 @@ void set_dfu_alt_info(char *interface, char *devstr) switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) { case ZYNQ_BM_SD: snprintf(buf, DFU_ALT_BUF_LEN, - "mmc 0:1=boot.bin fat 0 1;" - "u-boot.img fat 0 1"); + "mmc 0=boot.bin fat 0 1;" + "%s fat 0 1", CONFIG_SPL_FS_LOAD_PAYLOAD_NAME); break; case ZYNQ_BM_QSPI: snprintf(buf, DFU_ALT_BUF_LEN, "sf 0:0=boot.bin raw 0 0x1500000;" - "u-boot.img raw 0x%x 0x500000", + "%s raw 0x%x 0x500000", + CONFIG_SPL_FS_LOAD_PAYLOAD_NAME, CONFIG_SYS_SPI_U_BOOT_OFFS); break; default: diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c index 2ab9596248c..e20030ecda7 100644 --- a/board/xilinx/zynqmp/cmds.c +++ b/board/xilinx/zynqmp/cmds.c @@ -142,9 +142,6 @@ static int do_zynqmp_aes(struct cmd_tbl *cmdtp, int flag, int argc, aes->keysrc = hextoul(argv[6], NULL); aes->dstaddr = hextoul(argv[7], NULL); - flush_dcache_range((ulong)aes, (ulong)(aes) + - roundup(sizeof(struct aes), ARCH_DMA_MINALIGN)); - if (aes->srcaddr && aes->ivaddr && aes->dstaddr) { flush_dcache_range(aes->srcaddr, (aes->srcaddr + @@ -169,6 +166,9 @@ static int do_zynqmp_aes(struct cmd_tbl *cmdtp, int flag, int argc, ARCH_DMA_MINALIGN))); } + flush_dcache_range((ulong)aes, (ulong)(aes) + + roundup(sizeof(struct aes), ARCH_DMA_MINALIGN)); + ret = xilinx_pm_request(PM_SECURE_AES, upper_32_bits((ulong)aes), lower_32_bits((ulong)aes), 0, 0, ret_payload); if (ret || ret_payload[1]) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 57259b60a02..62537760dfa 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -12,8 +12,6 @@ #include <env.h> #include <env_internal.h> #include <init.h> -#include <image.h> -#include <lmb.h> #include <log.h> #include <net.h> #include <sata.h> @@ -256,33 +254,6 @@ int dram_init(void) return 0; } -#if defined(CONFIG_LMB) -ulong board_get_usable_ram_top(ulong total_size) -{ - phys_size_t size; - phys_addr_t reg; - struct lmb lmb; - - if (!total_size) - return gd->ram_top; - - if (!IS_ALIGNED((ulong)gd->fdt_blob, 0x8)) - panic("Not 64bit aligned DT location: %p\n", gd->fdt_blob); - - /* found enough not-reserved memory to relocated U-Boot */ - lmb_init(&lmb); - lmb_add(&lmb, gd->ram_base, gd->ram_size); - boot_fdt_add_mem_rsv_regions(&lmb, (void *)gd->fdt_blob); - size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE); - reg = lmb_alloc(&lmb, size, MMU_SECTION_SIZE); - - if (!reg) - reg = gd->ram_top - size; - - return reg + size; -} -#endif - #else int dram_init_banksize(void) { @@ -641,8 +612,7 @@ void set_dfu_alt_info(char *interface, char *devstr) ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN); - if (!CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) && - env_get("dfu_alt_info")) + if (env_get("dfu_alt_info")) return; memset(buf, 0, sizeof(buf)); @@ -662,13 +632,13 @@ void set_dfu_alt_info(char *interface, char *devstr) bootseq = mmc_get_env_dev(); if (!multiboot) snprintf(buf, DFU_ALT_BUF_LEN, - "mmc %d:1=boot.bin fat %d 1;" + "mmc %d=boot.bin fat %d 1;" "%s fat %d 1", bootseq, bootseq, CONFIG_SPL_FS_LOAD_PAYLOAD_NAME, bootseq); else snprintf(buf, DFU_ALT_BUF_LEN, - "mmc %d:1=boot%04d.bin fat %d 1;" + "mmc %d=boot%04d.bin fat %d 1;" "%s fat %d 1", bootseq, multiboot, bootseq, CONFIG_SPL_FS_LOAD_PAYLOAD_NAME, bootseq); diff --git a/boot/bootretry.c b/boot/bootretry.c index 2bc9c6866e0..8d850df9d48 100644 --- a/boot/bootretry.c +++ b/boot/bootretry.c @@ -44,7 +44,7 @@ int bootretry_tstc_timeout(void) while (!tstc()) { /* while no incoming data */ if (retry_time >= 0 && get_ticks() > endtime) return -ETIMEDOUT; - WATCHDOG_RESET(); + schedule(); } return 0; diff --git a/boot/image-board.c b/boot/image-board.c index 4e4d1c157d7..98f903f93fb 100644 --- a/boot/image-board.c +++ b/boot/image-board.c @@ -16,6 +16,7 @@ #include <fpga.h> #include <image.h> #include <init.h> +#include <log.h> #include <mapmem.h> #include <rtc.h> #include <watchdog.h> @@ -24,7 +25,6 @@ DECLARE_GLOBAL_DATA_PTR; -#if CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT) /** * image_get_ramdisk - get and verify ramdisk image * @rd_addr: ramdisk image start address @@ -83,7 +83,6 @@ static const image_header_t *image_get_ramdisk(ulong rd_addr, u8 arch, return rd_hdr; } -#endif /*****************************************************************************/ /* Shared dual-format routines */ @@ -174,29 +173,29 @@ void memmove_wd(void *to, void *from, size_t len, ulong chunksz) if (to == from) return; -#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) - if (to > from) { - from += len; - to += len; - } - while (len > 0) { - size_t tail = (len > chunksz) ? chunksz : len; - - WATCHDOG_RESET(); + if (IS_ENABLED(CONFIG_HW_WATCHDOG) || IS_ENABLED(CONFIG_WATCHDOG)) { if (to > from) { - to -= tail; - from -= tail; + from += len; + to += len; } - memmove(to, from, tail); - if (to < from) { - to += tail; - from += tail; + while (len > 0) { + size_t tail = (len > chunksz) ? chunksz : len; + + schedule(); + if (to > from) { + to -= tail; + from -= tail; + } + memmove(to, from, tail); + if (to < from) { + to += tail; + from += tail; + } + len -= tail; } - len -= tail; + } else { + memmove(to, from, len); } -#else /* !(CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG) */ - memmove(to, from, len); -#endif /* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */ } /** @@ -314,7 +313,7 @@ int genimg_has_config(bootm_headers_t *images) * select_ramdisk() - Select and locate the ramdisk to use * * @images: pointer to the bootm images structure - * @select: name of ramdisk to select, or NULL for any + * @select: name of ramdisk to select, or hex address, NULL for any * @arch: expected ramdisk architecture * @rd_datap: pointer to a ulong variable, will hold ramdisk pointer * @rd_lenp: pointer to a ulong variable, will hold ramdisk length @@ -324,13 +323,17 @@ int genimg_has_config(bootm_headers_t *images) static int select_ramdisk(bootm_headers_t *images, const char *select, u8 arch, ulong *rd_datap, ulong *rd_lenp) { + const char *fit_uname_config; + const char *fit_uname_ramdisk; + bool done_select = !select; + bool done = false; + int rd_noffset; ulong rd_addr; char *buf; -#if CONFIG_IS_ENABLED(FIT) - const char *fit_uname_config = images->fit_uname_cfg; - const char *fit_uname_ramdisk = NULL; - int rd_noffset; + if (CONFIG_IS_ENABLED(FIT)) { + fit_uname_config = images->fit_uname_cfg; + fit_uname_ramdisk = NULL; if (select) { ulong default_addr; @@ -345,48 +348,47 @@ static int select_ramdisk(bootm_headers_t *images, const char *select, u8 arch, else default_addr = image_load_addr; - if (fit_parse_conf(select, default_addr, - &rd_addr, &fit_uname_config)) { + if (fit_parse_conf(select, default_addr, &rd_addr, + &fit_uname_config)) { debug("* ramdisk: config '%s' from image at 0x%08lx\n", fit_uname_config, rd_addr); + done_select = true; } else if (fit_parse_subimage(select, default_addr, &rd_addr, &fit_uname_ramdisk)) { debug("* ramdisk: subimage '%s' from image at 0x%08lx\n", fit_uname_ramdisk, rd_addr); - } else -#endif - { - rd_addr = hextoul(select, NULL); - debug("* ramdisk: cmdline image address = 0x%08lx\n", - rd_addr); + done_select = true; } -#if CONFIG_IS_ENABLED(FIT) - } else { - /* use FIT configuration provided in first bootm - * command argument. If the property is not defined, - * quit silently (with -ENOPKG) - */ - rd_addr = map_to_sysmem(images->fit_hdr_os); - rd_noffset = fit_get_node_from_config(images, - FIT_RAMDISK_PROP, - rd_addr); - if (rd_noffset == -ENOENT) - return -ENOPKG; - else if (rd_noffset < 0) - return rd_noffset; } -#endif - - /* - * Check if there is an initrd image at the - * address provided in the second bootm argument - * check image type, for FIT images get FIT node. + } + if (!done_select) { + rd_addr = hextoul(select, NULL); + debug("* ramdisk: cmdline image address = 0x%08lx\n", rd_addr); + } + if (CONFIG_IS_ENABLED(FIT) && !select) { + /* use FIT configuration provided in first bootm + * command argument. If the property is not defined, + * quit silently (with -ENOPKG) */ - buf = map_sysmem(rd_addr, 0); - switch (genimg_get_format(buf)) { -#if CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT) - case IMAGE_FORMAT_LEGACY: { + rd_addr = map_to_sysmem(images->fit_hdr_os); + rd_noffset = fit_get_node_from_config(images, FIT_RAMDISK_PROP, + rd_addr); + if (rd_noffset == -ENOENT) + return -ENOPKG; + else if (rd_noffset < 0) + return rd_noffset; + } + + /* + * Check if there is an initrd image at the + * address provided in the second bootm argument + * check image type, for FIT images get FIT node. + */ + buf = map_sysmem(rd_addr, 0); + switch (genimg_get_format(buf)) { + case IMAGE_FORMAT_LEGACY: + if (CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT)) { const image_header_t *rd_hdr; printf("## Loading init Ramdisk from Legacy Image at %08lx ...\n", @@ -401,15 +403,15 @@ static int select_ramdisk(bootm_headers_t *images, const char *select, u8 arch, *rd_datap = image_get_data(rd_hdr); *rd_lenp = image_get_data_size(rd_hdr); - break; + done = true; } -#endif -#if CONFIG_IS_ENABLED(FIT) - case IMAGE_FORMAT_FIT: - rd_noffset = fit_image_load(images, - rd_addr, &fit_uname_ramdisk, - &fit_uname_config, arch, - IH_TYPE_RAMDISK, + break; + case IMAGE_FORMAT_FIT: + if (CONFIG_IS_ENABLED(FIT)) { + rd_noffset = fit_image_load(images, rd_addr, + &fit_uname_ramdisk, + &fit_uname_config, + arch, IH_TYPE_RAMDISK, BOOTSTAGE_ID_FIT_RD_START, FIT_LOAD_OPTIONAL_NON_ZERO, rd_datap, rd_lenp); @@ -419,29 +421,41 @@ static int select_ramdisk(bootm_headers_t *images, const char *select, u8 arch, images->fit_hdr_rd = map_sysmem(rd_addr, 0); images->fit_uname_rd = fit_uname_ramdisk; images->fit_noffset_rd = rd_noffset; - break; -#endif -#ifdef CONFIG_ANDROID_BOOT_IMAGE - case IMAGE_FORMAT_ANDROID: - android_image_get_ramdisk((void *)images->os.start, - rd_datap, rd_lenp); - break; -#endif - default: - if (IS_ENABLED(CONFIG_SUPPORT_RAW_INITRD)) { - char *end = NULL; - - if (select) - end = strchr(select, ':'); - if (end) { - *rd_lenp = hextoul(++end, NULL); - *rd_datap = rd_addr; - break; - } + done = true; + } + break; + case IMAGE_FORMAT_ANDROID: + if (IS_ENABLED(CONFIG_ANDROID_BOOT_IMAGE)) { + void *ptr = map_sysmem(images->os.start, 0); + int ret; + + ret = android_image_get_ramdisk(ptr, rd_datap, rd_lenp); + unmap_sysmem(ptr); + if (ret) + return ret; + done = true; + } + break; + } + + if (!done) { + if (IS_ENABLED(CONFIG_SUPPORT_RAW_INITRD)) { + char *end = NULL; + + if (select) + end = strchr(select, ':'); + if (end) { + *rd_lenp = hextoul(++end, NULL); + *rd_datap = rd_addr; + done = true; } + } + + if (!done) { puts("Wrong Ramdisk Image Format\n"); return -EINVAL; } + } return 0; } @@ -538,7 +552,6 @@ int boot_get_ramdisk(int argc, char *const argv[], bootm_headers_t *images, return 0; } -#if defined(CONFIG_LMB) /** * boot_ramdisk_high - relocate init ramdisk * @lmb: pointer to lmb handle, will be used for memory mgmt @@ -632,7 +645,6 @@ int boot_ramdisk_high(struct lmb *lmb, ulong rd_data, ulong rd_len, error: return -1; } -#endif int boot_get_setup(bootm_headers_t *images, u8 arch, ulong *setup_start, ulong *setup_len) @@ -826,15 +838,13 @@ int boot_get_loadable(int argc, char *const argv[], bootm_headers_t *images, return 0; } -#if defined(CONFIG_LMB) -#ifdef CONFIG_SYS_BOOT_GET_CMDLINE /** * boot_get_cmdline - allocate and initialize kernel cmdline * @lmb: pointer to lmb handle, will be used for memory mgmt * @cmd_start: pointer to a ulong variable, will hold cmdline start * @cmd_end: pointer to a ulong variable, will hold cmdline end * - * boot_get_cmdline() allocates space for kernel command line below + * This allocates space for kernel command line below * BOOTMAPSZ + env_get_bootm_low() address. If "bootargs" U-Boot environment * variable is present its contents is copied to allocated kernel * command line. @@ -845,10 +855,19 @@ int boot_get_loadable(int argc, char *const argv[], bootm_headers_t *images, */ int boot_get_cmdline(struct lmb *lmb, ulong *cmd_start, ulong *cmd_end) { + int barg; char *cmdline; char *s; - cmdline = (char *)(ulong)lmb_alloc_base(lmb, CONFIG_SYS_BARGSIZE, 0xf, + /* + * Help the compiler detect that this function is only called when + * CONFIG_SYS_BOOT_GET_CMDLINE is enabled + */ + if (!IS_ENABLED(CONFIG_SYS_BOOT_GET_CMDLINE)) + return 0; + + barg = IF_ENABLED_INT(CONFIG_SYS_BOOT_GET_CMDLINE, CONFIG_SYS_BARGSIZE); + cmdline = (char *)(ulong)lmb_alloc_base(lmb, barg, 0xf, env_get_bootm_mapsize() + env_get_bootm_low()); if (!cmdline) return -1; @@ -894,22 +913,22 @@ int boot_get_kbd(struct lmb *lmb, struct bd_info **kbd) debug("## kernel board info at 0x%08lx\n", (ulong)*kbd); -#if defined(DEBUG) - if (IS_ENABLED(CONFIG_CMD_BDI)) + if (_DEBUG && IS_ENABLED(CONFIG_CMD_BDI)) do_bdinfo(NULL, 0, 0, NULL); -#endif return 0; } -#endif int image_setup_linux(bootm_headers_t *images) { ulong of_size = images->ft_len; char **of_flat_tree = &images->ft_addr; - struct lmb *lmb = &images->lmb; + struct lmb *lmb = images_lmb(images); int ret; + /* This function cannot be called without lmb support */ + if (!CONFIG_IS_ENABLED(LMB)) + return -EFAULT; if (CONFIG_IS_ENABLED(OF_LIBFDT)) boot_fdt_add_mem_rsv_regions(lmb, *of_flat_tree); @@ -936,7 +955,6 @@ int image_setup_linux(bootm_headers_t *images) return 0; } -#endif void genimg_print_size(uint32_t size) { diff --git a/cmd/Kconfig b/cmd/Kconfig index 0e0be94f41f..bfa12ce12a7 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1092,7 +1092,6 @@ config CMD_PWM config CMD_GPT bool "GPT (GUID Partition Table) command" select EFI_PARTITION - select HAVE_BLOCK_DEVICE select PARTITION_UUIDS imply RANDOM_UUID help @@ -1194,6 +1193,13 @@ config CMD_LOADS help Load an S-Record file over serial line +config CMD_LOADXY_TIMEOUT + int "loadxy_timeout" + range 0 2000 + default 90 + help + Initial timeout for loadx and loady commands. Zero means infinity. + config CMD_LSBLK depends on BLK bool "lsblk - list block drivers and devices" @@ -1204,7 +1210,6 @@ config CMD_LSBLK config CMD_MBR bool "MBR (Master Boot Record) command" select DOS_PARTITION - select HAVE_BLOCK_DEVICE help Enable the 'mbr' command to ready and write MBR (Master Boot Record) style partition tables. @@ -1336,7 +1341,6 @@ config CMD_OSD config CMD_PART bool "part" depends on PARTITIONS - select HAVE_BLOCK_DEVICE select PARTITION_UUIDS help Read and display information about the partition table on @@ -1467,7 +1471,6 @@ config CMD_UNIVERSE config CMD_USB bool "usb" depends on USB_HOST - select HAVE_BLOCK_DEVICE help USB support. @@ -1507,7 +1510,6 @@ config CMD_PVBLOCK config CMD_VIRTIO bool "virtio" depends on VIRTIO - depends on HAVE_BLOCK_DEVICE default y if VIRTIO help VirtIO block device support @@ -1928,6 +1930,13 @@ config CMD_EFIDEBUG particularly for managing boot parameters as well as examining various EFI status for debugging. +config CMD_EFICONFIG + bool "eficonfig - provide menu-driven uefi variables maintenance interface" + depends on CMD_BOOTEFI_BOOTMGR + help + Enable the 'eficonfig' command which provides the menu-driven UEFI + variable maintenance interface. + config CMD_EXCEPTION bool "exception - raise exception" depends on ARM || RISCV || SANDBOX || X86 @@ -1971,6 +1980,12 @@ config CMD_GETTIME milliseconds. See also the 'bootstage' command which provides more flexibility for boot timing. +config CMD_PAUSE + bool "pause command" + help + Delay execution waiting for any user input. + Useful to allow the user to read a failure log. + config CMD_RNG bool "rng command" depends on DM_RNG @@ -2505,6 +2520,22 @@ config CMD_CBSYSINFO memory by coreboot before jumping to U-Boot. It can be useful for debugging the beaaviour of coreboot or U-Boot. +config CMD_CYCLIC + bool "cyclic - Show information about cyclic functions" + depends on CYCLIC + default y + help + This enables the 'cyclic' command which provides information about + cyclic execution functions. This infrastructure allows registering + functions to be executed cyclically, e.g. every 100ms. These commands + are supported: + + cyclic list - list cyclic functions + cyclic cyclic demo <cycletime_ms> <delay_us> - register cyclic + demo function + + See doc/develop/cyclic.rst for more details. + config CMD_DIAG bool "diag - Board diagnostics" help diff --git a/cmd/Makefile b/cmd/Makefile index 6e87522b62e..cf6ce1bd6fd 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -18,7 +18,7 @@ obj-$(CONFIG_CMD_AES) += aes.o obj-$(CONFIG_CMD_AB_SELECT) += ab_select.o obj-$(CONFIG_CMD_ADC) += adc.o obj-$(CONFIG_CMD_ARMFLASH) += armflash.o -obj-$(CONFIG_HAVE_BLOCK_DEVICE) += blk_common.o +obj-$(CONFIG_BLK) += blk_common.o obj-$(CONFIG_CMD_BOOTDEV) += bootdev.o obj-$(CONFIG_CMD_BOOTFLOW) += bootflow.o obj-$(CONFIG_CMD_BOOTMETH) += bootmeth.o @@ -56,6 +56,7 @@ obj-$(CONFIG_CMD_DIAG) += diag.o endif obj-$(CONFIG_CMD_ADTIMG) += adtimg.o obj-$(CONFIG_CMD_ABOOTIMG) += abootimg.o +obj-$(CONFIG_CMD_CYCLIC) += cyclic.o obj-$(CONFIG_CMD_EVENT) += event.o obj-$(CONFIG_CMD_EXTENSION) += extension_board.o obj-$(CONFIG_CMD_ECHO) += echo.o @@ -63,6 +64,7 @@ obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o obj-$(CONFIG_CMD_EEPROM) += eeprom.o obj-$(CONFIG_EFI) += efi.o obj-$(CONFIG_CMD_EFIDEBUG) += efidebug.o +obj-$(CONFIG_CMD_EFICONFIG) += eficonfig.o obj-$(CONFIG_CMD_ELF) += elf.o obj-$(CONFIG_CMD_EROFS) += erofs.o obj-$(CONFIG_HUSH_PARSER) += exit.o @@ -102,6 +104,7 @@ obj-$(CONFIG_CMD_MFSL) += mfsl.o obj-$(CONFIG_CMD_MII) += mii.o obj-$(CONFIG_CMD_MISC) += misc.o obj-$(CONFIG_CMD_MDIO) += mdio.o +obj-$(CONFIG_CMD_PAUSE) += pause.o obj-$(CONFIG_CMD_SLEEP) += sleep.o obj-$(CONFIG_CMD_MMC) += mmc.o obj-$(CONFIG_CMD_OPTEE_RPMB) += optee_rpmb.o diff --git a/cmd/bcb.c b/cmd/bcb.c index 1bbd1fae998..8b87aa062fe 100644 --- a/cmd/bcb.c +++ b/cmd/bcb.c @@ -122,7 +122,7 @@ static int __bcb_load(int devnum, const char *partp) char *endp; int part, ret; - desc = blk_get_devnum_by_type(IF_TYPE_MMC, devnum); + desc = blk_get_devnum_by_type(UCLASS_MMC, devnum); if (!desc) { ret = -ENODEV; goto err_read_fail; @@ -287,7 +287,7 @@ static int __bcb_store(void) u64 cnt; int ret; - desc = blk_get_devnum_by_type(IF_TYPE_MMC, bcb_dev); + desc = blk_get_devnum_by_type(UCLASS_MMC, bcb_dev); if (!desc) { ret = -ENODEV; goto err; diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c index 37cd8a57ebd..af2e9757db5 100644 --- a/cmd/bdinfo.c +++ b/cmd/bdinfo.c @@ -16,9 +16,16 @@ #include <vsprintf.h> #include <asm/cache.h> #include <asm/global_data.h> +#include <display_options.h> DECLARE_GLOBAL_DATA_PTR; +void bdinfo_print_size(const char *name, uint64_t size) +{ + printf("%-12s= ", name); + print_size(size, "\n"); +} + void bdinfo_print_num_l(const char *name, ulong value) { printf("%-12s= 0x%0*lx\n", name, 2 * (int)sizeof(value), value); @@ -123,7 +130,7 @@ int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) #if CONFIG_IS_ENABLED(MULTI_DTB_FIT) bdinfo_print_num_l("multi_dtb_fit", (ulong)gd->multi_dtb_fit); #endif - if (gd->fdt_blob) { + if (IS_ENABLED(CONFIG_LMB) && gd->fdt_blob) { struct lmb lmb; lmb_init_and_reserve(&lmb, gd->bd, (void *)gd->fdt_blob); diff --git a/cmd/blk_common.c b/cmd/blk_common.c index 4e442f2918b..369c5ae4bbe 100644 --- a/cmd/blk_common.c +++ b/cmd/blk_common.c @@ -12,7 +12,7 @@ #include <blk.h> #include <command.h> -int blk_common_cmd(int argc, char *const argv[], enum if_type if_type, +int blk_common_cmd(int argc, char *const argv[], enum uclass_id if_type, int *cur_devnump) { const char *if_name = blk_get_if_type_name(if_type); diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c index 704d36debe0..3340be16325 100644 --- a/cmd/bootmenu.c +++ b/cmd/bootmenu.c @@ -7,7 +7,7 @@ #include <common.h> #include <command.h> #include <ansi.h> -#include <efi_loader.h> +#include <efi_config.h> #include <efi_variable.h> #include <env.h> #include <log.h> @@ -220,7 +220,7 @@ static int prepare_bootmenu_entry(struct bootmenu_data *menu, return 1; } -#if (CONFIG_IS_ENABLED(CMD_BOOTEFI_BOOTMGR)) +#if (CONFIG_IS_ENABLED(CMD_BOOTEFI_BOOTMGR)) && (CONFIG_IS_ENABLED(CMD_EFICONFIG)) /** * prepare_uefi_bootorder_entry() - generate the uefi bootmenu entries * @@ -340,11 +340,21 @@ static struct bootmenu_data *bootmenu_create(int delay) if (ret < 0) goto cleanup; -#if (CONFIG_IS_ENABLED(CMD_BOOTEFI_BOOTMGR)) +#if (CONFIG_IS_ENABLED(CMD_BOOTEFI_BOOTMGR)) && (CONFIG_IS_ENABLED(CMD_EFICONFIG)) if (i < MAX_COUNT - 1) { - ret = prepare_uefi_bootorder_entry(menu, &iter, &i); - if (ret < 0 && ret != -ENOENT) - goto cleanup; + efi_status_t efi_ret; + + /* + * UEFI specification requires booting from removal media using + * a architecture-specific default image name such as BOOTAA64.EFI. + */ + efi_ret = eficonfig_generate_media_device_boot_option(); + if (efi_ret != EFI_SUCCESS && efi_ret != EFI_NOT_FOUND) + goto cleanup; + + ret = prepare_uefi_bootorder_entry(menu, &iter, &i); + if (ret < 0 && ret != -ENOENT) + goto cleanup; } #endif diff --git a/cmd/cyclic.c b/cmd/cyclic.c new file mode 100644 index 00000000000..c1bc556aade --- /dev/null +++ b/cmd/cyclic.c @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * A general-purpose cyclic execution infrastructure, to allow "small" + * (run-time wise) functions to be executed at a specified frequency. + * Things like LED blinking or watchdog triggering are examples for such + * tasks. + * + * Copyright (C) 2022 Stefan Roese <sr@denx.de> + */ + +#include <common.h> +#include <command.h> +#include <cyclic.h> +#include <div64.h> +#include <malloc.h> +#include <linux/delay.h> + +struct cyclic_demo_info { + uint delay_us; +}; + +static void cyclic_demo(void *ctx) +{ + struct cyclic_demo_info *info = ctx; + + /* Just a small dummy delay here */ + udelay(info->delay_us); +} + +static int do_cyclic_demo(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + struct cyclic_demo_info *info; + struct cyclic_info *cyclic; + uint time_ms; + + if (argc < 3) + return CMD_RET_USAGE; + + info = malloc(sizeof(struct cyclic_demo_info)); + if (!info) { + printf("out of memory\n"); + return CMD_RET_FAILURE; + } + + time_ms = simple_strtoul(argv[1], NULL, 0); + info->delay_us = simple_strtoul(argv[2], NULL, 0); + + /* Register demo cyclic function */ + cyclic = cyclic_register(cyclic_demo, time_ms * 1000, "cyclic_demo", + info); + if (!cyclic) + printf("Registering of cyclic_demo failed\n"); + + printf("Registered function \"%s\" to be executed all %dms\n", + "cyclic_demo", time_ms); + + return 0; +} + +static int do_cyclic_list(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + struct cyclic_info *cyclic, *tmp; + u64 cnt, freq; + + list_for_each_entry_safe(cyclic, tmp, cyclic_get_list(), list) { + cnt = cyclic->run_cnt * 1000000ULL * 100ULL; + freq = lldiv(cnt, timer_get_us() - cyclic->start_time_us); + printf("function: %s, cpu-time: %lld us, frequency: %lld.%02d times/s\n", + cyclic->name, cyclic->cpu_time_us, + lldiv(freq, 100), do_div(freq, 100)); + } + + return 0; +} + +static char cyclic_help_text[] = + "cyclic demo <cycletime_ms> <delay_us> - register cyclic demo function\n" + "cyclic list - list cyclic functions\n"; + +U_BOOT_CMD_WITH_SUBCMDS(cyclic, "Cyclic", cyclic_help_text, + U_BOOT_SUBCMD_MKENT(demo, 3, 1, do_cyclic_demo), + U_BOOT_SUBCMD_MKENT(list, 1, 1, do_cyclic_list)); diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c new file mode 100644 index 00000000000..2595dd95631 --- /dev/null +++ b/cmd/eficonfig.c @@ -0,0 +1,2502 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Menu-driven UEFI Variable maintenance + * + * Copyright (c) 2022 Masahisa Kojima, Linaro Limited + */ + +#include <ansi.h> +#include <common.h> +#include <charset.h> +#include <efi_loader.h> +#include <efi_load_initrd.h> +#include <efi_config.h> +#include <efi_variable.h> +#include <log.h> +#include <malloc.h> +#include <menu.h> +#include <sort.h> +#include <watchdog.h> +#include <asm/unaligned.h> +#include <linux/delay.h> + +static struct efi_simple_text_input_protocol *cin; + +#define EFICONFIG_DESCRIPTION_MAX 32 +#define EFICONFIG_OPTIONAL_DATA_MAX 64 + +/** + * struct eficonfig_filepath_info - structure to be used to store file path + * + * @name: file or directory name + * @list: list structure + */ +struct eficonfig_filepath_info { + char *name; + struct list_head list; +}; + +/** + * struct eficonfig_boot_option - structure to be used for updating UEFI boot option + * + * @file_info: user selected file info + * @initrd_info: user selected initrd file info + * @boot_index: index of the boot option + * @description: pointer to the description string + * @optional_data: pointer to the optional_data + * @edit_completed: flag indicates edit complete + */ +struct eficonfig_boot_option { + struct eficonfig_select_file_info file_info; + struct eficonfig_select_file_info initrd_info; + unsigned int boot_index; + u16 *description; + u16 *optional_data; + bool edit_completed; +}; + +/** + * struct eficonfig_volume_entry_data - structure to be used to store volume info + * + * @file_info: pointer to file info structure + * @v: pointer to the protocol interface + * @dp: pointer to the device path + */ +struct eficonfig_volume_entry_data { + struct eficonfig_select_file_info *file_info; + struct efi_simple_file_system_protocol *v; + struct efi_device_path *dp; +}; + +/** + * struct eficonfig_file_entry_data - structure to be used to store file info + * + * @file_info: pointer to file info structure + * @is_directory: flag to identify the directory or file + * @file_name: name of directory or file + */ +struct eficonfig_file_entry_data { + struct eficonfig_select_file_info *file_info; + bool is_directory; + char *file_name; +}; + +/** + * struct eficonfig_boot_selection_data - structure to be used to select the boot option entry + * + * @boot_index: index of the boot option + * @selected: pointer to store the selected index in the BootOrder variable + */ +struct eficonfig_boot_selection_data { + u16 boot_index; + int *selected; +}; + +/** + * struct eficonfig_boot_order - structure to be used to update BootOrder variable + * + * @num: index in the menu entry + * @description: pointer to the description string + * @boot_index: boot option index + * @active: flag to include the boot option into BootOrder variable + * @list: list structure + */ +struct eficonfig_boot_order { + u32 num; + u16 *description; + u32 boot_index; + bool active; + struct list_head list; +}; + +/** + * eficonfig_print_msg() - print message + * + * display the message to the user, user proceeds the screen + * with any key press. + * + * @items: pointer to the structure of each menu entry + * @count: the number of menu entry + * @menu_header: pointer to the menu header string + * Return: status code + */ +void eficonfig_print_msg(char *msg) +{ + /* Flush input */ + while (tstc()) + getchar(); + + printf(ANSI_CURSOR_HIDE + ANSI_CLEAR_CONSOLE + ANSI_CURSOR_POSITION + "%s\n\n Press any key to continue", 3, 4, msg); + + getchar(); +} + +/** + * eficonfig_print_entry() - print each menu entry + * + * @data: pointer to the data associated with each menu entry + */ +static void eficonfig_print_entry(void *data) +{ + struct eficonfig_entry *entry = data; + int reverse = (entry->efi_menu->active == entry->num); + + /* TODO: support scroll or page for many entries */ + + /* + * Move cursor to line where the entry will be drawn (entry->num) + * First 3 lines(menu header) + 1 empty line + */ + printf(ANSI_CURSOR_POSITION, entry->num + 4, 7); + + if (reverse) + puts(ANSI_COLOR_REVERSE); + + printf("%s", entry->title); + + if (reverse) + puts(ANSI_COLOR_RESET); +} + +/** + * eficonfig_display_statusline() - print status line + * + * @m: pointer to the menu structure + */ +static void eficonfig_display_statusline(struct menu *m) +{ + struct eficonfig_entry *entry; + + if (menu_default_choice(m, (void *)&entry) < 0) + return; + + printf(ANSI_CURSOR_POSITION + "\n%s\n" + ANSI_CURSOR_POSITION ANSI_CLEAR_LINE ANSI_CURSOR_POSITION + " Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit" + ANSI_CLEAR_LINE_TO_END ANSI_CURSOR_POSITION ANSI_CLEAR_LINE, + 1, 1, entry->efi_menu->menu_header, entry->efi_menu->count + 5, 1, + entry->efi_menu->count + 6, 1, entry->efi_menu->count + 7, 1); +} + +/** + * eficonfig_choice_entry() - user key input handler + * + * @data: pointer to the efimenu structure + * Return: key string to identify the selected entry + */ +static char *eficonfig_choice_entry(void *data) +{ + int esc = 0; + struct list_head *pos, *n; + struct eficonfig_entry *entry; + enum bootmenu_key key = KEY_NONE; + struct efimenu *efi_menu = data; + + while (1) { + bootmenu_loop((struct bootmenu_data *)efi_menu, &key, &esc); + + switch (key) { + case KEY_UP: + if (efi_menu->active > 0) + --efi_menu->active; + /* no menu key selected, regenerate menu */ + return NULL; + case KEY_DOWN: + if (efi_menu->active < efi_menu->count - 1) + ++efi_menu->active; + /* no menu key selected, regenerate menu */ + return NULL; + case KEY_SELECT: + list_for_each_safe(pos, n, &efi_menu->list) { + entry = list_entry(pos, struct eficonfig_entry, list); + if (entry->num == efi_menu->active) + return entry->key; + } + break; + case KEY_QUIT: + /* Quit by choosing the last entry */ + entry = list_last_entry(&efi_menu->list, struct eficonfig_entry, list); + return entry->key; + default: + /* Pressed key is not valid, no need to regenerate the menu */ + break; + } + } +} + +/** + * eficonfig_destroy() - destroy efimenu + * + * @efi_menu: pointer to the efimenu structure + */ +void eficonfig_destroy(struct efimenu *efi_menu) +{ + struct list_head *pos, *n; + struct eficonfig_entry *entry; + + if (!efi_menu) + return; + + list_for_each_safe(pos, n, &efi_menu->list) { + entry = list_entry(pos, struct eficonfig_entry, list); + free(entry->title); + list_del(&entry->list); + free(entry); + } + free(efi_menu->menu_header); + free(efi_menu); +} + +/** + * eficonfig_process_quit() - callback function for "Quit" entry + * + * @data: pointer to the data + * Return: status code + */ +efi_status_t eficonfig_process_quit(void *data) +{ + return EFI_ABORTED; +} + +/** + * append_entry() - append menu item + * + * @efi_menu: pointer to the efimenu structure + * @title: pointer to the entry title + * @func: callback of each entry + * @data: pointer to the data to be passed to each entry callback + * Return: status code + */ +static efi_status_t append_entry(struct efimenu *efi_menu, + char *title, eficonfig_entry_func func, void *data) +{ + struct eficonfig_entry *entry; + + if (efi_menu->count >= EFICONFIG_ENTRY_NUM_MAX) + return EFI_OUT_OF_RESOURCES; + + entry = calloc(1, sizeof(struct eficonfig_entry)); + if (!entry) + return EFI_OUT_OF_RESOURCES; + + entry->title = title; + sprintf(entry->key, "%d", efi_menu->count); + entry->efi_menu = efi_menu; + entry->func = func; + entry->data = data; + entry->num = efi_menu->count++; + list_add_tail(&entry->list, &efi_menu->list); + + return EFI_SUCCESS; +} + +/** + * append_quit_entry() - append quit entry + * + * @efi_menu: pointer to the efimenu structure + * Return: status code + */ +static efi_status_t append_quit_entry(struct efimenu *efi_menu) +{ + char *title; + efi_status_t ret; + + title = strdup("Quit"); + if (!title) + return EFI_OUT_OF_RESOURCES; + + ret = append_entry(efi_menu, title, eficonfig_process_quit, NULL); + if (ret != EFI_SUCCESS) + free(title); + + return ret; +} + +/** + * eficonfig_create_fixed_menu() - create fixed entry menu structure + * + * @items: pointer to the menu entry item + * @count: the number of menu entry + * Return: pointer to the efimenu structure + */ +void *eficonfig_create_fixed_menu(const struct eficonfig_item *items, int count) +{ + u32 i; + char *title; + efi_status_t ret; + struct efimenu *efi_menu; + const struct eficonfig_item *iter = items; + + efi_menu = calloc(1, sizeof(struct efimenu)); + if (!efi_menu) + return NULL; + + INIT_LIST_HEAD(&efi_menu->list); + for (i = 0; i < count; i++, iter++) { + title = strdup(iter->title); + if (!title) + goto out; + + ret = append_entry(efi_menu, title, iter->func, iter->data); + if (ret != EFI_SUCCESS) { + free(title); + goto out; + } + } + + return efi_menu; +out: + eficonfig_destroy(efi_menu); + + return NULL; +} + +/** + * eficonfig_process_common() - main handler for UEFI menu + * + * Construct the structures required to show the menu, then handle + * the user input interacting with u-boot menu functions. + * + * @efi_menu: pointer to the efimenu structure + * @menu_header: pointer to the menu header string + * Return: status code + */ +efi_status_t eficonfig_process_common(struct efimenu *efi_menu, char *menu_header) +{ + struct menu *menu; + void *choice = NULL; + struct list_head *pos, *n; + struct eficonfig_entry *entry; + efi_status_t ret = EFI_SUCCESS; + + if (efi_menu->count > EFICONFIG_ENTRY_NUM_MAX) + return EFI_OUT_OF_RESOURCES; + + efi_menu->delay = -1; + efi_menu->active = 0; + + if (menu_header) { + efi_menu->menu_header = strdup(menu_header); + if (!efi_menu->menu_header) + return EFI_OUT_OF_RESOURCES; + } + + menu = menu_create(NULL, 0, 1, eficonfig_display_statusline, + eficonfig_print_entry, eficonfig_choice_entry, + efi_menu); + if (!menu) + return EFI_INVALID_PARAMETER; + + list_for_each_safe(pos, n, &efi_menu->list) { + entry = list_entry(pos, struct eficonfig_entry, list); + if (!menu_item_add(menu, entry->key, entry)) { + ret = EFI_INVALID_PARAMETER; + goto out; + } + } + + entry = list_first_entry_or_null(&efi_menu->list, struct eficonfig_entry, list); + if (entry) + menu_default_set(menu, entry->key); + + printf(ANSI_CURSOR_HIDE + ANSI_CLEAR_CONSOLE + ANSI_CURSOR_POSITION, 1, 1); + + if (menu_get_choice(menu, &choice)) { + entry = choice; + if (entry->func) + ret = entry->func(entry->data); + } +out: + menu_destroy(menu); + + printf(ANSI_CLEAR_CONSOLE + ANSI_CURSOR_POSITION + ANSI_CURSOR_SHOW, 1, 1); + + return ret; +} + +/** + * eficonfig_volume_selected() - handler of volume selection + * + * @data: pointer to the data of selected entry + * Return: status code + */ +static efi_status_t eficonfig_volume_selected(void *data) +{ + struct eficonfig_volume_entry_data *info = data; + + if (info) { + info->file_info->current_volume = info->v; + info->file_info->dp_volume = info->dp; + } + + return EFI_SUCCESS; +} + +/** + * create_selected_device_path() - create device path + * + * @file_info: pointer to the selected file information + * Return: + * device path or NULL. Caller must free the returned value + */ +static +struct efi_device_path *create_selected_device_path(struct eficonfig_select_file_info *file_info) +{ + char *p; + void *buf; + efi_uintn_t fp_size; + struct efi_device_path *dp; + struct efi_device_path_file_path *fp; + + fp_size = sizeof(struct efi_device_path) + + ((u16_strlen(file_info->current_path) + 1) * sizeof(u16)); + buf = calloc(1, fp_size + sizeof(END)); + if (!buf) + return NULL; + + fp = buf; + fp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE, + fp->dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH, + fp->dp.length = (u16)fp_size; + u16_strcpy(fp->str, file_info->current_path); + + p = buf; + p += fp_size; + *((struct efi_device_path *)p) = END; + + dp = efi_dp_append(file_info->dp_volume, (struct efi_device_path *)buf); + free(buf); + + return dp; +} + +/** + * eficonfig_file_selected() - handler of file selection + * + * @data: pointer to the data of selected entry + * Return: status code + */ +static efi_status_t eficonfig_file_selected(void *data) +{ + u16 *tmp; + struct eficonfig_file_entry_data *info = data; + + if (!info) + return EFI_INVALID_PARAMETER; + + if (!strcmp(info->file_name, "..")) { + struct eficonfig_filepath_info *iter; + struct list_head *pos, *n; + int is_last; + char *filepath; + tmp = info->file_info->current_path; + + memset(info->file_info->current_path, 0, EFICONFIG_FILE_PATH_BUF_SIZE); + filepath = calloc(1, EFICONFIG_FILE_PATH_MAX); + if (!filepath) + return EFI_OUT_OF_RESOURCES; + + list_for_each_safe(pos, n, &info->file_info->filepath_list) { + iter = list_entry(pos, struct eficonfig_filepath_info, list); + + is_last = list_is_last(&iter->list, &info->file_info->filepath_list); + if (is_last) { + list_del(&iter->list); + free(iter->name); + free(iter); + break; + } + strlcat(filepath, iter->name, EFICONFIG_FILE_PATH_MAX); + } + utf8_utf16_strcpy(&tmp, filepath); + } else { + size_t new_len; + struct eficonfig_filepath_info *filepath_info; + + new_len = u16_strlen(info->file_info->current_path) + + strlen(info->file_name); + if (new_len >= EFICONFIG_FILE_PATH_MAX) { + eficonfig_print_msg("File path is too long!"); + return EFI_INVALID_PARAMETER; + } + tmp = &info->file_info->current_path[u16_strlen(info->file_info->current_path)]; + utf8_utf16_strcpy(&tmp, info->file_name); + + filepath_info = calloc(1, sizeof(struct eficonfig_filepath_info)); + if (!filepath_info) + return EFI_OUT_OF_RESOURCES; + + filepath_info->name = strdup(info->file_name); + if (!filepath_info->name) { + free(filepath_info); + return EFI_OUT_OF_RESOURCES; + } + list_add_tail(&filepath_info->list, &info->file_info->filepath_list); + + if (!info->is_directory) + info->file_info->file_selected = true; + } + + return EFI_SUCCESS; +} + +/** + * eficonfig_select_volume() - construct the volume selection menu + * + * @file_info: pointer to the file selection structure + * Return: status code + */ +static efi_status_t eficonfig_select_volume(struct eficonfig_select_file_info *file_info) +{ + u32 i; + efi_status_t ret; + efi_uintn_t count; + struct efimenu *efi_menu; + struct list_head *pos, *n; + struct efi_handler *handler; + struct eficonfig_entry *entry; + struct efi_device_path *device_path; + efi_handle_t *volume_handles = NULL; + struct efi_simple_file_system_protocol *v; + + ret = efi_locate_handle_buffer_int(BY_PROTOCOL, &efi_simple_file_system_protocol_guid, + NULL, &count, (efi_handle_t **)&volume_handles); + if (ret != EFI_SUCCESS) { + eficonfig_print_msg("No block device found!"); + return ret; + } + + efi_menu = calloc(1, sizeof(struct efimenu)); + if (!efi_menu) + return EFI_OUT_OF_RESOURCES; + + INIT_LIST_HEAD(&efi_menu->list); + for (i = 0; i < count; i++) { + char *devname; + struct efi_block_io *block_io; + struct eficonfig_volume_entry_data *info; + + if (efi_menu->count >= EFICONFIG_ENTRY_NUM_MAX - 1) + break; + + ret = efi_search_protocol(volume_handles[i], + &efi_simple_file_system_protocol_guid, &handler); + if (ret != EFI_SUCCESS) + continue; + ret = efi_protocol_open(handler, (void **)&v, efi_root, NULL, + EFI_OPEN_PROTOCOL_GET_PROTOCOL); + if (ret != EFI_SUCCESS) + continue; + + ret = efi_search_protocol(volume_handles[i], &efi_guid_device_path, &handler); + if (ret != EFI_SUCCESS) + continue; + ret = efi_protocol_open(handler, (void **)&device_path, + efi_root, NULL, EFI_OPEN_PROTOCOL_GET_PROTOCOL); + if (ret != EFI_SUCCESS) + continue; + + ret = efi_search_protocol(volume_handles[i], &efi_block_io_guid, &handler); + if (ret != EFI_SUCCESS) + continue; + ret = efi_protocol_open(handler, (void **)&block_io, + efi_root, NULL, EFI_OPEN_PROTOCOL_GET_PROTOCOL); + if (ret != EFI_SUCCESS) + continue; + + info = calloc(1, sizeof(struct eficonfig_volume_entry_data)); + if (!info) { + ret = EFI_OUT_OF_RESOURCES; + goto out; + } + + devname = calloc(1, BOOTMENU_DEVICE_NAME_MAX); + if (!devname) { + free(info); + ret = EFI_OUT_OF_RESOURCES; + goto out; + } + ret = efi_disk_get_device_name(volume_handles[i], devname, + BOOTMENU_DEVICE_NAME_MAX); + if (ret != EFI_SUCCESS) { + free(info); + goto out; + } + + info->v = v; + info->dp = device_path; + info->file_info = file_info; + ret = append_entry(efi_menu, devname, eficonfig_volume_selected, info); + if (ret != EFI_SUCCESS) { + free(info); + goto out; + } + } + + ret = append_quit_entry(efi_menu); + if (ret != EFI_SUCCESS) + goto out; + + ret = eficonfig_process_common(efi_menu, " ** Select Volume **"); +out: + efi_free_pool(volume_handles); + list_for_each_safe(pos, n, &efi_menu->list) { + entry = list_entry(pos, struct eficonfig_entry, list); + free(entry->data); + } + eficonfig_destroy(efi_menu); + + return ret; +} + +/** + * sort_file() - sort the file name in ascii order + * + * @data1: pointer to the file entry data + * @data2: pointer to the file entry data + * Return: -1 if the data1 file name is less than data2 file name, + * 0 if both file name match, + * 1 if the data1 file name is greater thant data2 file name. + */ +static int sort_file(const void *arg1, const void *arg2) +{ + const struct eficonfig_file_entry_data *data1, *data2; + + data1 = *((const struct eficonfig_file_entry_data **)arg1); + data2 = *((const struct eficonfig_file_entry_data **)arg2); + + return strcasecmp(data1->file_name, data2->file_name); +} + +/** + * eficonfig_create_file_entry() - construct the file menu entry + * + * @efi_menu: pointer to the efimenu structure + * @count: number of the directory and file + * @tmp_infos: pointer to the entry data array + * @f: pointer to the file handle + * @buf: pointer to the buffer to store the directory information + * @file_info: pointer to the file selection structure + * Return: status code + */ +static efi_status_t +eficonfig_create_file_entry(struct efimenu *efi_menu, u32 count, + struct eficonfig_file_entry_data **tmp_infos, + struct efi_file_handle *f, struct efi_file_info *buf, + struct eficonfig_select_file_info *file_info) +{ + char *name, *p; + efi_uintn_t len; + efi_status_t ret; + u32 i, entry_num = 0; + struct eficonfig_file_entry_data *info; + + efi_file_setpos_int(f, 0); + /* Read directory and construct menu structure */ + for (i = 0; i < count; i++) { + if (entry_num >= EFICONFIG_ENTRY_NUM_MAX - 1) + break; + + len = sizeof(struct efi_file_info) + EFICONFIG_FILE_PATH_BUF_SIZE; + ret = efi_file_read_int(f, &len, buf); + if (ret != EFI_SUCCESS || len == 0) + break; + + info = calloc(1, sizeof(struct eficonfig_file_entry_data)); + if (!info) { + ret = EFI_OUT_OF_RESOURCES; + goto out; + } + + /* append '\\' at the end of directory name */ + name = calloc(1, utf16_utf8_strlen(buf->file_name) + 2); + if (!name) { + ret = EFI_OUT_OF_RESOURCES; + free(info); + goto out; + } + p = name; + utf16_utf8_strcpy(&p, buf->file_name); + if (buf->attribute & EFI_FILE_DIRECTORY) { + /* filter out u'.' */ + if (!u16_strcmp(buf->file_name, u".")) { + free(info); + free(name); + continue; + } + name[u16_strlen(buf->file_name)] = '\\'; + info->is_directory = true; + } + + info->file_name = name; + info->file_info = file_info; + tmp_infos[entry_num++] = info; + } + + qsort(tmp_infos, entry_num, sizeof(*tmp_infos), + (int (*)(const void *, const void *))sort_file); + + for (i = 0; i < entry_num; i++) { + ret = append_entry(efi_menu, tmp_infos[i]->file_name, + eficonfig_file_selected, tmp_infos[i]); + if (ret != EFI_SUCCESS) + goto out; + } + +out: + return ret; +} + +/** + * eficonfig_select_file() - construct the file selection menu + * + * @file_info: pointer to the file selection structure + * @root: pointer to the file handle + * Return: status code + */ +static efi_status_t eficonfig_select_file(struct eficonfig_select_file_info *file_info, + struct efi_file_handle *root) +{ + u32 count = 0, i; + efi_uintn_t len; + efi_status_t ret; + struct efimenu *efi_menu; + struct efi_file_handle *f; + struct efi_file_info *buf; + struct eficonfig_file_entry_data **tmp_infos; + + buf = calloc(1, sizeof(struct efi_file_info) + EFICONFIG_FILE_PATH_BUF_SIZE); + if (!buf) + return EFI_OUT_OF_RESOURCES; + + while (!file_info->file_selected) { + efi_menu = calloc(1, sizeof(struct efimenu)); + if (!efi_menu) { + ret = EFI_OUT_OF_RESOURCES; + goto out; + } + INIT_LIST_HEAD(&efi_menu->list); + + ret = efi_file_open_int(root, &f, file_info->current_path, EFI_FILE_MODE_READ, 0); + if (ret != EFI_SUCCESS) { + eficonfig_print_msg("Reading volume failed!"); + free(efi_menu); + ret = EFI_ABORTED; + goto out; + } + + /* Count the number of directory entries */ + for (;;) { + len = sizeof(struct efi_file_info) + EFICONFIG_FILE_PATH_BUF_SIZE; + ret = efi_file_read_int(f, &len, buf); + if (ret != EFI_SUCCESS || len == 0) + break; + + count++; + } + + /* allocate array to sort the entry */ + tmp_infos = calloc(count, sizeof(*tmp_infos)); + if (!tmp_infos) { + ret = EFI_OUT_OF_RESOURCES; + goto err; + } + + ret = eficonfig_create_file_entry(efi_menu, count, tmp_infos, + f, buf, file_info); + if (ret != EFI_SUCCESS) + goto err; + + ret = append_quit_entry(efi_menu); + if (ret != EFI_SUCCESS) + goto err; + + ret = eficonfig_process_common(efi_menu, " ** Select File **"); +err: + efi_file_close_int(f); + eficonfig_destroy(efi_menu); + + if (tmp_infos) { + for (i = 0; i < count; i++) + free(tmp_infos[i]); + } + + free(tmp_infos); + + if (ret != EFI_SUCCESS) + break; + } + +out: + free(buf); + + return ret; +} + +/** + * handle_user_input() - handle user input + * + * @buf: pointer to the buffer + * @buf_size: size of the buffer + * @cursor_col: cursor column for user input + * @msg: pointer to the string to display + * Return: status code + */ +static efi_status_t handle_user_input(u16 *buf, int buf_size, + int cursor_col, char *msg) +{ + u16 *tmp; + efi_status_t ret; + + printf(ANSI_CLEAR_CONSOLE + ANSI_CURSOR_POSITION + "%s" + ANSI_CURSOR_POSITION + " Press ENTER to complete, ESC/CTRL+C to quit", + 0, 1, msg, 8, 1); + + /* tmp is used to accept user cancel */ + tmp = calloc(1, buf_size * sizeof(u16)); + if (!tmp) + return EFI_OUT_OF_RESOURCES; + + ret = efi_console_get_u16_string(cin, tmp, buf_size, NULL, 4, cursor_col); + if (ret == EFI_SUCCESS) + u16_strcpy(buf, tmp); + + free(tmp); + + /* to stay the parent menu */ + ret = (ret == EFI_ABORTED) ? EFI_NOT_READY : ret; + + return ret; +} + +/** + * eficonfig_boot_add_enter_description() - handle user input for description + * + * @data: pointer to the internal boot option structure + * Return: status code + */ +static efi_status_t eficonfig_boot_add_enter_description(void *data) +{ + struct eficonfig_boot_option *bo = data; + + return handle_user_input(bo->description, EFICONFIG_DESCRIPTION_MAX, 22, + "\n ** Edit Description **\n" + "\n" + " enter description: "); +} + +/** + * eficonfig_boot_add_optional_data() - handle user input for optional data + * + * @data: pointer to the internal boot option structure + * Return: status code + */ +static efi_status_t eficonfig_boot_add_optional_data(void *data) +{ + struct eficonfig_boot_option *bo = data; + + return handle_user_input(bo->optional_data, EFICONFIG_OPTIONAL_DATA_MAX, 24, + "\n ** Edit Optional Data **\n" + "\n" + " enter optional data:"); +} + +/** + * eficonfig_boot_edit_save() - handler to save the boot option + * + * @data: pointer to the internal boot option structure + * Return: status code + */ +static efi_status_t eficonfig_boot_edit_save(void *data) +{ + struct eficonfig_boot_option *bo = data; + + if (u16_strlen(bo->description) == 0) { + eficonfig_print_msg("Boot Description is empty!"); + bo->edit_completed = false; + return EFI_NOT_READY; + } + if (u16_strlen(bo->file_info.current_path) == 0) { + eficonfig_print_msg("File is not selected!"); + bo->edit_completed = false; + return EFI_NOT_READY; + } + + bo->edit_completed = true; + + return EFI_SUCCESS; +} + +/** + * eficonfig_process_select_file() - callback function for "Select File" entry + * + * @data: pointer to the data + * Return: status code + */ +efi_status_t eficonfig_process_select_file(void *data) +{ + return EFI_SUCCESS; +} + +/** + * eficonfig_process_clear_file_selection() - callback function for "Clear" entry + * + * @data: pointer to the data + * Return: status code + */ +efi_status_t eficonfig_process_clear_file_selection(void *data) +{ + struct eficonfig_select_file_info *file_info = data; + + /* clear the existing file information */ + file_info->current_volume = NULL; + file_info->current_path[0] = u'\0'; + file_info->dp_volume = NULL; + + return EFI_ABORTED; +} + +static struct eficonfig_item select_file_menu_items[] = { + {"Select File", eficonfig_process_select_file}, + {"Clear", eficonfig_process_clear_file_selection}, + {"Quit", eficonfig_process_quit}, +}; + + +/** + * eficonfig_display_select_file_option() - display select file option + * + * @file_info: pointer to the file information structure + * Return: status code + */ +efi_status_t eficonfig_display_select_file_option(struct eficonfig_select_file_info *file_info) +{ + efi_status_t ret; + struct efimenu *efi_menu; + + select_file_menu_items[1].data = file_info; + efi_menu = eficonfig_create_fixed_menu(select_file_menu_items, + ARRAY_SIZE(select_file_menu_items)); + if (!efi_menu) + return EFI_OUT_OF_RESOURCES; + + ret = eficonfig_process_common(efi_menu, " ** Update File **"); + if (ret != EFI_SUCCESS) /* User selects "Clear" or "Quit" */ + ret = EFI_NOT_READY; + + eficonfig_destroy(efi_menu); + + return ret; +} + +/** + * eficonfig_select_file_handler() - handle user file selection + * + * @data: pointer to the data + * Return: status code + */ +efi_status_t eficonfig_select_file_handler(void *data) +{ + size_t len; + efi_status_t ret; + struct list_head *pos, *n; + struct efi_file_handle *root; + struct eficonfig_filepath_info *item; + struct eficonfig_select_file_info *tmp = NULL; + struct eficonfig_select_file_info *file_info = data; + + ret = eficonfig_display_select_file_option(file_info); + if (ret != EFI_SUCCESS) + return ret; + + tmp = calloc(1, sizeof(struct eficonfig_select_file_info)); + if (!tmp) + return EFI_OUT_OF_RESOURCES; + + tmp->current_path = calloc(1, EFICONFIG_FILE_PATH_BUF_SIZE); + if (!tmp->current_path) { + free(tmp); + return EFI_OUT_OF_RESOURCES; + } + INIT_LIST_HEAD(&tmp->filepath_list); + + while (!tmp->file_selected) { + tmp->current_volume = NULL; + memset(tmp->current_path, 0, EFICONFIG_FILE_PATH_BUF_SIZE); + + ret = eficonfig_select_volume(tmp); + if (ret != EFI_SUCCESS) + goto out; + + if (!tmp->current_volume) + return EFI_INVALID_PARAMETER; + + ret = efi_open_volume_int(tmp->current_volume, &root); + if (ret != EFI_SUCCESS) + goto out; + + ret = eficonfig_select_file(tmp, root); + if (ret == EFI_ABORTED) + continue; + if (ret != EFI_SUCCESS) + goto out; + } + +out: + if (ret == EFI_SUCCESS) { + len = u16_strlen(tmp->current_path); + len = (len >= EFICONFIG_FILE_PATH_MAX) ? (EFICONFIG_FILE_PATH_MAX - 1) : len; + memcpy(file_info->current_path, tmp->current_path, len * sizeof(u16)); + file_info->current_path[len] = u'\0'; + file_info->current_volume = tmp->current_volume; + file_info->dp_volume = tmp->dp_volume; + } + + list_for_each_safe(pos, n, &tmp->filepath_list) { + item = list_entry(pos, struct eficonfig_filepath_info, list); + list_del(&item->list); + free(item->name); + free(item); + } + free(tmp->current_path); + free(tmp); + + /* to stay the parent menu */ + ret = (ret == EFI_ABORTED) ? EFI_NOT_READY : ret; + + return ret; +} + +/** + * eficonfig_get_unused_bootoption() - get unused "Boot####" index + * + * @buf: pointer to the buffer to store boot option variable name + * @buf_size: buffer size + * @index: pointer to store the index in the BootOrder variable + * Return: status code + */ +efi_status_t eficonfig_get_unused_bootoption(u16 *buf, efi_uintn_t buf_size, + unsigned int *index) +{ + u32 i; + efi_status_t ret; + efi_uintn_t size; + + if (buf_size < u16_strsize(u"Boot####")) + return EFI_BUFFER_TOO_SMALL; + + for (i = 0; i <= 0xFFFF; i++) { + size = 0; + efi_create_indexed_name(buf, buf_size, "Boot", i); + ret = efi_get_variable_int(buf, &efi_global_variable_guid, + NULL, &size, NULL, NULL); + if (ret == EFI_BUFFER_TOO_SMALL) + continue; + else + break; + } + + if (i > 0xFFFF) + return EFI_OUT_OF_RESOURCES; + + *index = i; + + return EFI_SUCCESS; +} + +/** + * eficonfig_set_boot_option() - set boot option + * + * @varname: pointer to variable name + * @dp: pointer to device path + * @label: pointer to label string + * @optional_data: pointer to optional data + * Return: status code + */ +static efi_status_t eficonfig_set_boot_option(u16 *varname, struct efi_device_path *dp, + efi_uintn_t dp_size, u16 *label, char *optional_data) +{ + void *p = NULL; + efi_status_t ret; + efi_uintn_t size; + struct efi_load_option lo; + + lo.file_path = dp; + lo.file_path_length = dp_size; + lo.attributes = LOAD_OPTION_ACTIVE; + lo.optional_data = optional_data; + lo.label = label; + + size = efi_serialize_load_option(&lo, (u8 **)&p); + if (!size) + return EFI_INVALID_PARAMETER; + + ret = efi_set_variable_int(varname, &efi_global_variable_guid, + EFI_VARIABLE_NON_VOLATILE | + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS, + size, p, false); + free(p); + + return ret; +} + +/** + * eficonfig_append_bootorder() - append new boot option in BootOrder variable + * + * @index: "Boot####" index to append to BootOrder variable + * Return: status code + */ +efi_status_t eficonfig_append_bootorder(u16 index) +{ + u16 *bootorder; + efi_status_t ret; + u16 *new_bootorder = NULL; + efi_uintn_t last, size, new_size; + + /* append new boot option */ + bootorder = efi_get_var(u"BootOrder", &efi_global_variable_guid, &size); + last = size / sizeof(u16); + new_size = size + sizeof(u16); + new_bootorder = calloc(1, new_size); + if (!new_bootorder) { + ret = EFI_OUT_OF_RESOURCES; + goto out; + } + memcpy(new_bootorder, bootorder, size); + new_bootorder[last] = index; + + ret = efi_set_variable_int(u"BootOrder", &efi_global_variable_guid, + EFI_VARIABLE_NON_VOLATILE | + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS, + new_size, new_bootorder, false); + if (ret != EFI_SUCCESS) + goto out; + +out: + free(bootorder); + free(new_bootorder); + + return ret; +} + +/** + * create_boot_option_entry() - create boot option entry + * + * @efi_menu: pointer to the efimenu structure + * @title: pointer to the entry title + * @val: pointer to boot option label + * @func: callback of each entry + * @data: pointer to the data to be passed to each entry callback + * Return: status code + */ +static efi_status_t create_boot_option_entry(struct efimenu *efi_menu, char *title, u16 *val, + eficonfig_entry_func func, void *data) +{ + u32 len; + char *p, *buf; + + len = strlen(title) + 1; + if (val) + len += utf16_utf8_strlen(val); + buf = calloc(1, len); + if (!buf) + return EFI_OUT_OF_RESOURCES; + + strcpy(buf, title); + if (val) { + p = buf + strlen(title); + utf16_utf8_strcpy(&p, val); + } + + return append_entry(efi_menu, buf, func, data); +} + +/** + * prepare_file_selection_entry() - prepare file selection entry + * + * @efi_menu: pointer to the efimenu structure + * @title: pointer to the title string + * @file_info: pointer to the file info + * Return: status code + */ +static efi_status_t prepare_file_selection_entry(struct efimenu *efi_menu, char *title, + struct eficonfig_select_file_info *file_info) +{ + u32 len; + efi_status_t ret; + u16 *file_name = NULL, *p; + efi_handle_t handle; + char *devname; + + devname = calloc(1, EFICONFIG_VOLUME_PATH_MAX + 1); + if (!devname) + return EFI_OUT_OF_RESOURCES; + + /* get the device name only when the user already selected the file path */ + handle = efi_dp_find_obj(file_info->dp_volume, NULL, NULL); + if (handle) { + ret = efi_disk_get_device_name(handle, devname, EFICONFIG_VOLUME_PATH_MAX); + if (ret != EFI_SUCCESS) + goto out; + } + + /* + * If the preconfigured volume does not exist in the system, display the text + * converted volume device path instead of U-Boot friendly name(e.g. "usb 0:1"). + */ + if (!handle && file_info->dp_volume) { + u16 *dp_str; + char *q = devname; + + dp_str = efi_dp_str(file_info->dp_volume); + if (dp_str) + utf16_utf8_strncpy(&q, dp_str, EFICONFIG_VOLUME_PATH_MAX); + + efi_free_pool(dp_str); + } + + /* append u'/' to devname, it is just for display purpose. */ + if (file_info->current_path[0] != u'\0' && file_info->current_path[0] != u'/') + strlcat(devname, "/", EFICONFIG_VOLUME_PATH_MAX + 1); + + len = strlen(devname); + len += utf16_utf8_strlen(file_info->current_path) + 1; + file_name = calloc(1, len * sizeof(u16)); + if (!file_name) { + ret = EFI_OUT_OF_RESOURCES; + goto out; + } + + p = file_name; + utf8_utf16_strcpy(&p, devname); + u16_strlcat(file_name, file_info->current_path, len); + ret = create_boot_option_entry(efi_menu, title, file_name, + eficonfig_select_file_handler, file_info); +out: + free(devname); + free(file_name); + + return ret; +} + +/** + * eficonfig_show_boot_option() - prepare menu entry for editing boot option + * + * Construct the structures to create edit boot option menu + * + * @bo: pointer to the boot option + * @header_str: pointer to the header string + * Return: status code + */ +static efi_status_t eficonfig_show_boot_option(struct eficonfig_boot_option *bo, + char *header_str) +{ + efi_status_t ret; + struct efimenu *efi_menu; + + efi_menu = calloc(1, sizeof(struct efimenu)); + if (!efi_menu) + return EFI_OUT_OF_RESOURCES; + + INIT_LIST_HEAD(&efi_menu->list); + + ret = create_boot_option_entry(efi_menu, "Description: ", bo->description, + eficonfig_boot_add_enter_description, bo); + if (ret != EFI_SUCCESS) + goto out; + + ret = prepare_file_selection_entry(efi_menu, "File: ", &bo->file_info); + if (ret != EFI_SUCCESS) + goto out; + + ret = prepare_file_selection_entry(efi_menu, "Initrd File: ", &bo->initrd_info); + if (ret != EFI_SUCCESS) + goto out; + + ret = create_boot_option_entry(efi_menu, "Optional Data: ", bo->optional_data, + eficonfig_boot_add_optional_data, bo); + if (ret != EFI_SUCCESS) + goto out; + + ret = create_boot_option_entry(efi_menu, "Save", NULL, + eficonfig_boot_edit_save, bo); + if (ret != EFI_SUCCESS) + goto out; + + ret = create_boot_option_entry(efi_menu, "Quit", NULL, + eficonfig_process_quit, NULL); + if (ret != EFI_SUCCESS) + goto out; + + ret = eficonfig_process_common(efi_menu, header_str); +out: + eficonfig_destroy(efi_menu); + + return ret; +} + +/** + * fill_file_info() - fill the file info from efi_device_path structure + * + * @dp: pointer to the device path + * @file_info: pointer to the file info structure + * @device_dp: pointer to the volume device path + */ +static void fill_file_info(struct efi_device_path *dp, + struct eficonfig_select_file_info *file_info, + struct efi_device_path *device_dp) +{ + u16 *file_str, *p; + struct efi_device_path *file_dp = NULL; + + efi_dp_split_file_path(dp, &device_dp, &file_dp); + file_info->dp_volume = device_dp; + + if (file_dp) { + file_str = efi_dp_str(file_dp); + /* + * efi_convert_device_path_to_text() automatically adds u'/' at the + * beginning of file name, remove u'/' before copying to current_path + */ + p = file_str; + if (p[0] == u'/') + p++; + + u16_strcpy(file_info->current_path, p); + efi_free_pool(file_dp); + efi_free_pool(file_str); + } +} + +/** + * eficonfig_edit_boot_option() - prepare boot option structure for editing + * + * Construct the boot option structure and copy the existing value + * + * @varname: pointer to the UEFI variable name + * @bo: pointer to the boot option + * @load_option: pointer to the load option + * @load_option_size: size of the load option + * @header_str: pointer to the header string + * Return : status code + */ +static efi_status_t eficonfig_edit_boot_option(u16 *varname, struct eficonfig_boot_option *bo, + void *load_option, efi_uintn_t load_option_size, + char *header_str) +{ + size_t len; + efi_status_t ret; + char *tmp = NULL, *p; + struct efi_load_option lo = {0}; + efi_uintn_t final_dp_size; + struct efi_device_path *dp = NULL; + efi_uintn_t size = load_option_size; + struct efi_device_path *final_dp = NULL; + struct efi_device_path *device_dp = NULL; + struct efi_device_path *initrd_dp = NULL; + struct efi_device_path *initrd_device_dp = NULL; + + const struct efi_initrd_dp id_dp = { + .vendor = { + { + DEVICE_PATH_TYPE_MEDIA_DEVICE, + DEVICE_PATH_SUB_TYPE_VENDOR_PATH, + sizeof(id_dp.vendor), + }, + EFI_INITRD_MEDIA_GUID, + }, + .end = { + DEVICE_PATH_TYPE_END, + DEVICE_PATH_SUB_TYPE_END, + sizeof(id_dp.end), + } + }; + + bo->file_info.current_path = calloc(1, EFICONFIG_FILE_PATH_BUF_SIZE); + if (!bo->file_info.current_path) { + ret = EFI_OUT_OF_RESOURCES; + goto out; + } + + bo->initrd_info.current_path = calloc(1, EFICONFIG_FILE_PATH_BUF_SIZE); + if (!bo->file_info.current_path) { + ret = EFI_OUT_OF_RESOURCES; + goto out; + } + + bo->description = calloc(1, EFICONFIG_DESCRIPTION_MAX * sizeof(u16)); + if (!bo->description) { + ret = EFI_OUT_OF_RESOURCES; + goto out; + } + + bo->optional_data = calloc(1, EFICONFIG_OPTIONAL_DATA_MAX * sizeof(u16)); + if (!bo->optional_data) { + ret = EFI_OUT_OF_RESOURCES; + goto out; + } + + /* copy the preset value */ + if (load_option) { + ret = efi_deserialize_load_option(&lo, load_option, &size); + if (ret != EFI_SUCCESS) + goto out; + + if (!lo.label) { + ret = EFI_INVALID_PARAMETER; + goto out; + } + /* truncate the long label string */ + if (u16_strlen(lo.label) >= EFICONFIG_DESCRIPTION_MAX) + lo.label[EFICONFIG_DESCRIPTION_MAX - 1] = u'\0'; + + u16_strcpy(bo->description, lo.label); + + /* EFI image file path is a first instance */ + if (lo.file_path) + fill_file_info(lo.file_path, &bo->file_info, device_dp); + + /* Initrd file path(optional) is placed at second instance. */ + initrd_dp = efi_dp_from_lo(&lo, &efi_lf2_initrd_guid); + if (initrd_dp) { + fill_file_info(initrd_dp, &bo->initrd_info, initrd_device_dp); + efi_free_pool(initrd_dp); + } + + if (size > 0) + memcpy(bo->optional_data, lo.optional_data, size); + } + + while (1) { + ret = eficonfig_show_boot_option(bo, header_str); + if (ret == EFI_SUCCESS && bo->edit_completed) + break; + if (ret == EFI_NOT_READY) + continue; + if (ret != EFI_SUCCESS) + goto out; + } + + if (bo->initrd_info.dp_volume) { + dp = create_selected_device_path(&bo->initrd_info); + if (!dp) { + ret = EFI_OUT_OF_RESOURCES; + goto out; + } + initrd_dp = efi_dp_append((const struct efi_device_path *)&id_dp, dp); + efi_free_pool(dp); + } + + dp = create_selected_device_path(&bo->file_info); + if (!dp) { + ret = EFI_OUT_OF_RESOURCES; + goto out; + } + final_dp_size = efi_dp_size(dp) + sizeof(END); + if (initrd_dp) { + final_dp = efi_dp_concat(dp, initrd_dp); + final_dp_size += efi_dp_size(initrd_dp) + sizeof(END); + } else { + final_dp = efi_dp_dup(dp); + } + efi_free_pool(dp); + + if (!final_dp) + goto out; + + if (utf16_utf8_strlen(bo->optional_data)) { + len = utf16_utf8_strlen(bo->optional_data) + 1; + tmp = calloc(1, len); + if (!tmp) + goto out; + p = tmp; + utf16_utf8_strncpy(&p, bo->optional_data, u16_strlen(bo->optional_data)); + } + + ret = eficonfig_set_boot_option(varname, final_dp, final_dp_size, bo->description, tmp); + if (ret != EFI_SUCCESS) + goto out; +out: + free(tmp); + free(bo->optional_data); + free(bo->description); + free(bo->file_info.current_path); + free(bo->initrd_info.current_path); + efi_free_pool(device_dp); + efi_free_pool(initrd_device_dp); + efi_free_pool(initrd_dp); + efi_free_pool(final_dp); + + return ret; +} + +/** + * eficonfig_process_add_boot_option() - handler to add boot option + * + * @data: pointer to the data for each entry + * Return: status code + */ +static efi_status_t eficonfig_process_add_boot_option(void *data) +{ + u16 varname[9]; + efi_status_t ret; + struct eficonfig_boot_option *bo = NULL; + + bo = calloc(1, sizeof(struct eficonfig_boot_option)); + if (!bo) + return EFI_OUT_OF_RESOURCES; + + ret = eficonfig_get_unused_bootoption(varname, sizeof(varname), &bo->boot_index); + if (ret != EFI_SUCCESS) + return ret; + + ret = eficonfig_edit_boot_option(varname, bo, NULL, 0, " ** Add Boot Option ** "); + if (ret != EFI_SUCCESS) + goto out; + + ret = eficonfig_append_bootorder((u16)bo->boot_index); + if (ret != EFI_SUCCESS) + goto out; + +out: + free(bo); + + /* to stay the parent menu */ + ret = (ret == EFI_ABORTED) ? EFI_SUCCESS : ret; + + return ret; +} + +/** + * eficonfig_process_boot_selected() - handler to select boot option entry + * + * @data: pointer to the data for each entry + * Return: status code + */ +static efi_status_t eficonfig_process_boot_selected(void *data) +{ + struct eficonfig_boot_selection_data *info = data; + + if (info) + *info->selected = info->boot_index; + + return EFI_SUCCESS; +} + +/** + * search_bootorder() - search the boot option index in BootOrder + * + * @bootorder: pointer to the BootOrder variable + * @num: number of BootOrder entry + * @target: target boot option index to search + * @index: pointer to store the index of BootOrder variable + * Return: true if exists, false otherwise + */ +static bool search_bootorder(u16 *bootorder, efi_uintn_t num, u32 target, u32 *index) +{ + u32 i; + + for (i = 0; i < num; i++) { + if (target == bootorder[i]) { + if (index) + *index = i; + + return true; + } + } + + return false; +} + +/** + * eficonfig_add_boot_selection_entry() - add boot option menu entry + * + * @efi_menu: pointer to store the efimenu structure + * @boot_index: boot option index to be added + * @selected: pointer to store the selected boot option index + * Return: status code + */ +static efi_status_t eficonfig_add_boot_selection_entry(struct efimenu *efi_menu, + unsigned int boot_index, + unsigned int *selected) +{ + char *buf, *p; + efi_status_t ret; + efi_uintn_t size; + void *load_option; + struct efi_load_option lo; + u16 varname[] = u"Boot####"; + struct eficonfig_boot_selection_data *info; + + efi_create_indexed_name(varname, sizeof(varname), "Boot", boot_index); + load_option = efi_get_var(varname, &efi_global_variable_guid, &size); + if (!load_option) + return EFI_SUCCESS; + + ret = efi_deserialize_load_option(&lo, load_option, &size); + if (ret != EFI_SUCCESS) { + log_warning("Invalid load option for %ls\n", varname); + free(load_option); + return ret; + } + + if (size >= sizeof(efi_guid_t) && + !guidcmp(lo.optional_data, &efi_guid_bootmenu_auto_generated)) { + /* + * auto generated entry has GUID in optional_data, + * skip auto generated entry because it will be generated + * again even if it is edited or deleted. + */ + free(load_option); + return EFI_SUCCESS; + } + + info = calloc(1, sizeof(struct eficonfig_boot_selection_data)); + if (!info) { + free(load_option); + return EFI_OUT_OF_RESOURCES; + } + + buf = calloc(1, utf16_utf8_strlen(lo.label) + 1); + if (!buf) { + free(load_option); + free(info); + return EFI_OUT_OF_RESOURCES; + } + p = buf; + utf16_utf8_strcpy(&p, lo.label); + info->boot_index = boot_index; + info->selected = selected; + ret = append_entry(efi_menu, buf, eficonfig_process_boot_selected, info); + if (ret != EFI_SUCCESS) { + free(load_option); + free(info); + return ret; + } + free(load_option); + + return EFI_SUCCESS; +} + +/** + * eficonfig_show_boot_selection() - construct boot option menu entry + * + * @selected: pointer to store the selected boot option index + * Return: status code + */ +static efi_status_t eficonfig_show_boot_selection(unsigned int *selected) +{ + u32 i; + u16 *bootorder; + efi_status_t ret; + efi_uintn_t num, size; + struct efimenu *efi_menu; + struct list_head *pos, *n; + struct eficonfig_entry *entry; + + efi_menu = calloc(1, sizeof(struct efimenu)); + if (!efi_menu) + return EFI_OUT_OF_RESOURCES; + + bootorder = efi_get_var(u"BootOrder", &efi_global_variable_guid, &size); + + INIT_LIST_HEAD(&efi_menu->list); + num = size / sizeof(u16); + /* list the load option in the order of BootOrder variable */ + for (i = 0; i < num; i++) { + ret = eficonfig_add_boot_selection_entry(efi_menu, bootorder[i], selected); + if (ret != EFI_SUCCESS) + goto out; + + if (efi_menu->count >= EFICONFIG_ENTRY_NUM_MAX - 1) + break; + } + + /* list the remaining load option not included in the BootOrder */ + for (i = 0; i <= 0xFFFF; i++) { + /* If the index is included in the BootOrder, skip it */ + if (search_bootorder(bootorder, num, i, NULL)) + continue; + + ret = eficonfig_add_boot_selection_entry(efi_menu, i, selected); + if (ret != EFI_SUCCESS) + goto out; + + if (efi_menu->count >= EFICONFIG_ENTRY_NUM_MAX - 1) + break; + } + + ret = append_quit_entry(efi_menu); + if (ret != EFI_SUCCESS) + goto out; + + ret = eficonfig_process_common(efi_menu, " ** Select Boot Option **"); +out: + list_for_each_safe(pos, n, &efi_menu->list) { + entry = list_entry(pos, struct eficonfig_entry, list); + free(entry->data); + } + eficonfig_destroy(efi_menu); + + return ret; +} + +/** + * eficonfig_process_edit_boot_option() - handler to edit boot option + * + * @data: pointer to the data for each entry + * Return: status code + */ +static efi_status_t eficonfig_process_edit_boot_option(void *data) +{ + efi_status_t ret; + efi_uintn_t size; + struct eficonfig_boot_option *bo = NULL; + + while (1) { + unsigned int selected; + void *load_option; + u16 varname[] = u"Boot####"; + + ret = eficonfig_show_boot_selection(&selected); + if (ret != EFI_SUCCESS) + break; + + bo = calloc(1, sizeof(struct eficonfig_boot_option)); + if (!bo) { + ret = EFI_OUT_OF_RESOURCES; + goto out; + } + + bo->boot_index = selected; + efi_create_indexed_name(varname, sizeof(varname), "Boot", selected); + load_option = efi_get_var(varname, &efi_global_variable_guid, &size); + if (!load_option) { + free(bo); + ret = EFI_NOT_FOUND; + goto out; + } + + ret = eficonfig_edit_boot_option(varname, bo, load_option, size, + " ** Edit Boot Option ** "); + + free(load_option); + free(bo); + if (ret != EFI_SUCCESS && ret != EFI_ABORTED) + break; + } +out: + /* to stay the parent menu */ + ret = (ret == EFI_ABORTED) ? EFI_NOT_READY : ret; + + return ret; +} + +/** + * eficonfig_display_change_boot_order() - display the BootOrder list + * + * @efi_menu: pointer to the efimenu structure + * Return: status code + */ +static void eficonfig_display_change_boot_order(struct efimenu *efi_menu) +{ + bool reverse; + struct list_head *pos, *n; + struct eficonfig_boot_order *entry; + + printf(ANSI_CLEAR_CONSOLE ANSI_CURSOR_POSITION + "\n ** Change Boot Order **\n" + ANSI_CURSOR_POSITION + " Press UP/DOWN to move, +/- to change order" + ANSI_CURSOR_POSITION + " Press SPACE to activate or deactivate the entry" + ANSI_CURSOR_POSITION + " Select [Save] to complete, ESC/CTRL+C to quit" + ANSI_CURSOR_POSITION ANSI_CLEAR_LINE, + 1, 1, efi_menu->count + 5, 1, efi_menu->count + 6, 1, + efi_menu->count + 7, 1, efi_menu->count + 8, 1); + + /* draw boot option list */ + list_for_each_safe(pos, n, &efi_menu->list) { + entry = list_entry(pos, struct eficonfig_boot_order, list); + reverse = (entry->num == efi_menu->active); + + printf(ANSI_CURSOR_POSITION, entry->num + 4, 7); + + if (reverse) + puts(ANSI_COLOR_REVERSE); + + if (entry->num < efi_menu->count - 2) { + if (entry->active) + printf("[*] "); + else + printf("[ ] "); + } + + printf("%ls", entry->description); + + if (reverse) + puts(ANSI_COLOR_RESET); + } +} + +/** + * eficonfig_choice_change_boot_order() - handle the BootOrder update + * + * @efi_menu: pointer to the efimenu structure + * Return: status code + */ +static efi_status_t eficonfig_choice_change_boot_order(struct efimenu *efi_menu) +{ + int esc = 0; + struct list_head *pos, *n; + struct eficonfig_boot_order *tmp; + enum bootmenu_key key = KEY_NONE; + struct eficonfig_boot_order *entry; + + while (1) { + bootmenu_loop(NULL, &key, &esc); + + switch (key) { + case KEY_PLUS: + if (efi_menu->active > 0) { + list_for_each_safe(pos, n, &efi_menu->list) { + entry = list_entry(pos, struct eficonfig_boot_order, list); + if (entry->num == efi_menu->active) + break; + } + tmp = list_entry(pos->prev, struct eficonfig_boot_order, list); + entry->num--; + tmp->num++; + list_del(&tmp->list); + list_add(&tmp->list, &entry->list); + } + fallthrough; + case KEY_UP: + if (efi_menu->active > 0) + --efi_menu->active; + return EFI_NOT_READY; + case KEY_MINUS: + if (efi_menu->active < efi_menu->count - 3) { + list_for_each_safe(pos, n, &efi_menu->list) { + entry = list_entry(pos, struct eficonfig_boot_order, list); + if (entry->num == efi_menu->active) + break; + } + tmp = list_entry(pos->next, struct eficonfig_boot_order, list); + entry->num++; + tmp->num--; + list_del(&entry->list); + list_add(&entry->list, &tmp->list); + + ++efi_menu->active; + } + return EFI_NOT_READY; + case KEY_DOWN: + if (efi_menu->active < efi_menu->count - 1) + ++efi_menu->active; + return EFI_NOT_READY; + case KEY_SELECT: + /* "Save" */ + if (efi_menu->active == efi_menu->count - 2) + return EFI_SUCCESS; + + /* "Quit" */ + if (efi_menu->active == efi_menu->count - 1) + return EFI_ABORTED; + + break; + case KEY_SPACE: + if (efi_menu->active < efi_menu->count - 2) { + list_for_each_safe(pos, n, &efi_menu->list) { + entry = list_entry(pos, struct eficonfig_boot_order, list); + if (entry->num == efi_menu->active) { + entry->active = entry->active ? false : true; + return EFI_NOT_READY; + } + } + } + break; + case KEY_QUIT: + return EFI_ABORTED; + default: + /* Pressed key is not valid, no need to regenerate the menu */ + break; + } + } +} + +/** + * eficonfig_add_change_boot_order_entry() - add boot order entry + * + * @efi_menu: pointer to the efimenu structure + * @boot_index: boot option index to be added + * @active: flag to include the boot option into BootOrder + * Return: status code + */ +static efi_status_t eficonfig_add_change_boot_order_entry(struct efimenu *efi_menu, + u32 boot_index, bool active) +{ + efi_status_t ret; + efi_uintn_t size; + void *load_option; + struct efi_load_option lo; + u16 varname[] = u"Boot####"; + struct eficonfig_boot_order *entry; + + efi_create_indexed_name(varname, sizeof(varname), "Boot", boot_index); + load_option = efi_get_var(varname, &efi_global_variable_guid, &size); + if (!load_option) + return EFI_SUCCESS; + + ret = efi_deserialize_load_option(&lo, load_option, &size); + if (ret != EFI_SUCCESS) { + free(load_option); + return ret; + } + + entry = calloc(1, sizeof(struct eficonfig_boot_order)); + if (!entry) { + free(load_option); + return EFI_OUT_OF_RESOURCES; + } + + entry->description = u16_strdup(lo.label); + if (!entry->description) { + free(load_option); + free(entry); + return EFI_OUT_OF_RESOURCES; + } + entry->num = efi_menu->count++; + entry->boot_index = boot_index; + entry->active = active; + list_add_tail(&entry->list, &efi_menu->list); + + free(load_option); + + return EFI_SUCCESS; +} + +/** + * eficonfig_create_change_boot_order_entry() - create boot order entry + * + * @efi_menu: pointer to the efimenu structure + * @bootorder: pointer to the BootOrder variable + * @num: number of BootOrder entry + * Return: status code + */ +static efi_status_t eficonfig_create_change_boot_order_entry(struct efimenu *efi_menu, + u16 *bootorder, efi_uintn_t num) +{ + u32 i; + efi_status_t ret; + struct eficonfig_boot_order *entry; + + /* list the load option in the order of BootOrder variable */ + for (i = 0; i < num; i++) { + if (efi_menu->count >= EFICONFIG_ENTRY_NUM_MAX - 2) + break; + + ret = eficonfig_add_change_boot_order_entry(efi_menu, bootorder[i], true); + if (ret != EFI_SUCCESS) + goto out; + } + + /* list the remaining load option not included in the BootOrder */ + for (i = 0; i < 0xFFFF; i++) { + if (efi_menu->count >= EFICONFIG_ENTRY_NUM_MAX - 2) + break; + + /* If the index is included in the BootOrder, skip it */ + if (search_bootorder(bootorder, num, i, NULL)) + continue; + + ret = eficonfig_add_change_boot_order_entry(efi_menu, i, false); + if (ret != EFI_SUCCESS) + goto out; + } + + /* add "Save" and "Quit" entries */ + entry = calloc(1, sizeof(struct eficonfig_boot_order)); + if (!entry) + goto out; + + entry->num = efi_menu->count++; + entry->description = u16_strdup(u"Save"); + list_add_tail(&entry->list, &efi_menu->list); + + entry = calloc(1, sizeof(struct eficonfig_boot_order)); + if (!entry) + goto out; + + entry->num = efi_menu->count++; + entry->description = u16_strdup(u"Quit"); + list_add_tail(&entry->list, &efi_menu->list); + + efi_menu->active = 0; + + return EFI_SUCCESS; +out: + return EFI_OUT_OF_RESOURCES; +} + +/** + * eficonfig_process_change_boot_order() - handler to change boot order + * + * @data: pointer to the data for each entry + * Return: status code + */ +static efi_status_t eficonfig_process_change_boot_order(void *data) +{ + u32 count; + u16 *bootorder; + efi_status_t ret; + efi_uintn_t num, size; + struct list_head *pos, *n; + struct eficonfig_boot_order *entry; + struct efimenu *efi_menu; + + efi_menu = calloc(1, sizeof(struct efimenu)); + if (!efi_menu) + return EFI_OUT_OF_RESOURCES; + + bootorder = efi_get_var(u"BootOrder", &efi_global_variable_guid, &size); + + INIT_LIST_HEAD(&efi_menu->list); + num = size / sizeof(u16); + ret = eficonfig_create_change_boot_order_entry(efi_menu, bootorder, num); + if (ret != EFI_SUCCESS) + goto out; + + while (1) { + eficonfig_display_change_boot_order(efi_menu); + + ret = eficonfig_choice_change_boot_order(efi_menu); + if (ret == EFI_SUCCESS) { + u16 *new_bootorder; + + new_bootorder = calloc(1, (efi_menu->count - 2) * sizeof(u16)); + if (!new_bootorder) { + ret = EFI_OUT_OF_RESOURCES; + goto out; + } + + /* create new BootOrder */ + count = 0; + list_for_each_safe(pos, n, &efi_menu->list) { + entry = list_entry(pos, struct eficonfig_boot_order, list); + if (entry->active) + new_bootorder[count++] = entry->boot_index; + } + + size = count * sizeof(u16); + ret = efi_set_variable_int(u"BootOrder", &efi_global_variable_guid, + EFI_VARIABLE_NON_VOLATILE | + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS, + size, new_bootorder, false); + + free(new_bootorder); + goto out; + } else if (ret == EFI_NOT_READY) { + continue; + } else { + goto out; + } + } +out: + list_for_each_safe(pos, n, &efi_menu->list) { + entry = list_entry(pos, struct eficonfig_boot_order, list); + list_del(&entry->list); + free(entry->description); + free(entry); + } + + free(bootorder); + free(efi_menu); + + /* to stay the parent menu */ + ret = (ret == EFI_ABORTED) ? EFI_NOT_READY : ret; + + return ret; +} + +/** + * delete_boot_option() - delete selected boot option + * + * @boot_index: boot option index to delete + * Return: status code + */ +static efi_status_t delete_boot_option(u16 boot_index) +{ + u16 *bootorder; + u16 varname[9]; + efi_status_t ret; + unsigned int index; + efi_uintn_t num, size; + + efi_create_indexed_name(varname, sizeof(varname), + "Boot", boot_index); + ret = efi_set_variable_int(varname, &efi_global_variable_guid, + 0, 0, NULL, false); + if (ret != EFI_SUCCESS) { + log_err("delete boot option(%ls) failed\n", varname); + return ret; + } + + /* update BootOrder if necessary */ + bootorder = efi_get_var(u"BootOrder", &efi_global_variable_guid, &size); + if (!bootorder) + return EFI_SUCCESS; + + num = size / sizeof(u16); + if (!search_bootorder(bootorder, num, boot_index, &index)) + return EFI_SUCCESS; + + memmove(&bootorder[index], &bootorder[index + 1], + (num - index - 1) * sizeof(u16)); + size -= sizeof(u16); + ret = efi_set_variable_int(u"BootOrder", &efi_global_variable_guid, + EFI_VARIABLE_NON_VOLATILE | + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS, + size, bootorder, false); + + return ret; +} + +/** + * eficonfig_process_delete_boot_option() - handler to delete boot option + * + * @data: pointer to the data for each entry + * Return: status code + */ +static efi_status_t eficonfig_process_delete_boot_option(void *data) +{ + efi_status_t ret; + unsigned int selected; + + while (1) { + ret = eficonfig_show_boot_selection(&selected); + if (ret == EFI_SUCCESS) + ret = delete_boot_option(selected); + + if (ret != EFI_SUCCESS) + break; + } + + /* to stay the parent menu */ + ret = (ret == EFI_ABORTED) ? EFI_NOT_READY : ret; + + return ret; +} + +/** + * eficonfig_enumerate_boot_option() - enumerate the possible bootable media + * + * @opt: pointer to the media boot option structure + * @volume_handles: pointer to the efi handles + * @count: number of efi handle + * Return: status code + */ +efi_status_t eficonfig_enumerate_boot_option(struct eficonfig_media_boot_option *opt, + efi_handle_t *volume_handles, efi_status_t count) +{ + u32 i; + struct efi_handler *handler; + efi_status_t ret = EFI_SUCCESS; + + for (i = 0; i < count; i++) { + u16 *p; + u16 dev_name[BOOTMENU_DEVICE_NAME_MAX]; + char *optional_data; + struct efi_load_option lo; + char buf[BOOTMENU_DEVICE_NAME_MAX]; + struct efi_device_path *device_path; + + ret = efi_search_protocol(volume_handles[i], &efi_guid_device_path, &handler); + if (ret != EFI_SUCCESS) + continue; + ret = efi_protocol_open(handler, (void **)&device_path, + efi_root, NULL, EFI_OPEN_PROTOCOL_GET_PROTOCOL); + if (ret != EFI_SUCCESS) + continue; + + ret = efi_disk_get_device_name(volume_handles[i], buf, BOOTMENU_DEVICE_NAME_MAX); + if (ret != EFI_SUCCESS) + continue; + + p = dev_name; + utf8_utf16_strncpy(&p, buf, strlen(buf)); + + lo.label = dev_name; + lo.attributes = LOAD_OPTION_ACTIVE; + lo.file_path = device_path; + lo.file_path_length = efi_dp_size(device_path) + sizeof(END); + /* + * Set the dedicated guid to optional_data, it is used to identify + * the boot option that automatically generated by the bootmenu. + * efi_serialize_load_option() expects optional_data is null-terminated + * utf8 string, so set the "1234567" string to allocate enough space + * to store guid, instead of realloc the load_option. + */ + lo.optional_data = "1234567"; + opt[i].size = efi_serialize_load_option(&lo, (u8 **)&opt[i].lo); + if (!opt[i].size) { + ret = EFI_OUT_OF_RESOURCES; + goto out; + } + /* set the guid */ + optional_data = (char *)opt[i].lo + (opt[i].size - u16_strsize(u"1234567")); + memcpy(optional_data, &efi_guid_bootmenu_auto_generated, sizeof(efi_guid_t)); + } + +out: + return ret; +} + +/** + * eficonfig_delete_invalid_boot_option() - delete non-existing boot option + * + * @opt: pointer to the media boot option structure + * @count: number of media boot option structure + * Return: status code + */ +efi_status_t eficonfig_delete_invalid_boot_option(struct eficonfig_media_boot_option *opt, + efi_status_t count) +{ + u32 i, j; + efi_uintn_t size; + efi_status_t ret; + void *load_option; + struct efi_load_option lo; + u16 varname[] = u"Boot####"; + + for (i = 0; i <= 0xFFFF; i++) { + efi_uintn_t tmp; + + efi_create_indexed_name(varname, sizeof(varname), "Boot", i); + load_option = efi_get_var(varname, &efi_global_variable_guid, &size); + if (!load_option) + continue; + + tmp = size; + ret = efi_deserialize_load_option(&lo, load_option, &size); + if (ret != EFI_SUCCESS) + goto next; + + if (size >= sizeof(efi_guid_bootmenu_auto_generated)) { + if (guidcmp(lo.optional_data, &efi_guid_bootmenu_auto_generated) == 0) { + for (j = 0; j < count; j++) { + if (opt[j].size == tmp && + memcmp(opt[j].lo, load_option, tmp) == 0) { + opt[j].exist = true; + break; + } + } + + if (j == count) { + ret = delete_boot_option(i); + if (ret != EFI_SUCCESS) { + free(load_option); + goto out; + } + } + } + } +next: + free(load_option); + } + +out: + return ret; +} + +/** + * eficonfig_generate_media_device_boot_option() - generate the media device boot option + * + * This function enumerates all devices supporting EFI_SIMPLE_FILE_SYSTEM_PROTOCOL + * and generate the bootmenu entries. + * This function also provide the BOOT#### variable maintenance for + * the media device entries. + * - Automatically create the BOOT#### variable for the newly detected device, + * this BOOT#### variable is distinguished by the special GUID + * stored in the EFI_LOAD_OPTION.optional_data + * - If the device is not attached to the system, the associated BOOT#### variable + * is automatically deleted. + * + * Return: status code + */ +efi_status_t eficonfig_generate_media_device_boot_option(void) +{ + u32 i; + efi_status_t ret; + efi_uintn_t count; + efi_handle_t *volume_handles = NULL; + struct eficonfig_media_boot_option *opt = NULL; + + ret = efi_locate_handle_buffer_int(BY_PROTOCOL, &efi_simple_file_system_protocol_guid, + NULL, &count, (efi_handle_t **)&volume_handles); + if (ret != EFI_SUCCESS) + return ret; + + opt = calloc(count, sizeof(struct eficonfig_media_boot_option)); + if (!opt) + goto out; + + /* enumerate all devices supporting EFI_SIMPLE_FILE_SYSTEM_PROTOCOL */ + ret = eficonfig_enumerate_boot_option(opt, volume_handles, count); + if (ret != EFI_SUCCESS) + goto out; + + /* + * System hardware configuration may vary depending on the user setup. + * The boot option is automatically added by the bootmenu. + * If the device is not attached to the system, the boot option needs + * to be deleted. + */ + ret = eficonfig_delete_invalid_boot_option(opt, count); + if (ret != EFI_SUCCESS) + goto out; + + /* add non-existent boot option */ + for (i = 0; i < count; i++) { + u32 boot_index; + u16 var_name[9]; + + if (!opt[i].exist) { + ret = eficonfig_get_unused_bootoption(var_name, sizeof(var_name), + &boot_index); + if (ret != EFI_SUCCESS) + goto out; + + ret = efi_set_variable_int(var_name, &efi_global_variable_guid, + EFI_VARIABLE_NON_VOLATILE | + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS, + opt[i].size, opt[i].lo, false); + if (ret != EFI_SUCCESS) + goto out; + + ret = eficonfig_append_bootorder(boot_index); + if (ret != EFI_SUCCESS) { + efi_set_variable_int(var_name, &efi_global_variable_guid, + 0, 0, NULL, false); + goto out; + } + } + } + +out: + if (opt) { + for (i = 0; i < count; i++) + free(opt[i].lo); + } + free(opt); + efi_free_pool(volume_handles); + + return ret; +} + +/** + * eficonfig_init() - do required initialization for eficonfig command + * + * Return: status code + */ +static efi_status_t eficonfig_init(void) +{ + efi_status_t ret = EFI_SUCCESS; + static bool init; + struct efi_handler *handler; + + if (!init) { + ret = efi_search_protocol(efi_root, &efi_guid_text_input_protocol, &handler); + if (ret != EFI_SUCCESS) + return ret; + + ret = efi_protocol_open(handler, (void **)&cin, efi_root, NULL, + EFI_OPEN_PROTOCOL_GET_PROTOCOL); + if (ret != EFI_SUCCESS) + return ret; + } + + init = true; + + return ret; +} + +static const struct eficonfig_item maintenance_menu_items[] = { + {"Add Boot Option", eficonfig_process_add_boot_option}, + {"Edit Boot Option", eficonfig_process_edit_boot_option}, + {"Change Boot Order", eficonfig_process_change_boot_order}, + {"Delete Boot Option", eficonfig_process_delete_boot_option}, + {"Quit", eficonfig_process_quit}, +}; + +/** + * do_eficonfig() - execute `eficonfig` command + * + * @cmdtp: table entry describing command + * @flag: bitmap indicating how the command was invoked + * @argc: number of arguments + * @argv: command line arguments + * Return: status code + */ +static int do_eficonfig(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + efi_status_t ret; + struct efimenu *efi_menu; + + if (argc > 1) + return CMD_RET_USAGE; + + ret = efi_init_obj_list(); + if (ret != EFI_SUCCESS) { + log_err("Error: Cannot initialize UEFI sub-system, r = %lu\n", + ret & ~EFI_ERROR_MASK); + + return CMD_RET_FAILURE; + } + + ret = eficonfig_init(); + if (ret != EFI_SUCCESS) + return CMD_RET_FAILURE; + + ret = eficonfig_generate_media_device_boot_option(); + if (ret != EFI_SUCCESS && ret != EFI_NOT_FOUND) + return ret; + + while (1) { + efi_menu = eficonfig_create_fixed_menu(maintenance_menu_items, + ARRAY_SIZE(maintenance_menu_items)); + if (!efi_menu) + return CMD_RET_FAILURE; + + ret = eficonfig_process_common(efi_menu, " ** UEFI Maintenance Menu **"); + eficonfig_destroy(efi_menu); + + if (ret == EFI_ABORTED) + break; + } + + return CMD_RET_SUCCESS; +} + +U_BOOT_CMD( + eficonfig, 1, 0, do_eficonfig, + "provide menu-driven UEFI variable maintenance interface", + "" +); diff --git a/cmd/fastboot.c b/cmd/fastboot.c index 033a2c95e8f..dd223b1554d 100644 --- a/cmd/fastboot.c +++ b/cmd/fastboot.c @@ -76,7 +76,7 @@ static int do_fastboot_usb(int argc, char *const argv[], break; if (ctrlc()) break; - WATCHDOG_RESET(); + schedule(); usb_gadget_handle_interrupts(controller_index); } diff --git a/cmd/ide.c b/cmd/ide.c index b78c38e1590..6739f0b12d1 100644 --- a/cmd/ide.c +++ b/cmd/ide.c @@ -37,7 +37,7 @@ int do_ide(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) } } - return blk_common_cmd(argc, argv, IF_TYPE_IDE, &curr_device); + return blk_common_cmd(argc, argv, UCLASS_IDE, &curr_device); } int do_diskboot(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/mem.c b/cmd/mem.c index 6a7b4014edc..1e39348195a 100644 --- a/cmd/mem.c +++ b/cmd/mem.c @@ -300,7 +300,7 @@ static int do_mem_cmp(struct cmd_tbl *cmdtp, int flag, int argc, /* reset watchdog from time to time */ if ((ngood % (64 << 10)) == 0) - WATCHDOG_RESET(); + schedule(); } unmap_sysmem(buf1); unmap_sysmem(buf2); @@ -848,7 +848,7 @@ static ulong mem_test_alt(vu_long *buf, ulong start_addr, ulong end_addr, } } addr[test_offset] = pattern; - WATCHDOG_RESET(); + schedule(); /* * Check for addr bits stuck low or shorted. @@ -890,7 +890,7 @@ static ulong mem_test_alt(vu_long *buf, ulong start_addr, ulong end_addr, * Fill memory with a known pattern. */ for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) { - WATCHDOG_RESET(); + schedule(); addr[offset] = pattern; } @@ -898,7 +898,7 @@ static ulong mem_test_alt(vu_long *buf, ulong start_addr, ulong end_addr, * Check each location and invert it for the second pass. */ for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) { - WATCHDOG_RESET(); + schedule(); temp = addr[offset]; if (temp != pattern) { printf("\nFAILURE (read/write) @ 0x%.8lx:" @@ -918,7 +918,7 @@ static ulong mem_test_alt(vu_long *buf, ulong start_addr, ulong end_addr, * Check each location for the inverted pattern and zero it. */ for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) { - WATCHDOG_RESET(); + schedule(); anti_pattern = ~pattern; temp = addr[offset]; if (temp != anti_pattern) { @@ -972,7 +972,7 @@ static ulong test_bitflip_comparison(volatile unsigned long *bufa, for (k = 0; k < max; k++) { q = 0x00000001L << k; for (j = 0; j < 8; j++) { - WATCHDOG_RESET(); + schedule(); q = ~q; p1 = (volatile unsigned long *)bufa; p2 = (volatile unsigned long *)bufb; @@ -1033,7 +1033,7 @@ static ulong mem_test_quick(vu_long *buf, ulong start_addr, ulong end_addr, pattern, ""); for (addr = buf, val = pattern; addr < end; addr++) { - WATCHDOG_RESET(); + schedule(); *addr = val; val += incr; } @@ -1041,7 +1041,7 @@ static ulong mem_test_quick(vu_long *buf, ulong start_addr, ulong end_addr, puts("Reading..."); for (addr = buf, val = pattern; addr < end; addr++) { - WATCHDOG_RESET(); + schedule(); readback = *addr; if (readback != val) { ulong offset = addr - buf; diff --git a/cmd/mmc.c b/cmd/mmc.c index 7bd4cd9e016..0f1f4e0a71d 100644 --- a/cmd/mmc.c +++ b/cmd/mmc.c @@ -331,13 +331,13 @@ static int do_mmcrpmb(struct cmd_tbl *cmdtp, int flag, #else original_part = mmc_get_blk_desc(mmc)->hwpart; #endif - if (blk_select_hwpart_devnum(IF_TYPE_MMC, curr_device, MMC_PART_RPMB) != + if (blk_select_hwpart_devnum(UCLASS_MMC, curr_device, MMC_PART_RPMB) != 0) return CMD_RET_FAILURE; ret = cp->cmd(cmdtp, flag, argc, argv); /* Return to original partition */ - if (blk_select_hwpart_devnum(IF_TYPE_MMC, curr_device, original_part) != + if (blk_select_hwpart_devnum(UCLASS_MMC, curr_device, original_part) != 0) return CMD_RET_FAILURE; return ret; @@ -530,7 +530,7 @@ static int do_mmc_part(struct cmd_tbl *cmdtp, int flag, if (!mmc) return CMD_RET_FAILURE; - mmc_dev = blk_get_devnum_by_type(IF_TYPE_MMC, curr_device); + mmc_dev = blk_get_devnum_by_type(UCLASS_MMC, curr_device); if (mmc_dev != NULL && mmc_dev->type != DEV_TYPE_UNKNOWN) { part_print(mmc_dev); return CMD_RET_SUCCESS; @@ -580,7 +580,7 @@ static int do_mmc_dev(struct cmd_tbl *cmdtp, int flag, if (!mmc) return CMD_RET_FAILURE; - ret = blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part); + ret = blk_select_hwpart_devnum(UCLASS_MMC, dev, part); printf("switch to partitions #%d, %s\n", part, (!ret) ? "OK" : "ERROR"); if (ret) diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c index 7e6e47f40d6..1efbe2e607c 100644 --- a/cmd/mvebu/bubt.c +++ b/cmd/mvebu/bubt.c @@ -425,7 +425,7 @@ static size_t usb_read_file(const char *file_name) } /* Try to recognize storage devices immediately */ - blk_first_device(IF_TYPE_USB, &dev); + blk_first_device(UCLASS_USB, &dev); if (!dev) { printf("Error: USB storage device not found\n"); return 0; diff --git a/cmd/nvme.c b/cmd/nvme.c index e715c570a38..09d5f438fb1 100644 --- a/cmd/nvme.c +++ b/cmd/nvme.c @@ -28,7 +28,7 @@ static int do_nvme(struct cmd_tbl *cmdtp, int flag, int argc, if (strncmp(argv[1], "deta", 4) == 0) { struct udevice *udev; - ret = blk_get_device(IF_TYPE_NVME, nvme_curr_dev, + ret = blk_get_device(UCLASS_NVME, nvme_curr_dev, &udev); if (ret < 0) return CMD_RET_FAILURE; @@ -39,7 +39,7 @@ static int do_nvme(struct cmd_tbl *cmdtp, int flag, int argc, } } - return blk_common_cmd(argc, argv, IF_TYPE_NVME, &nvme_curr_dev); + return blk_common_cmd(argc, argv, UCLASS_NVME, &nvme_curr_dev); } U_BOOT_CMD( diff --git a/cmd/pause.c b/cmd/pause.c new file mode 100644 index 00000000000..c97833c0d70 --- /dev/null +++ b/cmd/pause.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2021 + * Samuel Dionne-Riel <samuel@dionne-riel.com> + */ + +#include <command.h> +#include <stdio.h> + +static int do_pause(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + char *message = "Press any key to continue..."; + + if (argc == 2) + message = argv[1]; + + /* No newline, so it sticks to the bottom of the screen */ + printf("%s", message); + + /* Wait on "any" key... */ + (void) getchar(); + + /* Since there was no newline, we need it now */ + printf("\n"); + + return CMD_RET_SUCCESS; +} + +U_BOOT_CMD(pause, 2, 1, do_pause, + "delay until user input", + "[prompt] - Wait until users presses any key. [prompt] can be used to customize the message.\n" +); diff --git a/cmd/pvblock.c b/cmd/pvblock.c index 56ce8b18d51..1b604c37373 100644 --- a/cmd/pvblock.c +++ b/cmd/pvblock.c @@ -14,7 +14,7 @@ static int pvblock_curr_device; int do_pvblock(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { - return blk_common_cmd(argc, argv, IF_TYPE_PVBLOCK, + return blk_common_cmd(argc, argv, UCLASS_PVBLOCK, &pvblock_curr_device); } diff --git a/cmd/sata.c b/cmd/sata.c index 76da1906b7f..9c9fe111d12 100644 --- a/cmd/sata.c +++ b/cmd/sata.c @@ -27,7 +27,7 @@ int sata_remove(int devnum) struct udevice *dev; int rc; - blk_unbind_all(IF_TYPE_SATA); + blk_unbind_all(UCLASS_AHCI); rc = uclass_find_device(UCLASS_AHCI, devnum, &dev); if (!rc && !dev) @@ -111,7 +111,7 @@ static int do_sata(struct cmd_tbl *cmdtp, int flag, int argc, sata_curr_device = 0; } - return blk_common_cmd(argc, argv, IF_TYPE_SATA, &sata_curr_device); + return blk_common_cmd(argc, argv, UCLASS_AHCI, &sata_curr_device); } U_BOOT_CMD( diff --git a/cmd/scsi.c b/cmd/scsi.c index 5f710d28957..4549995ba73 100644 --- a/cmd/scsi.c +++ b/cmd/scsi.c @@ -50,7 +50,7 @@ static int do_scsi(struct cmd_tbl *cmdtp, int flag, int argc, } } - return blk_common_cmd(argc, argv, IF_TYPE_SCSI, &scsi_curr_dev); + return blk_common_cmd(argc, argv, UCLASS_SCSI, &scsi_curr_dev); } U_BOOT_CMD( diff --git a/cmd/usb.c b/cmd/usb.c index 3d873765250..2ba056982c3 100644 --- a/cmd/usb.c +++ b/cmd/usb.c @@ -719,7 +719,7 @@ static int do_usb(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) if (strncmp(argv[1], "stor", 4) == 0) return usb_stor_info(); - return blk_common_cmd(argc, argv, IF_TYPE_USB, &usb_stor_curr_dev); + return blk_common_cmd(argc, argv, UCLASS_USB, &usb_stor_curr_dev); #else return CMD_RET_USAGE; #endif /* CONFIG_USB_STORAGE */ diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c index d4e619b842c..b7daaa6e8e8 100644 --- a/cmd/usb_mass_storage.c +++ b/cmd/usb_mass_storage.c @@ -231,7 +231,7 @@ static int do_usb_mass_storage(struct cmd_tbl *cmdtp, int flag, goto cleanup_register; } - WATCHDOG_RESET(); + schedule(); } cleanup_register: diff --git a/cmd/virtio.c b/cmd/virtio.c index ea3ed2e631e..ec87d4f02c9 100644 --- a/cmd/virtio.c +++ b/cmd/virtio.c @@ -40,7 +40,7 @@ static int do_virtio(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_SUCCESS; } - return blk_common_cmd(argc, argv, IF_TYPE_VIRTIO, &virtio_curr_dev); + return blk_common_cmd(argc, argv, UCLASS_VIRTIO, &virtio_curr_dev); } U_BOOT_CMD( diff --git a/cmd/ximg.c b/cmd/ximg.c index f84141ff45c..63b200430c3 100644 --- a/cmd/ximg.c +++ b/cmd/ximg.c @@ -197,7 +197,7 @@ do_imgextract(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) while (l > 0) { tail = (l > CHUNKSZ) ? CHUNKSZ : l; - WATCHDOG_RESET(); + schedule(); memmove(to, from, tail); to += tail; from += tail; diff --git a/common/Kconfig b/common/Kconfig index ebee856e567..b776c5ca1ec 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -545,6 +545,26 @@ config DISPLAY_BOARDINFO_LATE menu "Start-up hooks" +config CYCLIC + bool "General-purpose cyclic execution mechanism" + help + This enables a general-purpose cyclic execution infrastructure, + to allow "small" (run-time wise) functions to be executed at + a specified frequency. Things like LED blinking or watchdog + triggering are examples for such tasks. + +if CYCLIC + +config CYCLIC_MAX_CPU_TIME_US + int "Sets the max allowed time for a cyclic function in us" + default 1000 + help + The max allowed time for a cyclic function in us. If a functions + takes longer than this duration this function will get unregistered + automatically. + +endif # CYCLIC + config EVENT bool "General-purpose event-handling mechanism" default y if SANDBOX @@ -671,6 +691,27 @@ config ID_EEPROM A number of different systems and vendors enable a vendor-specified EEPROM that contains various identifying features. +config SYS_EEPROM_BUS_NUM + int "I2C bus number of the system identifier EEPROM" + depends on ID_EEPROM + default 0 + +choice + prompt "EEPROM starts with 'CCID' or 'NXID'" + depends on ID_EEPROM && (PPC || ARCH_LS1021A || FSL_LAYERSCAPE) + default SYS_I2C_EEPROM_NXID + help + Specify if the Freescale / NXP ID EEPROM starts with 'CCID' or 'NXID' + ASCII literal string. + +config SYS_I2C_EEPROM_CCID + bool "EEPROM starts with 'CCID'" + +config SYS_I2C_EEPROM_NXID + bool "EEPROM starts with 'NXID'" + +endchoice + config PCI_INIT_R bool "Enumerate PCI buses during init" depends on PCI diff --git a/common/Makefile b/common/Makefile index 2ed8672c3ac..1d56c9f2895 100644 --- a/common/Makefile +++ b/common/Makefile @@ -84,6 +84,7 @@ obj-y += malloc_simple.o endif endif +obj-$(CONFIG_CYCLIC) += cyclic.o obj-$(CONFIG_$(SPL_TPL_)EVENT) += event.o obj-$(CONFIG_$(SPL_TPL_)HASH) += hash.o diff --git a/common/board_f.c b/common/board_f.c index 18e2246733b..f92d7b9faf4 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -16,6 +16,7 @@ #include <console.h> #include <cpu.h> #include <cpu_func.h> +#include <cyclic.h> #include <display_options.h> #include <dm.h> #include <env.h> @@ -113,14 +114,14 @@ static int init_func_watchdog_init(void) hw_watchdog_init(); puts(" Watchdog enabled\n"); # endif - WATCHDOG_RESET(); + schedule(); return 0; } int init_func_watchdog_reset(void) { - WATCHDOG_RESET(); + schedule(); return 0; } @@ -828,6 +829,7 @@ static const init_fnc_t init_sequence_f[] = { initf_malloc, log_init, initf_bootstage, /* uses its own timer, so does not need DM */ + cyclic_init, event_init, #ifdef CONFIG_BLOBLIST bloblist_init, diff --git a/common/board_r.c b/common/board_r.c index 56eb60fa275..50670b5615a 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -13,6 +13,7 @@ #include <api.h> #include <bootstage.h> #include <cpu_func.h> +#include <cyclic.h> #include <display_options.h> #include <exports.h> #ifdef CONFIG_MTD_NOR_FLASH @@ -340,7 +341,7 @@ static int initr_flash(void) /* * Compute and print flash CRC if flashchecksum is set to 'y' * - * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX + * NOTE: Maybe we should add some schedule()? XXX */ if (env_get_yesno("flashchecksum") == 1) { const uchar *flash_base = (const uchar *)CONFIG_SYS_FLASH_BASE; @@ -611,6 +612,7 @@ static init_fnc_t init_sequence_r[] = { #endif initr_barrier, initr_malloc, + cyclic_init, log_init, initr_bootstage, /* Needs malloc() but has its own timer */ #if defined(CONFIG_CONSOLE_RECORD) diff --git a/common/cli_readline.c b/common/cli_readline.c index e86ee73faf7..f6e2bcdeceb 100644 --- a/common/cli_readline.c +++ b/common/cli_readline.c @@ -72,8 +72,13 @@ static char *delete_char (char *buffer, char *p, int *colp, int *np, int plen) #define getcmd_getch() getchar() #define getcmd_cbeep() getcmd_putch('\a') +#ifdef CONFIG_SPL_BUILD +#define HIST_MAX 3 +#define HIST_SIZE 32 +#else #define HIST_MAX 20 #define HIST_SIZE CONFIG_SYS_CBSIZE +#endif static int hist_max; static int hist_add_idx; @@ -269,7 +274,7 @@ static int cread_line(const char *const prompt, char *buf, unsigned int *len, while (!tstc()) { /* while no incoming data */ if (get_ticks() >= etime) return -2; /* timed out */ - WATCHDOG_RESET(); + schedule(); } first = 0; } @@ -590,7 +595,7 @@ int cli_readline_into_buffer(const char *const prompt, char *buffer, for (;;) { if (bootretry_tstc_timeout()) return -2; /* timed out */ - WATCHDOG_RESET(); /* Trigger watchdog, if needed */ + schedule(); /* Trigger watchdog, if needed */ c = getchar(); diff --git a/common/console.c b/common/console.c index e783f309bf0..e5be6ff44b0 100644 --- a/common/console.c +++ b/common/console.c @@ -480,7 +480,7 @@ int fgetc(int file) * Effectively poll for input wherever it may be available. */ for (;;) { - WATCHDOG_RESET(); + schedule(); if (CONFIG_IS_ENABLED(CONSOLE_MUX)) { /* * Upper layer may have already called tstc() so diff --git a/common/cyclic.c b/common/cyclic.c new file mode 100644 index 00000000000..b3c180bd1a6 --- /dev/null +++ b/common/cyclic.c @@ -0,0 +1,139 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * A general-purpose cyclic execution infrastructure, to allow "small" + * (run-time wise) functions to be executed at a specified frequency. + * Things like LED blinking or watchdog triggering are examples for such + * tasks. + * + * Copyright (C) 2022 Stefan Roese <sr@denx.de> + */ + +#include <cyclic.h> +#include <log.h> +#include <malloc.h> +#include <time.h> +#include <linux/errno.h> +#include <linux/list.h> +#include <asm/global_data.h> + +DECLARE_GLOBAL_DATA_PTR; + +void hw_watchdog_reset(void); + +struct list_head *cyclic_get_list(void) +{ + return &gd->cyclic->cyclic_list; +} + +struct cyclic_info *cyclic_register(cyclic_func_t func, uint64_t delay_us, + const char *name, void *ctx) +{ + struct cyclic_info *cyclic; + + if (!gd->cyclic->cyclic_ready) { + pr_debug("Cyclic IF not ready yet\n"); + return NULL; + } + + cyclic = calloc(1, sizeof(struct cyclic_info)); + if (!cyclic) { + pr_debug("Memory allocation error\n"); + return NULL; + } + + /* Store values in struct */ + cyclic->func = func; + cyclic->ctx = ctx; + cyclic->name = strdup(name); + cyclic->delay_us = delay_us; + cyclic->start_time_us = timer_get_us(); + list_add_tail(&cyclic->list, &gd->cyclic->cyclic_list); + + return cyclic; +} + +int cyclic_unregister(struct cyclic_info *cyclic) +{ + list_del(&cyclic->list); + free(cyclic); + + return 0; +} + +void cyclic_run(void) +{ + struct cyclic_info *cyclic, *tmp; + uint64_t now, cpu_time; + + /* Prevent recursion */ + if (gd->cyclic->cyclic_running) + return; + + gd->cyclic->cyclic_running = true; + list_for_each_entry_safe(cyclic, tmp, &gd->cyclic->cyclic_list, list) { + /* + * Check if this cyclic function needs to get called, e.g. + * do not call the cyclic func too often + */ + now = timer_get_us(); + if (time_after_eq64(now, cyclic->next_call)) { + /* Call cyclic function and account it's cpu-time */ + cyclic->next_call = now + cyclic->delay_us; + cyclic->func(cyclic->ctx); + cyclic->run_cnt++; + cpu_time = timer_get_us() - now; + cyclic->cpu_time_us += cpu_time; + + /* Check if cpu-time exceeds max allowed time */ + if (cpu_time > CONFIG_CYCLIC_MAX_CPU_TIME_US) { + pr_err("cyclic function %s took too long: %lldus vs %dus max, disabling\n", + cyclic->name, cpu_time, + CONFIG_CYCLIC_MAX_CPU_TIME_US); + + /* Unregister this cyclic function */ + cyclic_unregister(cyclic); + } + } + } + gd->cyclic->cyclic_running = false; +} + +void schedule(void) +{ + /* The HW watchdog is not integrated into the cyclic IF (yet) */ + if (IS_ENABLED(CONFIG_HW_WATCHDOG)) + hw_watchdog_reset(); + + /* + * schedule() might get called very early before the cyclic IF is + * ready. Make sure to only call cyclic_run() when it's initalized. + */ + if (gd && gd->cyclic && gd->cyclic->cyclic_ready) + cyclic_run(); +} + +int cyclic_uninit(void) +{ + struct cyclic_info *cyclic, *tmp; + + list_for_each_entry_safe(cyclic, tmp, &gd->cyclic->cyclic_list, list) + cyclic_unregister(cyclic); + gd->cyclic->cyclic_ready = false; + + return 0; +} + +int cyclic_init(void) +{ + int size = sizeof(struct cyclic_drv); + + gd->cyclic = (struct cyclic_drv *)malloc(size); + if (!gd->cyclic) + return -ENOMEM; + + memset(gd->cyclic, '\0', size); + INIT_LIST_HEAD(&gd->cyclic->cyclic_list); + gd->cyclic->cyclic_ready = true; + + return 0; +} diff --git a/common/dfu.c b/common/dfu.c index 16bd1ba588a..96190889ab7 100644 --- a/common/dfu.c +++ b/common/dfu.c @@ -101,7 +101,7 @@ int run_usb_dnl_gadget(int usbctrl_index, char *usb_dnl_gadget) if (dfu_reinit_needed) goto exit; - WATCHDOG_RESET(); + schedule(); usb_gadget_handle_interrupts(usbctrl_index); } exit: diff --git a/common/lcd.c b/common/lcd.c index 0898bc025d6..a462b22a477 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -294,9 +294,9 @@ void lcd_logo_plot(int x, int y) BMP_LOGO_WIDTH, BMP_LOGO_HEIGHT, BMP_LOGO_COLORS); if (bpix < 12) { - WATCHDOG_RESET(); + schedule(); lcd_logo_set_cmap(); - WATCHDOG_RESET(); + schedule(); for (i = 0; i < BMP_LOGO_HEIGHT; ++i) { memcpy(fb, bmap, BMP_LOGO_WIDTH); @@ -320,7 +320,7 @@ void lcd_logo_plot(int x, int y) } } - WATCHDOG_RESET(); + schedule(); lcd_sync(); } #else @@ -459,7 +459,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) byte_width = width * 2; for (i = 0; i < height; ++i) { - WATCHDOG_RESET(); + schedule(); for (j = 0; j < width; j++) { if (bpix != 16) { fb_put_byte(&fb, &bmap); @@ -488,7 +488,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) #if defined(CONFIG_BMP_16BPP) case 16: for (i = 0; i < height; ++i) { - WATCHDOG_RESET(); + schedule(); for (j = 0; j < width; j++) fb_put_word(&fb, &bmap); diff --git a/common/menu.c b/common/menu.c index 3e876b55b34..8fe00965c0c 100644 --- a/common/menu.c +++ b/common/menu.c @@ -435,7 +435,7 @@ void bootmenu_autoboot_loop(struct bootmenu_data *menu, printf("Hit any key to stop autoboot: %d ", menu->delay); for (i = 0; i < 100; ++i) { if (!tstc()) { - WATCHDOG_RESET(); + schedule(); mdelay(10); continue; } @@ -483,7 +483,7 @@ void bootmenu_loop(struct bootmenu_data *menu, if (tstc()) { c = getchar(); } else { - WATCHDOG_RESET(); + schedule(); mdelay(10); if (tstc()) c = getchar(); @@ -492,7 +492,7 @@ void bootmenu_loop(struct bootmenu_data *menu, } } else { while (!tstc()) { - WATCHDOG_RESET(); + schedule(); mdelay(10); } c = getchar(); @@ -548,4 +548,13 @@ void bootmenu_loop(struct bootmenu_data *menu, /* ^C was pressed */ if (c == 0x3) *key = KEY_QUIT; + + if (c == '+') + *key = KEY_PLUS; + + if (c == '-') + *key = KEY_MINUS; + + if (c == ' ') + *key = KEY_SPACE; } diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 70d97815f0a..e1b2a421cd2 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -792,7 +792,6 @@ config SPL_DM_MAILBOX config SPL_MMC bool "Support MMC" depends on MMC - select HAVE_BLOCK_DEVICE help Enable support for MMC (Multimedia Card) within SPL. This enables the MMC protocol implementation and allows any enabled drivers to @@ -1318,7 +1317,6 @@ config SPL_THERMAL config SPL_USB_HOST bool "Support USB host drivers" - select HAVE_BLOCK_DEVICE help Enable access to USB (Universal Serial Bus) host devices so that SPL can load U-Boot from a connected USB peripheral, such as a USB diff --git a/common/spl/spl.c b/common/spl/spl.c index 29e0898f03d..828f72f30b1 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -116,6 +116,11 @@ int __weak bootz_setup(ulong image, ulong *start, ulong *end) { return 1; } + +int __weak booti_setup(ulong image, ulong *relocated_addr, ulong *size, bool force_reloc) +{ + return 1; +} #endif /* Weak default function for arch/board-specific fixups to the spl_image_info */ @@ -391,6 +396,21 @@ int spl_parse_image_header(struct spl_image_info *spl_image, #endif #if CONFIG_IS_ENABLED(OS_BOOT) +#if defined(CMD_BOOTI) + ulong start, size; + + if (!booti_setup((ulong)header, &start, &size, 0)) { + spl_image->name = "Linux"; + spl_image->os = IH_OS_LINUX; + spl_image->load_addr = start; + spl_image->entry_point = start; + spl_image->size = size; + debug(SPL_TPL_PROMPT + "payload Image, load addr: 0x%lx size: %d\n", + spl_image->load_addr, spl_image->size); + return 0; + } +#elif defined(CMD_BOOTZ) ulong start, end; if (!bootz_setup((ulong)header, &start, &end)) { @@ -405,6 +425,7 @@ int spl_parse_image_header(struct spl_image_info *spl_image, return 0; } #endif +#endif if (!spl_parse_board_header(spl_image, bootdev, (const void *)header, sizeof(*header))) return 0; diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index a35be529656..c1ed31e367c 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -10,7 +10,7 @@ #include <gzip.h> #include <image.h> #include <log.h> -#include <malloc.h> +#include <memalign.h> #include <mapmem.h> #include <spl.h> #include <sysinfo.h> @@ -429,7 +429,9 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image, * depending on how the overlay is stored, so * don't fail yet if the allocation failed. */ - tmpbuffer = malloc(CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY_BUF_SZ); + size_t size = CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY_BUF_SZ; + + tmpbuffer = malloc_cache_aligned(size); if (!tmpbuffer) debug("%s: unable to allocate space for overlays\n", __func__); @@ -537,7 +539,7 @@ static void *spl_get_fit_load_buffer(size_t size) { void *buf; - buf = malloc(size); + buf = malloc_cache_aligned(size); if (!buf) { pr_err("Could not get FIT buffer of %lu bytes\n", (ulong)size); pr_err("\tcheck CONFIG_SYS_SPL_MALLOC_SIZE\n"); diff --git a/common/spl/spl_sata.c b/common/spl/spl_sata.c index 1351d78612a..ea9f1756c0a 100644 --- a/common/spl/spl_sata.c +++ b/common/spl/spl_sata.c @@ -71,7 +71,7 @@ static int spl_sata_load_image(struct spl_image_info *spl_image, /* try to recognize storage devices immediately */ scsi_scan(false); - stor_dev = blk_get_devnum_by_type(IF_TYPE_SCSI, 0); + stor_dev = blk_get_devnum_by_type(UCLASS_SCSI, 0); if (!stor_dev) return -ENODEV; diff --git a/common/spl/spl_usb.c b/common/spl/spl_usb.c index ccf01c8276b..63c00f872b6 100644 --- a/common/spl/spl_usb.c +++ b/common/spl/spl_usb.c @@ -41,7 +41,7 @@ int spl_usb_load(struct spl_image_info *spl_image, /* try to recognize storage devices immediately */ usb_stor_curr_dev = usb_stor_scan(1); - stor_dev = blk_get_devnum_by_type(IF_TYPE_USB, usb_stor_curr_dev); + stor_dev = blk_get_devnum_by_type(UCLASS_USB, usb_stor_curr_dev); if (!stor_dev) return -ENODEV; diff --git a/common/usb_kbd.c b/common/usb_kbd.c index d385bea532e..4cbc9acb738 100644 --- a/common/usb_kbd.c +++ b/common/usb_kbd.c @@ -446,7 +446,7 @@ static int usb_kbd_getc(struct stdio_dev *sdev) data = usb_kbd_dev->privptr; while (data->usb_in_pointer == data->usb_out_pointer) { - WATCHDOG_RESET(); + schedule(); usb_kbd_poll_for_event(usb_kbd_dev); } diff --git a/common/usb_storage.c b/common/usb_storage.c index eaa31374ef7..7d420160cd5 100644 --- a/common/usb_storage.c +++ b/common/usb_storage.c @@ -144,7 +144,7 @@ int usb_stor_info(void) #if CONFIG_IS_ENABLED(BLK) struct udevice *dev; - for (blk_first_device(IF_TYPE_USB, &dev); + for (blk_first_device(UCLASS_USB, &dev); dev; blk_next_device(&dev)) { struct blk_desc *desc = dev_get_uclass_plat(dev); @@ -219,7 +219,7 @@ static int usb_stor_probe_device(struct usb_device *udev) snprintf(str, sizeof(str), "lun%d", lun); ret = blk_create_devicef(udev->dev, "usb_storage_blk", str, - IF_TYPE_USB, usb_max_devs, 512, 0, + UCLASS_USB, usb_max_devs, 512, 0, &dev); if (ret) { debug("Cannot bind driver\n"); @@ -279,7 +279,7 @@ static int usb_stor_probe_device(struct usb_device *udev) blkdev = &usb_dev_desc[usb_max_devs]; memset(blkdev, '\0', sizeof(struct blk_desc)); - blkdev->if_type = IF_TYPE_USB; + blkdev->if_type = UCLASS_USB; blkdev->devnum = usb_max_devs; blkdev->part_type = PART_TYPE_UNKNOWN; blkdev->target = 0xff; @@ -1578,7 +1578,7 @@ U_BOOT_DRIVER(usb_storage_blk) = { #else U_BOOT_LEGACY_BLK(usb) = { .if_typename = "usb", - .if_type = IF_TYPE_USB, + .if_type = UCLASS_USB, .max_devs = USB_MAX_STOR_DEV, .desc = usb_dev_desc, }; diff --git a/common/xyzModem.c b/common/xyzModem.c index ece25acb183..fb319f71190 100644 --- a/common/xyzModem.c +++ b/common/xyzModem.c @@ -26,6 +26,7 @@ #include <stdarg.h> #include <u-boot/crc.h> #include <watchdog.h> +#include <env.h> /* Assumption - run xyzModem protocol over the console port */ @@ -50,6 +51,8 @@ static struct int len, mode, total_retries; int total_SOH, total_STX, total_CAN; bool crc_mode, at_eof, tx_ack; + bool first_xmodem_packet; + ulong initial_time, timeout; unsigned long file_length, read_length; } xyz; @@ -65,7 +68,7 @@ CYGACC_COMM_IF_GETC_TIMEOUT (char chan, char *c) { ulong now = get_timer(0); - WATCHDOG_RESET(); + schedule(); while (!tstc ()) { if (get_timer(now) > xyzModem_CHAR_TIMEOUT) @@ -409,6 +412,19 @@ xyzModem_get_hdr (void) return 0; } +static +ulong +xyzModem_get_initial_timeout (void) +{ + /* timeout is in seconds, non-positive timeout value is infinity */ +#if CONFIG_IS_ENABLED(ENV_SUPPORT) + const char *timeout_str = env_get("loadxy_timeout"); + if (timeout_str) + return 1000 * simple_strtol(timeout_str, NULL, 10); +#endif + return 1000 * CONFIG_CMD_LOADXY_TIMEOUT; +} + int xyzModem_stream_open (connection_info_t * info, int *err) { @@ -439,18 +455,28 @@ xyzModem_stream_open (connection_info_t * info, int *err) xyz.total_CAN = 0; xyz.read_length = 0; xyz.file_length = 0; + xyz.first_xmodem_packet = false; + xyz.initial_time = get_timer(0); + xyz.timeout = xyzModem_get_initial_timeout(); CYGACC_COMM_IF_PUTC (*xyz.__chan, (xyz.crc_mode ? 'C' : NAK)); if (xyz.mode == xyzModem_xmodem) { /* X-modem doesn't have an information header - exit here */ + xyz.first_xmodem_packet = true; xyz.next_blk = 1; return 0; } - while (retries-- > 0) + while (!(xyz.timeout && get_timer(xyz.initial_time) > xyz.timeout)) { + if (--retries <= 0) + { + retries = xyzModem_MAX_RETRIES; + crc_retries = xyzModem_MAX_RETRIES_WITH_CRC; + xyz.crc_mode = true; + } stat = xyzModem_get_hdr (); if (stat == 0) { @@ -503,9 +529,19 @@ xyzModem_stream_read (char *buf, int size, int *err) retries = xyzModem_MAX_RETRIES; while (retries-- > 0) { + if (xyz.first_xmodem_packet && xyz.timeout && + get_timer(xyz.initial_time) > xyz.timeout) + { + *err = xyzModem_timeout; + xyz.len = -1; + return total; + } + stat = xyzModem_get_hdr (); if (stat == 0) { + if (xyz.mode == xyzModem_xmodem && xyz.first_xmodem_packet) + xyz.first_xmodem_packet = false; if (xyz.blk == xyz.next_blk) { xyz.tx_ack = true; @@ -583,7 +619,7 @@ xyzModem_stream_read (char *buf, int size, int *err) xyz.total_retries++; ZM_DEBUG (zm_dprintf ("NAK (%d)\n", __LINE__)); } - if (stat < 0) + if (stat < 0 && (!xyz.first_xmodem_packet || stat != xyzModem_timeout)) { *err = stat; xyz.len = -1; diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig index 79382eb0fe4..a73aca082c3 100644 --- a/configs/M5253DEMO_defconfig +++ b/configs/M5253DEMO_defconfig @@ -25,6 +25,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_MAC_PARTITION=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +# CONFIG_BLOCK_CACHE is not set CONFIG_SYS_IDE_MAXBUS=1 CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0xA0 diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index def5d6fdf44..feb0be5a494 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" # CONFIG_MISC_INIT_R is not set CONFIG_ID_EEPROM=y +CONFIG_SYS_I2C_EEPROM_CCID=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index 881fca912b9..945347941b4 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -20,6 +20,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" # CONFIG_MISC_INIT_R is not set CONFIG_ID_EEPROM=y +CONFIG_SYS_I2C_EEPROM_CCID=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index 99a63300af9..f069451697d 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -21,6 +21,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" # CONFIG_MISC_INIT_R is not set CONFIG_ID_EEPROM=y +CONFIG_SYS_I2C_EEPROM_CCID=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index dc262c95a3b..dd5efbca86d 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -79,8 +79,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM=y -CONFIG_BLK=y -CONFIG_HAVE_BLOCK_DEVICE=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/bcm963158_ram_defconfig b/configs/bcm963158_ram_defconfig index 424eca7946b..c0fda57ff78 100644 --- a/configs/bcm963158_ram_defconfig +++ b/configs/bcm963158_ram_defconfig @@ -38,7 +38,6 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -CONFIG_BLK=y CONFIG_CLK=y CONFIG_BCM6345_GPIO=y CONFIG_LED=y @@ -64,4 +63,3 @@ CONFIG_BCM63XX_HSSPI=y CONFIG_SYSRESET=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_WDT_BCM6345=y -# CONFIG_GENERATE_SMBIOS_TABLE is not set diff --git a/configs/bcm968360bg_ram_defconfig b/configs/bcm968360bg_ram_defconfig index 7f9093c6f6d..a83d4efd55b 100644 --- a/configs/bcm968360bg_ram_defconfig +++ b/configs/bcm968360bg_ram_defconfig @@ -34,7 +34,6 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -CONFIG_BLK=y CONFIG_CLK=y CONFIG_BCM6345_GPIO=y CONFIG_LED=y diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig index a0924689e4d..284fa2fdef9 100644 --- a/configs/bcm968380gerg_ram_defconfig +++ b/configs/bcm968380gerg_ram_defconfig @@ -42,7 +42,6 @@ CONFIG_CMD_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set # CONFIG_DM_DEVICE_REMOVE is not set -CONFIG_HAVE_BLOCK_DEVICE=y CONFIG_BCM6345_GPIO=y CONFIG_LED=y CONFIG_LED_BCM6328=y diff --git a/configs/bcm968580xref_ram_defconfig b/configs/bcm968580xref_ram_defconfig index a8c7ffa7487..4320739809c 100644 --- a/configs/bcm968580xref_ram_defconfig +++ b/configs/bcm968580xref_ram_defconfig @@ -34,7 +34,6 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -CONFIG_BLK=y CONFIG_CLK=y CONFIG_BCM6345_GPIO=y CONFIG_LED=y @@ -61,4 +60,3 @@ CONFIG_BCM63XX_HSSPI=y CONFIG_SYSRESET=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_WDT_BCM6345=y -# CONFIG_GENERATE_SMBIOS_TABLE is not set diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index b1ed2bcd68e..a45604de169 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x50000 CONFIG_SYS_LOAD_ADDR=0x80000000 +CONFIG_LOCALVERSION="-2.0.0" +# CONFIG_LOCALVERSION_AUTO is not set CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 # CONFIG_EXPERT is not set @@ -26,7 +28,7 @@ CONFIG_BOOTDELAY=0 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run b_default" CONFIG_USE_PREBOOT=y -CONFIG_PREBOOT="run cfgscr; run brdefaultip" +CONFIG_PREBOOT="mw ${cfgaddr} 0; mw ${dtbaddr} 0; run cfgscr; run brdefaultip" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -90,7 +92,7 @@ CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y -# CONFIG_OF_TRANSLATE is not set +CONFIG_SPL_OF_TRANSLATE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig deleted file mode 100644 index c5981bad49d..00000000000 --- a/configs/brppt1_nand_defconfig +++ /dev/null @@ -1,122 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_SYS_MALLOC_LEN=0x500000 -CONFIG_SPL_GPIO=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=1 -CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_OFFSET=0x60000 -CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-nand" -CONFIG_AM33XX=y -CONFIG_TARGET_BRPPT1=y -CONFIG_SPL_SERIAL=y -CONFIG_SPL=y -CONFIG_SYS_LOAD_ADDR=0x80000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 -# CONFIG_EXPERT is not set -# CONFIG_FIT is not set -CONFIG_OF_BOARD_SETUP=y -CONFIG_BOOTDELAY=0 -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="run b_default" -CONFIG_USE_PREBOOT=y -CONFIG_PREBOOT="run cfgscr; run brdefaultip" -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -CONFIG_SYS_CONSOLE_INFO_QUIET=y -# CONFIG_DISPLAY_CPUINFO is not set -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_ARCH_MISC_INIT=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SYS_SPL_MALLOC=y -CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 -# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set -CONFIG_SPL_I2C=y -CONFIG_SPL_NAND_DRIVERS=y -CONFIG_SPL_NAND_ECC=y -CONFIG_SPL_NAND_BASE=y -CONFIG_SPL_POWER=y -CONFIG_SPL_WATCHDOG=y -CONFIG_SPL_YMODEM_SUPPORT=y -CONFIG_HUSH_PARSER=y -CONFIG_SYS_MAXARGS=64 -CONFIG_SYS_CBSIZE=512 -CONFIG_SYS_PBSIZE=532 -CONFIG_CMD_BOOTZ=y -CONFIG_SYS_BOOTM_LEN=0x2000000 -# CONFIG_CMD_IMI is not set -# CONFIG_CMD_XIMG is not set -# CONFIG_CMD_EDITENV is not set -# CONFIG_CMD_CRC32 is not set -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_NAND=y -CONFIG_CMD_PART=y -CONFIG_CMD_USB=y -# CONFIG_CMD_ITEST is not set -CONFIG_CMD_DHCP=y -CONFIG_BOOTP_MAY_FAIL=y -# CONFIG_CMD_NFS is not set -CONFIG_SYS_DISABLE_AUTOLOAD=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_BOOTCOUNT=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_TIME=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0" -CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(MLO),128k(cfgscr),128k(dtb),128k(u-boot-env),512k(u-boot),4m(kernel),128m(rootfs),-(user)" -# CONFIG_SPL_DOS_PARTITION is not set -CONFIG_OF_CONTROL=y -CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupt-controller interrupt-cells dma-names dmas " -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_NAND=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_VERSION_VARIABLE=y -CONFIG_NET_RETRY_COUNT=10 -CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_NETCONSOLE=y -CONFIG_DM=y -CONFIG_SPL_DM=y -CONFIG_SPL_DM_SEQ_ALIAS=y -# CONFIG_OF_TRANSLATE is not set -CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_DM_I2C=y -CONFIG_I2C_SET_DEFAULT_BUS_NUM=y -CONFIG_MISC=y -# CONFIG_MMC is not set -CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y -CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 -CONFIG_SYS_NAND_PAGE_COUNT=0x40 -CONFIG_SYS_NAND_PAGE_SIZE=0x800 -CONFIG_SYS_NAND_OOBSIZE=0x40 -CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y -CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 -CONFIG_PHY_NATSEMI=y -CONFIG_DRIVER_TI_CPSW=y -CONFIG_DM_PMIC=y -# CONFIG_SPL_DM_PMIC is not set -CONFIG_PMIC_TPS65217=y -CONFIG_DM_SERIAL=y -CONFIG_USB=y -CONFIG_USB_MUSB_HOST=y -CONFIG_USB_MUSB_GADGET=y -CONFIG_USB_MUSB_TI=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_FAT_WRITE=y -CONFIG_LZO=y -# CONFIG_OF_LIBFDT_OVERLAY is not set -# CONFIG_EFI_LOADER is not set diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig deleted file mode 100644 index fa6b840d9e1..00000000000 --- a/configs/brppt1_spi_defconfig +++ /dev/null @@ -1,130 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_SYS_MALLOC_LEN=0x500000 -CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_SPL_GPIO=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=1 -CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_OFFSET=0x20000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_DM_GPIO=y -CONFIG_SPL_DM_SPI=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-spi" -CONFIG_AM33XX=y -CONFIG_TARGET_BRPPT1=y -CONFIG_SPL_SERIAL=y -CONFIG_SPL=y -CONFIG_ENV_OFFSET_REDUND=0x30000 -CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI=y -CONFIG_SYS_LOAD_ADDR=0x80000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 -# CONFIG_EXPERT is not set -# CONFIG_FIT is not set -CONFIG_OF_BOARD_SETUP=y -CONFIG_SPI_BOOT=y -CONFIG_BOOTDELAY=0 -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="run b_default" -CONFIG_USE_PREBOOT=y -CONFIG_PREBOOT="run cfgscr; run brdefaultip" -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -CONFIG_SYS_CONSOLE_INFO_QUIET=y -# CONFIG_DISPLAY_CPUINFO is not set -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_ARCH_MISC_INIT=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SYS_SPL_MALLOC=y -CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 -# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set -CONFIG_SPL_I2C=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_DM_SPI_FLASH=y -CONFIG_SPL_POWER=y -CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 -CONFIG_SPL_WATCHDOG=y -CONFIG_SPL_YMODEM_SUPPORT=y -CONFIG_HUSH_PARSER=y -CONFIG_SYS_MAXARGS=64 -CONFIG_SYS_CBSIZE=512 -CONFIG_SYS_PBSIZE=532 -CONFIG_CMD_BOOTZ=y -CONFIG_SYS_BOOTM_LEN=0x2000000 -# CONFIG_CMD_IMI is not set -# CONFIG_CMD_XIMG is not set -# CONFIG_CMD_EDITENV is not set -# CONFIG_CMD_CRC32 is not set -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_MMC=y -CONFIG_CMD_BKOPS_ENABLE=y -CONFIG_CMD_PART=y -CONFIG_CMD_USB=y -# CONFIG_CMD_ITEST is not set -CONFIG_CMD_DHCP=y -CONFIG_BOOTP_MAY_FAIL=y -# CONFIG_CMD_NFS is not set -CONFIG_SYS_DISABLE_AUTOLOAD=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_BOOTCOUNT=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_TIME=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -# CONFIG_SPL_DOS_PARTITION is not set -CONFIG_OF_CONTROL=y -CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupt-controller interrupt-cells dma-names dmas " -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_VERSION_VARIABLE=y -CONFIG_NET_RETRY_COUNT=10 -CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_NETCONSOLE=y -CONFIG_DM=y -CONFIG_SPL_DM=y -CONFIG_SPL_DM_SEQ_ALIAS=y -# CONFIG_OF_TRANSLATE is not set -CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_DM_I2C=y -CONFIG_I2C_SET_DEFAULT_BUS_NUM=y -CONFIG_MISC=y -CONFIG_MMC_OMAP_HS=y -CONFIG_MTD=y -CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_SPEED=24000000 -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y -# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_PHY_NATSEMI=y -CONFIG_DRIVER_TI_CPSW=y -CONFIG_DM_PMIC=y -# CONFIG_SPL_DM_PMIC is not set -CONFIG_PMIC_TPS65217=y -CONFIG_DM_SERIAL=y -CONFIG_SPI=y -CONFIG_DM_SPI=y -CONFIG_OMAP3_SPI=y -CONFIG_USB=y -CONFIG_USB_MUSB_HOST=y -CONFIG_USB_MUSB_GADGET=y -CONFIG_USB_MUSB_TI=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_FAT_WRITE=y -CONFIG_LZO=y -# CONFIG_OF_LIBFDT_OVERLAY is not set -# CONFIG_EFI_LOADER is not set diff --git a/configs/crs305-1g-4s-bit_defconfig b/configs/crs305-1g-4s-bit_defconfig index 1b46ab4bf97..463f474a8fb 100644 --- a/configs/crs305-1g-4s-bit_defconfig +++ b/configs/crs305-1g-4s-bit_defconfig @@ -37,7 +37,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 -CONFIG_BLK=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y # CONFIG_MMC is not set @@ -51,4 +50,3 @@ CONFIG_PCI=y CONFIG_PCI_MVEBU=y CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y -# CONFIG_EFI_LOADER is not set diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig index a7a3ffe4812..84d23a24cc8 100644 --- a/configs/crs305-1g-4s_defconfig +++ b/configs/crs305-1g-4s_defconfig @@ -38,7 +38,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 -CONFIG_BLK=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y # CONFIG_MMC is not set @@ -52,4 +51,3 @@ CONFIG_PCI=y CONFIG_PCI_MVEBU=y CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y -# CONFIG_EFI_LOADER is not set diff --git a/configs/crs326-24g-2s-bit_defconfig b/configs/crs326-24g-2s-bit_defconfig index 70f71de6ae0..1eb70e5a321 100644 --- a/configs/crs326-24g-2s-bit_defconfig +++ b/configs/crs326-24g-2s-bit_defconfig @@ -37,7 +37,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 -CONFIG_BLK=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y # CONFIG_MMC is not set @@ -51,4 +50,3 @@ CONFIG_PCI=y CONFIG_PCI_MVEBU=y CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y -# CONFIG_EFI_LOADER is not set diff --git a/configs/crs326-24g-2s_defconfig b/configs/crs326-24g-2s_defconfig index 5991b62923a..44cb0b0663b 100644 --- a/configs/crs326-24g-2s_defconfig +++ b/configs/crs326-24g-2s_defconfig @@ -37,7 +37,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 -CONFIG_BLK=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y # CONFIG_MMC is not set @@ -51,4 +50,3 @@ CONFIG_PCI=y CONFIG_PCI_MVEBU=y CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y -# CONFIG_EFI_LOADER is not set diff --git a/configs/crs328-4c-20s-4s-bit_defconfig b/configs/crs328-4c-20s-4s-bit_defconfig index 434e9fb90f3..95008cf1cb1 100644 --- a/configs/crs328-4c-20s-4s-bit_defconfig +++ b/configs/crs328-4c-20s-4s-bit_defconfig @@ -37,7 +37,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 -CONFIG_BLK=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y # CONFIG_MMC is not set @@ -51,4 +50,3 @@ CONFIG_PCI=y CONFIG_PCI_MVEBU=y CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y -# CONFIG_EFI_LOADER is not set diff --git a/configs/crs328-4c-20s-4s_defconfig b/configs/crs328-4c-20s-4s_defconfig index 8e08cceaac4..2f6cade9bdd 100644 --- a/configs/crs328-4c-20s-4s_defconfig +++ b/configs/crs328-4c-20s-4s_defconfig @@ -37,7 +37,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 -CONFIG_BLK=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y # CONFIG_MMC is not set @@ -51,4 +50,3 @@ CONFIG_PCI=y CONFIG_PCI_MVEBU=y CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y -# CONFIG_EFI_LOADER is not set diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 4b6776ea9c8..c7fb2c67a7f 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_L2_PL310=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_F_LEN=0x1000 diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index 4de32099ed5..e5e70a2adab 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -43,7 +43,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x91000000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_MSM_GPIO=y -CONFIG_PM8916_GPIO=y +CONFIG_QCOM_PMIC_GPIO=y CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MMC_SDHCI=y @@ -52,7 +52,7 @@ CONFIG_PHY=y CONFIG_PINCTRL=y CONFIG_PINCONF=y CONFIG_DM_PMIC=y -CONFIG_PMIC_PM8916=y +CONFIG_PMIC_QCOM=y CONFIG_MSM_SERIAL=y CONFIG_SPMI_MSM=y CONFIG_USB=y diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig index 855f6282135..e2e2e627aec 100644 --- a/configs/dragonboard820c_defconfig +++ b/configs/dragonboard820c_defconfig @@ -36,12 +36,12 @@ CONFIG_ENV_EXT4_INTERFACE="mmc" CONFIG_ENV_EXT4_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_CLK=y -CONFIG_PM8916_GPIO=y +CONFIG_QCOM_PMIC_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_MSM=y CONFIG_PINCTRL=y CONFIG_PINCONF=y CONFIG_DM_PMIC=y -CONFIG_PMIC_PM8916=y +CONFIG_PMIC_QCOM=y CONFIG_MSM_SERIAL=y CONFIG_SPMI_MSM=y diff --git a/configs/dragonboard845c_defconfig b/configs/dragonboard845c_defconfig index cf1a1d25cff..a69d82761a8 100644 --- a/configs/dragonboard845c_defconfig +++ b/configs/dragonboard845c_defconfig @@ -20,10 +20,10 @@ CONFIG_CMD_GPIO=y # CONFIG_NET is not set CONFIG_CLK=y CONFIG_MSM_GPIO=y -CONFIG_PM8916_GPIO=y +CONFIG_QCOM_PMIC_GPIO=y CONFIG_PINCTRL=y CONFIG_DM_PMIC=y -CONFIG_PMIC_PM8916=y +CONFIG_PMIC_QCOM=y CONFIG_MSM_GENI_SERIAL=y CONFIG_SPMI_MSM=y CONFIG_LMB_MAX_REGIONS=64 diff --git a/configs/durian_defconfig b/configs/durian_defconfig index d9e3768bb04..4d2ccab8a07 100644 --- a/configs/durian_defconfig +++ b/configs/durian_defconfig @@ -32,7 +32,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y -CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_PCI=y CONFIG_PCI_PHYTIUM=y diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig index 0bef043ea67..3061cbec412 100644 --- a/configs/evb-ast2500_defconfig +++ b/configs/evb-ast2500_defconfig @@ -39,6 +39,16 @@ CONFIG_SYS_I2C_ASPEED=y CONFIG_I2C_EEPROM=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ASPEED=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHY_REALTEK=y CONFIG_FTGMAC100=y CONFIG_PHY=y @@ -47,6 +57,10 @@ CONFIG_RAM=y CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_SPI_DIRMAP=y +CONFIG_SPI_ASPEED_SMC=y CONFIG_SYSRESET=y CONFIG_TIMER=y CONFIG_WDT=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 1284d519180..1981f895d6d 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -87,6 +87,16 @@ CONFIG_SYS_I2C_ASPEED=y CONFIG_I2C_EEPROM=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ASPEED=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHY_REALTEK=y CONFIG_DM_MDIO=y CONFIG_FTGMAC100=y @@ -98,6 +108,10 @@ CONFIG_SPL_RAM=y CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_SPI_DIRMAP=y +CONFIG_SPI_ASPEED_SMC=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_WDT=y diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index 8de93e49ff9..5574b9d17fe 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -89,7 +89,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SPL_DM=y -CONFIG_BLK=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index b9ee281be9f..992e8509993 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -78,7 +78,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y # CONFIG_DM_DEVICE_REMOVE is not set -CONFIG_HAVE_BLOCK_DEVICE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_LED=y CONFIG_LED_BLINK=y diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig index 2603aa35e74..588597f92b9 100644 --- a/configs/imx8mn_bsh_smm_s2_defconfig +++ b/configs/imx8mn_bsh_smm_s2_defconfig @@ -45,6 +45,8 @@ CONFIG_SPL_DMA=y CONFIG_SPL_I2C=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_NAND_BASE=y +CONFIG_SPL_NAND_IDENT=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 diff --git a/configs/j7200_hs_evm_a72_defconfig b/configs/j7200_hs_evm_a72_defconfig new file mode 100644 index 00000000000..7c95b00af54 --- /dev/null +++ b/configs/j7200_hs_evm_a72_defconfig @@ -0,0 +1,205 @@ +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_SOC_K3_J721E=y +CONFIG_TARGET_J7200_A72_EVM=y +CONFIG_ENV_SIZE=0x20000 +CONFIG_ENV_OFFSET=0x680000 +CONFIG_DM_GPIO=y +CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-common-proc-board" +CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_ENV_OFFSET_REDUND=0x6A0000 +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +# CONFIG_PSCI_RESET is not set +CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 +# CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_OF_BOARD_SETUP=y +CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit" +CONFIG_LOGLEVEL=7 +CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 +CONFIG_SPL_DMA=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" +CONFIG_SPL_I2C=y +CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_DFU=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 +CONFIG_CMD_ASKENV=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_REMOTEPROC=y +CONFIG_CMD_UFS=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0,nor0=47034000.hyperbus" +CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),-@8m(ospi.rootfs);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),1m(hbmc.sysfw),-@8m(hbmc.rootfs)" +CONFIG_CMD_UBI=y +# CONFIG_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_MULTI_DTB_FIT=y +CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_CLK_CCF=y +CONFIG_CLK_TI_SCI=y +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_DFU_SF=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 +CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_TI_SCI_PROTOCOL=y +CONFIG_DA8XX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_GPIO=y +CONFIG_SYS_I2C_OMAP24XX=y +CONFIG_DM_MAILBOX=y +CONFIG_K3_SEC_PROXY=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ADMA=y +CONFIG_SPL_MMC_SDHCI_ADMA=y +CONFIG_MMC_SDHCI_AM654=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_HBMC_AM654=y +CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_MULTIPLEXER=y +CONFIG_MUX_MMIO=y +CONFIG_PHY_FIXED=y +CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_PHY=y +CONFIG_SPL_PHY=y +CONFIG_PHY_CADENCE_TORRENT=y +CONFIG_PHY_J721E_WIZ=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_GENERIC is not set +CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_GENERIC is not set +CONFIG_PINCTRL_SINGLE=y +CONFIG_POWER_DOMAIN=y +CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_REMOTEPROC_TI_K3_R5F=y +CONFIG_DM_RESET=y +CONFIG_RESET_TI_SCI=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_DM_SERIAL=y +CONFIG_SOC_DEVICE=y +CONFIG_SOC_DEVICE_TI_K3=y +CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_HAS_CQSPI_REF_CLK=y +CONFIG_CQSPI_REF_CLK=133333333 +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_TI_SCI=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_SPL_DM_USB_GADGET=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_CDNS3=y +CONFIG_USB_CDNS3_GADGET=y +CONFIG_USB_CDNS3_HOST=y +CONFIG_SPL_USB_CDNS3_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6164 +CONFIG_UFS=y +CONFIG_CADENCE_UFS=y +CONFIG_TI_J721E_UFS=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/j7200_hs_evm_r5_defconfig b/configs/j7200_hs_evm_r5_defconfig new file mode 100644 index 00000000000..0cf9c688e4a --- /dev/null +++ b/configs/j7200_hs_evm_r5_defconfig @@ -0,0 +1,171 @@ +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x70000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SOC_K3_J721E=y +CONFIG_K3_EARLY_CONS=y +CONFIG_TARGET_J7200_R5_EVM=y +CONFIG_ENV_SIZE=0x20000 +CONFIG_DM_GPIO=y +CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-r5-common-proc-board" +CONFIG_SPL_TEXT_BASE=0x41c00000 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 +# CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_USE_BOOTCOMMAND=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41cf5bfc +CONFIG_SPL_BSS_MAX_SIZE=0xa000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 +CONFIG_SPL_EARLY_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 +CONFIG_SPL_DMA=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_I2C=y +CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_SPL_REMOTEPROC=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_DFU=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_REMOTEPROC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_SPL_CLK_CCF=y +CONFIG_SPL_CLK_K3_PLL=y +CONFIG_SPL_CLK_K3=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y +CONFIG_TI_SCI_PROTOCOL=y +CONFIG_DA8XX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_I2C_OMAP24XX=y +CONFIG_DM_MAILBOX=y +CONFIG_K3_SEC_PROXY=y +CONFIG_FS_LOADER=y +CONFIG_SPL_FS_LOADER=y +CONFIG_K3_AVS0=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_SPL_MMC_SDHCI_ADMA=y +CONFIG_MMC_SDHCI_AM654=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_HBMC_AM654=y +CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_GENERIC is not set +CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_GENERIC is not set +CONFIG_PINCTRL_SINGLE=y +CONFIG_POWER_DOMAIN=y +CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_TI_POWER_DOMAIN=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_TPS65941=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_TPS65941=y +CONFIG_K3_SYSTEM_CONTROLLER=y +CONFIG_REMOTEPROC_TI_K3_ARM64=y +CONFIG_DM_RESET=y +CONFIG_RESET_TI_SCI=y +CONFIG_DM_SERIAL=y +CONFIG_SOC_DEVICE=y +CONFIG_SOC_DEVICE_TI_K3=y +CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_HAS_CQSPI_REF_CLK=y +CONFIG_CQSPI_REF_CLK=133333333 +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_TI_SCI=y +CONFIG_TIMER=y +CONFIG_SPL_TIMER=y +CONFIG_OMAP_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_SPL_DM_USB_GADGET=y +CONFIG_USB_CDNS3=y +CONFIG_USB_CDNS3_GADGET=y +CONFIG_SPL_USB_CDNS3_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6164 +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_FS_EXT4=y +CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 +CONFIG_LIB_RATIONAL=y +CONFIG_SPL_LIB_RATIONAL=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 671fce6268e..a06312f4f5d 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -32,7 +32,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y -CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" +CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y diff --git a/configs/j721s2_hs_evm_a72_defconfig b/configs/j721s2_hs_evm_a72_defconfig new file mode 100644 index 00000000000..7ae0c3ba7b9 --- /dev/null +++ b/configs/j721s2_hs_evm_a72_defconfig @@ -0,0 +1,214 @@ +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_SOC_K3_J721S2=y +CONFIG_TARGET_J721S2_A72_EVM=y +CONFIG_ENV_SIZE=0x20000 +CONFIG_ENV_OFFSET=0x680000 +CONFIG_DM_GPIO=y +CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j721s2-common-proc-board" +CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_ENV_OFFSET_REDUND=0x6A0000 +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +# CONFIG_PSCI_RESET is not set +CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 +# CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_OF_BOARD_SETUP=y +CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit" +CONFIG_LOGLEVEL=7 +CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 +CONFIG_SPL_DMA=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" +CONFIG_SPL_I2C=y +CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 +CONFIG_SPL_THERMAL=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_DFU=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 +CONFIG_CMD_ASKENV=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_REMOTEPROC=y +CONFIG_CMD_UFS=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0,nor0=47034000.hyperbus" +CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),256k(ospi.env),256k(ospi.env.backup),57088k@8m(ospi.rootfs),256k(ospi.phypattern);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),-@8m(hbmc.rootfs)" +CONFIG_CMD_UBI=y +# CONFIG_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_MULTI_DTB_FIT=y +CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_CLK_CCF=y +CONFIG_CLK_TI_SCI=y +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_DFU_SF=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 +CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_TI_SCI_PROTOCOL=y +CONFIG_DA8XX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_GPIO=y +CONFIG_SYS_I2C_OMAP24XX=y +CONFIG_DM_MAILBOX=y +CONFIG_K3_SEC_PROXY=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ADMA=y +CONFIG_SPL_MMC_SDHCI_ADMA=y +CONFIG_MMC_SDHCI_AM654=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_S28HS512T=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MT35XU=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_MULTIPLEXER=y +CONFIG_MUX_MMIO=y +CONFIG_PHY_TI_DP83867=y +CONFIG_PHY_FIXED=y +CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_PHY=y +CONFIG_SPL_PHY=y +CONFIG_PHY_CADENCE_TORRENT=y +CONFIG_PHY_J721E_WIZ=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_GENERIC is not set +CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_GENERIC is not set +CONFIG_PINCTRL_SINGLE=y +CONFIG_POWER_DOMAIN=y +CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_REMOTEPROC_TI_K3_DSP=y +CONFIG_REMOTEPROC_TI_K3_R5F=y +CONFIG_DM_RESET=y +CONFIG_RESET_TI_SCI=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_DM_SERIAL=y +CONFIG_SOC_DEVICE=y +CONFIG_SOC_DEVICE_TI_K3=y +CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_HAS_CQSPI_REF_CLK=y +CONFIG_CQSPI_REF_CLK=133333333 +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_TI_SCI=y +CONFIG_DM_THERMAL=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_SPL_DM_USB_GADGET=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_CDNS3=y +CONFIG_USB_CDNS3_GADGET=y +CONFIG_USB_CDNS3_HOST=y +CONFIG_SPL_USB_CDNS3_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6168 +CONFIG_UFS=y +CONFIG_CADENCE_UFS=y +CONFIG_TI_J721E_UFS=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/j721s2_hs_evm_r5_defconfig b/configs/j721s2_hs_evm_r5_defconfig new file mode 100644 index 00000000000..8df968c65cf --- /dev/null +++ b/configs/j721s2_hs_evm_r5_defconfig @@ -0,0 +1,177 @@ +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x10000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SOC_K3_J721S2=y +CONFIG_K3_EARLY_CONS=y +CONFIG_TARGET_J721S2_R5_EVM=y +CONFIG_ENV_SIZE=0x20000 +CONFIG_DM_GPIO=y +CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j721s2-r5-common-proc-board" +CONFIG_SPL_TEXT_BASE=0x41c00000 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_SIZE_LIMIT=0x80000 +CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c76000 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 +# CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_USE_BOOTCOMMAND=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y +CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41c76000 +CONFIG_SPL_BSS_MAX_SIZE=0xa000 +CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 +CONFIG_SPL_EARLY_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 +CONFIG_SPL_DMA=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_I2C=y +CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_SPL_REMOTEPROC=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 +CONFIG_SPL_THERMAL=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_DFU=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_REMOTEPROC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_SPL_CLK_CCF=y +CONFIG_SPL_CLK_K3_PLL=y +CONFIG_SPL_CLK_K3=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y +CONFIG_TI_SCI_PROTOCOL=y +CONFIG_DA8XX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_I2C_OMAP24XX=y +CONFIG_DM_MAILBOX=y +CONFIG_K3_SEC_PROXY=y +CONFIG_FS_LOADER=y +CONFIG_SPL_FS_LOADER=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_SPL_MMC_SDHCI_ADMA=y +CONFIG_MMC_SDHCI_AM654=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_S28HS512T=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MT35XU=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_GENERIC is not set +CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_GENERIC is not set +CONFIG_PINCTRL_SINGLE=y +CONFIG_POWER_DOMAIN=y +CONFIG_TI_POWER_DOMAIN=y +CONFIG_K3_SYSTEM_CONTROLLER=y +CONFIG_REMOTEPROC_TI_K3_ARM64=y +CONFIG_DM_RESET=y +CONFIG_RESET_TI_SCI=y +CONFIG_DM_SERIAL=y +CONFIG_SOC_DEVICE=y +CONFIG_SOC_DEVICE_TI_K3=y +CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_HAS_CQSPI_REF_CLK=y +CONFIG_CQSPI_REF_CLK=133333333 +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_TI_SCI=y +CONFIG_DM_THERMAL=y +CONFIG_TIMER=y +CONFIG_SPL_TIMER=y +CONFIG_OMAP_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_SPL_DM_USB_GADGET=y +CONFIG_USB_CDNS3=y +CONFIG_USB_CDNS3_GADGET=y +CONFIG_SPL_USB_CDNS3_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6168 +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_FS_EXT4=y +CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 +CONFIG_PANIC_HANG=y +CONFIG_LIB_RATIONAL=y +CONFIG_SPL_LIB_RATIONAL=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index e385ea47aa1..f66aacc9912 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -33,6 +33,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_EEPROM_BUS_NUM=1 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index 1d4e57c6eda..110cf5d3d2b 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_EEPROM_BUS_NUM=1 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index 391f46459fa..9d8dbbf043b 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_EEPROM_BUS_NUM=1 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 3b37641c6ae..039c9842e99 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_EEPROM_BUS_NUM=1 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 38c074d1580..a916959d57c 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -43,6 +43,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_EEPROM_BUS_NUM=1 CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 3dd08712131..65f033aed95 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -44,6 +44,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_EEPROM_BUS_NUM=1 CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 84722b01e85..45c91797270 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -45,6 +45,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_ARCH_MISC_INIT=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SYS_EEPROM_BUS_NUM=1 CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index b5c5efe5966..01c93d5c4ee 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -43,9 +43,9 @@ CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y +CONFIG_CMD_GREPENV=y CONFIG_CMD_GPIO=y CONFIG_CMD_SAVES=y -# CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index c48063500ae..5ce2fbdb93c 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -54,7 +54,6 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 -CONFIG_BLK=y CONFIG_LBA48=y CONFIG_SYS_64BIT_LBA=y CONFIG_KIRKWOOD_GPIO=y diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig index 41f8268ec2d..6629137d004 100644 --- a/configs/nokia_rx51_defconfig +++ b/configs/nokia_rx51_defconfig @@ -4,7 +4,7 @@ CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_LEN=0xc0000 CONFIG_TARGET_NOKIA_RX51=y -CONFIG_SYS_LOAD_ADDR=0x80000000 +CONFIG_SYS_LOAD_ADDR=0x80008000 CONFIG_OPTIMIZE_INLINING=y CONFIG_LTO=y # CONFIG_FIT is not set diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index 8e5e8ea305d..9b85dc41410 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -29,8 +29,6 @@ CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" -CONFIG_BLK=y -CONFIG_HAVE_BLOCK_DEVICE=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y diff --git a/configs/octeon_nic23_defconfig b/configs/octeon_nic23_defconfig index 95e98c1161d..abc79144377 100644 --- a/configs/octeon_nic23_defconfig +++ b/configs/octeon_nic23_defconfig @@ -20,6 +20,8 @@ CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_SYS_DEVICE_NULLDEV is not set +CONFIG_CYCLIC=y +CONFIG_CYCLIC_MAX_CPU_TIME_US=5000 CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index 3a28adf2ae8..814953fae64 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_DEFAULT_DEVICE_TREE="omap4-panda" diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig index 6d5de532f36..a2645b98197 100644 --- a/configs/omap4_sdp4430_defconfig +++ b/configs/omap4_sdp4430_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_OMAP2PLUS=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index 5dae75f0f98..aa4deac3df3 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -40,7 +40,6 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y -CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index 68fa48d0daa..ba82a4f0d0f 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -38,7 +38,6 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y -CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index f56f3eb5347..c1b60aa5166 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -40,7 +40,6 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y -CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index 2840266e89a..5aef18d5866 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -38,7 +38,6 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y -CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index 68fb02bd357..cd73fe41f98 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -39,7 +39,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_NET is not set CONFIG_DM=y -CONFIG_BLK=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index 470ae9efa83..67fb1b94831 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -43,7 +43,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y -CONFIG_BLK=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/poleg_evb_defconfig b/configs/poleg_evb_defconfig index ba017e327a1..597a72eed9d 100644 --- a/configs/poleg_evb_defconfig +++ b/configs/poleg_evb_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_NPCM=y CONFIG_SYS_TEXT_BASE=0x8200 CONFIG_SYS_MALLOC_LEN=0x240000 diff --git a/configs/qcs404evb_defconfig b/configs/qcs404evb_defconfig index d45f6b2348b..dae15514115 100644 --- a/configs/qcs404evb_defconfig +++ b/configs/qcs404evb_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y +CONFIG_CMD_USB=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y @@ -29,10 +30,25 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y # CONFIG_NET is not set CONFIG_CLK=y +CONFIG_QCOM_PMIC_GPIO=y +CONFIG_MISC=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_MSM=y +CONFIG_PHY=y +CONFIG_PHY_QCOM_USB_HS_28NM=y +CONFIG_PHY_QCOM_USB_SS=y CONFIG_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_QCOM=y +CONFIG_DM_RESET=y CONFIG_MSM_SERIAL=y +CONFIG_SPMI_MSM=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_STORAGE=y CONFIG_LMB_MAX_REGIONS=64 diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index 36988d3d36b..f48564c3f51 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -39,8 +39,6 @@ CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SIMPLE_BUS_CORRECT_RANGE=y -CONFIG_BLK=y -CONFIG_HAVE_BLOCK_DEVICE=y CONFIG_LBA48=y CONFIG_CHIP_SELECTS_PER_CTRL=0 CONFIG_MPC8XXX_GPIO=y diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 290d1506c28..9a1b6e4bbfc 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -67,6 +67,7 @@ CONFIG_CMD_BMP=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_RTC=y CONFIG_CMD_TIME=y +CONFIG_CMD_PAUSE=y CONFIG_CMD_TIMER=y CONFIG_CMD_SOUND=y CONFIG_CMD_QFW=y @@ -127,7 +128,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_GPIO_HOG=y CONFIG_DM_GPIO_LOOKUP_LABEL=y -CONFIG_PM8916_GPIO=y +CONFIG_QCOM_PMIC_GPIO=y CONFIG_SANDBOX_GPIO=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_CROS_EC_LDO=y @@ -178,7 +179,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_ACT8846=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_PMIC_MAX77686=y -CONFIG_PMIC_PM8916=y +CONFIG_PMIC_QCOM=y CONFIG_PMIC_RK8XX=y CONFIG_PMIC_S2MPS11=y CONFIG_DM_PMIC_SANDBOX=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index ab5d3f19bf9..caecb50ad96 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -94,8 +94,10 @@ CONFIG_CMD_ETHSW=y CONFIG_CMD_BMP=y CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_EFIDEBUG=y +CONFIG_CMD_EFICONFIG=y CONFIG_CMD_RTC=y CONFIG_CMD_TIME=y +CONFIG_CMD_PAUSE=y CONFIG_CMD_TIMER=y CONFIG_CMD_SOUND=y CONFIG_CMD_QFW=y @@ -171,7 +173,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_GPIO_HOG=y CONFIG_DM_GPIO_LOOKUP_LABEL=y -CONFIG_PM8916_GPIO=y +CONFIG_QCOM_PMIC_GPIO=y CONFIG_SANDBOX_GPIO=y CONFIG_DM_HWSPINLOCK=y CONFIG_HWSPINLOCK_SANDBOX=y @@ -231,7 +233,7 @@ CONFIG_PMIC_ACT8846=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_PMIC_MAX77686=y CONFIG_DM_PMIC_MC34708=y -CONFIG_PMIC_PM8916=y +CONFIG_PMIC_QCOM=y CONFIG_PMIC_RK8XX=y CONFIG_PMIC_S2MPS11=y CONFIG_DM_PMIC_SANDBOX=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index a8b439faa96..4b18c240ee1 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -100,7 +100,7 @@ CONFIG_DM_DEMO_SHAPE=y CONFIG_DFU_SF=y CONFIG_GPIO_HOG=y CONFIG_DM_GPIO_LOOKUP_LABEL=y -CONFIG_PM8916_GPIO=y +CONFIG_QCOM_PMIC_GPIO=y CONFIG_SANDBOX_GPIO=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_CROS_EC_LDO=y @@ -153,7 +153,7 @@ CONFIG_PMIC_ACT8846=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_PMIC_MAX77686=y CONFIG_DM_PMIC_MC34708=y -CONFIG_PMIC_PM8916=y +CONFIG_PMIC_QCOM=y CONFIG_PMIC_S2MPS11=y CONFIG_DM_PMIC_SANDBOX=y CONFIG_PMIC_S5M8767=y diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig index 3d34d81731a..72c908f61a7 100644 --- a/configs/sandbox_noinst_defconfig +++ b/configs/sandbox_noinst_defconfig @@ -126,7 +126,7 @@ CONFIG_DM_DEMO_SIMPLE=y CONFIG_DM_DEMO_SHAPE=y CONFIG_SPL_FIRMWARE=y CONFIG_GPIO_HOG=y -CONFIG_PM8916_GPIO=y +CONFIG_QCOM_PMIC_GPIO=y CONFIG_SANDBOX_GPIO=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_CROS_EC_LDO=y @@ -176,7 +176,7 @@ CONFIG_PMIC_ACT8846=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_PMIC_MAX77686=y CONFIG_DM_PMIC_MC34708=y -CONFIG_PMIC_PM8916=y +CONFIG_PMIC_QCOM=y CONFIG_PMIC_RK8XX=y CONFIG_PMIC_S2MPS11=y CONFIG_DM_PMIC_SANDBOX=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index 76e8acd1267..11b9aa890b4 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -127,7 +127,7 @@ CONFIG_DM_DEMO_SIMPLE=y CONFIG_DM_DEMO_SHAPE=y CONFIG_SPL_FIRMWARE=y CONFIG_GPIO_HOG=y -CONFIG_PM8916_GPIO=y +CONFIG_QCOM_PMIC_GPIO=y CONFIG_SANDBOX_GPIO=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_CROS_EC_LDO=y @@ -179,7 +179,7 @@ CONFIG_PMIC_ACT8846=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_PMIC_MAX77686=y CONFIG_DM_PMIC_MC34708=y -CONFIG_PMIC_PM8916=y +CONFIG_PMIC_QCOM=y CONFIG_PMIC_RK8XX=y CONFIG_PMIC_S2MPS11=y CONFIG_DM_PMIC_SANDBOX=y diff --git a/configs/sandbox_vpl_defconfig b/configs/sandbox_vpl_defconfig index 96c96227072..c3856a83748 100644 --- a/configs/sandbox_vpl_defconfig +++ b/configs/sandbox_vpl_defconfig @@ -136,7 +136,7 @@ CONFIG_DM_DEMO_SIMPLE=y CONFIG_DM_DEMO_SHAPE=y CONFIG_SPL_FIRMWARE=y CONFIG_GPIO_HOG=y -CONFIG_PM8916_GPIO=y +CONFIG_QCOM_PMIC_GPIO=y CONFIG_SANDBOX_GPIO=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_CROS_EC_LDO=y @@ -184,7 +184,7 @@ CONFIG_PMIC_ACT8846=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_PMIC_MAX77686=y CONFIG_DM_PMIC_MC34708=y -CONFIG_PMIC_PM8916=y +CONFIG_PMIC_QCOM=y CONFIG_PMIC_RK8XX=y CONFIG_PMIC_S2MPS11=y CONFIG_DM_PMIC_SANDBOX=y diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index 3eac3dfa5df..6fe8d550029 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index dbadb3d49af..2632c0af4ea 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig index 2a5a2773193..478efc59ea9 100644 --- a/configs/socfpga_chameleonv3_defconfig +++ b/configs/socfpga_chameleonv3_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x4400 diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 4fd14d2e2c1..451de03e1da 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index 5c17ccb651e..7786843427e 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 1ef0dd93981..cfc8b50e2b2 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index 296128c9fb3..53c4ff5ffd2 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/socfpga_de10_standard_defconfig b/configs/socfpga_de10_standard_defconfig index 8e6fe0697d5..15d45995261 100644 --- a/configs/socfpga_de10_standard_defconfig +++ b/configs/socfpga_de10_standard_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index 15089fe6d92..2a159368068 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index 832b26f6dec..3a21bc77a2e 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index 75190c0eb58..35ea73a5987 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index 400c89b84f3..a6106f2a43d 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_SYS_MALLOC_F_LEN=0x800 diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 1e9dc14af06..0539d2937ef 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index dab11f8920b..a81f74d329e 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 90ffa9a9c59..59d809ca0ed 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x4000 diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 1b88ccd209f..3a99667811a 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x4000 diff --git a/configs/starqltechn_defconfig b/configs/starqltechn_defconfig index 2d07767b61b..4f84f5f974d 100644 --- a/configs/starqltechn_defconfig +++ b/configs/starqltechn_defconfig @@ -23,10 +23,10 @@ CONFIG_CMD_BMP=y # CONFIG_DM_STDIO is not set CONFIG_CLK=y CONFIG_MSM_GPIO=y -CONFIG_PM8916_GPIO=y +CONFIG_QCOM_PMIC_GPIO=y CONFIG_PINCTRL=y CONFIG_DM_PMIC=y -CONFIG_PMIC_PM8916=y +CONFIG_PMIC_QCOM=y # CONFIG_REQUIRE_SERIAL_CONSOLE is not set CONFIG_SPMI_MSM=y CONFIG_DM_VIDEO=y diff --git a/configs/stemmy_defconfig b/configs/stemmy_defconfig index 7fc0a39872c..f1d3ef5b123 100644 --- a/configs/stemmy_defconfig +++ b/configs/stemmy_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_L2_PL310=y CONFIG_ARCH_U8500=y CONFIG_SUPPORT_PASSING_ATAGS=y # CONFIG_SETUP_MEMORY_TAGS is not set diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig index 26beb73e84f..af6b1839d03 100644 --- a/configs/stm32mp13_defconfig +++ b/configs/stm32mp13_defconfig @@ -64,7 +64,6 @@ CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_SCMI=y CONFIG_RESET_SCMI=y CONFIG_DM_RNG=y -CONFIG_RNG_OPTEE=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 0f6b3738cad..ec8fb37110e 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -124,7 +124,6 @@ CONFIG_DM_REGULATOR_SCMI=y CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_RESET_SCMI=y CONFIG_DM_RNG=y -CONFIG_RNG_OPTEE=y CONFIG_RNG_STM32MP1=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 1154eec210c..9cfa9a20f36 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -124,7 +124,6 @@ CONFIG_DM_REGULATOR_STPMIC1=y CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_RESET_SCMI=y CONFIG_DM_RNG=y -CONFIG_RNG_OPTEE=y CONFIG_RNG_STM32MP1=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index a78ee631e40..7a0557a22e2 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -66,3 +66,4 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set CONFIG_ARM_DCC=y # CONFIG_GZIP is not set +# CONFIG_LMB is not set diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index ef73579dca4..4b626d34654 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -67,3 +67,4 @@ CONFIG_ARM_DCC=y CONFIG_FAT_WRITE=y # CONFIG_GZIP is not set # CONFIG_EFI_LOADER is not set +# CONFIG_LMB is not set diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index fb7c5cfdbb2..6fe2ebf876e 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -67,3 +67,4 @@ CONFIG_ARM_DCC=y CONFIG_FAT_WRITE=y # CONFIG_GZIP is not set # CONFIG_EFI_LOADER is not set +# CONFIG_LMB is not set diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 6e61abd0c6e..6afd06798d0 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x100000 CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-virt" CONFIG_SYS_PROMPT="Versal> " +CONFIG_ENV_OFFSET_REDUND=0x7F00000 CONFIG_CMD_FRU=y CONFIG_DEFINE_TCM_OCM_MMAP=y CONFIG_SYS_LOAD_ADDR=0x8000000 @@ -25,6 +26,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2073 CONFIG_SYS_BOOTM_LEN=0x6400000 CONFIG_CMD_BOOTMENU=y +CONFIG_CMD_GREPENV=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y @@ -69,6 +71,8 @@ CONFIG_FPGA_XILINX=y CONFIG_FPGA_VERSALPL=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y CONFIG_DM_MAILBOX=y CONFIG_ZYNQMP_IPI=y CONFIG_MISC=y @@ -102,6 +106,8 @@ CONFIG_PHY_GIGE=y CONFIG_XILINX_AXIEMAC=y CONFIG_XILINX_AXIMRMAC=y CONFIG_ZYNQ_GEM=y +CONFIG_POWER_DOMAIN=y +CONFIG_ZYNQMP_POWER_DOMAIN=y CONFIG_DM_RESET=y CONFIG_RESET_ZYNQMP=y CONFIG_ARM_DCC=y @@ -111,8 +117,11 @@ CONFIG_SOC_XILINX_VERSAL=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_CADENCE_QSPI=y +CONFIG_HAS_CQSPI_REF_CLK=y +CONFIG_CQSPI_REF_CLK=200000000 CONFIG_CADENCE_OSPI_VERSAL=y CONFIG_ZYNQ_SPI=y +CONFIG_ZYNQMP_GQSPI=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 7beb5915fce..c12a1cbbc8a 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -8,6 +8,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0xE40000 CONFIG_CMD_FRU=y CONFIG_CMD_ZYNQ_AES=y CONFIG_SYS_LOAD_ADDR=0x0 @@ -50,6 +51,7 @@ CONFIG_SYS_PBSIZE=2071 CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_IMLS=y CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y CONFIG_CMD_DFU=y @@ -64,7 +66,6 @@ CONFIG_CMD_MTD=y CONFIG_CMD_NAND_LOCK_UNLOCK=y CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_MAY_FAIL=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y @@ -149,3 +150,4 @@ CONFIG_DISPLAY=y CONFIG_SPL_GZIP=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y +CONFIG_TOOLS_MKEFICAPSULE=y diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index a2405f24ef7..e6054fe1774 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -65,3 +65,4 @@ CONFIG_SYS_NAND_MAX_CHIPS=2 CONFIG_ARM_DCC=y CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set +# CONFIG_LMB is not set diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index e6ebc12ed7d..aa35b48c72d 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -64,3 +64,4 @@ CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_ARM_DCC=y CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set +# CONFIG_LMB is not set diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index e6d43083475..d0cc0360d27 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -3,7 +3,7 @@ CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_qspi" CONFIG_SYS_ICACHE_OFF=y CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 -CONFIG_SYS_MALLOC_LEN=0x1a00 +CONFIG_SYS_MALLOC_LEN=0x1b00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi" @@ -19,7 +19,9 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe0000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_LEGACY_IMAGE_FORMAT is not set +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set # CONFIG_AUTOBOOT is not set +CONFIG_LOGLEVEL=0 # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y @@ -62,6 +64,7 @@ CONFIG_SYS_PBSIZE=1049 # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_SLEEP is not set +# CONFIG_CMD_MP is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -69,17 +72,24 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y +# CONFIG_FIRMWARE is not set +# CONFIG_GPIO is not set +# CONFIG_I2C is not set +# CONFIG_INPUT is not set # CONFIG_MMC is not set -CONFIG_SPI_FLASH_BAR=y +# CONFIG_SPI_FLASH_SMART_HWCAPS is not set +# CONFIG_SPI_FLASH_UNLOCK_ALL is not set CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +# CONFIG_POWER is not set CONFIG_ARM_DCC=y CONFIG_SPI=y CONFIG_ZYNQMP_GQSPI=y +# CONFIG_FAT_WRITE is not set CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index e5ac26e0381..1591f221b5a 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL_SIZE_LIMIT=0x2a000 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x0 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x1E80000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_ZYNQ_MAC_IN_EEPROM=y @@ -56,6 +57,7 @@ CONFIG_SYS_PBSIZE=2073 CONFIG_SYS_BOOTM_LEN=0x6400000 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_CMD_GREPENV=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index b69c8b92a48..22f7456d33c 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -79,3 +79,4 @@ CONFIG_NAND_ZYNQ=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_ARM_DCC=y # CONFIG_GZIP is not set +# CONFIG_LMB is not set diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index 59cd19ef2d4..9f2d33782f5 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -81,3 +81,4 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_QUIET_TEST=y CONFIG_ARM_DCC=y # CONFIG_GZIP is not set +# CONFIG_LMB is not set diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 49dd5ad6069..a7672247958 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -91,3 +91,4 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_ARM_DCC=y CONFIG_ZYNQ_QSPI=y # CONFIG_GZIP is not set +# CONFIG_LMB is not set diff --git a/disk/Kconfig b/disk/Kconfig index 81d8867ed7f..c9b9dbaf1a6 100644 --- a/disk/Kconfig +++ b/disk/Kconfig @@ -24,7 +24,7 @@ config SPL_PARTITIONS select SPL_STRTO help Enable this for base partition support in SPL. The required - partition table types shold be enabled separately. This add a + partition table types shold be enabled separately. This adds a small amount of size to SPL, typically 500 bytes. config TPL_PARTITIONS @@ -32,9 +32,9 @@ config TPL_PARTITIONS select TPL_SPRINTF select TPL_STRTO help - Enable this for base partition support in SPL. The required - partition table types shold be enabled separately. This add a - small amount of size to SPL, typically 500 bytes. + Enable this for base partition support in TPL. The required + partition table types shold be enabled separately. This adds a + small amount of size to TPL, typically 500 bytes. config MAC_PARTITION bool "Enable Apple's MacOS partition table" diff --git a/disk/Makefile b/disk/Makefile index ec148832b33..45588cf66e4 100644 --- a/disk/Makefile +++ b/disk/Makefile @@ -9,8 +9,12 @@ obj-$(CONFIG_$(SPL_TPL_)PARTITIONS) += part.o ifdef CONFIG_$(SPL_TPL_)BLK obj-$(CONFIG_$(SPL_TPL_)PARTITIONS) += disk-uclass.o endif + +# Must have BLK or SPL_LEGACY_BLOCK to support partitions +ifneq ($(CONFIG_$(SPL_TPL_)BLK),$(CONFIG_SPL_LEGACY_BLOCK),) obj-$(CONFIG_$(SPL_TPL_)MAC_PARTITION) += part_mac.o obj-$(CONFIG_$(SPL_TPL_)DOS_PARTITION) += part_dos.o obj-$(CONFIG_$(SPL_TPL_)ISO_PARTITION) += part_iso.o obj-$(CONFIG_$(SPL_TPL_)AMIGA_PARTITION) += part_amiga.o obj-$(CONFIG_$(SPL_TPL_)EFI_PARTITION) += part_efi.o +endif diff --git a/disk/disk-uclass.c b/disk/disk-uclass.c index f3fb942a6b9..9351a5cfa68 100644 --- a/disk/disk-uclass.c +++ b/disk/disk-uclass.c @@ -27,8 +27,7 @@ int part_create_block_devices(struct udevice *blk_dev) struct udevice *dev; int ret; - if (!CONFIG_IS_ENABLED(PARTITIONS) || - !CONFIG_IS_ENABLED(HAVE_BLOCK_DEVICE)) + if (!CONFIG_IS_ENABLED(PARTITIONS) || !blk_enabled()) return 0; if (device_get_uclass_id(blk_dev) != UCLASS_BLK) diff --git a/disk/part.c b/disk/part.c index de1b917e842..47214c0ee94 100644 --- a/disk/part.c +++ b/disk/part.c @@ -54,12 +54,13 @@ static struct part_driver *part_driver_lookup_type(struct blk_desc *dev_desc) return NULL; } -#ifdef CONFIG_HAVE_BLOCK_DEVICE static struct blk_desc *get_dev_hwpart(const char *ifname, int dev, int hwpart) { struct blk_desc *dev_desc; int ret; + if (!blk_enabled()) + return NULL; dev_desc = blk_get_devnum_by_typename(ifname, dev); if (!dev_desc) { debug("%s: No device for iface '%s', dev %d\n", __func__, @@ -78,21 +79,11 @@ static struct blk_desc *get_dev_hwpart(const char *ifname, int dev, int hwpart) struct blk_desc *blk_get_dev(const char *ifname, int dev) { - return get_dev_hwpart(ifname, dev, 0); -} -#else -struct blk_desc *get_dev_hwpart(const char *ifname, int dev, int hwpart) -{ - return NULL; -} + if (!blk_enabled()) + return NULL; -struct blk_desc *blk_get_dev(const char *ifname, int dev) -{ - return NULL; + return get_dev_hwpart(ifname, dev, 0); } -#endif - -#ifdef CONFIG_HAVE_BLOCK_DEVICE /* ------------------------------------------------------------------------- */ /* @@ -120,7 +111,7 @@ static lba512_t lba512_muldiv(lba512_t block_count, lba512_t mul_by, return bc_quot * mul_by + ((bc_rem * mul_by) >> right_shift); } -void dev_print (struct blk_desc *dev_desc) +void dev_print(struct blk_desc *dev_desc) { lba512_t lba512; /* number of blocks if 512bytes block size */ @@ -130,39 +121,37 @@ void dev_print (struct blk_desc *dev_desc) } switch (dev_desc->if_type) { - case IF_TYPE_SCSI: + case UCLASS_SCSI: printf ("(%d:%d) Vendor: %s Prod.: %s Rev: %s\n", dev_desc->target,dev_desc->lun, dev_desc->vendor, dev_desc->product, dev_desc->revision); break; - case IF_TYPE_ATAPI: - case IF_TYPE_IDE: - case IF_TYPE_SATA: + case UCLASS_IDE: + case UCLASS_AHCI: printf ("Model: %s Firm: %s Ser#: %s\n", dev_desc->vendor, dev_desc->revision, dev_desc->product); break; - case IF_TYPE_SD: - case IF_TYPE_MMC: - case IF_TYPE_USB: - case IF_TYPE_NVME: - case IF_TYPE_PVBLOCK: - case IF_TYPE_HOST: + case UCLASS_MMC: + case UCLASS_USB: + case UCLASS_NVME: + case UCLASS_PVBLOCK: + case UCLASS_ROOT: printf ("Vendor: %s Rev: %s Prod: %s\n", dev_desc->vendor, dev_desc->revision, dev_desc->product); break; - case IF_TYPE_VIRTIO: + case UCLASS_VIRTIO: printf("%s VirtIO Block Device\n", dev_desc->vendor); break; - case IF_TYPE_DOC: - puts("device type DOC\n"); - return; - case IF_TYPE_UNKNOWN: + case UCLASS_EFI_MEDIA: + printf("EFI media Block Device %d\n", dev_desc->devnum); + break; + case UCLASS_INVALID: puts("device type unknown\n"); return; default: @@ -228,9 +217,6 @@ void dev_print (struct blk_desc *dev_desc) puts (" Capacity: not available\n"); } } -#endif - -#ifdef CONFIG_HAVE_BLOCK_DEVICE void part_init(struct blk_desc *dev_desc) { @@ -263,40 +249,34 @@ static void print_part_header(const char *type, struct blk_desc *dev_desc) CONFIG_IS_ENABLED(EFI_PARTITION) puts ("\nPartition Map for "); switch (dev_desc->if_type) { - case IF_TYPE_IDE: + case UCLASS_IDE: puts ("IDE"); break; - case IF_TYPE_SATA: + case UCLASS_AHCI: puts ("SATA"); break; - case IF_TYPE_SCSI: + case UCLASS_SCSI: puts ("SCSI"); break; - case IF_TYPE_ATAPI: - puts ("ATAPI"); - break; - case IF_TYPE_USB: + case UCLASS_USB: puts ("USB"); break; - case IF_TYPE_DOC: - puts ("DOC"); - break; - case IF_TYPE_MMC: + case UCLASS_MMC: puts ("MMC"); break; - case IF_TYPE_HOST: + case UCLASS_ROOT: puts ("HOST"); break; - case IF_TYPE_NVME: + case UCLASS_NVME: puts ("NVMe"); break; - case IF_TYPE_PVBLOCK: + case UCLASS_PVBLOCK: puts("PV BLOCK"); break; - case IF_TYPE_VIRTIO: + case UCLASS_VIRTIO: puts("VirtIO"); break; - case IF_TYPE_EFI_MEDIA: + case UCLASS_EFI_MEDIA: puts("EFI"); break; default: @@ -325,38 +305,36 @@ void part_print(struct blk_desc *dev_desc) drv->print(dev_desc); } -#endif /* CONFIG_HAVE_BLOCK_DEVICE */ - int part_get_info(struct blk_desc *dev_desc, int part, struct disk_partition *info) { -#ifdef CONFIG_HAVE_BLOCK_DEVICE struct part_driver *drv; + if (blk_enabled()) { #if CONFIG_IS_ENABLED(PARTITION_UUIDS) - /* The common case is no UUID support */ - info->uuid[0] = 0; + /* The common case is no UUID support */ + info->uuid[0] = 0; #endif #ifdef CONFIG_PARTITION_TYPE_GUID - info->type_guid[0] = 0; + info->type_guid[0] = 0; #endif - drv = part_driver_lookup_type(dev_desc); - if (!drv) { - debug("## Unknown partition table type %x\n", - dev_desc->part_type); - return -EPROTONOSUPPORT; - } - if (!drv->get_info) { - PRINTF("## Driver %s does not have the get_info() method\n", - drv->name); - return -ENOSYS; - } - if (drv->get_info(dev_desc, part, info) == 0) { - PRINTF("## Valid %s partition found ##\n", drv->name); - return 0; + drv = part_driver_lookup_type(dev_desc); + if (!drv) { + debug("## Unknown partition table type %x\n", + dev_desc->part_type); + return -EPROTONOSUPPORT; + } + if (!drv->get_info) { + PRINTF("## Driver %s does not have the get_info() method\n", + drv->name); + return -ENOSYS; + } + if (drv->get_info(dev_desc, part, info) == 0) { + PRINTF("## Valid %s partition found ##\n", drv->name); + return 0; + } } -#endif /* CONFIG_HAVE_BLOCK_DEVICE */ return -ENOENT; } @@ -424,15 +402,15 @@ int blk_get_device_by_str(const char *ifname, const char *dev_hwpart_str, goto cleanup; } -#ifdef CONFIG_HAVE_BLOCK_DEVICE - /* - * Updates the partition table for the specified hw partition. - * Always should be done, otherwise hw partition 0 will return stale - * data after displaying a non-zero hw partition. - */ - if ((*dev_desc)->if_type == IF_TYPE_MMC) - part_init(*dev_desc); -#endif + if (blk_enabled()) { + /* + * Updates the partition table for the specified hw partition. + * Always should be done, otherwise hw partition 0 will return + * stale data after displaying a non-zero hw partition. + */ + if ((*dev_desc)->if_type == UCLASS_MMC) + part_init(*dev_desc); + } cleanup: free(dup_str); @@ -785,22 +763,17 @@ void part_set_generic_name(const struct blk_desc *dev_desc, char *devtype; switch (dev_desc->if_type) { - case IF_TYPE_IDE: - case IF_TYPE_SATA: - case IF_TYPE_ATAPI: + case UCLASS_IDE: + case UCLASS_AHCI: devtype = "hd"; break; - case IF_TYPE_SCSI: + case UCLASS_SCSI: devtype = "sd"; break; - case IF_TYPE_USB: + case UCLASS_USB: devtype = "usbd"; break; - case IF_TYPE_DOC: - devtype = "docd"; - break; - case IF_TYPE_MMC: - case IF_TYPE_SD: + case UCLASS_MMC: devtype = "mmcsd"; break; default: diff --git a/disk/part_amiga.c b/disk/part_amiga.c index ac7ada54781..45d3a704866 100644 --- a/disk/part_amiga.c +++ b/disk/part_amiga.c @@ -11,8 +11,6 @@ #include "part_amiga.h" #include <part.h> -#ifdef CONFIG_HAVE_BLOCK_DEVICE - #undef AMIGA_DEBUG #ifdef AMIGA_DEBUG @@ -387,5 +385,3 @@ U_BOOT_PART_TYPE(amiga) = { .print = part_print_amiga, .test = part_test_amiga, }; - -#endif diff --git a/disk/part_dos.c b/disk/part_dos.c index 94fae7166d7..a94702c5f34 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -23,8 +23,6 @@ #include "part_dos.h" #include <part.h> -#ifdef CONFIG_HAVE_BLOCK_DEVICE - #define DOS_PART_DEFAULT_SECTOR 512 /* should this be configurable? It looks like it's not very common at all @@ -518,5 +516,3 @@ U_BOOT_PART_TYPE(dos) = { .print = part_print_ptr(part_print_dos), .test = part_test_dos, }; - -#endif diff --git a/disk/part_efi.c b/disk/part_efi.c index 5090efd1192..ad94504ed90 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -28,8 +28,6 @@ #include <linux/ctype.h> #include <u-boot/crc.h> -#ifdef CONFIG_HAVE_BLOCK_DEVICE - /* GUID for basic data partitons */ #if CONFIG_IS_ENABLED(EFI_PARTITION) static const efi_guid_t partition_basic_data_guid = PARTITION_BASIC_DATA_GUID; @@ -1204,4 +1202,3 @@ U_BOOT_PART_TYPE(a_efi) = { .print = part_print_ptr(part_print_efi), .test = part_test_efi, }; -#endif /* CONFIG_HAVE_BLOCK_DEVICE */ diff --git a/disk/part_iso.c b/disk/part_iso.c index 1061f341d35..4cd619bf46d 100644 --- a/disk/part_iso.c +++ b/disk/part_iso.c @@ -12,8 +12,6 @@ #include <asm/unaligned.h> #include "part_iso.h" -#ifdef CONFIG_HAVE_BLOCK_DEVICE - /* #define ISO_PART_DEBUG */ #ifdef ISO_PART_DEBUG @@ -241,4 +239,3 @@ U_BOOT_PART_TYPE(iso) = { .print = part_print_iso, .test = part_test_iso, }; -#endif diff --git a/disk/part_mac.c b/disk/part_mac.c index e01ae745661..ae8263f755a 100644 --- a/disk/part_mac.c +++ b/disk/part_mac.c @@ -20,8 +20,6 @@ #include "part_mac.h" #include <part.h> -#ifdef CONFIG_HAVE_BLOCK_DEVICE - /* stdlib.h causes some compatibility problems; should fixe these! -- wd */ #ifndef __ldiv_t_defined typedef struct { @@ -247,4 +245,3 @@ U_BOOT_PART_TYPE(mac) = { .print = part_print_mac, .test = part_test_mac, }; -#endif diff --git a/doc/board/nokia/rx51.rst b/doc/board/nokia/rx51.rst index 061fe7677ee..7c6647bce22 100644 --- a/doc/board/nokia/rx51.rst +++ b/doc/board/nokia/rx51.rst @@ -158,8 +158,7 @@ UBIFS support add following lines into file ``configs/nokia_rx51_defconfig``:: CONFIG_CMD_UBI=y CONFIG_CMD_UBIFS=y - CONFIG_MTD_UBI_FASTMAP=y - CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 + CONFIG_MTD_UBI_BEB_LIMIT=10 Run in QEMU ----------- diff --git a/doc/build/gcc.rst b/doc/build/gcc.rst index ee544ad87ee..a71f860a487 100644 --- a/doc/build/gcc.rst +++ b/doc/build/gcc.rst @@ -152,6 +152,23 @@ of dtc is new enough. It also makes sure that pylibfdt is present, if needed Note that the :doc:`tools` are always built with the included version of libfdt so it is not possible to build U-Boot tools with a system libfdt, at present. +Link-time optimisation (LTO) +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +U-Boot supports link-time optimisation which can reduce the size of the final +U-Boot binaries, particularly with SPL. + +At present this can be enabled by ARM boards by adding `CONFIG_LTO=y` into the +defconfig file. Other architectures are not supported. LTO is enabled by default +for sandbox. + +This does incur a link-time penalty of several seconds. For faster incremental +builds during development, you can disable it by setting `NO_LTO` to `1`. + +.. code-block:: bash + + NO_LTO=1 make + Other build targets ~~~~~~~~~~~~~~~~~~~ diff --git a/doc/develop/cyclic.rst b/doc/develop/cyclic.rst new file mode 100644 index 00000000000..43bedacb9f8 --- /dev/null +++ b/doc/develop/cyclic.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Cyclic functions +================ + +The cyclic function execution infrastruture provides a way to periodically +execute code, e.g. every 100ms. Examples for such functions might be LED +blinking etc. The functions that are hooked into this cyclic list should +be small timewise as otherwise the execution of the other code that relies +on a high frequent polling (e.g. UART rx char ready check) might be +delayed too much. To detect cyclic functions with a too long execution +time, the Kconfig option `CONFIG_CYCLIC_MAX_CPU_TIME_US` is introduced, +which configures the max allowed time for such a cyclic function. If it's +execution time exceeds this time, this cyclic function will get removed +from the cyclic list. + +Registering a cyclic function +----------------------------- + +To register a cyclic function, use something like this:: + + static void cyclic_demo(void *ctx) + { + /* Just a small dummy delay here */ + udelay(10); + } + + int board_init(void) + { + struct cyclic_info *cyclic; + + /* Register demo cyclic function */ + cyclic = cyclic_register(cyclic_demo, 10 * 1000, "cyclic_demo", NULL); + if (!cyclic) + printf("Registering of cyclic_demo failed\n"); + + return 0; + } + +This will register the function `cyclic_demo()` to be periodically +executed all 10ms. + +How is this cyclic functionality integrated / executed? +-------------------------------------------------------- + +The cyclic infrastructure integrates the main function responsible for +calling all registered cyclic functions cyclic_run() into the common +WATCHDOG_RESET macro. This guarantees that cyclic_run() is executed +very often, which is necessary for the cyclic functions to get scheduled +and executed at their configured periods. diff --git a/doc/develop/driver-model/migration.rst b/doc/develop/driver-model/migration.rst index 5a604369258..742fea5515c 100644 --- a/doc/develop/driver-model/migration.rst +++ b/doc/develop/driver-model/migration.rst @@ -57,7 +57,7 @@ In concert with maintainers migrating their block device usage to the appropriate DM driver, CONFIG_BLK needs to be set as well. The final deadline here coincides with the final deadline for migration of the various block subsystems. At this point we will be able to audit and correct the logic in -Kconfig around using CONFIG_PARTITIONS and CONFIG_HAVE_BLOCK_DEVICE and make +Kconfig around using CONFIG_PARTITIONS and CONFIG_SPL_LEGACY_BLOCK and make use of CONFIG_BLK / CONFIG_SPL_BLK as needed. CONFIG_DM_SPI / CONFIG_DM_SPI_FLASH diff --git a/doc/develop/index.rst b/doc/develop/index.rst index 72332f7da6d..5934d9ffb11 100644 --- a/doc/develop/index.rst +++ b/doc/develop/index.rst @@ -28,6 +28,7 @@ Implementation ci_testing commands config_binding + cyclic devicetree/index distro driver-model/index diff --git a/doc/develop/py_testing.rst b/doc/develop/py_testing.rst index 06f919609b5..92fbd227219 100644 --- a/doc/develop/py_testing.rst +++ b/doc/develop/py_testing.rst @@ -121,31 +121,36 @@ more options. Running tests in parallel ~~~~~~~~~~~~~~~~~~~~~~~~~ -Note: This does not fully work yet and is documented only so you can try to -fix the problems. +Note: Not all tests can run in parallel at present, so the usual approach is +to just run those that can. First install support for parallel tests:: + sudo apt install python3-pytest-xdist + +or::: + pip3 install pytest-xdist -Then build sandbox in a suitable build directory. It is not possible to use -the --build flag with xdist. +Then run the tests in parallel using the -n flag:: -Finally, run the tests in parallel using the -n flag:: + test/py/test.py -B sandbox --build --build-dir /tmp/b/sandbox -q -k \ + 'not slow and not bootstd and not spi_flash' -n16 - # build sandbox first, in a suitable build directory. It is not possible - # to use the --build flag with -n - test/py/test.py -B sandbox --build-dir /tmp/b/sandbox -q -k 'not slow' -n32 +You can also use `make pcheck` to run all tests in parallel. This uses a maximum +of 16 threads, since the setup time is significant and there are under 1000 +tests. -At least the following non-slow tests are known to fail: +Note that the `test-log.html` output does not work correctly at present with +parallel testing. All the threads write to it at once, so it is garbled. -- test_fit_ecdsa -- test_bind_unbind_with_uclass -- ut_dm_spi_flash -- test_gpt_rename_partition -- test_gpt_swap_partitions -- test_pinmux_status -- test_sqfs_load +Note that the `tools/` tests still run each tool's tests once after the other, +although within that, they do run in parallel. So for example, the buildman +tests run in parallel, then the binman tests run in parallel. There would be a +significant advantage to running them all in parallel together, but that would +require a large amount of refactoring, e.g. with more use of pytest fixtures. +The code-coverage tests are omitted since they cannot run in parallel due to a +Python limitation. Testing under a debugger diff --git a/doc/develop/testing.rst b/doc/develop/testing.rst index 1abe4d7f0f0..5afeb42f696 100644 --- a/doc/develop/testing.rst +++ b/doc/develop/testing.rst @@ -28,8 +28,12 @@ run. Type this:: make tcheck +You can also run a selection tests in parallel with:: + + make pcheck + All of the above use the test/run script with a paremeter to select which tests -are run. +are run. See :doc:`py_testing` for more information. Sandbox diff --git a/doc/develop/tests_sandbox.rst b/doc/develop/tests_sandbox.rst index 40cf8ecdd7f..8e42a32afb9 100644 --- a/doc/develop/tests_sandbox.rst +++ b/doc/develop/tests_sandbox.rst @@ -119,6 +119,30 @@ You can easily use gdb on these tests, without needing --gdbserver:: You can then single-step and look at variables as needed. +Running tests multiple times +---------------------------- + +Some tests can have race conditions which are hard to detect on a single +one. It is possible to run each individual test multiple times, before moving +to the next test, with the '-r' flag. + +This is most useful when running a single test, since running all tests +multiple times can take a while. + +For example:: + + => ut dm -r1000 dm_test_rtc_set_get + ... + Test: dm_test_rtc_set_get: rtc.c (flat tree) + Test: dm_test_rtc_set_get: rtc.c + test/dm/rtc.c:257, dm_test_rtc_reset(): old_base_time == base_time: Expected 0x62e7453c (1659323708), got 0x62e7453d (1659323709) + Test: dm_test_rtc_set_get: rtc.c (flat tree) + Test: dm_test_rtc_set_get: rtc.c + Test: dm_test_rtc_set_get: rtc.c (flat tree) + ... + Test dm_test_rtc_reset failed 3 times + + Running sandbox_spl tests directly ---------------------------------- diff --git a/doc/develop/uefi/uefi.rst b/doc/develop/uefi/uefi.rst index 941e427093f..cd847069530 100644 --- a/doc/develop/uefi/uefi.rst +++ b/doc/develop/uefi/uefi.rst @@ -748,7 +748,7 @@ UEFI block IO driver The UEFI block IO driver supports devices exposing the EFI_BLOCK_IO_PROTOCOL. When connected it creates a new U-Boot block IO device with interface type -IF_TYPE_EFI_LOADER, adds child controllers mapping the partitions, and installs +UCLASS_EFI_LOADER, adds child controllers mapping the partitions, and installs the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL on these. This can be used together with the software iPXE to boot from iSCSI network drives [4]. diff --git a/doc/device-tree-bindings/pmic/pm8916.txt b/doc/device-tree-bindings/pmic/pm8916.txt deleted file mode 100644 index 15c598b8c4c..00000000000 --- a/doc/device-tree-bindings/pmic/pm8916.txt +++ /dev/null @@ -1,18 +0,0 @@ -Qualcomm pm8916 PMIC - -This PMIC is connected using SPMI bus so should be child of SPMI bus controller. - -Required properties: -- compatible: "qcom,spmi-pmic"; -- reg: SPMI Slave ID, size (ignored) -- #address-cells: 0x1 (peripheral ID) -- #size-cells: 0x1 (size of peripheral register space) - -Example: - -pm8916@0 { - compatible = "qcom,spmi-pmic"; - reg = <0x0 0x1>; - #address-cells = <0x1>; - #size-cells = <0x1>; -}; diff --git a/doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt b/doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt new file mode 100644 index 00000000000..eb78e3ae770 --- /dev/null +++ b/doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt @@ -0,0 +1,94 @@ + Qualcomm SPMI PMICs multi-function device bindings + +The Qualcomm SPMI series presently includes PM8941, PM8841 and PMA8084 +PMICs. These PMICs use a QPNP scheme through SPMI interface. +QPNP is effectively a partitioning scheme for dividing the SPMI extended +register space up into logical pieces, and set of fixed register +locations/definitions within these regions, with some of these regions +specifically used for interrupt handling. + +The QPNP PMICs are used with the Qualcomm Snapdragon series SoCs, and are +interfaced to the chip via the SPMI (System Power Management Interface) bus. +Support for multiple independent functions are implemented by splitting the +16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes +each. A function can consume one or more of these fixed-size register regions. + +Required properties: +- compatible: Should contain one of: + "qcom,pm660", + "qcom,pm660l", + "qcom,pm7325", + "qcom,pm8004", + "qcom,pm8005", + "qcom,pm8019", + "qcom,pm8028", + "qcom,pm8110", + "qcom,pm8150", + "qcom,pm8150b", + "qcom,pm8150c", + "qcom,pm8150l", + "qcom,pm8226", + "qcom,pm8350c", + "qcom,pm8841", + "qcom,pm8901", + "qcom,pm8909", + "qcom,pm8916", + "qcom,pm8941", + "qcom,pm8950", + "qcom,pm8953", + "qcom,pm8994", + "qcom,pm8998", + "qcom,pma8084", + "qcom,pmd9635", + "qcom,pmi8950", + "qcom,pmi8962", + "qcom,pmi8994", + "qcom,pmi8998", + "qcom,pmk8002", + "qcom,pmk8350", + "qcom,pmr735a", + "qcom,smb2351", + or generalized "qcom,spmi-pmic". +- reg: Specifies the SPMI USID slave address for this device. + For more information see: + Documentation/devicetree/bindings/spmi/spmi.yaml + +Required properties for peripheral child nodes: +- compatible: Should contain "qcom,xxx", where "xxx" is a peripheral name. + +Optional properties for peripheral child nodes: +- interrupts: Interrupts are specified as a 4-tuple. For more information + see: + Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml +- interrupt-names: Corresponding interrupt name to the interrupts property + +Each child node of SPMI slave id represents a function of the PMIC. In the +example below the rtc device node represents a peripheral of pm8941 +SID = 0. The regulator device node represents a peripheral of pm8941 SID = 1. + +Example: + + spmi { + compatible = "qcom,spmi-pmic-arb"; + + pm8941@0 { + compatible = "qcom,pm8941", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + + rtc { + compatible = "qcom,rtc"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "alarm"; + }; + }; + + pm8941@1 { + compatible = "qcom,pm8941", "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + + regulator { + compatible = "qcom,regulator"; + regulator-name = "8941_boost"; + }; + }; + }; diff --git a/doc/usage/cmd/bootmenu.rst b/doc/usage/cmd/bootmenu.rst index 9430f8c9aa1..cb3c8d2f93c 100644 --- a/doc/usage/cmd/bootmenu.rst +++ b/doc/usage/cmd/bootmenu.rst @@ -4,6 +4,15 @@ bootmenu command ================ +Synopsis +-------- +:: + + bootmenu [delay] + +Description +----------- + The "bootmenu" command uses U-Boot menu interfaces and provides a simple mechanism for creating menus with different boot items. The cursor keys "Up" and "Down" are used for navigation through @@ -79,6 +88,55 @@ The above example will be rendered as below:: The selected menu entry will be highlighted - it will have inverted background and text colors. +UEFI boot variable enumeration +'''''''''''''''''''''''''''''' +If enabled, the bootmenu command will automatically generate and add +UEFI-related boot menu entries for the following items. + + * possible bootable media with default file names + * user-defined UEFI boot options + +The bootmenu automatically enumerates the possible bootable +media devices supporting EFI_SIMPLE_FILE_SYSTEM_PROTOCOL. +This auto generated entry is named as "<interface> <devnum>:<part>" format. +(e.g. "usb 0:1") + +The bootmenu displays the UEFI-related menu entries in order of "BootOrder". +When the user selects the UEFI boot menu entry, the bootmenu sets +the selected boot variable index to "BootNext" without non-volatile attribute, +then call the uefi boot manager with the command "bootefi bootmgr". + +Example bootmenu is as below:: + + *** U-Boot Boot Menu *** + + mmc 0:1 + mmc 0:2 + debian + nvme 0:1 + ubuntu + nvme 0:2 + usb 0:2 + U-Boot console + +Default behavior when user exits from the bootmenu +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +User can exit from bootmenu by selecting the last entry +"U-Boot console"/"Quit" or ESC/CTRL+C key. + +When the CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE is disabled, +user exits from the bootmenu and returns to the U-Boot console. + +When the CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE is enabled, user can not +enter the U-Boot console. When the user exits from the bootmenu, +the bootmenu invokes the following default behavior. + + * if CONFIG_CMD_BOOTEFI_BOOTMGR is enabled, execute "bootefi bootmgr" command + * "bootefi bootmgr" fails or is not enabled, then execute "run bootcmd" command. + +Configuration +------------- + The "bootmenu" command is enabled by:: CONFIG_CMD_BOOTMENU=y @@ -88,3 +146,19 @@ To run the bootmenu at startup add these additional settings:: CONFIG_AUTOBOOT_KEYED=y CONFIG_BOOTDELAY=30 CONFIG_AUTOBOOT_MENU_SHOW=y + +UEFI boot variable enumeration is enabled by:: + + CONFIG_CMD_BOOTEFI_BOOTMGR=y + +To improve the product security, entering U-Boot console from bootmenu +can be disabled by:: + + CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE=y + +To scan the discoverable devices connected to the buses such as +USB and PCIe prior to bootmenu showing up, CONFIG_PREBOOT can be +used to run the command before showing the bootmenu, i.e.:: + + CONFIG_USE_PREBOOT=y + CONFIG_PREBOOT="pci enum; usb start; scsi scan; nvme scan; virtio scan" diff --git a/doc/usage/cmd/cyclic.rst b/doc/usage/cmd/cyclic.rst new file mode 100644 index 00000000000..3085cc7204c --- /dev/null +++ b/doc/usage/cmd/cyclic.rst @@ -0,0 +1,45 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +cyclic command +============== + +Synopsis +-------- + +:: + + cyclic list + +Description +----------- + +The cyclic list command provides a list of the currently registered +cyclic functions. + +This shows the following information: + +Function + Function name + +cpu-time + Total time spent in this cyclic function. + +Frequency + Frequency of execution of this function, e.g. 100 times/s for a + pediod of 10ms. + + +See :doc:`../../develop/cyclic` for more information on cyclic functions. + +Example +------- + +:: + + => cyclic list + function: cyclic_demo, cpu-time: 52906 us, frequency: 99.20 times/s + +Configuration +------------- + +The cyclic command is only available if CONFIG_CMD_CYCLIC=y. diff --git a/doc/usage/cmd/eficonfig.rst b/doc/usage/cmd/eficonfig.rst new file mode 100644 index 00000000000..340ebc80db8 --- /dev/null +++ b/doc/usage/cmd/eficonfig.rst @@ -0,0 +1,71 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. (C) Copyright 2022, Masahisa Kojima <masahisa.kojima@linaro.org> + +eficonfig command +================= + +Synopsis +-------- +:: + + eficonfig + +Description +----------- + +The "eficonfig" command uses U-Boot menu interface and provides +a menu-driven UEFI variable maintenance feature. +The "eficonfig" has the following menu entries. + +Add Boot Option + Add new UEFI Boot Option. + User can edit description, file path, and optional_data. + +Edit Boot Option + Edit the existing UEFI Boot Option + User can edit description, file path, and optional_data. + +Change Boot Order + Change the order of UEFI BootOrder variable. + +Delete Boot Option + Delete the UEFI Boot Option + +Configuration +------------- + +The "eficonfig" command is enabled by:: + + CONFIG_CMD_EFICONFIG=y + +If CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE is enabled, user can not enter +U-Boot console. In this case, bootmenu can be used to invoke "eficonfig":: + + CONFIG_USE_PREBOOT=y + CONFIG_PREBOOT="setenv bootmenu_0 UEFI Maintenance Menu=eficonfig" + +How to boot the system with newly added UEFI Boot Option +'''''''''''''''''''''''''''''''''''''''''''''''''''''''' + +"eficonfig" command is responsible for configuring the UEFI variables, +not directly handle the system boot. +The new Boot Option added by "eficonfig" is appended at the last entry +of UEFI BootOrder variable, user may want to change the boot order +through "Change Boot Order". +If the bootmenu is enabled, CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE is enabled, +and "eficonfig" is configured as preboot command, the newly added Boot Options +are enumerated in the bootmenu when user exits from the eficonfig menu. +User may select the entry in the bootmenu to boot the system, or follow +the U-Boot configuration the system already has. + +Auto boot with the UEFI Boot Option +''''''''''''''''''''''''''''''''''' + +To do auto boot according to the UEFI BootOrder variable, +add "bootefi bootmgr" entry as a default or first bootmenu entry:: + + CONFIG_PREBOOT="setenv bootmenu_0 UEFI Boot Manager=bootefi bootmgr; setenv bootmenu_1 UEFI Maintenance Menu=eficonfig" + +See also +-------- +* :doc:`bootmenu<bootmenu>` provides a simple mechanism for creating menus with different boot items diff --git a/doc/usage/cmd/loady.rst b/doc/usage/cmd/loady.rst index 2819cc72aef..718af6e128d 100644 --- a/doc/usage/cmd/loady.rst +++ b/doc/usage/cmd/loady.rst @@ -61,6 +61,13 @@ Configuration The command is only available if CONFIG_CMD_LOADB=y. +Initial timeout in seconds while waiting for transfer is configured by +config option CMD_LOADXY_TIMEOUT or by env variable $loadxy_timeout. +Setting it to 0 means infinite timeout. + +Transfer can be cancelled by pressing 3 times <CTRL+C> after two seconds +of inactivity on terminal. + Return value ------------ diff --git a/doc/usage/cmd/pause.rst b/doc/usage/cmd/pause.rst new file mode 100644 index 00000000000..c79e399c020 --- /dev/null +++ b/doc/usage/cmd/pause.rst @@ -0,0 +1,53 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later: + +pause command +============= + +Synopsis +-------- + +:: + + pause [prompt] + + +Description +----------- + +The pause command delays execution waiting for any user input. + +It can accept a single parameter to change the prompt message. + +Examples +-------- + +Using with the default prompt: + +:: + + => pause + Press any key to continue... + + +Using with a custom prompt: + +:: + + => pause 'Prompt for pause...' + Prompt for pause... + +Note that complex prompts require proper quoting: + +:: + + => pause Prompt for pause... + pause - delay until user input + + Usage: + pause [prompt] - Wait until users presses any key. [prompt] can be used to customize the message. + +Return value +------------ + +The return value $? is always set to 0 (true), unless invoked in an invalid +manner. diff --git a/doc/usage/index.rst b/doc/usage/index.rst index f1beeec59c9..0fda121026e 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -33,8 +33,10 @@ Shell commands cmd/bootz cmd/cbsysinfo cmd/conitrace + cmd/cyclic cmd/dm cmd/echo + cmd/eficonfig cmd/env cmd/event cmd/exception @@ -52,6 +54,7 @@ Shell commands cmd/mbr cmd/md cmd/mmc + cmd/pause cmd/pinmux cmd/printenv cmd/pstore diff --git a/drivers/Makefile b/drivers/Makefile index eba9940231f..9d9f69a3c9a 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -59,7 +59,8 @@ obj-$(CONFIG_SPL_WATCHDOG) += watchdog/ obj-$(CONFIG_SPL_USB_HOST) += usb/host/ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/ obj-$(CONFIG_SPL_SATA) += ata/ scsi/ -obj-$(CONFIG_HAVE_BLOCK_DEVICE) += block/ +obj-$(CONFIG_SPL_LEGACY_BLOCK) += block/ +obj-$(CONFIG_SPL_BLK) += block/ obj-$(CONFIG_SPL_THERMAL) += thermal/ endif diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index cd6060d5110..a063b221cd1 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -9,8 +9,6 @@ config AHCI config SATA bool "Support SATA controllers" - depends on BLK - select HAVE_BLOCK_DEVICE help This enables support for SATA (Serial Advanced Technology Attachment), a serial bus standard for connecting to hard drives and diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c index 1a2c3c2fe70..167b5a395f5 100644 --- a/drivers/ata/dwc_ahsata.c +++ b/drivers/ata/dwc_ahsata.c @@ -880,7 +880,7 @@ int dwc_ahsata_scan(struct udevice *dev) device_find_first_child(dev, &blk); if (!blk) { ret = blk_create_devicef(dev, "dwc_ahsata_blk", "blk", - IF_TYPE_SATA, -1, 512, 0, &blk); + UCLASS_AHCI, -1, 512, 0, &blk); if (ret) { debug("Can't create device\n"); return ret; diff --git a/drivers/ata/fsl_sata.c b/drivers/ata/fsl_sata.c index 6db4247368e..972101b29ce 100644 --- a/drivers/ata/fsl_sata.c +++ b/drivers/ata/fsl_sata.c @@ -888,7 +888,7 @@ static int fsl_ata_probe(struct udevice *dev) for (i = 0; i < nr_ports; i++) { snprintf(sata_name, sizeof(sata_name), "fsl_sata%d", i); ret = blk_create_devicef(dev, "sata_fsl_blk", sata_name, - IF_TYPE_SATA, -1, 512, 0, &blk); + UCLASS_AHCI, -1, 512, 0, &blk); if (ret) { debug("Can't create device\n"); return ret; diff --git a/drivers/ata/sata.c b/drivers/ata/sata.c index 0e6c8cdd422..604c721cfdc 100644 --- a/drivers/ata/sata.c +++ b/drivers/ata/sata.c @@ -79,7 +79,7 @@ int __sata_initialize(void) for (i = 0; i < CONFIG_SYS_SATA_MAX_DEVICE; i++) { memset(&sata_dev_desc[i], 0, sizeof(struct blk_desc)); - sata_dev_desc[i].if_type = IF_TYPE_SATA; + sata_dev_desc[i].if_type = UCLASS_AHCI; sata_dev_desc[i].devnum = i; sata_dev_desc[i].part_type = PART_TYPE_UNKNOWN; sata_dev_desc[i].type = DEV_TYPE_HARDDISK; diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index a187796dfcd..18c7a66db1b 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c @@ -1076,7 +1076,7 @@ static int sata_mv_probe(struct udevice *dev) for (i = 0; i < nr_ports; i++) { ret = blk_create_devicef(dev, "sata_mv_blk", "blk", - IF_TYPE_SATA, -1, 512, 0, &blk); + UCLASS_AHCI, -1, 512, 0, &blk); if (ret) { debug("Can't create device\n"); continue; diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c index 70651545722..b5e150d568b 100644 --- a/drivers/ata/sata_sil.c +++ b/drivers/ata/sata_sil.c @@ -730,7 +730,7 @@ static int sil_pci_probe(struct udevice *dev) for (i = sata_info.portbase; i < sata_info.maxport; i++) { snprintf(sata_name, sizeof(sata_name), "sil_sata%d", i); ret = blk_create_devicef(dev, "sata_sil_blk", sata_name, - IF_TYPE_SATA, -1, 512, 0, &blk); + UCLASS_AHCI, -1, 512, 0, &blk); if (ret) { debug("Can't create device\n"); return ret; diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig index b5b482086af..707e2bcd238 100644 --- a/drivers/block/Kconfig +++ b/drivers/block/Kconfig @@ -1,7 +1,8 @@ config BLK - bool "Support block devices" + bool # "Support block devices" depends on DM - default y if DM_MMC || DM_USB + default y if MMC || USB || SCSI || NVME || IDE || AHCI || SATA + default y if EFI_MEDIA || VIRTIO_BLK || PVBLOCK help Enable support for block devices, such as SCSI, MMC and USB flash sticks. These provide a block-level interface which permits @@ -10,10 +11,16 @@ config BLK be partitioned into several areas, called 'partitions' in U-Boot. A filesystem can be placed in each partition. -config HAVE_BLOCK_DEVICE - bool "Enable Legacy Block Device" +config SPL_LEGACY_BLOCK + bool # "Enable Legacy Block Device" + depends on SPL && !DM_SPL + default y if SPL_MMC || SPL_USB_STORAGE || SCSI || NVME || IDE + default y if SPL_AHCI_PCI help - Some devices require block support whether or not DM is enabled + Some devices require block support whether or not DM is enabled. This + is only supported in SPL. With this, the blk uclass is not used, but + instead a legacy implementation of block devices is used, with all + devices consisting of 'struct blk_desc' records. config SPL_BLK bool "Support block devices in SPL" @@ -108,7 +115,6 @@ endif # EFI_MEDIA config IDE bool "Support IDE controllers" - select HAVE_BLOCK_DEVICE help Enables support for IDE (Integrated Drive Electronics) hard drives. This allows access to raw blocks and filesystems on an IDE drive @@ -221,7 +227,6 @@ endif # IDE config LBA48 bool "Enable LBA support for disks larger than 137GB" - depends on HAVE_BLOCK_DEVICE help Set this to enable support for disks larger than 137GB. Also look at CONFIG_SYS_64BIT_LBA. Without both of these, LBA48 @@ -230,7 +235,6 @@ config LBA48 config SYS_64BIT_LBA bool "Enable 64bit number of blocks on a block device" - depends on HAVE_BLOCK_DEVICE help Make the block subsystem use 64bit sector addresses, rather than the default of 32bit. diff --git a/drivers/block/Makefile b/drivers/block/Makefile index b221a7c6eea..f48d3e12140 100644 --- a/drivers/block/Makefile +++ b/drivers/block/Makefile @@ -6,7 +6,7 @@ obj-$(CONFIG_$(SPL_)BLK) += blk-uclass.o ifndef CONFIG_$(SPL_)BLK -obj-$(CONFIG_HAVE_BLOCK_DEVICE) += blk_legacy.o +obj-$(CONFIG_SPL_LEGACY_BLOCK) += blk_legacy.o endif ifndef CONFIG_SPL_BUILD diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c index 21c5209bb63..a9a85aa37f3 100644 --- a/drivers/block/blk-uclass.c +++ b/drivers/block/blk-uclass.c @@ -17,64 +17,73 @@ #include <dm/uclass-internal.h> #include <linux/err.h> -static const char *if_typename_str[IF_TYPE_COUNT] = { - [IF_TYPE_IDE] = "ide", - [IF_TYPE_SCSI] = "scsi", - [IF_TYPE_ATAPI] = "atapi", - [IF_TYPE_USB] = "usb", - [IF_TYPE_DOC] = "doc", - [IF_TYPE_MMC] = "mmc", - [IF_TYPE_SD] = "sd", - [IF_TYPE_SATA] = "sata", - [IF_TYPE_HOST] = "host", - [IF_TYPE_NVME] = "nvme", - [IF_TYPE_EFI_MEDIA] = "efi", - [IF_TYPE_EFI_LOADER] = "efiloader", - [IF_TYPE_VIRTIO] = "virtio", - [IF_TYPE_PVBLOCK] = "pvblock", -}; - -static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = { - [IF_TYPE_IDE] = UCLASS_IDE, - [IF_TYPE_SCSI] = UCLASS_SCSI, - [IF_TYPE_ATAPI] = UCLASS_INVALID, - [IF_TYPE_USB] = UCLASS_MASS_STORAGE, - [IF_TYPE_DOC] = UCLASS_INVALID, - [IF_TYPE_MMC] = UCLASS_MMC, - [IF_TYPE_SD] = UCLASS_INVALID, - [IF_TYPE_SATA] = UCLASS_AHCI, - [IF_TYPE_HOST] = UCLASS_ROOT, - [IF_TYPE_NVME] = UCLASS_NVME, - [IF_TYPE_EFI_MEDIA] = UCLASS_EFI_MEDIA, - [IF_TYPE_EFI_LOADER] = UCLASS_EFI_LOADER, - [IF_TYPE_VIRTIO] = UCLASS_VIRTIO, - [IF_TYPE_PVBLOCK] = UCLASS_PVBLOCK, +static struct { + enum uclass_id id; + const char *name; +} if_typename_str[] = { + { UCLASS_IDE, "ide" }, + { UCLASS_SCSI, "scsi" }, + { UCLASS_USB, "usb" }, + { UCLASS_MMC, "mmc" }, + { UCLASS_AHCI, "sata" }, + { UCLASS_ROOT, "host" }, + { UCLASS_NVME, "nvme" }, + { UCLASS_EFI_MEDIA, "efi" }, + { UCLASS_EFI_LOADER, "efiloader" }, + { UCLASS_VIRTIO, "virtio" }, + { UCLASS_PVBLOCK, "pvblock" }, }; -static enum if_type if_typename_to_iftype(const char *if_typename) +static enum uclass_id if_typename_to_iftype(const char *if_typename) { int i; - for (i = 0; i < IF_TYPE_COUNT; i++) { - if (if_typename_str[i] && - !strcmp(if_typename, if_typename_str[i])) - return i; + for (i = 0; i < ARRAY_SIZE(if_typename_str); i++) { + if (!strcmp(if_typename, if_typename_str[i].name)) + return if_typename_str[i].id; } - return IF_TYPE_UNKNOWN; + return UCLASS_INVALID; } -static enum uclass_id if_type_to_uclass_id(enum if_type if_type) +static enum uclass_id if_type_to_uclass_id(enum uclass_id if_type) { - return if_type_uclass_id[if_type]; + /* + * This strange adjustment is used because we use UCLASS_MASS_STORAGE + * for USB storage devices, so need to return this as the uclass to + * use for USB. In fact USB_UCLASS is for USB controllers, not + * peripherals. + * + * The name of the UCLASS_MASS_STORAGE uclass driver is + * "usb_mass_storage", but we want to use "usb" in things like the + * 'part list' command and when showing interfaces. + * + * So for now we have this one-way conversion. + * + * The fix for this is possibly to: + * - rename UCLASS_MASS_STORAGE name to "usb" + * - rename UCLASS_USB name to "usb_ctlr" + * - use UCLASS_MASS_STORAGE instead of UCLASS_USB in if_typename_str + */ + if (if_type == UCLASS_USB) + return UCLASS_MASS_STORAGE; + + return if_type; } -const char *blk_get_if_type_name(enum if_type if_type) +const char *blk_get_if_type_name(enum uclass_id if_type) { - return if_typename_str[if_type]; + int i; + + for (i = 0; i < ARRAY_SIZE(if_typename_str); i++) { + if (if_typename_str[i].id == if_type) + return if_typename_str[i].name; + } + + return "(none)"; } -struct blk_desc *blk_get_devnum_by_type(enum if_type if_type, int devnum) +struct blk_desc *blk_get_devnum_by_type(enum uclass_id if_type, int devnum) { struct blk_desc *desc; struct udevice *dev; @@ -96,21 +105,21 @@ struct blk_desc *blk_get_devnum_by_type(enum if_type if_type, int devnum) struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, int devnum) { enum uclass_id uclass_id; - enum if_type if_type; + enum uclass_id type; struct udevice *dev; struct uclass *uc; int ret; - if_type = if_typename_to_iftype(if_typename); - if (if_type == IF_TYPE_UNKNOWN) { + type = if_typename_to_iftype(if_typename); + if (type == UCLASS_INVALID) { debug("%s: Unknown interface type '%s'\n", __func__, if_typename); return NULL; } - uclass_id = if_type_to_uclass_id(if_type); + uclass_id = if_type_to_uclass_id(type); if (uclass_id == UCLASS_INVALID) { debug("%s: Unknown uclass for interface type'\n", - if_typename_str[if_type]); + blk_get_if_type_name(type)); return NULL; } @@ -121,7 +130,7 @@ struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, int devnum) struct blk_desc *desc = dev_get_uclass_plat(dev); debug("%s: if_type=%d, devnum=%d: %s, %d, %d\n", __func__, - if_type, devnum, dev->name, desc->if_type, desc->devnum); + type, devnum, dev->name, desc->if_type, desc->devnum); if (desc->devnum != devnum) continue; @@ -176,7 +185,7 @@ struct blk_desc *blk_get_by_device(struct udevice *dev) * with a higher device number, -ENOENT if there is no such device but there * is one with a higher number, or other -ve on other error. */ -static int get_desc(enum if_type if_type, int devnum, struct blk_desc **descp) +static int get_desc(enum uclass_id if_type, int devnum, struct blk_desc **descp) { bool found_more = false; struct udevice *dev; @@ -209,7 +218,7 @@ static int get_desc(enum if_type if_type, int devnum, struct blk_desc **descp) return found_more ? -ENOENT : -ENODEV; } -int blk_select_hwpart_devnum(enum if_type if_type, int devnum, int hwpart) +int blk_select_hwpart_devnum(enum uclass_id if_type, int devnum, int hwpart) { struct udevice *dev; int ret; @@ -221,7 +230,7 @@ int blk_select_hwpart_devnum(enum if_type if_type, int devnum, int hwpart) return blk_select_hwpart(dev, hwpart); } -int blk_list_part(enum if_type if_type) +int blk_list_part(enum uclass_id if_type) { struct blk_desc *desc; int devnum, ok; @@ -246,7 +255,7 @@ int blk_list_part(enum if_type if_type) return 0; } -int blk_print_part_devnum(enum if_type if_type, int devnum) +int blk_print_part_devnum(enum uclass_id if_type, int devnum) { struct blk_desc *desc; int ret; @@ -261,7 +270,7 @@ int blk_print_part_devnum(enum if_type if_type, int devnum) return 0; } -void blk_list_devices(enum if_type if_type) +void blk_list_devices(enum uclass_id if_type) { struct blk_desc *desc; int ret; @@ -280,7 +289,7 @@ void blk_list_devices(enum if_type if_type) } } -int blk_print_device_num(enum if_type if_type, int devnum) +int blk_print_device_num(enum uclass_id if_type, int devnum) { struct blk_desc *desc; int ret; @@ -294,7 +303,7 @@ int blk_print_device_num(enum if_type if_type, int devnum) return 0; } -int blk_show_device(enum if_type if_type, int devnum) +int blk_show_device(enum uclass_id if_type, int devnum) { struct blk_desc *desc; int ret; @@ -315,7 +324,7 @@ int blk_show_device(enum if_type if_type, int devnum) return 0; } -ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start, +ulong blk_read_devnum(enum uclass_id if_type, int devnum, lbaint_t start, lbaint_t blkcnt, void *buffer) { struct blk_desc *desc; @@ -332,7 +341,7 @@ ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start, return n; } -ulong blk_write_devnum(enum if_type if_type, int devnum, lbaint_t start, +ulong blk_write_devnum(enum uclass_id if_type, int devnum, lbaint_t start, lbaint_t blkcnt, const void *buffer) { struct blk_desc *desc; @@ -516,7 +525,7 @@ const char *blk_get_devtype(struct udevice *dev) return uclass_get_name(device_get_uclass_id(parent)); }; -int blk_find_max_devnum(enum if_type if_type) +int blk_find_max_devnum(enum uclass_id if_type) { struct udevice *dev; int max_devnum = -ENODEV; @@ -536,7 +545,7 @@ int blk_find_max_devnum(enum if_type if_type) return max_devnum; } -int blk_next_free_devnum(enum if_type if_type) +int blk_next_free_devnum(enum uclass_id if_type) { int ret; @@ -622,7 +631,7 @@ int blk_count_devices(enum blk_flag_t flag) return count; } -static int blk_claim_devnum(enum if_type if_type, int devnum) +static int blk_claim_devnum(enum uclass_id if_type, int devnum) { struct udevice *dev; struct uclass *uc; @@ -743,8 +752,7 @@ int blk_unbind_all(int if_type) static int blk_post_probe(struct udevice *dev) { - if (CONFIG_IS_ENABLED(PARTITIONS) && - IS_ENABLED(CONFIG_HAVE_BLOCK_DEVICE)) { + if (CONFIG_IS_ENABLED(PARTITIONS) && blk_enabled()) { struct blk_desc *desc = dev_get_uclass_plat(dev); part_init(desc); diff --git a/drivers/block/blk_legacy.c b/drivers/block/blk_legacy.c index df9a3597545..8c6f9cb208e 100644 --- a/drivers/block/blk_legacy.c +++ b/drivers/block/blk_legacy.c @@ -39,7 +39,7 @@ static struct blk_driver *blk_driver_lookup_typename(const char *if_typename) return NULL; } -const char *blk_get_if_type_name(enum if_type if_type) +const char *blk_get_if_type_name(enum uclass_id if_type) { struct blk_driver *drv = blk_driver_lookup_type(if_type); @@ -70,8 +70,7 @@ static int get_desc(struct blk_driver *drv, int devnum, struct blk_desc **descp) return drv->get_dev(devnum, descp); } -#ifdef CONFIG_HAVE_BLOCK_DEVICE -int blk_list_part(enum if_type if_type) +int blk_list_part(enum uclass_id if_type) { struct blk_driver *drv; struct blk_desc *desc; @@ -98,7 +97,7 @@ int blk_list_part(enum if_type if_type) return 0; } -int blk_print_part_devnum(enum if_type if_type, int devnum) +int blk_print_part_devnum(enum uclass_id if_type, int devnum) { struct blk_driver *drv = blk_driver_lookup_type(if_type); struct blk_desc *desc; @@ -116,7 +115,7 @@ int blk_print_part_devnum(enum if_type if_type, int devnum) return 0; } -void blk_list_devices(enum if_type if_type) +void blk_list_devices(enum uclass_id if_type) { struct blk_driver *drv = blk_driver_lookup_type(if_type); struct blk_desc *desc; @@ -134,7 +133,7 @@ void blk_list_devices(enum if_type if_type) } } -int blk_print_device_num(enum if_type if_type, int devnum) +int blk_print_device_num(enum uclass_id if_type, int devnum) { struct blk_driver *drv = blk_driver_lookup_type(if_type); struct blk_desc *desc; @@ -151,7 +150,7 @@ int blk_print_device_num(enum if_type if_type, int devnum) return 0; } -int blk_show_device(enum if_type if_type, int devnum) +int blk_show_device(enum uclass_id if_type, int devnum) { struct blk_driver *drv = blk_driver_lookup_type(if_type); struct blk_desc *desc; @@ -174,9 +173,8 @@ int blk_show_device(enum if_type if_type, int devnum) return 0; } -#endif /* CONFIG_HAVE_BLOCK_DEVICE */ -struct blk_desc *blk_get_devnum_by_type(enum if_type if_type, int devnum) +struct blk_desc *blk_get_devnum_by_type(enum uclass_id if_type, int devnum) { struct blk_driver *drv = blk_driver_lookup_type(if_type); struct blk_desc *desc; @@ -216,7 +214,7 @@ struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, int devnum) return desc; } -ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start, +ulong blk_read_devnum(enum uclass_id if_type, int devnum, lbaint_t start, lbaint_t blkcnt, void *buffer) { struct blk_driver *drv = blk_driver_lookup_type(if_type); @@ -236,7 +234,7 @@ ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start, return n; } -ulong blk_write_devnum(enum if_type if_type, int devnum, lbaint_t start, +ulong blk_write_devnum(enum uclass_id if_type, int devnum, lbaint_t start, lbaint_t blkcnt, const void *buffer) { struct blk_driver *drv = blk_driver_lookup_type(if_type); @@ -251,7 +249,7 @@ ulong blk_write_devnum(enum if_type if_type, int devnum, lbaint_t start, return desc->block_write(desc, start, blkcnt, buffer); } -int blk_select_hwpart_devnum(enum if_type if_type, int devnum, int hwpart) +int blk_select_hwpart_devnum(enum uclass_id if_type, int devnum, int hwpart) { struct blk_driver *drv = blk_driver_lookup_type(if_type); struct blk_desc *desc; diff --git a/drivers/block/efi_blk.c b/drivers/block/efi_blk.c index 9d25ecbf37f..917a19f6025 100644 --- a/drivers/block/efi_blk.c +++ b/drivers/block/efi_blk.c @@ -94,7 +94,7 @@ static int efi_media_bind(struct udevice *dev) struct udevice *blk; int ret; - ret = blk_create_devicef(dev, "efi_block", "blk", IF_TYPE_EFI_MEDIA, + ret = blk_create_devicef(dev, "efi_block", "blk", UCLASS_EFI_MEDIA, dev_seq(dev), plat->blkio->media->block_size, plat->blkio->media->last_block, &blk); if (ret) { diff --git a/drivers/block/ide.c b/drivers/block/ide.c index 3270a9f032f..b8840d29c28 100644 --- a/drivers/block/ide.c +++ b/drivers/block/ide.c @@ -62,7 +62,7 @@ static void ide_reset(void) /* the reset signal shall be asserted for et least 25 us */ udelay(25); - WATCHDOG_RESET(); + schedule(); /* de-assert RESET signal */ ide_set_reset(0); @@ -525,8 +525,8 @@ static void ide_ident(struct blk_desc *dev_desc) { unsigned char c; hd_driveid_t iop; - #ifdef CONFIG_ATAPI + bool is_atapi = false; int retries = 0; #endif int device; @@ -537,7 +537,7 @@ static void ide_ident(struct blk_desc *dev_desc) /* Select device */ ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); - dev_desc->if_type = IF_TYPE_IDE; + dev_desc->if_type = UCLASS_IDE; #ifdef CONFIG_ATAPI retries = 0; @@ -550,7 +550,7 @@ static void ide_ident(struct blk_desc *dev_desc) (ide_inb(device, ATA_CYL_LOW) == 0x14) && (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) { /* ATAPI Signature found */ - dev_desc->if_type = IF_TYPE_ATAPI; + is_atapi = true; /* * Start Ident Command */ @@ -623,7 +623,7 @@ static void ide_ident(struct blk_desc *dev_desc) dev_desc->removable = 0; #ifdef CONFIG_ATAPI - if (dev_desc->if_type == IF_TYPE_ATAPI) { + if (is_atapi) { atapi_inquiry(dev_desc); return; } @@ -695,7 +695,7 @@ void ide_init(void) unsigned char c; int i, bus; - WATCHDOG_RESET(); + schedule(); /* ATAPI Drives seems to need a proper IDE Reset */ ide_reset(); @@ -745,14 +745,14 @@ void ide_init(void) puts("OK "); ide_bus_ok[bus] = 1; } - WATCHDOG_RESET(); + schedule(); } putc('\n'); for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) { ide_dev_desc[i].type = DEV_TYPE_UNKNOWN; - ide_dev_desc[i].if_type = IF_TYPE_IDE; + ide_dev_desc[i].if_type = UCLASS_IDE; ide_dev_desc[i].devnum = i; ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN; ide_dev_desc[i].blksz = 0; @@ -775,7 +775,7 @@ void ide_init(void) } #endif } - WATCHDOG_RESET(); + schedule(); #ifdef CONFIG_BLK struct udevice *dev; @@ -1110,7 +1110,7 @@ static int ide_probe(struct udevice *udev) if (!blksz) continue; ret = blk_create_devicef(udev, "ide_blk", name, - IF_TYPE_IDE, i, + UCLASS_IDE, i, blksz, size, &blk_dev); if (ret) return ret; @@ -1144,7 +1144,7 @@ UCLASS_DRIVER(ide) = { #else U_BOOT_LEGACY_BLK(ide) = { .if_typename = "ide", - .if_type = IF_TYPE_IDE, + .if_type = UCLASS_IDE, .max_devs = CONFIG_SYS_IDE_MAXDEVICE, .desc = ide_dev_desc, }; diff --git a/drivers/block/sandbox.c b/drivers/block/sandbox.c index 1388498a1d3..2de12e0a93e 100644 --- a/drivers/block/sandbox.c +++ b/drivers/block/sandbox.c @@ -98,7 +98,7 @@ int host_dev_bind(int devnum, char *filename, bool removable) int ret, fd; /* Remove and unbind the old device, if any */ - ret = blk_get_device(IF_TYPE_HOST, devnum, &dev); + ret = blk_get_device(UCLASS_ROOT, devnum, &dev); if (ret == 0) { ret = device_remove(dev, DM_REMOVE_NORMAL); if (ret) @@ -135,7 +135,7 @@ int host_dev_bind(int devnum, char *filename, bool removable) } } ret = blk_create_device(gd->dm_root, "sandbox_host_blk", str, - IF_TYPE_HOST, devnum, 512, + UCLASS_ROOT, devnum, 512, os_lseek(fd, 0, OS_SEEK_END) / 512, &dev); if (ret) goto err_file; @@ -150,7 +150,7 @@ int host_dev_bind(int devnum, char *filename, bool removable) goto err_file; } - desc = blk_get_devnum_by_type(IF_TYPE_HOST, devnum); + desc = blk_get_devnum_by_type(UCLASS_ROOT, devnum); desc->removable = removable; snprintf(desc->vendor, BLK_VEN_SIZE, "U-Boot"); snprintf(desc->product, BLK_PRD_SIZE, "hostfile"); @@ -192,7 +192,7 @@ int host_dev_bind(int dev, char *filename, bool removable) } struct blk_desc *blk_dev = &host_dev->blk_dev; - blk_dev->if_type = IF_TYPE_HOST; + blk_dev->if_type = UCLASS_ROOT; blk_dev->priv = host_dev; blk_dev->blksz = 512; blk_dev->lba = os_lseek(host_dev->fd, 0, OS_SEEK_END) / blk_dev->blksz; @@ -216,7 +216,7 @@ int host_get_dev_err(int devnum, struct blk_desc **blk_devp) struct udevice *dev; int ret; - ret = blk_get_device(IF_TYPE_HOST, devnum, &dev); + ret = blk_get_device(UCLASS_ROOT, devnum, &dev); if (ret) return ret; *blk_devp = dev_get_uclass_plat(dev); @@ -263,7 +263,7 @@ U_BOOT_DRIVER(sandbox_host_blk) = { #else U_BOOT_LEGACY_BLK(sandbox_host) = { .if_typename = "host", - .if_type = IF_TYPE_HOST, + .if_type = UCLASS_ROOT, .max_devs = SANDBOX_HOST_MAX_DEVICES, .get_dev = host_get_dev_err, }; diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c index 623c6915b81..dc446ce9fb7 100644 --- a/drivers/clk/aspeed/clk_ast2500.c +++ b/drivers/clk/aspeed/clk_ast2500.c @@ -30,6 +30,12 @@ #define D2PLL_DEFAULT_RATE (250 * 1000 * 1000) +/* + * AXI/AHB clock selection, taken from Aspeed SDK + */ +#define SCU_HWSTRAP_AXIAHB_DIV_SHIFT 9 +#define SCU_HWSTRAP_AXIAHB_DIV_MASK (0x7 << SCU_HWSTRAP_AXIAHB_DIV_SHIFT) + DECLARE_GLOBAL_DATA_PTR; /* @@ -86,6 +92,20 @@ static ulong ast2500_get_clkin(struct ast2500_scu *scu) ? 25 * 1000 * 1000 : 24 * 1000 * 1000; } +static u32 ast2500_get_hclk(ulong clkin, struct ast2500_scu *scu) +{ + u32 hpll_reg = readl(&scu->h_pll_param); + ulong axi_div = 2; + u32 rate; + ulong ahb_div = 1 + ((readl(&scu->hwstrap) + & SCU_HWSTRAP_AXIAHB_DIV_MASK) + >> SCU_HWSTRAP_AXIAHB_DIV_SHIFT); + + rate = ast2500_get_hpll_rate(clkin, hpll_reg); + + return (rate / axi_div / ahb_div); +} + /** * Get current rate or uart clock * @@ -147,6 +167,9 @@ static ulong ast2500_clk_get_rate(struct clk *clk) rate = rate / apb_div; } break; + case ASPEED_CLK_AHB: + rate = ast2500_get_hclk(clkin, priv->scu); + break; case ASPEED_CLK_SDIO: { ulong apb_div = 4 + 4 * ((readl(&priv->scu->clk_sel1) diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c index a52f5a6b18b..df007e642bf 100644 --- a/drivers/core/of_access.c +++ b/drivers/core/of_access.c @@ -488,6 +488,44 @@ static void *of_find_property_value_of_size(const struct device_node *np, return prop->value; } +int of_read_u8(const struct device_node *np, const char *propname, u8 *outp) +{ + const u8 *val; + + debug("%s: %s: ", __func__, propname); + if (!np) + return -EINVAL; + val = of_find_property_value_of_size(np, propname, sizeof(*outp)); + if (IS_ERR(val)) { + debug("(not found)\n"); + return PTR_ERR(val); + } + + *outp = *val; + debug("%#x (%d)\n", *outp, *outp); + + return 0; +} + +int of_read_u16(const struct device_node *np, const char *propname, u16 *outp) +{ + const __be16 *val; + + debug("%s: %s: ", __func__, propname); + if (!np) + return -EINVAL; + val = of_find_property_value_of_size(np, propname, sizeof(*outp)); + if (IS_ERR(val)) { + debug("(not found)\n"); + return PTR_ERR(val); + } + + *outp = be16_to_cpup(val); + debug("%#x (%d)\n", *outp, *outp); + + return 0; +} + int of_read_u32(const struct device_node *np, const char *propname, u32 *outp) { return of_read_u32_index(np, propname, 0, outp); diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 45ea84e9fb8..42f3c09a513 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -31,6 +31,68 @@ bool ofnode_name_eq(ofnode node, const char *name) return (strlen(name) == len) && !strncmp(node_name, name, len); } +int ofnode_read_u8(ofnode node, const char *propname, u8 *outp) +{ + const u8 *cell; + int len; + + assert(ofnode_valid(node)); + debug("%s: %s: ", __func__, propname); + + if (ofnode_is_np(node)) + return of_read_u8(ofnode_to_np(node), propname, outp); + + cell = fdt_getprop(gd->fdt_blob, ofnode_to_offset(node), propname, + &len); + if (!cell || len < sizeof(*cell)) { + debug("(not found)\n"); + return -EINVAL; + } + *outp = *cell; + debug("%#x (%d)\n", *outp, *outp); + + return 0; +} + +u8 ofnode_read_u8_default(ofnode node, const char *propname, u8 def) +{ + assert(ofnode_valid(node)); + ofnode_read_u8(node, propname, &def); + + return def; +} + +int ofnode_read_u16(ofnode node, const char *propname, u16 *outp) +{ + const fdt16_t *cell; + int len; + + assert(ofnode_valid(node)); + debug("%s: %s: ", __func__, propname); + + if (ofnode_is_np(node)) + return of_read_u16(ofnode_to_np(node), propname, outp); + + cell = fdt_getprop(gd->fdt_blob, ofnode_to_offset(node), propname, + &len); + if (!cell || len < sizeof(*cell)) { + debug("(not found)\n"); + return -EINVAL; + } + *outp = be16_to_cpup(cell); + debug("%#x (%d)\n", *outp, *outp); + + return 0; +} + +u16 ofnode_read_u16_default(ofnode node, const char *propname, u16 def) +{ + assert(ofnode_valid(node)); + ofnode_read_u16(node, propname, &def); + + return def; +} + int ofnode_read_u32(ofnode node, const char *propname, u32 *outp) { return ofnode_read_u32_index(node, propname, 0, outp); diff --git a/drivers/core/read.c b/drivers/core/read.c index c73508d2760..07ab8ab41c6 100644 --- a/drivers/core/read.c +++ b/drivers/core/read.c @@ -13,6 +13,27 @@ #include <asm/io.h> #include <linux/ioport.h> +int dev_read_u8(const struct udevice *dev, const char *propname, u8 *outp) +{ + return ofnode_read_u8(dev_ofnode(dev), propname, outp); +} + +u8 dev_read_u8_default(const struct udevice *dev, const char *propname, u8 def) +{ + return ofnode_read_u8_default(dev_ofnode(dev), propname, def); +} + +int dev_read_u16(const struct udevice *dev, const char *propname, u16 *outp) +{ + return ofnode_read_u16(dev_ofnode(dev), propname, outp); +} + +u16 dev_read_u16_default(const struct udevice *dev, const char *propname, + u16 def) +{ + return ofnode_read_u16_default(dev_ofnode(dev), propname, def); +} + int dev_read_u32(const struct udevice *dev, const char *propname, u32 *outp) { return ofnode_read_u32(dev_ofnode(dev), propname, outp); diff --git a/drivers/cpu/microblaze_cpu.c b/drivers/cpu/microblaze_cpu.c index 969a1047e59..b9d07928223 100644 --- a/drivers/cpu/microblaze_cpu.c +++ b/drivers/cpu/microblaze_cpu.c @@ -97,8 +97,10 @@ static int microblaze_cpu_get_desc(const struct udevice *dev, char *buf, ret = snprintf(buf, size, "MicroBlaze @ %uMHz, Rev: %s, FPGA family: %s", cpu_freq_mhz, cpu_ver, fpga_family); + if (ret < 0) + return ret; - return 0; + return (ret >= size) ? -ENOSPC : 0; } static int microblaze_cpu_get_info(const struct udevice *dev, diff --git a/drivers/crypto/aspeed/aspeed_hace.c b/drivers/crypto/aspeed/aspeed_hace.c index 1178cc6a769..a1b0b9f564b 100644 --- a/drivers/crypto/aspeed/aspeed_hace.c +++ b/drivers/crypto/aspeed/aspeed_hace.c @@ -302,7 +302,7 @@ static int aspeed_hace_digest_wd(struct udevice *dev, enum HASH_ALGO algo, return rc; cur += chunk; - WATCHDOG_RESET(); + schedule(); } } else { rc = aspeed_hace_update(dev, ctx, ibuf, ilen); diff --git a/drivers/crypto/hash/hash_sw.c b/drivers/crypto/hash/hash_sw.c index fea9d126096..553c068010c 100644 --- a/drivers/crypto/hash/hash_sw.c +++ b/drivers/crypto/hash/hash_sw.c @@ -258,7 +258,7 @@ static int sw_hash_digest_wd(struct udevice *dev, enum HASH_ALGO algo, return rc; cur += chunk; - WATCHDOG_RESET(); + schedule(); } } else { rc = sw_hash_update(dev, ctx, ibuf, ilen); diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c index 4a8f8dea1c4..8ef5fa4c481 100644 --- a/drivers/ddr/altera/sdram_arria10.c +++ b/drivers/ddr/altera/sdram_arria10.c @@ -671,7 +671,7 @@ static int of_sdram_firewall_setup(const void *blob) int ddr_calibration_sequence(void) { - WATCHDOG_RESET(); + schedule(); /* Check to see if SDRAM cal was success */ if (sdram_startup()) { @@ -681,7 +681,7 @@ int ddr_calibration_sequence(void) puts("DDRCAL: Success\n"); - WATCHDOG_RESET(); + schedule(); /* initialize the MMR register */ sdram_mmr_init(); diff --git a/drivers/ddr/altera/sdram_n5x.c b/drivers/ddr/altera/sdram_n5x.c index 737a4e2ff18..d9039443b91 100644 --- a/drivers/ddr/altera/sdram_n5x.c +++ b/drivers/ddr/altera/sdram_n5x.c @@ -517,7 +517,7 @@ static int ensure_retry_procedure_complete(phys_addr_t umctl2_base) DDR4_CRCPARSTAT_CMD_IN_ERR_WINDOW; udelay(1); - WATCHDOG_RESET(); + schedule(); } return 0; @@ -1349,7 +1349,7 @@ static int ddr_post_handoff_config(phys_addr_t umctl2_base, } udelay(1); - WATCHDOG_RESET(); + schedule(); /* Polling until SDRAM entered normal operating mode */ value = readl(umctl2_base + DDR4_STAT_OFFSET) & diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c index 9b1710c1350..4716abfc9a8 100644 --- a/drivers/ddr/altera/sdram_soc64.c +++ b/drivers/ddr/altera/sdram_soc64.c @@ -161,7 +161,7 @@ void sdram_init_ecc_bits(struct bd_info *bd) sdram_clear_mem(start_addr, size_init); size -= size_init; start_addr += size_init; - WATCHDOG_RESET(); + schedule(); } bank++; diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c index a91da972d46..f5832083ba1 100644 --- a/drivers/dfu/dfu_mmc.c +++ b/drivers/dfu/dfu_mmc.c @@ -52,7 +52,7 @@ static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu, if (dfu->data.mmc.hw_partition >= 0) { part_num_bkp = mmc_get_blk_desc(mmc)->hwpart; - ret = blk_select_hwpart_devnum(IF_TYPE_MMC, + ret = blk_select_hwpart_devnum(UCLASS_MMC, dfu->data.mmc.dev_num, dfu->data.mmc.hw_partition); if (ret) @@ -77,14 +77,14 @@ static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu, if (n != blk_count) { pr_err("MMC operation failed"); if (dfu->data.mmc.hw_partition >= 0) - blk_select_hwpart_devnum(IF_TYPE_MMC, + blk_select_hwpart_devnum(UCLASS_MMC, dfu->data.mmc.dev_num, part_num_bkp); return -EIO; } if (dfu->data.mmc.hw_partition >= 0) { - ret = blk_select_hwpart_devnum(IF_TYPE_MMC, + ret = blk_select_hwpart_devnum(UCLASS_MMC, dfu->data.mmc.dev_num, part_num_bkp); if (ret) diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c index 0b6ba35b596..727e090e8ab 100644 --- a/drivers/firmware/ti_sci.c +++ b/drivers/firmware/ti_sci.c @@ -134,8 +134,11 @@ static struct ti_sci_xfer *ti_sci_setup_one_xfer(struct ti_sci_info *info, if (rx_message_size > info->desc->max_msg_size || tx_message_size > info->desc->max_msg_size || (rx_message_size > 0 && rx_message_size < sizeof(*hdr)) || - tx_message_size < sizeof(*hdr)) + tx_message_size < sizeof(*hdr)) { + dev_err(info->dev, "TI-SCI message transfer size not sane\n"); return ERR_PTR(-ERANGE); + } + info->seq = ~info->seq; xfer->tx_message.buf = buf; @@ -161,7 +164,7 @@ static struct ti_sci_xfer *ti_sci_setup_one_xfer(struct ti_sci_info *info, * return corresponding error, else if all goes well, * return 0. */ -static inline int ti_sci_get_response(struct ti_sci_info *info, +static int ti_sci_get_response(struct ti_sci_info *info, struct ti_sci_xfer *xfer, struct mbox_chan *chan) { @@ -209,13 +212,26 @@ static inline int ti_sci_get_response(struct ti_sci_info *info, } /** + * ti_sci_is_response_ack() - Generic ACK/NACK message checkup + * @r: pointer to response buffer + * + * Return: true if the response was an ACK, else returns false. + */ +static bool ti_sci_is_response_ack(void *r) +{ + struct ti_sci_msg_hdr *hdr = r; + + return hdr->flags & TI_SCI_FLAG_RESP_GENERIC_ACK ? true : false; +} + +/** * ti_sci_do_xfer() - Do one transfer * @info: Pointer to SCI entity information * @xfer: Transfer to initiate and wait for response * * Return: 0 if all went fine, else return appropriate error. */ -static inline int ti_sci_do_xfer(struct ti_sci_info *info, +static int ti_sci_do_xfer(struct ti_sci_info *info, struct ti_sci_xfer *xfer) { struct k3_sec_proxy_msg *msg = &xfer->tx_message; @@ -246,8 +262,13 @@ static inline int ti_sci_do_xfer(struct ti_sci_info *info, } /* Get response if requested */ - if (xfer->rx_len) + if (xfer->rx_len) { ret = ti_sci_get_response(info, xfer, &info->chan_rx); + if (!ti_sci_is_response_ack(xfer->tx_message.buf)) { + dev_err(info->dev, "Message not acknowledged"); + ret = -ENODEV; + } + } return ret; } @@ -282,15 +303,12 @@ static int ti_sci_cmd_get_revision(struct ti_sci_handle *handle) sizeof(*rev_info)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox communication fail %d\n", ret); + if (ret) return ret; - } rev_info = (struct ti_sci_msg_resp_version *)xfer->tx_message.buf; @@ -305,19 +323,6 @@ static int ti_sci_cmd_get_revision(struct ti_sci_handle *handle) } /** - * ti_sci_is_response_ack() - Generic ACK/NACK message checkup - * @r: pointer to response buffer - * - * Return: true if the response was an ACK, else returns false. - */ -static inline bool ti_sci_is_response_ack(void *r) -{ - struct ti_sci_msg_hdr *hdr = r; - - return hdr->flags & TI_SCI_FLAG_RESP_GENERIC_ACK ? true : false; -} - -/** * cmd_set_board_config_using_msg() - Common command to send board configuration * message * @handle: pointer to TI SCI handle @@ -348,7 +353,6 @@ static int cmd_set_board_config_using_msg(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.boardcfgp_high = (addr >> 32) & 0xffffffff; @@ -356,15 +360,8 @@ static int cmd_set_board_config_using_msg(const struct ti_sci_handle *handle, req.boardcfg_size = size; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } - - resp = (struct ti_sci_msg_hdr *)xfer->tx_message.buf; - - if (!ti_sci_is_response_ack(resp)) - return -ENODEV; return ret; } @@ -509,22 +506,14 @@ static int ti_sci_set_device_state(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.id = id; req.state = state; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } - - resp = (struct ti_sci_msg_hdr *)xfer->tx_message.buf; - - if (!ti_sci_is_response_ack(resp)) - return -ENODEV; if (state == MSG_DEVICE_SW_STATE_AUTO_OFF) ti_sci_delete_exclusive_dev(info, id); @@ -564,7 +553,6 @@ static int ti_sci_set_device_state_no_wait(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), 0); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.id = id; @@ -572,7 +560,7 @@ static int ti_sci_set_device_state_no_wait(const struct ti_sci_handle *handle, ret = ti_sci_do_xfer(info, xfer); if (ret) - dev_err(info->dev, "Mbox send fail %d\n", ret); + return ret; return ret; } @@ -613,20 +601,15 @@ static int ti_sci_get_device_state(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.id = id; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } resp = (struct ti_sci_msg_resp_get_device_state *)xfer->tx_message.buf; - if (!ti_sci_is_response_ack(resp)) - return -ENODEV; if (clcnt) *clcnt = resp->context_loss_count; @@ -901,22 +884,14 @@ static int ti_sci_cmd_set_device_resets(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.id = id; req.resets = reset_state; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } - - resp = (struct ti_sci_msg_hdr *)xfer->tx_message.buf; - - if (!ti_sci_is_response_ack(resp)) - return -ENODEV; return ret; } @@ -971,7 +946,6 @@ static int ti_sci_set_clock_state(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.dev_id = dev_id; @@ -979,15 +953,8 @@ static int ti_sci_set_clock_state(const struct ti_sci_handle *handle, req.request_state = state; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } - - resp = (struct ti_sci_msg_hdr *)xfer->tx_message.buf; - - if (!ti_sci_is_response_ack(resp)) - return -ENODEV; return ret; } @@ -1029,23 +996,17 @@ static int ti_sci_cmd_get_clock_state(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.dev_id = dev_id; req.clk_id = clk_id; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } resp = (struct ti_sci_msg_resp_get_clock_state *)xfer->tx_message.buf; - if (!ti_sci_is_response_ack(resp)) - return -ENODEV; - if (programmed_state) *programmed_state = resp->programmed_state; if (current_state) @@ -1245,7 +1206,6 @@ static int ti_sci_cmd_clk_set_parent(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.dev_id = dev_id; @@ -1253,15 +1213,8 @@ static int ti_sci_cmd_clk_set_parent(const struct ti_sci_handle *handle, req.parent_id = parent_id; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } - - resp = (struct ti_sci_msg_hdr *)xfer->tx_message.buf; - - if (!ti_sci_is_response_ack(resp)) - return -ENODEV; return ret; } @@ -1298,24 +1251,16 @@ static int ti_sci_cmd_clk_get_parent(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.dev_id = dev_id; req.clk_id = clk_id; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } - - resp = (struct ti_sci_msg_resp_get_clock_parent *)xfer->tx_message.buf; - if (!ti_sci_is_response_ack(resp)) - ret = -ENODEV; - else - *parent_id = resp->parent_id; + *parent_id = resp->parent_id; return ret; } @@ -1353,25 +1298,19 @@ static int ti_sci_cmd_clk_get_num_parents(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.dev_id = dev_id; req.clk_id = clk_id; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } resp = (struct ti_sci_msg_resp_get_clock_num_parents *) xfer->tx_message.buf; - if (!ti_sci_is_response_ack(resp)) - ret = -ENODEV; - else - *num_parents = resp->num_parents; + *num_parents = resp->num_parents; return ret; } @@ -1418,7 +1357,6 @@ static int ti_sci_cmd_clk_get_match_freq(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.dev_id = dev_id; @@ -1428,17 +1366,12 @@ static int ti_sci_cmd_clk_get_match_freq(const struct ti_sci_handle *handle, req.max_freq_hz = max_freq; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } resp = (struct ti_sci_msg_resp_query_clock_freq *)xfer->tx_message.buf; - if (!ti_sci_is_response_ack(resp)) - ret = -ENODEV; - else - *match_freq = resp->freq_hz; + *match_freq = resp->freq_hz; return ret; } @@ -1483,7 +1416,6 @@ static int ti_sci_cmd_clk_set_freq(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.dev_id = dev_id; @@ -1493,15 +1425,8 @@ static int ti_sci_cmd_clk_set_freq(const struct ti_sci_handle *handle, req.max_freq_hz = max_freq; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } - - resp = (struct ti_sci_msg_hdr *)xfer->tx_message.buf; - - if (!ti_sci_is_response_ack(resp)) - return -ENODEV; return ret; } @@ -1538,24 +1463,18 @@ static int ti_sci_cmd_clk_get_freq(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.dev_id = dev_id; req.clk_id = clk_id; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } resp = (struct ti_sci_msg_resp_get_clock_freq *)xfer->tx_message.buf; - if (!ti_sci_is_response_ack(resp)) - ret = -ENODEV; - else - *freq = resp->freq_hz; + *freq = resp->freq_hz; return ret; } @@ -1586,21 +1505,13 @@ static int ti_sci_cmd_core_reboot(const struct ti_sci_handle *handle) (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.domain = 0; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } - - resp = (struct ti_sci_msg_hdr *)xfer->tx_message.buf; - - if (!ti_sci_is_response_ack(resp)) - return -ENODEV; return ret; } @@ -1641,7 +1552,6 @@ static int ti_sci_get_resource_range(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } @@ -1650,15 +1560,11 @@ static int ti_sci_get_resource_range(const struct ti_sci_handle *handle, req.subtype = subtype & MSG_RM_RESOURCE_SUBTYPE_MASK; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) goto fail; - } resp = (struct ti_sci_msg_resp_get_resource_range *)xfer->tx_message.buf; - if (!ti_sci_is_response_ack(resp)) { - ret = -ENODEV; - } else if (!resp->range_start && !resp->range_num) { + if (!resp->range_start && !resp->range_num) { ret = -ENODEV; } else { *range_start = resp->range_start; @@ -1769,21 +1675,15 @@ static int ti_sci_cmd_query_msmc(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } resp = (struct ti_sci_msg_resp_query_msmc *)xfer->tx_message.buf; - if (!ti_sci_is_response_ack(resp)) - return -ENODEV; - *msmc_start = ((u64)resp->msmc_start_high << TISCI_ADDR_HIGH_SHIFT) | resp->msmc_start_low; *msmc_end = ((u64)resp->msmc_end_high << TISCI_ADDR_HIGH_SHIFT) | @@ -1820,21 +1720,13 @@ static int ti_sci_cmd_proc_request(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.processor_id = proc_id; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } - - resp = (struct ti_sci_msg_hdr *)xfer->tx_message.buf; - - if (!ti_sci_is_response_ack(resp)) - ret = -ENODEV; return ret; } @@ -1867,21 +1759,13 @@ static int ti_sci_cmd_proc_release(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.processor_id = proc_id; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } - - resp = (struct ti_sci_msg_hdr *)xfer->tx_message.buf; - - if (!ti_sci_is_response_ack(resp)) - ret = -ENODEV; return ret; } @@ -1917,22 +1801,14 @@ static int ti_sci_cmd_proc_handover(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.processor_id = proc_id; req.host_id = host_id; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } - - resp = (struct ti_sci_msg_hdr *)xfer->tx_message.buf; - - if (!ti_sci_is_response_ack(resp)) - ret = -ENODEV; return ret; } @@ -1970,7 +1846,6 @@ static int ti_sci_cmd_set_proc_boot_cfg(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.processor_id = proc_id; @@ -1981,15 +1856,8 @@ static int ti_sci_cmd_set_proc_boot_cfg(const struct ti_sci_handle *handle, req.config_flags_clear = config_flags_clear; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } - - resp = (struct ti_sci_msg_hdr *)xfer->tx_message.buf; - - if (!ti_sci_is_response_ack(resp)) - ret = -ENODEV; return ret; } @@ -2026,7 +1894,6 @@ static int ti_sci_cmd_set_proc_boot_ctrl(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.processor_id = proc_id; @@ -2034,15 +1901,8 @@ static int ti_sci_cmd_set_proc_boot_ctrl(const struct ti_sci_handle *handle, req.control_flags_clear = control_flags_clear; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } - - resp = (struct ti_sci_msg_hdr *)xfer->tx_message.buf; - - if (!ti_sci_is_response_ack(resp)) - ret = -ENODEV; return ret; } @@ -2080,7 +1940,6 @@ static int ti_sci_cmd_proc_auth_boot_image(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.cert_addr_low = *image_addr & TISCI_ADDR_LOW_MASK; @@ -2088,16 +1947,11 @@ static int ti_sci_cmd_proc_auth_boot_image(const struct ti_sci_handle *handle, TISCI_ADDR_HIGH_SHIFT; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } resp = (struct ti_sci_msg_resp_proc_auth_boot_image *)xfer->tx_message.buf; - if (!ti_sci_is_response_ack(resp)) - return -ENODEV; - *image_addr = (resp->image_addr_low & TISCI_ADDR_LOW_MASK) | (((u64)resp->image_addr_high << TISCI_ADDR_HIGH_SHIFT) & TISCI_ADDR_HIGH_MASK); @@ -2135,22 +1989,17 @@ static int ti_sci_cmd_get_proc_boot_status(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.processor_id = proc_id; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } resp = (struct ti_sci_msg_resp_get_proc_boot_status *) xfer->tx_message.buf; - if (!ti_sci_is_response_ack(resp)) - return -ENODEV; *bv = (resp->bootvector_low & TISCI_ADDR_LOW_MASK) | (((u64)resp->bootvector_high << TISCI_ADDR_HIGH_SHIFT) & TISCI_ADDR_HIGH_MASK); @@ -2225,7 +2074,6 @@ ti_sci_proc_wait_boot_status_no_wait(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), 0); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } req.processor_id = proc_id; @@ -2240,7 +2088,7 @@ ti_sci_proc_wait_boot_status_no_wait(const struct ti_sci_handle *handle, ret = ti_sci_do_xfer(info, xfer); if (ret) - dev_err(info->dev, "Mbox send fail %d\n", ret); + return ret; return ret; } @@ -2340,7 +2188,6 @@ static int ti_sci_cmd_ring_config(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "RM_RA:Message config failed(%d)\n", ret); return ret; } req.valid_params = valid_params; @@ -2354,14 +2201,8 @@ static int ti_sci_cmd_ring_config(const struct ti_sci_handle *handle, req.order_id = order_id; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "RM_RA:Mbox config send fail %d\n", ret); + if (ret) goto fail; - } - - resp = (struct ti_sci_msg_rm_ring_cfg_resp *)xfer->tx_message.buf; - - ret = ti_sci_is_response_ack(resp) ? 0 : -ENODEV; fail: dev_dbg(info->dev, "RM_RA:config ring %u ret:%d\n", index, ret); @@ -2389,7 +2230,6 @@ static int ti_sci_cmd_rm_psil_pair(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "RM_PSIL:Message alloc failed(%d)\n", ret); return ret; } req.nav_id = nav_id; @@ -2397,13 +2237,8 @@ static int ti_sci_cmd_rm_psil_pair(const struct ti_sci_handle *handle, req.dst_thread = dst_thread; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "RM_PSIL:Mbox send fail %d\n", ret); + if (ret) goto fail; - } - - resp = (struct ti_sci_msg_hdr *)xfer->tx_message.buf; - ret = ti_sci_is_response_ack(resp) ? 0 : -ENODEV; fail: dev_dbg(info->dev, "RM_PSIL: nav: %u link pair %u->%u ret:%u\n", @@ -2432,7 +2267,6 @@ static int ti_sci_cmd_rm_psil_unpair(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "RM_PSIL:Message alloc failed(%d)\n", ret); return ret; } req.nav_id = nav_id; @@ -2440,13 +2274,8 @@ static int ti_sci_cmd_rm_psil_unpair(const struct ti_sci_handle *handle, req.dst_thread = dst_thread; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "RM_PSIL:Mbox send fail %d\n", ret); + if (ret) goto fail; - } - - resp = (struct ti_sci_msg_hdr *)xfer->tx_message.buf; - ret = ti_sci_is_response_ack(resp) ? 0 : -ENODEV; fail: dev_dbg(info->dev, "RM_PSIL: link unpair %u->%u ret:%u\n", @@ -2476,7 +2305,6 @@ static int ti_sci_cmd_rm_udmap_tx_ch_cfg( (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message TX_CH_CFG alloc failed(%d)\n", ret); return ret; } req.valid_params = params->valid_params; @@ -2501,14 +2329,8 @@ static int ti_sci_cmd_rm_udmap_tx_ch_cfg( req.extended_ch_type = params->extended_ch_type; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send TX_CH_CFG fail %d\n", ret); + if (ret) goto fail; - } - - resp = - (struct ti_sci_msg_rm_udmap_tx_ch_cfg_resp *)xfer->tx_message.buf; - ret = ti_sci_is_response_ack(resp) ? 0 : -EINVAL; fail: dev_dbg(info->dev, "TX_CH_CFG: chn %u ret:%u\n", params->index, ret); @@ -2537,7 +2359,6 @@ static int ti_sci_cmd_rm_udmap_rx_ch_cfg( (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message RX_CH_CFG alloc failed(%d)\n", ret); return ret; } @@ -2559,14 +2380,8 @@ static int ti_sci_cmd_rm_udmap_rx_ch_cfg( req.rx_ignore_long = params->rx_ignore_long; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send RX_CH_CFG fail %d\n", ret); + if (ret) goto fail; - } - - resp = - (struct ti_sci_msg_rm_udmap_rx_ch_cfg_resp *)xfer->tx_message.buf; - ret = ti_sci_is_response_ack(resp) ? 0 : -EINVAL; fail: dev_dbg(info->dev, "RX_CH_CFG: chn %u ret:%d\n", params->index, ret); @@ -2595,8 +2410,6 @@ static int ti_sci_cmd_rm_udmap_rx_flow_cfg( (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "RX_FL_CFG: Message alloc failed(%d)\n", - ret); return ret; } @@ -2624,14 +2437,8 @@ static int ti_sci_cmd_rm_udmap_rx_flow_cfg( req.rx_ps_location = params->rx_ps_location; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "RX_FL_CFG: Mbox send fail %d\n", ret); + if (ret) goto fail; - } - - resp = - (struct ti_sci_msg_rm_udmap_flow_cfg_resp *)xfer->tx_message.buf; - ret = ti_sci_is_response_ack(resp) ? 0 : -EINVAL; fail: dev_dbg(info->dev, "RX_FL_CFG: %u ret:%d\n", params->flow_index, ret); @@ -2666,7 +2473,6 @@ static int ti_sci_cmd_set_fwl_region(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } @@ -2681,15 +2487,8 @@ static int ti_sci_cmd_set_fwl_region(const struct ti_sci_handle *handle, req.end_address = region->end_address; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } - - resp = (struct ti_sci_msg_hdr *)xfer->tx_message.buf; - - if (!ti_sci_is_response_ack(resp)) - return -ENODEV; return 0; } @@ -2722,7 +2521,6 @@ static int ti_sci_cmd_get_fwl_region(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } @@ -2731,16 +2529,11 @@ static int ti_sci_cmd_get_fwl_region(const struct ti_sci_handle *handle, req.n_permission_regs = region->n_permission_regs; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } resp = (struct ti_sci_msg_fwl_get_firewall_region_resp *)xfer->tx_message.buf; - if (!ti_sci_is_response_ack(resp)) - return -ENODEV; - region->fwl_id = resp->fwl_id; region->region = resp->region; region->n_permission_regs = resp->n_permission_regs; @@ -2782,7 +2575,6 @@ static int ti_sci_cmd_change_fwl_owner(const struct ti_sci_handle *handle, (u32 *)&req, sizeof(req), sizeof(*resp)); if (IS_ERR(xfer)) { ret = PTR_ERR(xfer); - dev_err(info->dev, "Message alloc failed(%d)\n", ret); return ret; } @@ -2791,16 +2583,11 @@ static int ti_sci_cmd_change_fwl_owner(const struct ti_sci_handle *handle, req.owner_index = owner->owner_index; ret = ti_sci_do_xfer(info, xfer); - if (ret) { - dev_err(info->dev, "Mbox send fail %d\n", ret); + if (ret) return ret; - } resp = (struct ti_sci_msg_fwl_change_owner_info_resp *)xfer->tx_message.buf; - if (!ti_sci_is_response_ack(resp)) - return -ENODEV; - owner->fwl_id = resp->fwl_id; owner->region = resp->region; owner->owner_index = resp->owner_index; diff --git a/drivers/fpga/intel_sdm_mb.c b/drivers/fpga/intel_sdm_mb.c index f5fd9a14c26..903d143a361 100644 --- a/drivers/fpga/intel_sdm_mb.c +++ b/drivers/fpga/intel_sdm_mb.c @@ -44,7 +44,7 @@ static int reconfig_status_polling_resp(void) puts("."); udelay(RECONFIG_STATUS_INTERVAL_DELAY_US); - WATCHDOG_RESET(); + schedule(); } return -ETIMEDOUT; @@ -104,7 +104,7 @@ static int send_bitstream(const void *rbf_data, size_t rbf_size) udelay(20000); } - WATCHDOG_RESET(); + schedule(); } return 0; @@ -252,7 +252,7 @@ static int reconfig_status_polling_resp(void) puts("."); udelay(RECONFIG_STATUS_INTERVAL_DELAY_US); - WATCHDOG_RESET(); + schedule(); } return -ETIMEDOUT; @@ -378,7 +378,7 @@ static int send_reconfig_data(const void *rbf_data, size_t rbf_size, if (resp_err && !xfer_count) return resp_err; } - WATCHDOG_RESET(); + schedule(); } return 0; diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c index d8089122af1..e86e3b74317 100644 --- a/drivers/fpga/socfpga_arria10.c +++ b/drivers/fpga/socfpga_arria10.c @@ -383,7 +383,7 @@ static int fpgamgr_program_poll_cd(void) printf("nstatus == 0 while waiting for condone\n"); return -EPERM; } - WATCHDOG_RESET(); + schedule(); } if (i == FPGA_TIMEOUT_CNT) @@ -534,7 +534,7 @@ static void get_rbf_image_info(struct rbf_info *rbf, u16 *buffer) rbf->section = unknown; break; - WATCHDOG_RESET(); + schedule(); } } @@ -635,7 +635,7 @@ static int first_loading_rbf_to_buffer(struct udevice *dev, break; } } - WATCHDOG_RESET(); + schedule(); } if (!fpga_node_name) { @@ -879,7 +879,7 @@ int socfpga_loadfs(fpga_fs_info *fpga_fsinfo, const void *buf, size_t bsize, total_sizeof_image += buffer_sizebytes_ori; - WATCHDOG_RESET(); + schedule(); } wait_for_fifo_empty(); diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index d8ebd542abd..0c83df46da4 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -413,7 +413,8 @@ static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize, if (bstype != BIT_PARTIAL) zynq_slcr_devcfg_enable(); - puts("INFO:post config was not run, please run manually if needed\n"); + if (!IS_ENABLED(CONFIG_SPL_BUILD)) + puts("INFO:post config was not run, please run manually if needed\n"); return FPGA_SUCCESS; } diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 7e4c3577b36..c949f9d2f7c 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -303,14 +303,14 @@ config CMD_PCA953X legacy GPIO interface. Several subcommands are provided which mirror the standard 'gpio' command. It should use that instead. -config PM8916_GPIO - bool "Qualcomm PM8916 PMIC GPIO/keypad driver" - depends on DM_GPIO && PMIC_PM8916 +config QCOM_PMIC_GPIO + bool "Qualcomm generic PMIC GPIO/keypad driver" + depends on DM_GPIO && PMIC_QCOM help Support for GPIO pins and power/reset buttons found on - Qualcomm PM8916 PMIC. + Qualcomm SoCs PMIC. Default name for GPIO bank is "pm8916". - Power and reset buttons are placed in "pm8916_key" bank and + Power and reset buttons are placed in "pwkey_qcom" bank and have gpio numbers 0 and 1 respectively. config PCF8575_GPIO diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 39762fa06ce..9d718a554e5 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -63,7 +63,7 @@ obj-$(CONFIG_OCTEON_GPIO) += octeon_gpio.o obj-$(CONFIG_MVEBU_GPIO) += mvebu_gpio.o obj-$(CONFIG_MSM_GPIO) += msm_gpio.o obj-$(CONFIG_$(SPL_)PCF8575_GPIO) += pcf8575_gpio.o -obj-$(CONFIG_$(SPL_TPL_)PM8916_GPIO) += pm8916_gpio.o +obj-$(CONFIG_$(SPL_TPL_)QCOM_PMIC_GPIO) += qcom_pmic_gpio.o obj-$(CONFIG_MT7620_GPIO) += mt7620_gpio.o obj-$(CONFIG_MT7621_GPIO) += mt7621_gpio.o obj-$(CONFIG_MSCC_SGPIO) += mscc_sgpio.o diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c index 0ed32b72170..a00880e446c 100644 --- a/drivers/gpio/gpio-uclass.c +++ b/drivers/gpio/gpio-uclass.c @@ -884,26 +884,31 @@ int gpio_get_status(struct udevice *dev, int offset, char *buf, int buffsize) const struct dm_gpio_ops *ops = gpio_get_ops(dev); struct gpio_dev_priv *priv; char *str = buf; + const char *label; int func; int ret; int len; + bool used; BUILD_BUG_ON(GPIOF_COUNT != ARRAY_SIZE(gpio_function)); *buf = 0; priv = dev_get_uclass_priv(dev); - ret = gpio_get_raw_function(dev, offset, NULL); + ret = gpio_get_raw_function(dev, offset, &label); if (ret < 0) return ret; func = ret; len = snprintf(str, buffsize, "%s%d: %s", priv->bank_name ? priv->bank_name : "", offset, gpio_function[func]); - if (func == GPIOF_INPUT || func == GPIOF_OUTPUT || - func == GPIOF_UNUSED) { - const char *label; - bool used; + switch (func) { + case GPIOF_FUNC: + snprintf(str + len, buffsize - len, " %s", label ? label : ""); + break; + case GPIOF_INPUT: + case GPIOF_OUTPUT: + case GPIOF_UNUSED: ret = ops->get_value(dev, offset); if (ret < 0) return ret; @@ -911,8 +916,9 @@ int gpio_get_status(struct udevice *dev, int offset, char *buf, int buffsize) snprintf(str + len, buffsize - len, ": %d [%c]%s%s", ret, used ? 'x' : ' ', - used ? " " : "", + label ? " " : "", label ? label : ""); + break; } return 0; diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c index a3c3cd7824c..51670f26371 100644 --- a/drivers/gpio/msm_gpio.c +++ b/drivers/gpio/msm_gpio.c @@ -116,20 +116,12 @@ static int msm_gpio_of_to_plat(struct udevice *dev) return 0; } -static const struct udevice_id msm_gpio_ids[] = { - { .compatible = "qcom,msm8916-pinctrl" }, - { .compatible = "qcom,apq8016-pinctrl" }, - { .compatible = "qcom,ipq4019-pinctrl" }, - { .compatible = "qcom,sdm845-pinctrl" }, - { } -}; - U_BOOT_DRIVER(gpio_msm) = { .name = "gpio_msm", .id = UCLASS_GPIO, - .of_match = msm_gpio_ids, .of_to_plat = msm_gpio_of_to_plat, .probe = msm_gpio_probe, .ops = &gpio_msm_ops, + .flags = DM_UC_FLAG_SEQ_ALIAS, .priv_auto = sizeof(struct msm_gpio_bank), }; diff --git a/drivers/gpio/pm8916_gpio.c b/drivers/gpio/pm8916_gpio.c deleted file mode 100644 index 7ad95784a89..00000000000 --- a/drivers/gpio/pm8916_gpio.c +++ /dev/null @@ -1,303 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Qualcomm pm8916 pmic gpio driver - part of Qualcomm PM8916 PMIC - * - * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com> - */ - -#include <common.h> -#include <dm.h> -#include <log.h> -#include <power/pmic.h> -#include <spmi/spmi.h> -#include <asm/io.h> -#include <asm/gpio.h> -#include <linux/bitops.h> - -/* Register offset for each gpio */ -#define REG_OFFSET(x) ((x) * 0x100) - -/* Register maps */ - -/* Type and subtype are shared for all pm8916 peripherals */ -#define REG_TYPE 0x4 -#define REG_SUBTYPE 0x5 - -#define REG_STATUS 0x08 -#define REG_STATUS_VAL_MASK 0x1 - -/* MODE_CTL */ -#define REG_CTL 0x40 -#define REG_CTL_MODE_MASK 0x70 -#define REG_CTL_MODE_INPUT 0x00 -#define REG_CTL_MODE_INOUT 0x20 -#define REG_CTL_MODE_OUTPUT 0x10 -#define REG_CTL_OUTPUT_MASK 0x0F - -#define REG_DIG_VIN_CTL 0x41 -#define REG_DIG_VIN_VIN0 0 - -#define REG_DIG_PULL_CTL 0x42 -#define REG_DIG_PULL_NO_PU 0x5 - -#define REG_DIG_OUT_CTL 0x45 -#define REG_DIG_OUT_CTL_CMOS (0x0 << 4) -#define REG_DIG_OUT_CTL_DRIVE_L 0x1 - -#define REG_EN_CTL 0x46 -#define REG_EN_CTL_ENABLE (1 << 7) - -struct pm8916_gpio_bank { - uint32_t pid; /* Peripheral ID on SPMI bus */ -}; - -static int pm8916_gpio_set_direction(struct udevice *dev, unsigned offset, - bool input, int value) -{ - struct pm8916_gpio_bank *priv = dev_get_priv(dev); - uint32_t gpio_base = priv->pid + REG_OFFSET(offset); - int ret; - - /* Disable the GPIO */ - ret = pmic_clrsetbits(dev->parent, gpio_base + REG_EN_CTL, - REG_EN_CTL_ENABLE, 0); - if (ret < 0) - return ret; - - /* Select the mode */ - if (input) - ret = pmic_reg_write(dev->parent, gpio_base + REG_CTL, - REG_CTL_MODE_INPUT); - else - ret = pmic_reg_write(dev->parent, gpio_base + REG_CTL, - REG_CTL_MODE_INOUT | (value ? 1 : 0)); - if (ret < 0) - return ret; - - /* Set the right pull (no pull) */ - ret = pmic_reg_write(dev->parent, gpio_base + REG_DIG_PULL_CTL, - REG_DIG_PULL_NO_PU); - if (ret < 0) - return ret; - - /* Configure output pin drivers if needed */ - if (!input) { - /* Select the VIN - VIN0, pin is input so it doesn't matter */ - ret = pmic_reg_write(dev->parent, gpio_base + REG_DIG_VIN_CTL, - REG_DIG_VIN_VIN0); - if (ret < 0) - return ret; - - /* Set the right dig out control */ - ret = pmic_reg_write(dev->parent, gpio_base + REG_DIG_OUT_CTL, - REG_DIG_OUT_CTL_CMOS | - REG_DIG_OUT_CTL_DRIVE_L); - if (ret < 0) - return ret; - } - - /* Enable the GPIO */ - return pmic_clrsetbits(dev->parent, gpio_base + REG_EN_CTL, 0, - REG_EN_CTL_ENABLE); -} - -static int pm8916_gpio_direction_input(struct udevice *dev, unsigned offset) -{ - return pm8916_gpio_set_direction(dev, offset, true, 0); -} - -static int pm8916_gpio_direction_output(struct udevice *dev, unsigned offset, - int value) -{ - return pm8916_gpio_set_direction(dev, offset, false, value); -} - -static int pm8916_gpio_get_function(struct udevice *dev, unsigned offset) -{ - struct pm8916_gpio_bank *priv = dev_get_priv(dev); - uint32_t gpio_base = priv->pid + REG_OFFSET(offset); - int reg; - - /* Set the output value of the gpio */ - reg = pmic_reg_read(dev->parent, gpio_base + REG_CTL); - if (reg < 0) - return reg; - - switch (reg & REG_CTL_MODE_MASK) { - case REG_CTL_MODE_INPUT: - return GPIOF_INPUT; - case REG_CTL_MODE_INOUT: /* Fallthrough */ - case REG_CTL_MODE_OUTPUT: - return GPIOF_OUTPUT; - default: - return GPIOF_UNKNOWN; - } -} - -static int pm8916_gpio_get_value(struct udevice *dev, unsigned offset) -{ - struct pm8916_gpio_bank *priv = dev_get_priv(dev); - uint32_t gpio_base = priv->pid + REG_OFFSET(offset); - int reg; - - reg = pmic_reg_read(dev->parent, gpio_base + REG_STATUS); - if (reg < 0) - return reg; - - return !!(reg & REG_STATUS_VAL_MASK); -} - -static int pm8916_gpio_set_value(struct udevice *dev, unsigned offset, - int value) -{ - struct pm8916_gpio_bank *priv = dev_get_priv(dev); - uint32_t gpio_base = priv->pid + REG_OFFSET(offset); - - /* Set the output value of the gpio */ - return pmic_clrsetbits(dev->parent, gpio_base + REG_CTL, - REG_CTL_OUTPUT_MASK, !!value); -} - -static const struct dm_gpio_ops pm8916_gpio_ops = { - .direction_input = pm8916_gpio_direction_input, - .direction_output = pm8916_gpio_direction_output, - .get_value = pm8916_gpio_get_value, - .set_value = pm8916_gpio_set_value, - .get_function = pm8916_gpio_get_function, -}; - -static int pm8916_gpio_probe(struct udevice *dev) -{ - struct pm8916_gpio_bank *priv = dev_get_priv(dev); - int reg; - - priv->pid = dev_read_addr(dev); - if (priv->pid == FDT_ADDR_T_NONE) - return log_msg_ret("bad address", -EINVAL); - - /* Do a sanity check */ - reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); - if (reg != 0x10) - return log_msg_ret("bad type", -ENXIO); - - reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE); - if (reg != 0x5 && reg != 0x1) - return log_msg_ret("bad subtype", -ENXIO); - - return 0; -} - -static int pm8916_gpio_of_to_plat(struct udevice *dev) -{ - struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); - - uc_priv->gpio_count = dev_read_u32_default(dev, "gpio-count", 0); - uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name"); - if (uc_priv->bank_name == NULL) - uc_priv->bank_name = "pm8916"; - - return 0; -} - -static const struct udevice_id pm8916_gpio_ids[] = { - { .compatible = "qcom,pm8916-gpio" }, - { .compatible = "qcom,pm8994-gpio" }, /* 22 GPIO's */ - { .compatible = "qcom,pm8998-gpio" }, - { } -}; - -U_BOOT_DRIVER(gpio_pm8916) = { - .name = "gpio_pm8916", - .id = UCLASS_GPIO, - .of_match = pm8916_gpio_ids, - .of_to_plat = pm8916_gpio_of_to_plat, - .probe = pm8916_gpio_probe, - .ops = &pm8916_gpio_ops, - .priv_auto = sizeof(struct pm8916_gpio_bank), -}; - - -/* Add pmic buttons as GPIO as well - there is no generic way for now */ -#define PON_INT_RT_STS 0x10 -#define KPDPWR_ON_INT_BIT 0 -#define RESIN_ON_INT_BIT 1 - -static int pm8941_pwrkey_get_function(struct udevice *dev, unsigned offset) -{ - return GPIOF_INPUT; -} - -static int pm8941_pwrkey_get_value(struct udevice *dev, unsigned offset) -{ - struct pm8916_gpio_bank *priv = dev_get_priv(dev); - - int reg = pmic_reg_read(dev->parent, priv->pid + PON_INT_RT_STS); - - if (reg < 0) - return 0; - - switch (offset) { - case 0: /* Power button */ - return (reg & BIT(KPDPWR_ON_INT_BIT)) != 0; - break; - case 1: /* Reset button */ - default: - return (reg & BIT(RESIN_ON_INT_BIT)) != 0; - break; - } -} - -static const struct dm_gpio_ops pm8941_pwrkey_ops = { - .get_value = pm8941_pwrkey_get_value, - .get_function = pm8941_pwrkey_get_function, -}; - -static int pm8941_pwrkey_probe(struct udevice *dev) -{ - struct pm8916_gpio_bank *priv = dev_get_priv(dev); - int reg; - - priv->pid = dev_read_addr(dev); - if (priv->pid == FDT_ADDR_T_NONE) - return log_msg_ret("bad address", -EINVAL); - - /* Do a sanity check */ - reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); - if (reg != 0x1) - return log_msg_ret("bad type", -ENXIO); - - reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE); - if ((reg & 0x5) == 0) - return log_msg_ret("bad subtype", -ENXIO); - - return 0; -} - -static int pm8941_pwrkey_of_to_plat(struct udevice *dev) -{ - struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); - - uc_priv->gpio_count = 2; - uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name"); - if (uc_priv->bank_name == NULL) - uc_priv->bank_name = "pm8916_key"; - - return 0; -} - -static const struct udevice_id pm8941_pwrkey_ids[] = { - { .compatible = "qcom,pm8916-pwrkey" }, - { .compatible = "qcom,pm8994-pwrkey" }, - { .compatible = "qcom,pm8998-pwrkey" }, - { } -}; - -U_BOOT_DRIVER(pwrkey_pm89xx) = { - .name = "pwrkey_pm89xx", - .id = UCLASS_GPIO, - .of_match = pm8941_pwrkey_ids, - .of_to_plat = pm8941_pwrkey_of_to_plat, - .probe = pm8941_pwrkey_probe, - .ops = &pm8941_pwrkey_ops, - .priv_auto = sizeof(struct pm8916_gpio_bank), -}; diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c new file mode 100644 index 00000000000..3be1be8692c --- /dev/null +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -0,0 +1,359 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm generic pmic gpio driver + * + * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com> + */ + +#include <common.h> +#include <dm.h> +#include <log.h> +#include <power/pmic.h> +#include <spmi/spmi.h> +#include <asm/io.h> +#include <asm/gpio.h> +#include <linux/bitops.h> + +/* Register offset for each gpio */ +#define REG_OFFSET(x) ((x) * 0x100) + +/* Register maps */ + +/* Type and subtype are shared for all PMIC peripherals */ +#define REG_TYPE 0x4 +#define REG_SUBTYPE 0x5 + +/* GPIO peripheral type and subtype out_values */ +#define REG_TYPE_VAL 0x10 +#define REG_SUBTYPE_GPIO_4CH 0x1 +#define REG_SUBTYPE_GPIOC_4CH 0x5 +#define REG_SUBTYPE_GPIO_8CH 0x9 +#define REG_SUBTYPE_GPIOC_8CH 0xd +#define REG_SUBTYPE_GPIO_LV 0x10 +#define REG_SUBTYPE_GPIO_MV 0x11 + +#define REG_STATUS 0x08 +#define REG_STATUS_VAL_MASK 0x1 + +/* MODE_CTL */ +#define REG_CTL 0x40 +#define REG_CTL_MODE_MASK 0x70 +#define REG_CTL_MODE_INPUT 0x00 +#define REG_CTL_MODE_INOUT 0x20 +#define REG_CTL_MODE_OUTPUT 0x10 +#define REG_CTL_OUTPUT_MASK 0x0F +#define REG_CTL_LV_MV_MODE_MASK 0x3 +#define REG_CTL_LV_MV_MODE_INPUT 0x0 +#define REG_CTL_LV_MV_MODE_INOUT 0x2 +#define REG_CTL_LV_MV_MODE_OUTPUT 0x1 + +#define REG_DIG_VIN_CTL 0x41 +#define REG_DIG_VIN_VIN0 0 + +#define REG_DIG_PULL_CTL 0x42 +#define REG_DIG_PULL_NO_PU 0x5 + +#define REG_LV_MV_OUTPUT_CTL 0x44 +#define REG_LV_MV_OUTPUT_CTL_MASK 0x80 +#define REG_LV_MV_OUTPUT_CTL_SHIFT 7 + +#define REG_DIG_OUT_CTL 0x45 +#define REG_DIG_OUT_CTL_CMOS (0x0 << 4) +#define REG_DIG_OUT_CTL_DRIVE_L 0x1 + +#define REG_EN_CTL 0x46 +#define REG_EN_CTL_ENABLE (1 << 7) + +struct qcom_gpio_bank { + uint32_t pid; /* Peripheral ID on SPMI bus */ + bool lv_mv_type; /* If subtype is GPIO_LV(0x10) or GPIO_MV(0x11) */ +}; + +static int qcom_gpio_set_direction(struct udevice *dev, unsigned offset, + bool input, int value) +{ + struct qcom_gpio_bank *priv = dev_get_priv(dev); + uint32_t gpio_base = priv->pid + REG_OFFSET(offset); + uint32_t reg_ctl_val; + int ret; + + /* Disable the GPIO */ + ret = pmic_clrsetbits(dev->parent, gpio_base + REG_EN_CTL, + REG_EN_CTL_ENABLE, 0); + if (ret < 0) + return ret; + + /* Select the mode and output */ + if (priv->lv_mv_type) { + if (input) + reg_ctl_val = REG_CTL_LV_MV_MODE_INPUT; + else + reg_ctl_val = REG_CTL_LV_MV_MODE_INOUT; + } else { + if (input) + reg_ctl_val = REG_CTL_MODE_INPUT; + else + reg_ctl_val = REG_CTL_MODE_INOUT | !!value; + } + + ret = pmic_reg_write(dev->parent, gpio_base + REG_CTL, reg_ctl_val); + if (ret < 0) + return ret; + + if (priv->lv_mv_type && !input) { + ret = pmic_reg_write(dev->parent, + gpio_base + REG_LV_MV_OUTPUT_CTL, + !!value << REG_LV_MV_OUTPUT_CTL_SHIFT); + if (ret < 0) + return ret; + } + + /* Set the right pull (no pull) */ + ret = pmic_reg_write(dev->parent, gpio_base + REG_DIG_PULL_CTL, + REG_DIG_PULL_NO_PU); + if (ret < 0) + return ret; + + /* Configure output pin drivers if needed */ + if (!input) { + /* Select the VIN - VIN0, pin is input so it doesn't matter */ + ret = pmic_reg_write(dev->parent, gpio_base + REG_DIG_VIN_CTL, + REG_DIG_VIN_VIN0); + if (ret < 0) + return ret; + + /* Set the right dig out control */ + ret = pmic_reg_write(dev->parent, gpio_base + REG_DIG_OUT_CTL, + REG_DIG_OUT_CTL_CMOS | + REG_DIG_OUT_CTL_DRIVE_L); + if (ret < 0) + return ret; + } + + /* Enable the GPIO */ + return pmic_clrsetbits(dev->parent, gpio_base + REG_EN_CTL, 0, + REG_EN_CTL_ENABLE); +} + +static int qcom_gpio_direction_input(struct udevice *dev, unsigned offset) +{ + return qcom_gpio_set_direction(dev, offset, true, 0); +} + +static int qcom_gpio_direction_output(struct udevice *dev, unsigned offset, + int value) +{ + return qcom_gpio_set_direction(dev, offset, false, value); +} + +static int qcom_gpio_get_function(struct udevice *dev, unsigned offset) +{ + struct qcom_gpio_bank *priv = dev_get_priv(dev); + uint32_t gpio_base = priv->pid + REG_OFFSET(offset); + int reg; + + reg = pmic_reg_read(dev->parent, gpio_base + REG_CTL); + if (reg < 0) + return reg; + + if (priv->lv_mv_type) { + switch (reg & REG_CTL_LV_MV_MODE_MASK) { + case REG_CTL_LV_MV_MODE_INPUT: + return GPIOF_INPUT; + case REG_CTL_LV_MV_MODE_INOUT: /* Fallthrough */ + case REG_CTL_LV_MV_MODE_OUTPUT: + return GPIOF_OUTPUT; + default: + return GPIOF_UNKNOWN; + } + } else { + switch (reg & REG_CTL_MODE_MASK) { + case REG_CTL_MODE_INPUT: + return GPIOF_INPUT; + case REG_CTL_MODE_INOUT: /* Fallthrough */ + case REG_CTL_MODE_OUTPUT: + return GPIOF_OUTPUT; + default: + return GPIOF_UNKNOWN; + } + } +} + +static int qcom_gpio_get_value(struct udevice *dev, unsigned offset) +{ + struct qcom_gpio_bank *priv = dev_get_priv(dev); + uint32_t gpio_base = priv->pid + REG_OFFSET(offset); + int reg; + + reg = pmic_reg_read(dev->parent, gpio_base + REG_STATUS); + if (reg < 0) + return reg; + + return !!(reg & REG_STATUS_VAL_MASK); +} + +static int qcom_gpio_set_value(struct udevice *dev, unsigned offset, + int value) +{ + struct qcom_gpio_bank *priv = dev_get_priv(dev); + uint32_t gpio_base = priv->pid + REG_OFFSET(offset); + + /* Set the output value of the gpio */ + if (priv->lv_mv_type) + return pmic_clrsetbits(dev->parent, + gpio_base + REG_LV_MV_OUTPUT_CTL, + REG_LV_MV_OUTPUT_CTL_MASK, + !!value << REG_LV_MV_OUTPUT_CTL_SHIFT); + else + return pmic_clrsetbits(dev->parent, gpio_base + REG_CTL, + REG_CTL_OUTPUT_MASK, !!value); +} + +static const struct dm_gpio_ops qcom_gpio_ops = { + .direction_input = qcom_gpio_direction_input, + .direction_output = qcom_gpio_direction_output, + .get_value = qcom_gpio_get_value, + .set_value = qcom_gpio_set_value, + .get_function = qcom_gpio_get_function, +}; + +static int qcom_gpio_probe(struct udevice *dev) +{ + struct qcom_gpio_bank *priv = dev_get_priv(dev); + int reg; + + priv->pid = dev_read_addr(dev); + if (priv->pid == FDT_ADDR_T_NONE) + return log_msg_ret("bad address", -EINVAL); + + /* Do a sanity check */ + reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); + if (reg != REG_TYPE_VAL) + return log_msg_ret("bad type", -ENXIO); + + reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE); + if (reg != REG_SUBTYPE_GPIO_4CH && reg != REG_SUBTYPE_GPIOC_4CH && + reg != REG_SUBTYPE_GPIO_LV && reg != REG_SUBTYPE_GPIO_MV) + return log_msg_ret("bad subtype", -ENXIO); + + priv->lv_mv_type = reg == REG_SUBTYPE_GPIO_LV || + reg == REG_SUBTYPE_GPIO_MV; + + return 0; +} + +static int qcom_gpio_of_to_plat(struct udevice *dev) +{ + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + + uc_priv->gpio_count = dev_read_u32_default(dev, "gpio-count", 0); + uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name"); + if (uc_priv->bank_name == NULL) + uc_priv->bank_name = "qcom_pmic"; + + return 0; +} + +static const struct udevice_id qcom_gpio_ids[] = { + { .compatible = "qcom,pm8916-gpio" }, + { .compatible = "qcom,pm8994-gpio" }, /* 22 GPIO's */ + { .compatible = "qcom,pm8998-gpio" }, + { .compatible = "qcom,pms405-gpio" }, + { } +}; + +U_BOOT_DRIVER(qcom_pmic_gpio) = { + .name = "qcom_pmic_gpio", + .id = UCLASS_GPIO, + .of_match = qcom_gpio_ids, + .of_to_plat = qcom_gpio_of_to_plat, + .probe = qcom_gpio_probe, + .ops = &qcom_gpio_ops, + .priv_auto = sizeof(struct qcom_gpio_bank), +}; + + +/* Add pmic buttons as GPIO as well - there is no generic way for now */ +#define PON_INT_RT_STS 0x10 +#define KPDPWR_ON_INT_BIT 0 +#define RESIN_ON_INT_BIT 1 + +static int qcom_pwrkey_get_function(struct udevice *dev, unsigned offset) +{ + return GPIOF_INPUT; +} + +static int qcom_pwrkey_get_value(struct udevice *dev, unsigned offset) +{ + struct qcom_gpio_bank *priv = dev_get_priv(dev); + + int reg = pmic_reg_read(dev->parent, priv->pid + PON_INT_RT_STS); + + if (reg < 0) + return 0; + + switch (offset) { + case 0: /* Power button */ + return (reg & BIT(KPDPWR_ON_INT_BIT)) != 0; + break; + case 1: /* Reset button */ + default: + return (reg & BIT(RESIN_ON_INT_BIT)) != 0; + break; + } +} + +static const struct dm_gpio_ops qcom_pwrkey_ops = { + .get_value = qcom_pwrkey_get_value, + .get_function = qcom_pwrkey_get_function, +}; + +static int qcom_pwrkey_probe(struct udevice *dev) +{ + struct qcom_gpio_bank *priv = dev_get_priv(dev); + int reg; + + priv->pid = dev_read_addr(dev); + if (priv->pid == FDT_ADDR_T_NONE) + return log_msg_ret("bad address", -EINVAL); + + /* Do a sanity check */ + reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); + if (reg != 0x1) + return log_msg_ret("bad type", -ENXIO); + + reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE); + if ((reg & 0x5) == 0) + return log_msg_ret("bad subtype", -ENXIO); + + return 0; +} + +static int qcom_pwrkey_of_to_plat(struct udevice *dev) +{ + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + + uc_priv->gpio_count = 2; + uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name"); + if (uc_priv->bank_name == NULL) + uc_priv->bank_name = "pwkey_qcom"; + + return 0; +} + +static const struct udevice_id qcom_pwrkey_ids[] = { + { .compatible = "qcom,pm8916-pwrkey" }, + { .compatible = "qcom,pm8994-pwrkey" }, + { .compatible = "qcom,pm8998-pwrkey" }, + { } +}; + +U_BOOT_DRIVER(pwrkey_qcom) = { + .name = "pwrkey_qcom", + .id = UCLASS_GPIO, + .of_match = qcom_pwrkey_ids, + .of_to_plat = qcom_pwrkey_of_to_plat, + .probe = qcom_pwrkey_probe, + .ops = &qcom_pwrkey_ops, + .priv_auto = sizeof(struct qcom_gpio_bank), +}; diff --git a/drivers/gpio/sandbox.c b/drivers/gpio/sandbox.c index 106b2a7b27c..305f9a6ff62 100644 --- a/drivers/gpio/sandbox.c +++ b/drivers/gpio/sandbox.c @@ -196,6 +196,8 @@ static int sb_gpio_get_function(struct udevice *dev, unsigned offset) return GPIOF_OUTPUT; if (get_gpio_flag(dev, offset, GPIOD_IS_IN)) return GPIOF_INPUT; + if (get_gpio_flag(dev, offset, GPIOD_IS_AF)) + return GPIOF_FUNC; return GPIOF_INPUT; /*GPIO is not configurated */ } @@ -219,6 +221,9 @@ static int sb_gpio_xlate(struct udevice *dev, struct gpio_desc *desc, if (args->args[1] & GPIO_OUT_ACTIVE) desc->flags |= GPIOD_IS_OUT_ACTIVE; + if (args->args[1] & GPIO_AF) + desc->flags |= GPIOD_IS_AF; + return 0; } diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index aa13af3ae10..f80ff5383bc 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -199,7 +199,7 @@ static int wait_for_sr_state(struct mxc_i2c_bus *i2c_bus, unsigned state) } if ((sr & (state >> 8)) == (unsigned char)state) return sr; - WATCHDOG_RESET(); + schedule(); elapsed = get_timer(start_time); if (elapsed > (CONFIG_SYS_HZ / 10)) /* .1 seconds */ break; @@ -447,7 +447,7 @@ int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus) sda = dm_gpio_get_value(sda_gpio); if ((sda & scl) == 1) break; - WATCHDOG_RESET(); + schedule(); elapsed = get_timer(start_time); if (elapsed > (CONFIG_SYS_HZ / 5)) { /* .2 seconds */ ret = -EBUSY; diff --git a/drivers/misc/usb251xb.c b/drivers/misc/usb251xb.c index 077edc25045..a78ad1843ae 100644 --- a/drivers/misc/usb251xb.c +++ b/drivers/misc/usb251xb.c @@ -400,14 +400,14 @@ static int usb251xb_of_to_plat(struct udevice *dev) } } - if (dev_read_u32(dev, "vendor-id", &hub->vendor_id)) - hub->vendor_id = USB251XB_DEF_VENDOR_ID; + hub->vendor_id = dev_read_u16_default(dev, "vendor-id", + USB251XB_DEF_VENDOR_ID); - if (dev_read_u32(dev, "product-id", &hub->product_id)) - hub->product_id = data->product_id; + hub->product_id = dev_read_u16_default(dev, "product-id", + data->product_id); - if (dev_read_u32(dev, "device-id", &hub->device_id)) - hub->device_id = USB251XB_DEF_DEVICE_ID; + hub->device_id = dev_read_u16_default(dev, "device-id", + USB251XB_DEF_DEVICE_ID); hub->conf_data1 = USB251XB_DEF_CONFIG_DATA_1; if (dev_read_bool(dev, "self-powered")) { @@ -513,11 +513,11 @@ static int usb251xb_of_to_plat(struct udevice *dev) if (!dev_read_u32(dev, "power-on-time-ms", &property_u32)) hub->power_on_time = min_t(u8, property_u32 / 2, 255); - if (dev_read_u32(dev, "language-id", &hub->lang_id)) - hub->lang_id = USB251XB_DEF_LANGUAGE_ID; + hub->lang_id = dev_read_u16_default(dev, "language-id", + USB251XB_DEF_LANGUAGE_ID); - if (!dev_read_u32(dev, "boost-up", &hub->boost_up)) - hub->boost_up = USB251XB_DEF_BOOST_UP; + hub->boost_up = dev_read_u8_default(dev, "boost-up", + USB251XB_DEF_BOOST_UP); cproperty_char = dev_read_string(dev, "manufacturer"); strlcpy(str, cproperty_char ? : USB251XB_DEF_MANUFACTURER_STRING, diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 0dcec8adcee..f799f70e43a 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -3,7 +3,6 @@ menu "MMC Host controller Support" config MMC bool "MMC/SD/SDIO card support" default ARM || PPC || SANDBOX - select HAVE_BLOCK_DEVICE select DM_MMC if DM help This selects MultiMediaCard, Secure Digital and Secure diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c index 688bdc06d42..b1bd4ae1bc8 100644 --- a/drivers/mmc/mmc-uclass.c +++ b/drivers/mmc/mmc-uclass.c @@ -290,7 +290,7 @@ struct mmc *find_mmc_device(int dev_num) struct udevice *dev, *mmc_dev; int ret; - ret = blk_find_device(IF_TYPE_MMC, dev_num, &dev); + ret = blk_find_device(UCLASS_MMC, dev_num, &dev); if (ret) { #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) @@ -308,12 +308,12 @@ struct mmc *find_mmc_device(int dev_num) int get_mmc_num(void) { - return max((blk_find_max_devnum(IF_TYPE_MMC) + 1), 0); + return max((blk_find_max_devnum(UCLASS_MMC) + 1), 0); } int mmc_get_next_devnum(void) { - return blk_find_max_devnum(IF_TYPE_MMC); + return blk_find_max_devnum(UCLASS_MMC); } int mmc_get_blk(struct udevice *dev, struct udevice **blkp) @@ -411,8 +411,8 @@ int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg) /* Use the fixed index with aliases node's index */ debug("%s: alias devnum=%d\n", __func__, dev_seq(dev)); - ret = blk_create_devicef(dev, "mmc_blk", "blk", IF_TYPE_MMC, - dev_seq(dev), 512, 0, &bdev); + ret = blk_create_devicef(dev, "mmc_blk", "blk", UCLASS_MMC, + dev_seq(dev), 512, 0, &bdev); if (ret) { debug("Cannot create block device\n"); return ret; diff --git a/drivers/mmc/mmc_legacy.c b/drivers/mmc/mmc_legacy.c index a05da6c2e88..4e0891e5dfe 100644 --- a/drivers/mmc/mmc_legacy.c +++ b/drivers/mmc/mmc_legacy.c @@ -132,7 +132,7 @@ static struct mmc mmc_static = { .dsr_imp = 0, .dsr = 0xffffffff, .block_dev = { - .if_type = IF_TYPE_MMC, + .if_type = UCLASS_MMC, .removable = 1, .devnum = 0, .block_read = mmc_bread, @@ -194,7 +194,7 @@ struct mmc *mmc_create(const struct mmc_config *cfg, void *priv) mmc->dsr = 0xffffffff; /* Setup the universal parts of the block interface just once */ bdesc = mmc_get_blk_desc(mmc); - bdesc->if_type = IF_TYPE_MMC; + bdesc->if_type = UCLASS_MMC; bdesc->removable = 1; bdesc->devnum = mmc_get_next_devnum(); bdesc->block_read = mmc_bread; @@ -254,7 +254,7 @@ static int mmc_get_dev(int dev, struct blk_desc **descp) U_BOOT_LEGACY_BLK(mmc) = { .if_typename = "mmc", - .if_type = IF_TYPE_MMC, + .if_type = UCLASS_MMC, .max_devs = -1, .get_dev = mmc_get_dev, .select_hwpart = mmc_select_hwpartp, diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c index eab94c7b607..5b7aeeb0121 100644 --- a/drivers/mmc/mmc_write.c +++ b/drivers/mmc/mmc_write.c @@ -85,7 +85,7 @@ ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt) if (!mmc) return -1; - err = blk_select_hwpart_devnum(IF_TYPE_MMC, dev_num, + err = blk_select_hwpart_devnum(UCLASS_MMC, dev_num, block_dev->hwpart); if (err < 0) return -1; @@ -203,7 +203,7 @@ ulong mmc_bwrite(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt, if (!mmc) return 0; - err = blk_select_hwpart_devnum(IF_TYPE_MMC, dev_num, block_dev->hwpart); + err = blk_select_hwpart_devnum(UCLASS_MMC, dev_num, block_dev->hwpart); if (err < 0) return 0; diff --git a/drivers/mmc/octeontx_hsmmc.c b/drivers/mmc/octeontx_hsmmc.c index 6e9acf7310a..4ee62df9d40 100644 --- a/drivers/mmc/octeontx_hsmmc.c +++ b/drivers/mmc/octeontx_hsmmc.c @@ -1023,7 +1023,7 @@ static void octeontx_mmc_cleanup_dma(struct mmc *mmc, start = get_timer(0); do { rsp_sts.u = read_csr(mmc, MIO_EMM_RSP_STS()); - WATCHDOG_RESET(); + schedule(); } while (get_timer(start) < 100 && (rsp_sts.s.dma_val || rsp_sts.s.dma_pend)); } while (retries-- >= 0 && rsp_sts.s.dma_pend); @@ -1107,7 +1107,7 @@ static int octeontx_mmc_wait_dma(struct mmc *mmc, bool write, ulong timeout, } else if (!rsp_sts.s.dma_val && emm_dma_int.s.done) { break; } - WATCHDOG_RESET(); + schedule(); timed_out = (get_timer(start_time) > timeout); } while (!timed_out); @@ -1219,7 +1219,7 @@ static int octeontx_mmc_read_blocks(struct mmc *mmc, struct mmc_cmd *cmd, } return blkcnt - count; } - WATCHDOG_RESET(); + schedule(); } while (--count); } #ifdef DEBUG @@ -1253,7 +1253,7 @@ static int octeontx_mmc_poll_ready(struct mmc *mmc, ulong timeout) } else if (cmd.response[0] & R1_READY_FOR_DATA) { return 0; } - WATCHDOG_RESET(); + schedule(); } while (get_timer(start) < timeout); if (not_ready) @@ -1328,7 +1328,7 @@ static ulong octeontx_mmc_write_blocks(struct mmc *mmc, struct mmc_cmd *cmd, read_csr(mmc, MIO_EMM_DMA())); return blkcnt - count; } - WATCHDOG_RESET(); + schedule(); } while (--count); } @@ -1491,7 +1491,7 @@ static int octeontx_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, start = get_timer(0); do { rsp_sts.u = read_csr(mmc, MIO_EMM_RSP_STS()); - WATCHDOG_RESET(); + schedule(); } while (!rsp_sts.s.cmd_done && !rsp_sts.s.rsp_timeout && (get_timer(start) < timeout + 10)); octeontx_mmc_print_rsp_errors(mmc, rsp_sts); diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c index 830e29cdd41..76dc1c68b82 100644 --- a/drivers/mmc/sh_mmcif.c +++ b/drivers/mmc/sh_mmcif.c @@ -242,7 +242,7 @@ static int sh_mmcif_multi_read(struct sh_mmcif_host *host, for (i = 0; i < blocksize / 4; i++) *p++ = sh_mmcif_read(&host->regs->ce_data); - WATCHDOG_RESET(); + schedule(); } return 0; } @@ -309,7 +309,7 @@ static int sh_mmcif_multi_write(struct sh_mmcif_host *host, for (i = 0; i < blocksize / 4; i++) sh_mmcif_write(*p++, &host->regs->ce_data); - WATCHDOG_RESET(); + schedule(); } return 0; } @@ -523,7 +523,7 @@ static int sh_mmcif_send_cmd_common(struct sh_mmcif_host *host, { int ret; - WATCHDOG_RESET(); + schedule(); switch (cmd->cmdidx) { case MMC_CMD_APP_CMD: diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c index bfce8a2e4a6..7ab4d949e74 100644 --- a/drivers/mmc/stm32_sdmmc2.c +++ b/drivers/mmc/stm32_sdmmc2.c @@ -445,7 +445,7 @@ static int stm32_sdmmc2_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, u32 cmdat = data ? SDMMC_CMD_CMDTRANS : 0; int ret, retry = 3; - WATCHDOG_RESET(); + schedule(); retry_cmd: ctx.data_length = 0; diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 49504107065..d34d8ee9767 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -584,7 +584,7 @@ static int flash_status_check(flash_info_t *info, flash_sect_t sector, reset_timer(); #endif start = get_timer(0); - WATCHDOG_RESET(); + schedule(); while (flash_is_busy(info, sector)) { if (get_timer(start) > tout) { printf("Flash %s timeout at address %lx data %lx\n", @@ -677,7 +677,7 @@ static int flash_status_poll(flash_info_t *info, void *src, void *dst, reset_timer(); #endif start = get_timer(0); - WATCHDOG_RESET(); + schedule(); while (1) { switch (info->portwidth) { case FLASH_CFI_8BIT: diff --git a/drivers/mtd/nand/core.c b/drivers/mtd/nand/core.c index 090834a495f..99c29670c75 100644 --- a/drivers/mtd/nand/core.c +++ b/drivers/mtd/nand/core.c @@ -173,7 +173,7 @@ int nanddev_mtd_erase(struct mtd_info *mtd, struct erase_info *einfo) nanddev_offs_to_pos(nand, einfo->addr, &pos); nanddev_offs_to_pos(nand, einfo->addr + einfo->len - 1, &last); while (nanddev_pos_cmp(&pos, &last) <= 0) { - WATCHDOG_RESET(); + schedule(); ret = nanddev_erase(nand, &pos); if (ret) { einfo->fail_addr = nanddev_pos_to_offs(nand, &pos); diff --git a/drivers/mtd/nand/raw/atmel_nand.c b/drivers/mtd/nand/raw/atmel_nand.c index 06bf5ac18ff..61bfd175be4 100644 --- a/drivers/mtd/nand/raw/atmel_nand.c +++ b/drivers/mtd/nand/raw/atmel_nand.c @@ -420,7 +420,7 @@ static int pmecc_err_location(struct mtd_info *mtd) while (--timeout) { if (pmecc_readl(host->pmerrloc, elisr) & PMERRLOC_CALC_DONE) break; - WATCHDOG_RESET(); + schedule(); udelay(1); } @@ -558,7 +558,7 @@ static int atmel_nand_pmecc_read_page(struct mtd_info *mtd, while (--timeout) { if (!(pmecc_readl(host->pmecc, sr) & PMECC_SR_BUSY)) break; - WATCHDOG_RESET(); + schedule(); udelay(1); } @@ -598,7 +598,7 @@ static int atmel_nand_pmecc_write_page(struct mtd_info *mtd, while (--timeout) { if (!(pmecc_readl(host->pmecc, sr) & PMECC_SR_BUSY)) break; - WATCHDOG_RESET(); + schedule(); udelay(1); } diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c b/drivers/mtd/nand/raw/fsl_elbc_nand.c index 48a3687f272..4f0acd7c89b 100644 --- a/drivers/mtd/nand/raw/fsl_elbc_nand.c +++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c @@ -732,7 +732,6 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr, struct udevice *dev) nand->bbt_md = &bbt_mirror_descr; /* set up nand options */ - nand->options = NAND_NO_SUBPAGE_WRITE; nand->bbt_options = NAND_BBT_USE_FLASH; nand->controller = &elbc_ctrl->controller; @@ -839,7 +838,7 @@ void board_nand_init(void) static int fsl_elbc_nand_probe(struct udevice *dev) { - return fsl_elbc_chip_init(0, (void *)dev_read_addr(dev), dev); + return fsl_elbc_chip_init(0, dev_read_addr_ptr(dev), dev); } static const struct udevice_id fsl_elbc_nand_dt_ids[] = { diff --git a/drivers/mtd/nand/raw/mt7621_nand.c b/drivers/mtd/nand/raw/mt7621_nand.c index 9763ae6dc51..f6eddb84a9b 100644 --- a/drivers/mtd/nand/raw/mt7621_nand.c +++ b/drivers/mtd/nand/raw/mt7621_nand.c @@ -1184,13 +1184,12 @@ int mt7621_nfc_spl_post_init(struct mt7621_nfc *nfc) { struct nand_chip *nand = &nfc->nand; int nand_maf_id, nand_dev_id; - struct nand_flash_dev *type; + int ret; - type = nand_get_flash_type(nand, &nand_maf_id, - &nand_dev_id, NULL); + ret = nand_detect(nand, &nand_maf_id, &nand_dev_id, NULL); - if (IS_ERR(type)) - return PTR_ERR(type); + if (ret) + return ret; nand->numchips = 1; nand->mtd.size = nand->chipsize; diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c index 3daacbb3308..ef03b7789dd 100644 --- a/drivers/mtd/nand/raw/mxs_nand_spl.c +++ b/drivers/mtd/nand/raw/mxs_nand_spl.c @@ -81,13 +81,13 @@ static int mxs_flash_full_ident(struct mtd_info *mtd) { int nand_maf_id, nand_dev_id; struct nand_chip *chip = mtd_to_nand(mtd); - struct nand_flash_dev *type; + int ret; - type = nand_get_flash_type(mtd, chip, &nand_maf_id, &nand_dev_id, NULL); + ret = nand_detect(chip, &nand_maf_id, &nand_dev_id, NULL); - if (IS_ERR(type)) { + if (ret) { chip->select_chip(mtd, -1); - return PTR_ERR(type); + return ret; } return 0; diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 4b09a112882..215b9ba84fd 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -595,7 +595,7 @@ static void nand_wait_status_ready(struct mtd_info *mtd, unsigned long timeo) if (status & NAND_STATUS_READY) break; - WATCHDOG_RESET(); + schedule(); } }; @@ -2342,7 +2342,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, while (1) { unsigned int ecc_failures = mtd->ecc_stats.failed; - WATCHDOG_RESET(); + schedule(); bytes = min(mtd->writesize - col, readlen); aligned = (bytes == mtd->writesize); @@ -2695,7 +2695,7 @@ static int nand_do_read_oob(struct mtd_info *mtd, loff_t from, page = realpage & chip->pagemask; while (1) { - WATCHDOG_RESET(); + schedule(); if (ops->mode == MTD_OPS_RAW) ret = chip->ecc.read_oob_raw(mtd, chip, page); @@ -3263,7 +3263,7 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, else use_bufpoi = 0; - WATCHDOG_RESET(); + schedule(); /* Partial page write?, or need to use bounce buffer */ if (use_bufpoi) { pr_debug("%s: using write bounce buffer for buf@%p\n", @@ -3556,7 +3556,7 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, instr->state = MTD_ERASING; while (len) { - WATCHDOG_RESET(); + schedule(); /* Check if we have a bad block, we do not erase bad blocks! */ if (!instr->scrub && nand_block_checkbad(mtd, ((loff_t) page) << @@ -4261,7 +4261,7 @@ static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip, * Returns a nand_manufacturer_desc object if the manufacturer is defined * in the NAND manufacturers database, NULL otherwise. */ -static const struct nand_manufacturers *nand_get_manufacturer_desc(u8 id) +static const struct nand_manufacturer *nand_get_manufacturer_desc(u8 id) { int i; @@ -4276,12 +4276,11 @@ static const struct nand_manufacturers *nand_get_manufacturer_desc(u8 id) /* * Get the flash and manufacturer id and lookup if the type is supported. */ -struct nand_flash_dev *nand_get_flash_type(struct nand_chip *chip, int *maf_id, - int *dev_id, - struct nand_flash_dev *type) +int nand_detect(struct nand_chip *chip, int *maf_id, + int *dev_id, struct nand_flash_dev *type) { struct mtd_info *mtd = &chip->mtd; - const struct nand_manufacturers *manufacturer_desc; + const struct nand_manufacturer *manufacturer_desc; int busw, ret; u8 *id_data = chip->id.data; @@ -4291,7 +4290,7 @@ struct nand_flash_dev *nand_get_flash_type(struct nand_chip *chip, int *maf_id, */ ret = nand_reset(chip, 0); if (ret) - return ERR_PTR(ret); + return ret; /* Select the device */ chip->select_chip(mtd, 0); @@ -4299,7 +4298,7 @@ struct nand_flash_dev *nand_get_flash_type(struct nand_chip *chip, int *maf_id, /* Send the command for reading device ID */ ret = nand_readid_op(chip, 0, id_data, 2); if (ret) - return ERR_PTR(ret); + return ret; /* Read manufacturer and device IDs */ *maf_id = id_data[0]; @@ -4315,12 +4314,12 @@ struct nand_flash_dev *nand_get_flash_type(struct nand_chip *chip, int *maf_id, /* Read entire ID string */ ret = nand_readid_op(chip, 0, id_data, 8); if (ret) - return ERR_PTR(ret); + return ret; if (id_data[0] != *maf_id || id_data[1] != *dev_id) { pr_info("second ID read did not match %02x,%02x against %02x,%02x\n", *maf_id, *dev_id, id_data[0], id_data[1]); - return ERR_PTR(-ENODEV); + return -ENODEV; } chip->id.len = nand_id_len(id_data, ARRAY_SIZE(chip->id.data)); @@ -4368,7 +4367,7 @@ struct nand_flash_dev *nand_get_flash_type(struct nand_chip *chip, int *maf_id, } if (!type->name) - return ERR_PTR(-ENODEV); + return -ENODEV; if (!mtd->name) mtd->name = type->name; @@ -4401,7 +4400,7 @@ ident_done: pr_warn("bus width %d instead %d bit\n", (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, busw ? 16 : 8); - return ERR_PTR(-EINVAL); + return -EINVAL; } nand_decode_bbm_options(mtd, chip); @@ -4432,7 +4431,7 @@ ident_done: ret = nand_manufacturer_init(chip); if (ret) - return ERR_PTR(ret); + return ret; pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n", *maf_id, *dev_id); @@ -4460,9 +4459,9 @@ ident_done: pr_info("%d MiB, %s, erase size: %d KiB, page size: %d, OOB size: %d\n", (int)(chip->chipsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC", mtd->erasesize >> 10, mtd->writesize, mtd->oobsize); - return type; + return 0; } -EXPORT_SYMBOL(nand_get_flash_type); +EXPORT_SYMBOL(nand_detect); #if CONFIG_IS_ENABLED(OF_CONTROL) @@ -4547,7 +4546,6 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips, { int i, nand_maf_id, nand_dev_id; struct nand_chip *chip = mtd_to_nand(mtd); - struct nand_flash_dev *type; int ret; if (ofnode_valid(chip->flash_node)) { @@ -4560,14 +4558,13 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips, nand_set_defaults(chip, chip->options & NAND_BUSWIDTH_16); /* Read the flash type */ - type = nand_get_flash_type(chip, &nand_maf_id, - &nand_dev_id, table); + ret = nand_detect(chip, &nand_maf_id, &nand_dev_id, table); - if (IS_ERR(type)) { + if (ret) { if (!(chip->options & NAND_SCAN_SILENT_NODEV)) pr_warn("No NAND device found\n"); chip->select_chip(mtd, -1); - return PTR_ERR(type); + return ret; } /* Initialize the ->data_interface field. */ @@ -4593,7 +4590,7 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips, for (i = 1; i < maxchips; i++) { u8 id[2]; - /* See comment in nand_get_flash_type for reset */ + /* See comment in nand_detect for reset */ nand_reset(chip, i); chip->select_chip(mtd, i); diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c index 4dece1b2067..d0cfacc69b6 100644 --- a/drivers/mtd/nand/raw/nand_ids.c +++ b/drivers/mtd/nand/raw/nand_ids.c @@ -177,7 +177,7 @@ struct nand_flash_dev nand_flash_ids[] = { }; /* Manufacturer IDs */ -struct nand_manufacturers nand_manuf_ids[] = { +struct nand_manufacturer nand_manuf_ids[] = { {NAND_MFR_TOSHIBA, "Toshiba", &toshiba_nand_manuf_ops}, {NAND_MFR_SAMSUNG, "Samsung", &samsung_nand_manuf_ops}, {NAND_MFR_FUJITSU, "Fujitsu"}, diff --git a/drivers/mtd/nand/raw/nand_samsung.c b/drivers/mtd/nand/raw/nand_samsung.c index 0ab80621936..36ef48e5ec7 100644 --- a/drivers/mtd/nand/raw/nand_samsung.c +++ b/drivers/mtd/nand/raw/nand_samsung.c @@ -64,6 +64,26 @@ static void samsung_nand_decode_id(struct nand_chip *chip) extid >>= 2; mtd->erasesize = (128 * 1024) << (((extid >> 1) & 0x04) | (extid & 0x03)); + + /* Extract ECC requirements from 5th id byte*/ + extid = (chip->id.data[4] >> 4) & 0x07; + if (extid < 5) { + chip->ecc_step_ds = 512; + chip->ecc_strength_ds = 1 << extid; + } else { + chip->ecc_step_ds = 1024; + switch (extid) { + case 5: + chip->ecc_strength_ds = 24; + break; + case 6: + chip->ecc_strength_ds = 40; + break; + case 7: + chip->ecc_strength_ds = 60; + break; + } + } } else { nand_decode_ext_id(chip); } diff --git a/drivers/mtd/nand/raw/nand_util.c b/drivers/mtd/nand/raw/nand_util.c index 5150607d8a1..b2345dca7f7 100644 --- a/drivers/mtd/nand/raw/nand_util.c +++ b/drivers/mtd/nand/raw/nand_util.c @@ -103,7 +103,7 @@ int nand_erase_opts(struct mtd_info *mtd, erased_length < erase_length; erase.addr += mtd->erasesize) { - WATCHDOG_RESET(); + schedule(); if (opts->lim && (erase.addr >= (opts->offset + opts->lim))) { puts("Size of erase exceeds limit\n"); @@ -638,7 +638,7 @@ int nand_write_skip_bad(struct mtd_info *mtd, loff_t offset, size_t *length, size_t block_offset = offset & (mtd->erasesize - 1); size_t write_size, truncated_write_size; - WATCHDOG_RESET(); + schedule(); if (nand_block_isbad(mtd, block_start)) { printf("Skip bad block 0x%08llx\n", block_start); @@ -753,7 +753,7 @@ int nand_read_skip_bad(struct mtd_info *mtd, loff_t offset, size_t *length, size_t block_offset = offset & (mtd->erasesize - 1); size_t read_length; - WATCHDOG_RESET(); + schedule(); if (nand_block_isbad(mtd, offset & ~(mtd->erasesize - 1))) { printf("Skipping bad block 0x%08llx\n", diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index e5330958c7e..134bf22c805 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -579,7 +579,7 @@ static int spinand_mtd_read(struct mtd_info *mtd, loff_t from, #endif nanddev_io_for_each_page(nand, from, ops, &iter) { - WATCHDOG_RESET(); + schedule(); ret = spinand_select_target(spinand, iter.req.pos.target); if (ret) break; @@ -631,7 +631,7 @@ static int spinand_mtd_write(struct mtd_info *mtd, loff_t to, #endif nanddev_io_for_each_page(nand, to, ops, &iter) { - WATCHDOG_RESET(); + schedule(); ret = spinand_select_target(spinand, iter.req.pos.target); if (ret) break; diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index f94597c0611..08fe7d427ac 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -478,7 +478,7 @@ static int onenand_wait(struct mtd_info *mtd, int state) u32 timeo = (CONFIG_SYS_HZ * 20) / 1000; u32 time_start = get_timer(0); do { - WATCHDOG_RESET(); + schedule(); if (get_timer(time_start) > timeo) return -EIO; interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); @@ -1170,7 +1170,7 @@ static int onenand_bbt_wait(struct mtd_info *mtd, int state) u32 timeo = (CONFIG_SYS_HZ * 20) / 1000; u32 time_start = get_timer(0); do { - WATCHDOG_RESET(); + schedule(); if (get_timer(time_start) > timeo) return ONENAND_BBT_READ_FATAL_ERROR; interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index f461082e03d..e192f97efdc 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -10,13 +10,69 @@ #include <common.h> #include <dm.h> #include <errno.h> +#include <linux/mtd/spi-nor.h> #include <log.h> #include <malloc.h> #include <spi.h> #include <spi_flash.h> +#include <spi-mem.h> #include "sf_internal.h" +static int spi_nor_create_read_dirmap(struct spi_nor *nor) +{ + struct spi_mem_dirmap_info info = { + .op_tmpl = SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 0), + SPI_MEM_OP_ADDR(nor->addr_width, 0, 0), + SPI_MEM_OP_DUMMY(nor->read_dummy, 0), + SPI_MEM_OP_DATA_IN(0, NULL, 0)), + .offset = 0, + .length = nor->mtd.size, + }; + struct spi_mem_op *op = &info.op_tmpl; + + /* get transfer protocols. */ + spi_nor_setup_op(nor, op, nor->read_proto); + op->data.buswidth = spi_nor_get_protocol_data_nbits(nor->read_proto); + + /* convert the dummy cycles to the number of bytes */ + op->dummy.nbytes = (nor->read_dummy * op->dummy.buswidth) / 8; + if (spi_nor_protocol_is_dtr(nor->read_proto)) + op->dummy.nbytes *= 2; + + nor->dirmap.rdesc = spi_mem_dirmap_create(nor->spi, &info); + if (IS_ERR(nor->dirmap.rdesc)) + return PTR_ERR(nor->dirmap.rdesc); + + return 0; +} + +static int spi_nor_create_write_dirmap(struct spi_nor *nor) +{ + struct spi_mem_dirmap_info info = { + .op_tmpl = SPI_MEM_OP(SPI_MEM_OP_CMD(nor->program_opcode, 0), + SPI_MEM_OP_ADDR(nor->addr_width, 0, 0), + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_DATA_OUT(0, NULL, 0)), + .offset = 0, + .length = nor->mtd.size, + }; + struct spi_mem_op *op = &info.op_tmpl; + + /* get transfer protocols. */ + spi_nor_setup_op(nor, op, nor->write_proto); + op->data.buswidth = spi_nor_get_protocol_data_nbits(nor->write_proto); + + if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second) + op->addr.nbytes = 0; + + nor->dirmap.wdesc = spi_mem_dirmap_create(nor->spi, &info); + if (IS_ERR(nor->dirmap.wdesc)) + return PTR_ERR(nor->dirmap.wdesc); + + return 0; +} + /** * spi_flash_probe_slave() - Probe for a SPI flash device on a bus * @@ -45,6 +101,16 @@ static int spi_flash_probe_slave(struct spi_flash *flash) if (ret) goto err_read_id; + if (CONFIG_IS_ENABLED(SPI_DIRMAP)) { + ret = spi_nor_create_read_dirmap(flash); + if (ret) + return ret; + + ret = spi_nor_create_write_dirmap(flash); + if (ret) + return ret; + } + if (CONFIG_IS_ENABLED(SPI_FLASH_MTD)) ret = spi_flash_mtd_register(flash); @@ -83,6 +149,11 @@ struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs, void spi_flash_free(struct spi_flash *flash) { + if (CONFIG_IS_ENABLED(SPI_DIRMAP)) { + spi_mem_dirmap_destroy(flash->dirmap.wdesc); + spi_mem_dirmap_destroy(flash->dirmap.rdesc); + } + if (CONFIG_IS_ENABLED(SPI_FLASH_MTD)) spi_flash_mtd_unregister(flash); @@ -153,6 +224,11 @@ static int spi_flash_std_remove(struct udevice *dev) struct spi_flash *flash = dev_get_uclass_priv(dev); int ret; + if (CONFIG_IS_ENABLED(SPI_DIRMAP)) { + spi_mem_dirmap_destroy(flash->dirmap.wdesc); + spi_mem_dirmap_destroy(flash->dirmap.rdesc); + } + ret = spi_nor_remove(flash); if (ret) return ret; diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index e3c86e080a1..c73636d7d11 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -246,9 +246,9 @@ static u8 spi_nor_get_cmd_ext(const struct spi_nor *nor, * need to be initialized. * @proto: the protocol from which the properties need to be set. */ -static void spi_nor_setup_op(const struct spi_nor *nor, - struct spi_mem_op *op, - const enum spi_nor_protocol proto) +void spi_nor_setup_op(const struct spi_nor *nor, + struct spi_mem_op *op, + const enum spi_nor_protocol proto) { u8 ext; @@ -369,13 +369,29 @@ static ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len, while (remaining) { op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX; - ret = spi_mem_adjust_op_size(nor->spi, &op); - if (ret) - return ret; - ret = spi_mem_exec_op(nor->spi, &op); - if (ret) - return ret; + if (CONFIG_IS_ENABLED(SPI_DIRMAP) && nor->dirmap.rdesc) { + /* + * Record current operation information which may be used + * when the address or data length exceeds address mapping. + */ + memcpy(&nor->dirmap.rdesc->info.op_tmpl, &op, + sizeof(struct spi_mem_op)); + ret = spi_mem_dirmap_read(nor->dirmap.rdesc, + op.addr.val, op.data.nbytes, + op.data.buf.in); + if (ret < 0) + return ret; + op.data.nbytes = ret; + } else { + ret = spi_mem_adjust_op_size(nor->spi, &op); + if (ret) + return ret; + + ret = spi_mem_exec_op(nor->spi, &op); + if (ret) + return ret; + } op.addr.val += op.data.nbytes; remaining -= op.data.nbytes; @@ -400,14 +416,21 @@ static ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, spi_nor_setup_op(nor, &op, nor->write_proto); - ret = spi_mem_adjust_op_size(nor->spi, &op); - if (ret) - return ret; - op.data.nbytes = len < op.data.nbytes ? len : op.data.nbytes; + if (CONFIG_IS_ENABLED(SPI_DIRMAP) && nor->dirmap.wdesc) { + memcpy(&nor->dirmap.wdesc->info.op_tmpl, &op, + sizeof(struct spi_mem_op)); + op.data.nbytes = spi_mem_dirmap_write(nor->dirmap.wdesc, op.addr.val, + op.data.nbytes, op.data.buf.out); + } else { + ret = spi_mem_adjust_op_size(nor->spi, &op); + if (ret) + return ret; + op.data.nbytes = len < op.data.nbytes ? len : op.data.nbytes; - ret = spi_mem_exec_op(nor->spi, &op); - if (ret) - return ret; + ret = spi_mem_exec_op(nor->spi, &op); + if (ret) + return ret; + } return op.data.nbytes; } @@ -935,7 +958,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) addr_known = true; while (len) { - WATCHDOG_RESET(); + schedule(); if (!IS_ENABLED(CONFIG_SPL_BUILD) && ctrlc()) { addr_known = false; ret = -EINTR; @@ -1698,7 +1721,7 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, for (i = 0; i < len; ) { ssize_t written; loff_t addr = to + i; - WATCHDOG_RESET(); + schedule(); /* * If page_size is a power of two, the offset can be quickly diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 4fe8b0d92c4..65eb35a9185 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -425,6 +425,11 @@ const struct flash_info spi_nor_ids[] = { SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, { + INFO("w25q512jvq", 0xef4020, 0, 64 * 1024, 1024, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + }, + { INFO("w25q01jv", 0xef4021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) diff --git a/drivers/net/octeontx2/nix.c b/drivers/net/octeontx2/nix.c index a5665a25f2a..f596b6bca87 100644 --- a/drivers/net/octeontx2/nix.c +++ b/drivers/net/octeontx2/nix.c @@ -580,7 +580,7 @@ int nix_lf_xmit(struct udevice *dev, void *pkt, int pkt_len) __iowmb(); result = lmt_submit((u64)(nix->nix_base + NIXX_LF_OP_SENDX(0))); - WATCHDOG_RESET(); + schedule(); } while (result == 0); return 0; diff --git a/drivers/net/octeontx2/nix_af.c b/drivers/net/octeontx2/nix_af.c index cd098d6cd6a..c945ea0f5f2 100644 --- a/drivers/net/octeontx2/nix_af.c +++ b/drivers/net/octeontx2/nix_af.c @@ -65,7 +65,7 @@ int npa_attach_aura(struct nix_af *nix_af, int lf, start = get_timer(0); while ((res->s.compcode == NPA_AQ_COMP_E_NOTDONE) && (get_timer(start) < 1000)) - WATCHDOG_RESET(); + schedule(); if (res->s.compcode != NPA_AQ_COMP_E_GOOD) { printf("%s: Error: result 0x%x not good\n", __func__, res->s.compcode); @@ -111,7 +111,7 @@ int npa_attach_pool(struct nix_af *nix_af, int lf, start = get_timer(0); while ((res->s.compcode == NPA_AQ_COMP_E_NOTDONE) && (get_timer(start) < 1000)) - WATCHDOG_RESET(); + schedule(); if (res->s.compcode != NPA_AQ_COMP_E_GOOD) { printf("%s: Error: result 0x%x not good\n", @@ -136,7 +136,7 @@ int npa_lf_admin_setup(struct npa *npa, int lf, dma_addr_t aura_base) do { lf_rst.u = npa_af_reg_read(npa_af, NPA_AF_LF_RST()); - WATCHDOG_RESET(); + schedule(); } while (lf_rst.s.exec); /* Set Aura size and enable caching of contexts */ @@ -199,7 +199,7 @@ int npa_lf_admin_shutdown(struct nix_af *nix_af, int lf, u32 pool_count) start = get_timer(0); while ((res->s.compcode == NPA_AQ_COMP_E_NOTDONE) && (get_timer(start) < 1000)) - WATCHDOG_RESET(); + schedule(); if (res->s.compcode != NPA_AQ_COMP_E_GOOD) { printf("%s: Error: result 0x%x not good for lf %d\n" @@ -235,7 +235,7 @@ int npa_lf_admin_shutdown(struct nix_af *nix_af, int lf, u32 pool_count) start = get_timer(0); while ((res->s.compcode == NPA_AQ_COMP_E_NOTDONE) && (get_timer(start) < 1000)) - WATCHDOG_RESET(); + schedule(); if (res->s.compcode != NPA_AQ_COMP_E_GOOD) { printf("%s: Error: result 0x%x not good for lf %d\n" @@ -255,7 +255,7 @@ int npa_lf_admin_shutdown(struct nix_af *nix_af, int lf, u32 pool_count) do { lf_rst.u = npa_af_reg_read(npa, NPA_AF_LF_RST()); - WATCHDOG_RESET(); + schedule(); } while (lf_rst.s.exec); return 0; @@ -286,7 +286,7 @@ int npa_af_setup(struct npa_af *npa_af) /* Wait for reset to complete */ do { blk_rst.u = npa_af_reg_read(npa_af, NPA_AF_BLK_RST()); - WATCHDOG_RESET(); + schedule(); } while (blk_rst.s.busy); /* Set little Endian */ @@ -318,7 +318,7 @@ int npa_af_shutdown(struct npa_af *npa_af) /* Wait for reset to complete */ do { blk_rst.u = npa_af_reg_read(npa_af, NPA_AF_BLK_RST()); - WATCHDOG_RESET(); + schedule(); } while (blk_rst.s.busy); rvu_aq_free(&npa_af->aq); @@ -481,7 +481,7 @@ static int nix_aq_issue_command(struct nix_af *nix_af, start = get_timer(0); /* Wait for completion */ do { - WATCHDOG_RESET(); + schedule(); dsb(); } while (result->s.compcode == 0 && get_timer(start) < 2); @@ -645,7 +645,7 @@ int nix_lf_admin_setup(struct nix *nix) do { lf_rst.u = nix_af_reg_read(nix_af, NIXX_AF_LF_RST()); - WATCHDOG_RESET(); + schedule(); } while (lf_rst.s.exec); /* Config NIX RQ HW context and base*/ @@ -767,7 +767,7 @@ int nix_lf_admin_shutdown(struct nix_af *nix_af, int lf, do { sw_sync.u = nix_af_reg_read(nix_af, NIXX_AF_RX_SW_SYNC()); - WATCHDOG_RESET(); + schedule(); } while (sw_sync.s.ena); for (index = 0; index < rq_count; index++) { @@ -832,7 +832,7 @@ int nix_lf_admin_shutdown(struct nix_af *nix_af, int lf, do { lf_rst.u = nix_af_reg_read(nix_af, NIXX_AF_LF_RST()); - WATCHDOG_RESET(); + schedule(); } while (lf_rst.s.exec); return 0; @@ -972,7 +972,7 @@ int npc_af_shutdown(struct nix_af *nix_af) /* Wait for reset to complete */ do { blk_rst.u = npc_af_reg_read(nix_af, NPC_AF_BLK_RST()); - WATCHDOG_RESET(); + schedule(); } while (blk_rst.s.busy); debug("%s: npc af reset --\n", __func__); @@ -1008,7 +1008,7 @@ int nix_af_setup(struct nix_af *nix_af) /* Wait for reset to complete */ do { blk_rst.u = nix_af_reg_read(nix_af, NIXX_AF_BLK_RST()); - WATCHDOG_RESET(); + schedule(); } while (blk_rst.s.busy); /* Put in LE mode */ @@ -1031,7 +1031,7 @@ int nix_af_setup(struct nix_af *nix_af) /* Wait for calibration to complete */ do { af_status.u = nix_af_reg_read(nix_af, NIXX_AF_STATUS()); - WATCHDOG_RESET(); + schedule(); } while (af_status.s.calibrate_done == 0); af_cfg.u = nix_af_reg_read(nix_af, NIXX_AF_CFG()); @@ -1091,7 +1091,7 @@ int nix_af_shutdown(struct nix_af *nix_af) /* Wait for reset to complete */ do { blk_rst.u = nix_af_reg_read(nix_af, NIXX_AF_BLK_RST()); - WATCHDOG_RESET(); + schedule(); } while (blk_rst.s.busy); rvu_aq_free(&nix_af->aq); diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 4e8dd4badd6..61a6c83e335 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -500,10 +500,13 @@ static int zynq_gem_init(struct udevice *dev) } #endif - ret = clk_set_rate(&priv->tx_clk, clk_rate); - if (IS_ERR_VALUE(ret)) { - dev_err(dev, "failed to set tx clock rate\n"); - return ret; + ret = clk_get_rate(&priv->tx_clk); + if (ret != clk_rate) { + ret = clk_set_rate(&priv->tx_clk, clk_rate); + if (IS_ERR_VALUE(ret)) { + dev_err(dev, "failed to set tx clock rate %ld\n", clk_rate); + return ret; + } } ret = clk_enable(&priv->tx_clk); diff --git a/drivers/nvme/Kconfig b/drivers/nvme/Kconfig index 0cb465160bb..73edb355160 100644 --- a/drivers/nvme/Kconfig +++ b/drivers/nvme/Kconfig @@ -4,8 +4,6 @@ config NVME bool "NVM Express device support" - depends on BLK - select HAVE_BLOCK_DEVICE help This option enables support for NVM Express devices. It supports basic functions of NVMe (read/write). diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index 5fd2fb9ed6a..6d0d3f3ca2b 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -71,7 +71,7 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2, } nprps = DIV_ROUND_UP(length, page_size); - num_pages = DIV_ROUND_UP(nprps, prps_per_page); + num_pages = DIV_ROUND_UP(nprps - 1, prps_per_page - 1); if (nprps > dev->prp_entry_num) { free(dev->prp_pool); @@ -84,13 +84,13 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2, printf("Error: malloc prp_pool fail\n"); return -ENOMEM; } - dev->prp_entry_num = prps_per_page * num_pages; + dev->prp_entry_num = num_pages * (prps_per_page - 1) + 1; } prp_pool = dev->prp_pool; i = 0; while (nprps) { - if (i == ((page_size >> 3) - 1)) { + if ((i == (prps_per_page - 1)) && nprps > 1) { *(prp_pool + i) = cpu_to_le64((ulong)prp_pool + page_size); i = 0; @@ -103,7 +103,7 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2, *prp2 = (ulong)dev->prp_pool; flush_dcache_range((ulong)dev->prp_pool, (ulong)dev->prp_pool + - dev->prp_entry_num * sizeof(u64)); + num_pages * page_size); return 0; } @@ -888,7 +888,7 @@ int nvme_init(struct udevice *udev) sprintf(name, "blk#%d", i); /* The real blksz and size will be set by nvme_blk_probe() */ - ret = blk_create_devicef(udev, "nvme-blk", name, IF_TYPE_NVME, + ret = blk_create_devicef(udev, "nvme-blk", name, UCLASS_NVME, -1, 512, 0, &ns_udev); if (ret) goto free_id; diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index c25b42c68f5..cf4d5908d73 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -143,12 +143,6 @@ config STI_USB_PHY used by USB2 and USB3 Host controllers available on STiH407 SoC families. -config PHY_QCOM_IPQ4019_USB - tristate "Qualcomm IPQ4019 USB PHY driver" - depends on PHY && ARCH_IPQ40XX - help - Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s. - config PHY_RCAR_GEN2 tristate "Renesas R-Car Gen2 USB PHY" depends on PHY && RCAR_GEN2 @@ -220,14 +214,6 @@ config MESON_AXG_MIPI_PCIE_ANALOG_PHY This is the generic phy driver for the Amlogic Meson AXG MIPI PCIe Analog PHY. -config MSM8916_USB_PHY - bool "Qualcomm MSM8916 USB PHY support" - depends on PHY - help - Support the USB PHY in msm8916 - - This PHY is found on qualcomm dragonboard410c development board. - config OMAP_USB2_PHY bool "Support OMAP's USB2 PHY" depends on PHY @@ -298,5 +284,6 @@ config PHY_XILINX_ZYNQMP source "drivers/phy/rockchip/Kconfig" source "drivers/phy/cadence/Kconfig" source "drivers/phy/ti/Kconfig" +source "drivers/phy/qcom/Kconfig" endmenu diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index d95439c4257..a3b9f3c5b18 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -21,7 +21,6 @@ obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o obj-$(CONFIG_AM654_PHY) += phy-ti-am654.o obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o -obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o obj-$(CONFIG_PHY_RCAR_GEN3) += phy-rcar-gen3.o obj-$(CONFIG_PHY_STM32_USBPHYC) += phy-stm32-usbphyc.o @@ -30,7 +29,6 @@ obj-$(CONFIG_MESON_GXL_USB_PHY) += meson-gxl-usb2.o obj-$(CONFIG_MESON_G12A_USB_PHY) += meson-g12a-usb2.o meson-g12a-usb3-pcie.o obj-$(CONFIG_MESON_AXG_MIPI_DPHY) += meson-axg-mipi-dphy.o obj-$(CONFIG_MESON_AXG_MIPI_PCIE_ANALOG_PHY) += meson-axg-mipi-pcie-analog.o -obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o obj-$(CONFIG_OMAP_USB2_PHY) += omap-usb2-phy.o obj-$(CONFIG_KEYSTONE_USB_PHY) += keystone-usb-phy.o obj-$(CONFIG_MT7620_USB_PHY) += mt7620-usb-phy.o @@ -42,3 +40,4 @@ obj-$(CONFIG_PHY_IMX8MQ_USB) += phy-imx8mq-usb.o obj-$(CONFIG_PHY_XILINX_ZYNQMP) += phy-zynqmp.o obj-y += cadence/ obj-y += ti/ +obj-y += qcom/ diff --git a/drivers/phy/qcom/Kconfig b/drivers/phy/qcom/Kconfig new file mode 100644 index 00000000000..f4ca174805a --- /dev/null +++ b/drivers/phy/qcom/Kconfig @@ -0,0 +1,29 @@ +config MSM8916_USB_PHY + bool "Qualcomm MSM8916 USB PHY support" + depends on PHY + help + Support the USB PHY in msm8916 + + This PHY is found on qualcomm dragonboard410c development board. + +config PHY_QCOM_IPQ4019_USB + tristate "Qualcomm IPQ4019 USB PHY driver" + depends on PHY && ARCH_IPQ40XX + help + Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s. + +config PHY_QCOM_USB_HS_28NM + tristate "Qualcomm 28nm High-Speed PHY" + depends on PHY && ARCH_SNAPDRAGON + help + Enable this to support the Qualcomm Synopsys DesignWare Core 28nm + High-Speed PHY driver. This driver supports the Hi-Speed PHY which + is usually paired with either the ChipIdea or Synopsys DWC3 USB + IPs on MSM SOCs. + +config PHY_QCOM_USB_SS + tristate "Qualcomm USB Super-Speed PHY driver" + depends on PHY && ARCH_SNAPDRAGON + help + Enable this to support the Super-Speed USB transceiver on various + Qualcomm chipsets. diff --git a/drivers/phy/qcom/Makefile b/drivers/phy/qcom/Makefile new file mode 100644 index 00000000000..2113f178c0c --- /dev/null +++ b/drivers/phy/qcom/Makefile @@ -0,0 +1,4 @@ +obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o +obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o +obj-$(CONFIG_PHY_QCOM_USB_HS_28NM) += phy-qcom-usb-hs-28nm.o +obj-$(CONFIG_PHY_QCOM_USB_SS) += phy-qcom-usb-ss.o diff --git a/drivers/phy/msm8916-usbh-phy.c b/drivers/phy/qcom/msm8916-usbh-phy.c index 7c9d030a4d8..7c9d030a4d8 100644 --- a/drivers/phy/msm8916-usbh-phy.c +++ b/drivers/phy/qcom/msm8916-usbh-phy.c diff --git a/drivers/phy/phy-qcom-ipq4019-usb.c b/drivers/phy/qcom/phy-qcom-ipq4019-usb.c index 5808489249f..5808489249f 100644 --- a/drivers/phy/phy-qcom-ipq4019-usb.c +++ b/drivers/phy/qcom/phy-qcom-ipq4019-usb.c diff --git a/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c b/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c new file mode 100644 index 00000000000..14c3d8394df --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c @@ -0,0 +1,250 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Sumit Garg <sumit.garg@linaro.org> + * + * Based on Linux driver + */ + +#include <common.h> +#include <dm.h> +#include <generic-phy.h> +#include <reset.h> +#include <clk.h> +#include <asm/io.h> +#include <linux/delay.h> + +/* PHY register and bit definitions */ +#define PHY_CTRL_COMMON0 0x078 +#define SIDDQ BIT(2) + +struct hsphy_init_seq { + int offset; + int val; + int delay; +}; + +struct hsphy_data { + const struct hsphy_init_seq *init_seq; + unsigned int init_seq_num; +}; + +struct hsphy_priv { + void __iomem *base; + struct clk_bulk clks; + struct reset_ctl phy_rst; + struct reset_ctl por_rst; + const struct hsphy_data *data; +}; + +static int hsphy_power_on(struct phy *phy) +{ + struct hsphy_priv *priv = dev_get_priv(phy->dev); + u32 val; + + val = readb(priv->base + PHY_CTRL_COMMON0); + val &= ~SIDDQ; + writeb(val, priv->base + PHY_CTRL_COMMON0); + + return 0; +} + +static int hsphy_power_off(struct phy *phy) +{ + struct hsphy_priv *priv = dev_get_priv(phy->dev); + u32 val; + + val = readb(priv->base + PHY_CTRL_COMMON0); + val |= SIDDQ; + writeb(val, priv->base + PHY_CTRL_COMMON0); + + return 0; +} + +static int hsphy_reset(struct hsphy_priv *priv) +{ + int ret; + + ret = reset_assert(&priv->phy_rst); + if (ret) + return ret; + + udelay(10); + + ret = reset_deassert(&priv->phy_rst); + if (ret) + return ret; + + udelay(80); + + return 0; +} + +static void hsphy_init_sequence(struct hsphy_priv *priv) +{ + const struct hsphy_data *data = priv->data; + const struct hsphy_init_seq *seq; + int i; + + /* Device match data is optional. */ + if (!data) + return; + + seq = data->init_seq; + + for (i = 0; i < data->init_seq_num; i++, seq++) { + writeb(seq->val, priv->base + seq->offset); + if (seq->delay) + udelay(seq->delay); + } +} + +static int hsphy_por_reset(struct hsphy_priv *priv) +{ + int ret; + u32 val; + + ret = reset_assert(&priv->por_rst); + if (ret) + return ret; + + /* + * The Femto PHY is POR reset in the following scenarios. + * + * 1. After overriding the parameter registers. + * 2. Low power mode exit from PHY retention. + * + * Ensure that SIDDQ is cleared before bringing the PHY + * out of reset. + */ + val = readb(priv->base + PHY_CTRL_COMMON0); + val &= ~SIDDQ; + writeb(val, priv->base + PHY_CTRL_COMMON0); + + /* + * As per databook, 10 usec delay is required between + * PHY POR assert and de-assert. + */ + udelay(10); + ret = reset_deassert(&priv->por_rst); + if (ret) + return ret; + + /* + * As per databook, it takes 75 usec for PHY to stabilize + * after the reset. + */ + udelay(80); + + return 0; +} + +static int hsphy_clk_init(struct udevice *dev, struct hsphy_priv *priv) +{ + int ret; + + ret = clk_get_bulk(dev, &priv->clks); + if (ret == -ENOSYS || ret == -ENOENT) + return 0; + if (ret) + return ret; + + ret = clk_enable_bulk(&priv->clks); + if (ret) { + clk_release_bulk(&priv->clks); + return ret; + } + + return 0; +} + +static int hsphy_init(struct phy *phy) +{ + struct hsphy_priv *priv = dev_get_priv(phy->dev); + int ret; + + ret = hsphy_clk_init(phy->dev, priv); + if (ret) + return ret; + + ret = hsphy_reset(priv); + if (ret) + return ret; + + hsphy_init_sequence(priv); + + hsphy_por_reset(priv); + if (ret) + return ret; + + return 0; +} + +static int hsphy_probe(struct udevice *dev) +{ + struct hsphy_priv *priv = dev_get_priv(dev); + int ret; + + priv->base = (void *)dev_read_addr(dev); + if ((ulong)priv->base == FDT_ADDR_T_NONE) + return -EINVAL; + + ret = reset_get_by_name(dev, "phy", &priv->phy_rst); + if (ret) + return ret; + + ret = reset_get_by_name(dev, "por", &priv->por_rst); + if (ret) + return ret; + + priv->data = (const struct hsphy_data *)dev_get_driver_data(dev); + + return 0; +} + +static struct phy_ops hsphy_ops = { + .power_on = hsphy_power_on, + .power_off = hsphy_power_off, + .init = hsphy_init, +}; + +/* + * The macro is used to define an initialization sequence. Each tuple + * is meant to program 'value' into phy register at 'offset' with 'delay' + * in us followed. + */ +#define HSPHY_INIT_CFG(o, v, d) { .offset = o, .val = v, .delay = d, } + +static const struct hsphy_init_seq init_seq_femtophy[] = { + HSPHY_INIT_CFG(0xc0, 0x01, 0), + HSPHY_INIT_CFG(0xe8, 0x0d, 0), + HSPHY_INIT_CFG(0x74, 0x12, 0), + HSPHY_INIT_CFG(0x98, 0x63, 0), + HSPHY_INIT_CFG(0x9c, 0x03, 0), + HSPHY_INIT_CFG(0xa0, 0x1d, 0), + HSPHY_INIT_CFG(0xa4, 0x03, 0), + HSPHY_INIT_CFG(0x8c, 0x23, 0), + HSPHY_INIT_CFG(0x78, 0x08, 0), + HSPHY_INIT_CFG(0x7c, 0xdc, 0), + HSPHY_INIT_CFG(0x90, 0xe0, 20), + HSPHY_INIT_CFG(0x74, 0x10, 0), + HSPHY_INIT_CFG(0x90, 0x60, 0), +}; + +static const struct hsphy_data data_femtophy = { + .init_seq = init_seq_femtophy, + .init_seq_num = ARRAY_SIZE(init_seq_femtophy), +}; + +static const struct udevice_id hsphy_ids[] = { + { .compatible = "qcom,usb-hs-28nm-femtophy", .data = (ulong)&data_femtophy }, + { } +}; + +U_BOOT_DRIVER(qcom_usb_hs_28nm) = { + .name = "qcom-usb-hs-28nm", + .id = UCLASS_PHY, + .of_match = hsphy_ids, + .ops = &hsphy_ops, + .probe = hsphy_probe, + .priv_auto = sizeof(struct hsphy_priv), +}; diff --git a/drivers/phy/qcom/phy-qcom-usb-ss.c b/drivers/phy/qcom/phy-qcom-usb-ss.c new file mode 100644 index 00000000000..4e816879c6a --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-usb-ss.c @@ -0,0 +1,154 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Sumit Garg <sumit.garg@linaro.org> + * + * Based on Linux driver + */ + +#include <common.h> +#include <dm.h> +#include <generic-phy.h> +#include <linux/bitops.h> +#include <asm/io.h> +#include <reset.h> +#include <clk.h> +#include <linux/delay.h> + +#define PHY_CTRL0 0x6C +#define PHY_CTRL1 0x70 +#define PHY_CTRL2 0x74 +#define PHY_CTRL4 0x7C + +/* PHY_CTRL bits */ +#define REF_PHY_EN BIT(0) +#define LANE0_PWR_ON BIT(2) +#define SWI_PCS_CLK_SEL BIT(4) +#define TST_PWR_DOWN BIT(4) +#define PHY_RESET BIT(7) + +struct ssphy_priv { + void __iomem *base; + struct clk_bulk clks; + struct reset_ctl com_rst; + struct reset_ctl phy_rst; +}; + +static inline void ssphy_updatel(void __iomem *addr, u32 mask, u32 val) +{ + writel((readl(addr) & ~mask) | val, addr); +} + +static int ssphy_do_reset(struct ssphy_priv *priv) +{ + int ret; + + ret = reset_assert(&priv->com_rst); + if (ret) + return ret; + + ret = reset_assert(&priv->phy_rst); + if (ret) + return ret; + + udelay(10); + + ret = reset_deassert(&priv->com_rst); + if (ret) + return ret; + + ret = reset_deassert(&priv->phy_rst); + if (ret) + return ret; + + return 0; +} + +static int ssphy_power_on(struct phy *phy) +{ + struct ssphy_priv *priv = dev_get_priv(phy->dev); + int ret; + + ret = ssphy_do_reset(priv); + if (ret) + return ret; + + writeb(SWI_PCS_CLK_SEL, priv->base + PHY_CTRL0); + ssphy_updatel(priv->base + PHY_CTRL4, LANE0_PWR_ON, LANE0_PWR_ON); + ssphy_updatel(priv->base + PHY_CTRL2, REF_PHY_EN, REF_PHY_EN); + ssphy_updatel(priv->base + PHY_CTRL4, TST_PWR_DOWN, 0); + + return 0; +} + +static int ssphy_power_off(struct phy *phy) +{ + struct ssphy_priv *priv = dev_get_priv(phy->dev); + + ssphy_updatel(priv->base + PHY_CTRL4, LANE0_PWR_ON, 0); + ssphy_updatel(priv->base + PHY_CTRL2, REF_PHY_EN, 0); + ssphy_updatel(priv->base + PHY_CTRL4, TST_PWR_DOWN, TST_PWR_DOWN); + + return 0; +} + +static int ssphy_clk_init(struct udevice *dev, struct ssphy_priv *priv) +{ + int ret; + + ret = clk_get_bulk(dev, &priv->clks); + if (ret == -ENOSYS || ret == -ENOENT) + return 0; + if (ret) + return ret; + + ret = clk_enable_bulk(&priv->clks); + if (ret) { + clk_release_bulk(&priv->clks); + return ret; + } + + return 0; +} + +static int ssphy_probe(struct udevice *dev) +{ + struct ssphy_priv *priv = dev_get_priv(dev); + int ret; + + priv->base = (void *)dev_read_addr(dev); + if ((ulong)priv->base == FDT_ADDR_T_NONE) + return -EINVAL; + + ret = ssphy_clk_init(dev, priv); + if (ret) + return ret; + + ret = reset_get_by_name(dev, "com", &priv->com_rst); + if (ret) + return ret; + + ret = reset_get_by_name(dev, "phy", &priv->phy_rst); + if (ret) + return ret; + + return 0; +} + +static struct phy_ops ssphy_ops = { + .power_on = ssphy_power_on, + .power_off = ssphy_power_off, +}; + +static const struct udevice_id ssphy_ids[] = { + { .compatible = "qcom,usb-ss-28nm-phy" }, + { } +}; + +U_BOOT_DRIVER(qcom_usb_ss) = { + .name = "qcom-usb-ss", + .id = UCLASS_PHY, + .of_match = ssphy_ids, + .ops = &ssphy_ops, + .probe = ssphy_probe, + .priv_auto = sizeof(struct ssphy_priv), +}; diff --git a/drivers/pinctrl/aspeed/pinctrl_ast2500.c b/drivers/pinctrl/aspeed/pinctrl_ast2500.c index 3c2e10b88e8..93920a6389b 100644 --- a/drivers/pinctrl/aspeed/pinctrl_ast2500.c +++ b/drivers/pinctrl/aspeed/pinctrl_ast2500.c @@ -61,6 +61,8 @@ static const struct ast2500_group_config ast2500_groups[] = { { "MDIO2", 5, (1 << 2) }, { "SD1", 5, (1 << 0) }, { "SD2", 5, (1 << 1) }, + { "FWSPICS1", 3, (1 << 24) }, + { "SPI1CS1", 1, (1 << 15) }, }; static int ast2500_pinctrl_get_groups_count(struct udevice *dev) diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index 990cd19286f..b755fa42b4f 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -257,10 +257,12 @@ static int stm32_pinctrl_probe(struct udevice *dev) return 0; } -static int stm32_gpio_config(struct gpio_desc *desc, +static int stm32_gpio_config(ofnode node, + struct gpio_desc *desc, const struct stm32_gpio_ctl *ctl) { struct stm32_gpio_priv *priv = dev_get_priv(desc->dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(desc->dev); struct stm32_gpio_regs *regs = priv->regs; struct stm32_pinctrl_priv *ctrl_priv; int ret; @@ -291,6 +293,8 @@ static int stm32_gpio_config(struct gpio_desc *desc, index = desc->offset; clrsetbits_le32(®s->otyper, OTYPE_MSK << index, ctl->otype << index); + uc_priv->name[desc->offset] = strdup(ofnode_get_name(node)); + hwspinlock_unlock(&ctrl_priv->hws); return 0; @@ -385,7 +389,7 @@ static int stm32_pinctrl_config(ofnode node) if (rv) return rv; desc.offset = gpio_dsc.pin; - rv = stm32_gpio_config(&desc, &gpio_ctl); + rv = stm32_gpio_config(node, &desc, &gpio_ctl); log_debug("rv = %d\n\n", rv); if (rv) return rv; diff --git a/drivers/power/domain/zynqmp-power-domain.c b/drivers/power/domain/zynqmp-power-domain.c index 6943658be42..adbbb5fdd93 100644 --- a/drivers/power/domain/zynqmp-power-domain.c +++ b/drivers/power/domain/zynqmp-power-domain.c @@ -25,7 +25,10 @@ static int zynqmp_power_domain_request(struct power_domain *power_domain) { dev_dbg(power_domain->dev, "Request for id: %ld\n", power_domain->id); - return zynqmp_pmufw_node(power_domain->id); + if (IS_ENABLED(CONFIG_ARCH_ZYNQMP)) + return zynqmp_pmufw_node(power_domain->id); + + return 0; } static int zynqmp_power_domain_free(struct power_domain *power_domain) diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index 66b16b06e0b..0478f2aa1d4 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -216,10 +216,10 @@ config PMIC_MAX8997 - MUIC - Others -config PMIC_PM8916 - bool "Enable Driver Model for Qualcomm PM8916 PMIC" +config PMIC_QCOM + bool "Enable Driver Model for Qualcomm generic PMIC" ---help--- - The PM8916 is a PMIC connected to one (or several) processors + The Qcom PMIC is connected to one (or several) processors with SPMI bus. It has 2 slaves with several peripherals: - 18x LDO - 4x GPIO @@ -229,7 +229,7 @@ config PMIC_PM8916 - Vibrator drivers - Others - Driver binding info: doc/device-tree-bindings/pmic/pm8916.txt + Driver binding info: doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt config PMIC_RK8XX bool "Enable support for Rockchip PMIC RK8XX" diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index f73b3262559..e1d35454904 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -20,7 +20,7 @@ obj-$(CONFIG_PMIC_ACT8846) += act8846.o obj-$(CONFIG_PMIC_AS3722) += as3722.o as3722_gpio.o obj-$(CONFIG_$(SPL_)PMIC_AXP) += axp.o obj-$(CONFIG_PMIC_MAX8997) += max8997.o -obj-$(CONFIG_PMIC_PM8916) += pm8916.o +obj-$(CONFIG_PMIC_QCOM) += pmic_qcom.o obj-$(CONFIG_$(SPL_TPL_)PMIC_RK8XX) += rk8xx.o obj-$(CONFIG_PMIC_RN5T567) += rn5t567.o obj-$(CONFIG_PMIC_TPS65090) += tps65090.o diff --git a/drivers/power/pmic/pm8916.c b/drivers/power/pmic/pmic_qcom.c index 5f4386d4adf..ad8daf43f06 100644 --- a/drivers/power/pmic/pm8916.c +++ b/drivers/power/pmic/pmic_qcom.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Qualcomm pm8916 pmic driver + * Qualcomm generic pmic driver * * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com> */ @@ -13,19 +13,19 @@ #define PID_MASK (0xFF << PID_SHIFT) #define REG_MASK 0xFF -struct pm8916_priv { +struct pmic_qcom_priv { uint32_t usid; /* Slave ID on SPMI bus */ }; -static int pm8916_reg_count(struct udevice *dev) +static int pmic_qcom_reg_count(struct udevice *dev) { return 0xFFFF; } -static int pm8916_write(struct udevice *dev, uint reg, const uint8_t *buff, - int len) +static int pmic_qcom_write(struct udevice *dev, uint reg, const uint8_t *buff, + int len) { - struct pm8916_priv *priv = dev_get_priv(dev); + struct pmic_qcom_priv *priv = dev_get_priv(dev); if (len != 1) return -EINVAL; @@ -35,9 +35,9 @@ static int pm8916_write(struct udevice *dev, uint reg, const uint8_t *buff, *buff); } -static int pm8916_read(struct udevice *dev, uint reg, uint8_t *buff, int len) +static int pmic_qcom_read(struct udevice *dev, uint reg, uint8_t *buff, int len) { - struct pm8916_priv *priv = dev_get_priv(dev); + struct pmic_qcom_priv *priv = dev_get_priv(dev); int val; if (len != 1) @@ -52,20 +52,20 @@ static int pm8916_read(struct udevice *dev, uint reg, uint8_t *buff, int len) return 0; } -static struct dm_pmic_ops pm8916_ops = { - .reg_count = pm8916_reg_count, - .read = pm8916_read, - .write = pm8916_write, +static struct dm_pmic_ops pmic_qcom_ops = { + .reg_count = pmic_qcom_reg_count, + .read = pmic_qcom_read, + .write = pmic_qcom_write, }; -static const struct udevice_id pm8916_ids[] = { +static const struct udevice_id pmic_qcom_ids[] = { { .compatible = "qcom,spmi-pmic" }, { } }; -static int pm8916_probe(struct udevice *dev) +static int pmic_qcom_probe(struct udevice *dev) { - struct pm8916_priv *priv = dev_get_priv(dev); + struct pmic_qcom_priv *priv = dev_get_priv(dev); priv->usid = dev_read_addr(dev); @@ -75,12 +75,12 @@ static int pm8916_probe(struct udevice *dev) return 0; } -U_BOOT_DRIVER(pmic_pm8916) = { - .name = "pmic_pm8916", +U_BOOT_DRIVER(pmic_qcom) = { + .name = "pmic_qcom", .id = UCLASS_PMIC, - .of_match = pm8916_ids, + .of_match = pmic_qcom_ids, .bind = dm_scan_fdt_dev, - .probe = pm8916_probe, - .ops = &pm8916_ops, - .priv_auto = sizeof(struct pm8916_priv), + .probe = pmic_qcom_probe, + .ops = &pmic_qcom_ops, + .priv_auto = sizeof(struct pmic_qcom_priv), }; diff --git a/drivers/ram/stm32mp1/stm32mp1_tests.c b/drivers/ram/stm32mp1/stm32mp1_tests.c index 64262f1aa90..c5f33544144 100644 --- a/drivers/ram/stm32mp1/stm32mp1_tests.c +++ b/drivers/ram/stm32mp1/stm32mp1_tests.c @@ -169,7 +169,7 @@ static int test_loop_end(u32 *loop, u32 nb_loop, u32 progress) return 1; } printf("loop #%d\n", *loop); - WATCHDOG_RESET(); + schedule(); return 0; } diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 69a7b4ccbad..4cb0ba08508 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -156,13 +156,12 @@ config RESET_IMX7 help Support for reset controller on i.MX7/8 SoCs. -config RESET_IPQ419 - bool "Reset driver for Qualcomm IPQ40xx SoCs" - depends on DM_RESET && ARCH_IPQ40XX +config RESET_QCOM + bool "Reset driver for Qualcomm SoCs" + depends on DM_RESET && (ARCH_SNAPDRAGON || ARCH_IPQ40XX) default y help - Support for reset controller on Qualcomm - IPQ40xx SoCs. + Support for reset controller on Qualcomm SoCs. config RESET_SIFIVE bool "Reset Driver for SiFive SoC's" diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 97e3a782c0d..0620b628090 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -24,7 +24,7 @@ obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o obj-$(CONFIG_RESET_IMX7) += reset-imx7.o -obj-$(CONFIG_RESET_IPQ419) += reset-ipq4019.o +obj-$(CONFIG_RESET_QCOM) += reset-qcom.o obj-$(CONFIG_RESET_SIFIVE) += reset-sifive.o obj-$(CONFIG_RESET_SYSCON) += reset-syscon.o obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o diff --git a/drivers/reset/reset-ipq4019.c b/drivers/reset/reset-qcom.c index 7f0bd85ad68..94315e76d54 100644 --- a/drivers/reset/reset-ipq4019.c +++ b/drivers/reset/reset-qcom.c @@ -1,8 +1,10 @@ // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2020 Sartura Ltd. + * Copyright (c) 2022 Linaro Ltd. * * Author: Robert Marko <robert.marko@sartura.hr> + * Sumit Garg <sumit.garg@linaro.org> * * Based on Linux driver */ @@ -10,12 +12,11 @@ #include <asm/io.h> #include <common.h> #include <dm.h> -#include <dt-bindings/reset/qcom,ipq4019-reset.h> #include <reset-uclass.h> #include <linux/bitops.h> #include <malloc.h> -struct ipq4019_reset_priv { +struct qcom_reset_priv { phys_addr_t base; }; @@ -24,7 +25,9 @@ struct qcom_reset_map { u8 bit; }; -static const struct qcom_reset_map gcc_ipq4019_resets[] = { +#ifdef CONFIG_ARCH_IPQ40XX +#include <dt-bindings/reset/qcom,ipq4019-reset.h> +static const struct qcom_reset_map gcc_qcom_resets[] = { [WIFI0_CPU_INIT_RESET] = { 0x1f008, 5 }, [WIFI0_RADIO_SRIF_RESET] = { 0x1f008, 4 }, [WIFI0_RADIO_WARM_RESET] = { 0x1f008, 3 }, @@ -97,11 +100,41 @@ static const struct qcom_reset_map gcc_ipq4019_resets[] = { [GCC_MPM_BCR] = {0x24000, 0}, [GCC_SPDM_BCR] = {0x25000, 0}, }; +#endif + +#ifdef CONFIG_TARGET_QCS404EVB +#include <dt-bindings/clock/qcom,gcc-qcs404.h> +static const struct qcom_reset_map gcc_qcom_resets[] = { + [GCC_GENI_IR_BCR] = { 0x0F000 }, + [GCC_CDSP_RESTART] = { 0x18000 }, + [GCC_USB_HS_BCR] = { 0x41000 }, + [GCC_USB2_HS_PHY_ONLY_BCR] = { 0x41034 }, + [GCC_QUSB2_PHY_BCR] = { 0x4103c }, + [GCC_USB_HS_PHY_CFG_AHB_BCR] = { 0x0000c, 1 }, + [GCC_USB2A_PHY_BCR] = { 0x0000c, 0 }, + [GCC_USB3_PHY_BCR] = { 0x39004 }, + [GCC_USB_30_BCR] = { 0x39000 }, + [GCC_USB3PHY_PHY_BCR] = { 0x39008 }, + [GCC_PCIE_0_BCR] = { 0x3e000 }, + [GCC_PCIE_0_PHY_BCR] = { 0x3e004 }, + [GCC_PCIE_0_LINK_DOWN_BCR] = { 0x3e038 }, + [GCC_PCIEPHY_0_PHY_BCR] = { 0x3e03c }, + [GCC_PCIE_0_AXI_MASTER_STICKY_ARES] = { 0x3e040, 6}, + [GCC_PCIE_0_AHB_ARES] = { 0x3e040, 5 }, + [GCC_PCIE_0_AXI_SLAVE_ARES] = { 0x3e040, 4 }, + [GCC_PCIE_0_AXI_MASTER_ARES] = { 0x3e040, 3 }, + [GCC_PCIE_0_CORE_STICKY_ARES] = { 0x3e040, 2 }, + [GCC_PCIE_0_SLEEP_ARES] = { 0x3e040, 1 }, + [GCC_PCIE_0_PIPE_ARES] = { 0x3e040, 0 }, + [GCC_EMAC_BCR] = { 0x4e000 }, + [GCC_WDSP_RESTART] = {0x19000}, +}; +#endif -static int ipq4019_reset_assert(struct reset_ctl *rst) +static int qcom_reset_assert(struct reset_ctl *rst) { - struct ipq4019_reset_priv *priv = dev_get_priv(rst->dev); - const struct qcom_reset_map *reset_map = gcc_ipq4019_resets; + struct qcom_reset_priv *priv = dev_get_priv(rst->dev); + const struct qcom_reset_map *reset_map = gcc_qcom_resets; const struct qcom_reset_map *map; u32 value; @@ -114,10 +147,10 @@ static int ipq4019_reset_assert(struct reset_ctl *rst) return 0; } -static int ipq4019_reset_deassert(struct reset_ctl *rst) +static int qcom_reset_deassert(struct reset_ctl *rst) { - struct ipq4019_reset_priv *priv = dev_get_priv(rst->dev); - const struct qcom_reset_map *reset_map = gcc_ipq4019_resets; + struct qcom_reset_priv *priv = dev_get_priv(rst->dev); + const struct qcom_reset_map *reset_map = gcc_qcom_resets; const struct qcom_reset_map *map; u32 value; @@ -130,19 +163,20 @@ static int ipq4019_reset_deassert(struct reset_ctl *rst) return 0; } -static const struct reset_ops ipq4019_reset_ops = { - .rst_assert = ipq4019_reset_assert, - .rst_deassert = ipq4019_reset_deassert, +static const struct reset_ops qcom_reset_ops = { + .rst_assert = qcom_reset_assert, + .rst_deassert = qcom_reset_deassert, }; -static const struct udevice_id ipq4019_reset_ids[] = { +static const struct udevice_id qcom_reset_ids[] = { { .compatible = "qcom,gcc-reset-ipq4019" }, + { .compatible = "qcom,gcc-reset-qcs404" }, { } }; -static int ipq4019_reset_probe(struct udevice *dev) +static int qcom_reset_probe(struct udevice *dev) { - struct ipq4019_reset_priv *priv = dev_get_priv(dev); + struct qcom_reset_priv *priv = dev_get_priv(dev); priv->base = dev_read_addr(dev); if (priv->base == FDT_ADDR_T_NONE) @@ -151,11 +185,11 @@ static int ipq4019_reset_probe(struct udevice *dev) return 0; } -U_BOOT_DRIVER(ipq4019_reset) = { - .name = "ipq4019_reset", +U_BOOT_DRIVER(qcom_reset) = { + .name = "qcom_reset", .id = UCLASS_RESET, - .of_match = ipq4019_reset_ids, - .ops = &ipq4019_reset_ops, - .probe = ipq4019_reset_probe, - .priv_auto = sizeof(struct ipq4019_reset_priv), + .of_match = qcom_reset_ids, + .ops = &qcom_reset_ops, + .probe = qcom_reset_probe, + .priv_auto = sizeof(struct qcom_reset_priv), }; diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig index 16143681da6..5dcf68176af 100644 --- a/drivers/rng/Kconfig +++ b/drivers/rng/Kconfig @@ -41,6 +41,7 @@ config RNG_NPCM config RNG_OPTEE bool "OP-TEE based Random Number Generator support" depends on DM_RNG && OPTEE + default y if OPTEE_SERVICE_DISCOVERY help This driver provides support for the OP-TEE based Random Number Generator on ARM SoCs where hardware entropy sources are not diff --git a/drivers/rng/optee_rng.c b/drivers/rng/optee_rng.c index aa8ce864d33..410dfc053f1 100644 --- a/drivers/rng/optee_rng.c +++ b/drivers/rng/optee_rng.c @@ -11,6 +11,9 @@ #include <dm/device.h> #include <dm/device_compat.h> #include <linux/sizes.h> +#include <tee/optee_service.h> + +#define DRIVER_NAME "optee-rng" #define TEE_ERROR_HEALTH_TEST_FAIL 0x00000001 @@ -35,6 +38,8 @@ #define TA_HWRNG_UUID { 0xab7a617c, 0xb8e7, 0x4d8f, \ { 0x83, 0x01, 0xd0, 0x9b, 0x61, 0x03, 0x6b, 0x64 } } +OPTEE_SERVICE_DRIVER(optee_rng, TA_HWRNG_UUID, DRIVER_NAME); + /** open_session_ta_hwrng() - Open session with hwrng Trusted App * * @dev: device @@ -177,7 +182,7 @@ static const struct dm_rng_ops optee_rng_ops = { }; U_BOOT_DRIVER(optee_rng) = { - .name = "optee-rng", + .name = DRIVER_NAME, .id = UCLASS_RNG, .ops = &optee_rng_ops, .probe = optee_rng_probe, diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig index c400e2de16a..ad484ce8e88 100644 --- a/drivers/scsi/Kconfig +++ b/drivers/scsi/Kconfig @@ -1,6 +1,5 @@ config SCSI bool "Support SCSI controllers" - select HAVE_BLOCK_DEVICE help This enables support for SCSI (Small Computer System Interface), a parallel interface widely used with storage peripherals such as @@ -10,7 +9,6 @@ config SCSI config DM_SCSI bool "Support SCSI controllers with driver model" - depends on BLK help This option enables the SCSI (Small Computer System Interface) uclass which supports SCSI and SATA HDDs. For every device configuration diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c index 78d729d809d..99be5aef877 100644 --- a/drivers/scsi/scsi.c +++ b/drivers/scsi/scsi.c @@ -456,7 +456,7 @@ static void scsi_init_dev_desc(struct blk_desc *dev_desc, int devnum) { dev_desc->lba = 0; dev_desc->blksz = 0; - dev_desc->if_type = IF_TYPE_SCSI; + dev_desc->if_type = UCLASS_SCSI; dev_desc->devnum = devnum; dev_desc->part_type = PART_TYPE_UNKNOWN; @@ -574,8 +574,8 @@ static int do_scsi_scan_one(struct udevice *dev, int id, int lun, bool verbose) * block devices created */ snprintf(str, sizeof(str), "id%dlun%d", id, lun); - ret = blk_create_devicef(dev, "scsi_blk", str, IF_TYPE_SCSI, -1, - bd.blksz, bd.lba, &bdev); + ret = blk_create_devicef(dev, "scsi_blk", str, UCLASS_SCSI, -1, + bd.blksz, bd.lba, &bdev); if (ret) { debug("Can't create device\n"); return ret; @@ -638,7 +638,7 @@ int scsi_scan(bool verbose) if (verbose) printf("scanning bus for devices...\n"); - blk_unbind_all(IF_TYPE_SCSI); + blk_unbind_all(UCLASS_SCSI); ret = uclass_get(UCLASS_SCSI, &uc); if (ret) @@ -707,7 +707,7 @@ U_BOOT_DRIVER(scsi_blk) = { #else U_BOOT_LEGACY_BLK(scsi) = { .if_typename = "scsi", - .if_type = IF_TYPE_SCSI, + .if_type = UCLASS_SCSI, .max_devs = SCSI_MAX_DEVICE, .desc = scsi_dev_desc, }; diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c index 1fb9ee5cc94..90ccdf6b294 100644 --- a/drivers/serial/atmel_usart.c +++ b/drivers/serial/atmel_usart.c @@ -103,7 +103,7 @@ static int atmel_serial_getc(void) atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; while (!(readl(&usart->csr) & USART3_BIT(RXRDY))) - WATCHDOG_RESET(); + schedule(); return readl(&usart->rhr); } diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 47bad6f8e2a..7592979cab5 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -296,7 +296,7 @@ void ns16550_putc(struct ns16550 *com_port, char c) * in puts(). */ if (c == '\n') - WATCHDOG_RESET(); + schedule(); } #ifndef CONFIG_NS16550_MIN_FUNCTIONS @@ -307,7 +307,7 @@ char ns16550_getc(struct ns16550 *com_port) extern void usbtty_poll(void); usbtty_poll(); #endif - WATCHDOG_RESET(); + schedule(); } return serial_in(&com_port->rbr); } @@ -395,7 +395,7 @@ static int ns16550_serial_putc(struct udevice *dev, const char ch) * in puts(). */ if (ch == '\n') - WATCHDOG_RESET(); + schedule(); return 0; } diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index 30650e37b0d..0d43e9b6258 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -246,7 +246,7 @@ static int __serial_getc(struct udevice *dev) do { err = ops->getc(dev); if (err == -EAGAIN) - WATCHDOG_RESET(); + schedule(); } while (err == -EAGAIN); return err >= 0 ? err : 0; diff --git a/drivers/serial/serial_bcm283x_mu.c b/drivers/serial/serial_bcm283x_mu.c index f0756c37c84..493a42b4ccc 100644 --- a/drivers/serial/serial_bcm283x_mu.c +++ b/drivers/serial/serial_bcm283x_mu.c @@ -114,7 +114,7 @@ static int bcm283x_mu_serial_pending(struct udevice *dev, bool input) lsr = readl(®s->lsr); if (input) { - WATCHDOG_RESET(); + schedule(); return (lsr & BCM283X_MU_LSR_RX_READY) ? 1 : 0; } else { return (lsr & BCM283X_MU_LSR_TX_IDLE) ? 0 : 1; diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index ca49ef73723..ff576da516d 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -169,7 +169,7 @@ static int _lpuart_serial_getc(struct lpuart_serial_plat *plat) { struct lpuart_fsl *base = plat->reg; while (!(__raw_readb(&base->us1) & (US1_RDRF | US1_OR))) - WATCHDOG_RESET(); + schedule(); barrier(); @@ -182,7 +182,7 @@ static void _lpuart_serial_putc(struct lpuart_serial_plat *plat, struct lpuart_fsl *base = plat->reg; while (!(__raw_readb(&base->us1) & US1_TDRE)) - WATCHDOG_RESET(); + schedule(); __raw_writeb(c, &base->ud); } @@ -330,7 +330,7 @@ static int _lpuart32_serial_getc(struct lpuart_serial_plat *plat) lpuart_read32(plat->flags, &base->stat, &stat); while ((stat & STAT_RDRF) == 0) { lpuart_write32(plat->flags, &base->stat, STAT_FLAGS); - WATCHDOG_RESET(); + schedule(); lpuart_read32(plat->flags, &base->stat, &stat); } @@ -358,7 +358,7 @@ static void _lpuart32_serial_putc(struct lpuart_serial_plat *plat, if ((stat & STAT_TDRE)) break; - WATCHDOG_RESET(); + schedule(); } lpuart_write32(plat->flags, &base->data, c); diff --git a/drivers/serial/serial_mpc8xx.c b/drivers/serial/serial_mpc8xx.c index 0978930dcd4..aeae6ae6cd2 100644 --- a/drivers/serial/serial_mpc8xx.c +++ b/drivers/serial/serial_mpc8xx.c @@ -187,7 +187,7 @@ static int serial_mpc8xx_putc(struct udevice *dev, const char c) setbits_be16(&rtx->txbd.cbd_sc, BD_SC_READY); while (in_be16(&rtx->txbd.cbd_sc) & BD_SC_READY) - WATCHDOG_RESET(); + schedule(); return 0; } @@ -204,7 +204,7 @@ static int serial_mpc8xx_getc(struct udevice *dev) /* Wait for character to show up. */ while (in_be16(&rtx->rxbd.cbd_sc) & BD_SC_EMPTY) - WATCHDOG_RESET(); + schedule(); /* the characters are read one by one, * use the rxindex to know the next char to deliver diff --git a/drivers/serial/serial_mt7620.c b/drivers/serial/serial_mt7620.c index 5c5264bc962..b00e2f2c366 100644 --- a/drivers/serial/serial_mt7620.c +++ b/drivers/serial/serial_mt7620.c @@ -102,7 +102,7 @@ static int mt7620_serial_putc(struct udevice *dev, const char ch) writel(ch, &plat->regs->thr); if (ch == '\n') - WATCHDOG_RESET(); + schedule(); return 0; } diff --git a/drivers/serial/serial_mtk.c b/drivers/serial/serial_mtk.c index a84f39b3fa2..22251c5f4ce 100644 --- a/drivers/serial/serial_mtk.c +++ b/drivers/serial/serial_mtk.c @@ -141,7 +141,7 @@ static int _mtk_serial_putc(struct mtk_serial_priv *priv, const char ch) writel(ch, &priv->regs->thr); if (ch == '\n') - WATCHDOG_RESET(); + schedule(); return 0; } @@ -295,7 +295,7 @@ DECLARE_GLOBAL_DATA_PTR; do { \ err = _mtk_serial_getc(&mtk_hsuart##port); \ if (err == -EAGAIN) \ - WATCHDOG_RESET(); \ + schedule(); \ } while (err == -EAGAIN); \ return err >= 0 ? err : 0; \ } \ diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index af1fd1ea9bc..4cf79c1ca24 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -213,7 +213,7 @@ static void mxc_serial_setbrg(void) static int mxc_serial_getc(void) { while (readl(&mxc_base->ts) & UTS_RXEMPTY) - WATCHDOG_RESET(); + schedule(); return (readl(&mxc_base->rxd) & URXD_RX_DATA); /* mask out status from upper word */ } @@ -227,7 +227,7 @@ static void mxc_serial_putc(const char c) /* wait for transmitter to be ready */ while (!(readl(&mxc_base->ts) & UTS_TXEMPTY)) - WATCHDOG_RESET(); + schedule(); } /* Test whether a character is in the RX buffer */ @@ -397,7 +397,7 @@ static inline void _debug_uart_putc(int ch) struct mxc_uart *base = (struct mxc_uart *)CONFIG_VAL(DEBUG_UART_BASE); while (!(readl(&base->ts) & UTS_TXEMPTY)) - WATCHDOG_RESET(); + schedule(); writel(ch, &base->txd); } diff --git a/drivers/serial/serial_octeon_bootcmd.c b/drivers/serial/serial_octeon_bootcmd.c index 4bcff77eb88..eff5c43e2a5 100644 --- a/drivers/serial/serial_octeon_bootcmd.c +++ b/drivers/serial/serial_octeon_bootcmd.c @@ -98,7 +98,7 @@ static int octeon_bootcmd_getc(struct udevice *dev) } while (!octeon_bootcmd_pending(dev, true)) { - WATCHDOG_RESET(); + schedule(); /* * ToDo: * The original code calls octeon_board_poll() here. We may diff --git a/drivers/serial/serial_octeon_pcie_console.c b/drivers/serial/serial_octeon_pcie_console.c index c76e787d030..b0eafe7ad86 100644 --- a/drivers/serial/serial_octeon_pcie_console.c +++ b/drivers/serial/serial_octeon_pcie_console.c @@ -134,7 +134,7 @@ static int octeon_pcie_console_read(struct udevice *dev, cons_ptr->input_write_index, cons_ptr->input_read_index))) { mdelay(10); - WATCHDOG_RESET(); + schedule(); } } @@ -210,7 +210,7 @@ static int octeon_pcie_console_write(struct udevice *dev, if (flags & OCT_PCI_CON_FLAG_NONBLOCK) goto done; - WATCHDOG_RESET(); + schedule(); mdelay(10); /* Delay if we are spinning */ } else { bytes_written = -1; diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c index 9b0d16f1645..d3c3d3e2d18 100644 --- a/drivers/serial/serial_pl01x.c +++ b/drivers/serial/serial_pl01x.c @@ -70,7 +70,7 @@ static int pl01x_getc(struct pl01x_regs *regs) static int pl01x_tstc(struct pl01x_regs *regs) { - WATCHDOG_RESET(); + schedule(); return !(readl(®s->fr) & UART_PL01x_FR_RXFE); } @@ -227,7 +227,7 @@ static int pl01x_serial_getc(void) int ch = pl01x_getc(base_regs); if (ch == -EAGAIN) { - WATCHDOG_RESET(); + schedule(); continue; } @@ -247,9 +247,9 @@ static void pl01x_serial_setbrg(void) * crap in console */ while (!(readl(&base_regs->fr) & UART_PL01x_FR_TXFE)) - WATCHDOG_RESET(); + schedule(); while (readl(&base_regs->fr) & UART_PL01x_FR_BUSY) - WATCHDOG_RESET(); + schedule(); pl01x_serial_init_baud(gd->baudrate); } diff --git a/drivers/serial/serial_sifive.c b/drivers/serial/serial_sifive.c index 4af1ff5060a..c449f3fd02d 100644 --- a/drivers/serial/serial_sifive.c +++ b/drivers/serial/serial_sifive.c @@ -225,7 +225,7 @@ static inline void _debug_uart_putc(int ch) (struct uart_sifive *)CONFIG_VAL(DEBUG_UART_BASE); while (_sifive_serial_putc(regs, ch) == -EAGAIN) - WATCHDOG_RESET(); + schedule(); } DEBUG_UART_FUNCS diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 295337a8176..4b1818313a8 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -307,7 +307,7 @@ static inline void _debug_uart_putc(int ch) struct uart_zynq *regs = (struct uart_zynq *)CONFIG_VAL(DEBUG_UART_BASE); while (_uart_zynq_serial_putc(regs, ch) == -EAGAIN) - WATCHDOG_RESET(); + schedule(); } DEBUG_UART_FUNCS diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 75b794548b2..ac91d822582 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -40,6 +40,16 @@ config SPI_MEM This extension is meant to simplify interaction with SPI memories by providing an high-level interface to send memory-like commands. +config SPI_DIRMAP + bool "SPI direct mapping" + depends on SPI_MEM + help + Enable the SPI direct mapping API. Most modern SPI controllers can + directly map a SPI memory (or a portion of the SPI memory) in the CPU + address space. Most of the time this brings significant performance + improvements as it automates the whole process of sending SPI memory + operations every time a new region is accessed. + if DM_SPI config ALTERA_SPI @@ -401,6 +411,14 @@ config SANDBOX_SPI }; }; +config SPI_ASPEED_SMC + bool "ASPEED SPI flash controller driver" + depends on DM_SPI && SPI_MEM + default n + help + Enable ASPEED SPI flash controller driver for AST2500 + and AST2600 SoCs. + config SPI_SIFIVE bool "SiFive SPI driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 4de77c260ad..7ba953d2dfb 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o obj-$(CONFIG_CADENCE_OSPI_VERSAL) += cadence_ospi_versal.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o +obj-$(CONFIG_SPI_ASPEED_SMC) += spi-aspeed-smc.o obj-$(CONFIG_SPI_MEM) += spi-mem.o obj-$(CONFIG_TI_QSPI) += ti_qspi.o obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c index 52bcad053fe..a25c50bc508 100644 --- a/drivers/spi/cadence_ospi_versal.c +++ b/drivers/spi/cadence_ospi_versal.c @@ -21,7 +21,7 @@ #define CMD_4BYTE_READ 0x13 #define CMD_4BYTE_FAST_READ 0x0C -int cadence_qspi_apb_dma_read(struct cadence_spi_plat *plat, +int cadence_qspi_apb_dma_read(struct cadence_spi_priv *priv, const struct spi_mem_op *op) { u32 reg, ret, rx_rem, n_rx, bytes_to_dma, data; @@ -34,86 +34,86 @@ int cadence_qspi_apb_dma_read(struct cadence_spi_plat *plat, if (bytes_to_dma) { cadence_qspi_apb_enable_linear_mode(false); - reg = readl(plat->regbase + CQSPI_REG_CONFIG); + reg = readl(priv->regbase + CQSPI_REG_CONFIG); reg |= CQSPI_REG_CONFIG_ENBL_DMA; - writel(reg, plat->regbase + CQSPI_REG_CONFIG); + writel(reg, priv->regbase + CQSPI_REG_CONFIG); - writel(bytes_to_dma, plat->regbase + CQSPI_REG_INDIRECTRDBYTES); + writel(bytes_to_dma, priv->regbase + CQSPI_REG_INDIRECTRDBYTES); writel(CQSPI_DFLT_INDIR_TRIG_ADDR_RANGE, - plat->regbase + CQSPI_REG_INDIR_TRIG_ADDR_RANGE); + priv->regbase + CQSPI_REG_INDIR_TRIG_ADDR_RANGE); writel(CQSPI_DFLT_DMA_PERIPH_CFG, - plat->regbase + CQSPI_REG_DMA_PERIPH_CFG); - writel((unsigned long)rxbuf, plat->regbase + + priv->regbase + CQSPI_REG_DMA_PERIPH_CFG); + writel((unsigned long)rxbuf, priv->regbase + CQSPI_DMA_DST_ADDR_REG); - writel(plat->trigger_address, plat->regbase + + writel(priv->trigger_address, priv->regbase + CQSPI_DMA_SRC_RD_ADDR_REG); - writel(bytes_to_dma, plat->regbase + + writel(bytes_to_dma, priv->regbase + CQSPI_DMA_DST_SIZE_REG); flush_dcache_range((unsigned long)rxbuf, (unsigned long)rxbuf + bytes_to_dma); writel(CQSPI_DFLT_DST_CTRL_REG_VAL, - plat->regbase + CQSPI_DMA_DST_CTRL_REG); + priv->regbase + CQSPI_DMA_DST_CTRL_REG); /* Start the indirect read transfer */ - writel(CQSPI_REG_INDIRECTRD_START, plat->regbase + + writel(CQSPI_REG_INDIRECTRD_START, priv->regbase + CQSPI_REG_INDIRECTRD); /* Wait for dma to complete transfer */ - ret = cadence_qspi_apb_wait_for_dma_cmplt(plat); + ret = cadence_qspi_apb_wait_for_dma_cmplt(priv); if (ret) return ret; /* Clear indirect completion status */ - writel(CQSPI_REG_INDIRECTRD_DONE, plat->regbase + + writel(CQSPI_REG_INDIRECTRD_DONE, priv->regbase + CQSPI_REG_INDIRECTRD); rxbuf += bytes_to_dma; } if (rx_rem) { - reg = readl(plat->regbase + CQSPI_REG_CONFIG); + reg = readl(priv->regbase + CQSPI_REG_CONFIG); reg &= ~CQSPI_REG_CONFIG_ENBL_DMA; - writel(reg, plat->regbase + CQSPI_REG_CONFIG); + writel(reg, priv->regbase + CQSPI_REG_CONFIG); - reg = readl(plat->regbase + CQSPI_REG_INDIRECTRDSTARTADDR); + reg = readl(priv->regbase + CQSPI_REG_INDIRECTRDSTARTADDR); reg += bytes_to_dma; - writel(reg, plat->regbase + CQSPI_REG_CMDADDRESS); + writel(reg, priv->regbase + CQSPI_REG_CMDADDRESS); - addr_bytes = readl(plat->regbase + CQSPI_REG_SIZE) & + addr_bytes = readl(priv->regbase + CQSPI_REG_SIZE) & CQSPI_REG_SIZE_ADDRESS_MASK; opcode = CMD_4BYTE_FAST_READ; dummy_cycles = 8; writel((dummy_cycles << CQSPI_REG_RD_INSTR_DUMMY_LSB) | opcode, - plat->regbase + CQSPI_REG_RD_INSTR); + priv->regbase + CQSPI_REG_RD_INSTR); reg = opcode << CQSPI_REG_CMDCTRL_OPCODE_LSB; reg |= (0x1 << CQSPI_REG_CMDCTRL_RD_EN_LSB); reg |= (addr_bytes & CQSPI_REG_CMDCTRL_ADD_BYTES_MASK) << CQSPI_REG_CMDCTRL_ADD_BYTES_LSB; reg |= (0x1 << CQSPI_REG_CMDCTRL_ADDR_EN_LSB); - dummy_cycles = (readl(plat->regbase + CQSPI_REG_RD_INSTR) >> + dummy_cycles = (readl(priv->regbase + CQSPI_REG_RD_INSTR) >> CQSPI_REG_RD_INSTR_DUMMY_LSB) & CQSPI_REG_RD_INSTR_DUMMY_MASK; reg |= (dummy_cycles & CQSPI_REG_CMDCTRL_DUMMY_MASK) << CQSPI_REG_CMDCTRL_DUMMY_LSB; reg |= (((rx_rem - 1) & CQSPI_REG_CMDCTRL_RD_BYTES_MASK) << CQSPI_REG_CMDCTRL_RD_BYTES_LSB); - ret = cadence_qspi_apb_exec_flash_cmd(plat->regbase, reg); + ret = cadence_qspi_apb_exec_flash_cmd(priv->regbase, reg); if (ret) return ret; - data = readl(plat->regbase + CQSPI_REG_CMDREADDATALOWER); + data = readl(priv->regbase + CQSPI_REG_CMDREADDATALOWER); memcpy(rxbuf, &data, rx_rem); } return 0; } -int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_plat *plat) +int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_priv *priv) { u32 timeout = CQSPI_DMA_TIMEOUT; - while (!(readl(plat->regbase + CQSPI_DMA_DST_I_STS_REG) & + while (!(readl(priv->regbase + CQSPI_DMA_DST_I_STS_REG) & CQSPI_DMA_DST_I_STS_DONE) && timeout--) udelay(1); @@ -122,13 +122,13 @@ int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_plat *plat) return -ETIMEDOUT; } - writel(readl(plat->regbase + CQSPI_DMA_DST_I_STS_REG), - plat->regbase + CQSPI_DMA_DST_I_STS_REG); + writel(readl(priv->regbase + CQSPI_DMA_DST_I_STS_REG), + priv->regbase + CQSPI_DMA_DST_I_STS_REG); return 0; } #if defined(CONFIG_DM_GPIO) -int cadence_spi_versal_flash_reset(struct udevice *dev) +int cadence_qspi_versal_flash_reset(struct udevice *dev) { struct gpio_desc gpio; u32 reset_gpio; @@ -169,7 +169,7 @@ int cadence_spi_versal_flash_reset(struct udevice *dev) return 0; } #else -int cadence_spi_versal_flash_reset(struct udevice *dev) +int cadence_qspi_versal_flash_reset(struct udevice *dev) { /* CRP WPROT */ writel(0, WPROT_CRP); diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 907f5dadc4f..ab0a681c837 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -29,7 +29,7 @@ #define CQSPI_READ 2 #define CQSPI_WRITE 3 -__weak int cadence_qspi_apb_dma_read(struct cadence_spi_plat *plat, +__weak int cadence_qspi_apb_dma_read(struct cadence_spi_priv *priv, const struct spi_mem_op *op) { return 0; @@ -42,36 +42,40 @@ __weak int cadence_qspi_versal_flash_reset(struct udevice *dev) static int cadence_spi_write_speed(struct udevice *bus, uint hz) { - struct cadence_spi_plat *plat = dev_get_plat(bus); struct cadence_spi_priv *priv = dev_get_priv(bus); cadence_qspi_apb_config_baudrate_div(priv->regbase, - plat->ref_clk_hz, hz); + priv->ref_clk_hz, hz); /* Reconfigure delay timing if speed is changed. */ - cadence_qspi_apb_delay(priv->regbase, plat->ref_clk_hz, hz, - plat->tshsl_ns, plat->tsd2d_ns, - plat->tchsh_ns, plat->tslch_ns); + cadence_qspi_apb_delay(priv->regbase, priv->ref_clk_hz, hz, + priv->tshsl_ns, priv->tsd2d_ns, + priv->tchsh_ns, priv->tslch_ns); return 0; } -static int cadence_spi_read_id(struct cadence_spi_plat *plat, u8 len, +static int cadence_spi_read_id(struct cadence_spi_priv *priv, u8 len, u8 *idcode) { + int err; + struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0x9F, 1), SPI_MEM_OP_NO_ADDR, SPI_MEM_OP_NO_DUMMY, SPI_MEM_OP_DATA_IN(len, idcode, 1)); - return cadence_qspi_apb_command_read(plat, &op); + err = cadence_qspi_apb_command_read_setup(priv, &op); + if (!err) + err = cadence_qspi_apb_command_read(priv, &op); + + return err; } /* Calibration sequence to determine the read data capture delay register */ static int spi_calibration(struct udevice *bus, uint hz) { struct cadence_spi_priv *priv = dev_get_priv(bus); - struct cadence_spi_plat *plat = dev_get_plat(bus); void *base = priv->regbase; unsigned int idcode = 0, temp = 0; int err = 0, i, range_lo = -1, range_hi = -1; @@ -86,7 +90,7 @@ static int spi_calibration(struct udevice *bus, uint hz) cadence_qspi_apb_controller_enable(base); /* read the ID which will be our golden value */ - err = cadence_spi_read_id(plat, 3, (u8 *)&idcode); + err = cadence_spi_read_id(priv, 3, (u8 *)&idcode); if (err) { puts("SF: Calibration failed (read)\n"); return err; @@ -105,7 +109,7 @@ static int spi_calibration(struct udevice *bus, uint hz) cadence_qspi_apb_controller_enable(base); /* issue a RDID to get the ID value */ - err = cadence_spi_read_id(plat, 3, (u8 *)&temp); + err = cadence_spi_read_id(priv, 3, (u8 *)&temp); if (err) { puts("SF: Calibration failed (read)\n"); return err; @@ -147,13 +151,11 @@ static int spi_calibration(struct udevice *bus, uint hz) static int cadence_spi_set_speed(struct udevice *bus, uint hz) { - struct cadence_spi_plat *plat = dev_get_plat(bus); struct cadence_spi_priv *priv = dev_get_priv(bus); int err; - if (!hz || hz > plat->max_hz) - hz = plat->max_hz; - + if (!hz || hz > priv->max_hz) + hz = priv->max_hz; /* Disable QSPI */ cadence_qspi_apb_controller_disable(priv->regbase); @@ -161,10 +163,10 @@ static int cadence_spi_set_speed(struct udevice *bus, uint hz) * If the device tree already provides a read delay value, use that * instead of calibrating. */ - if (plat->read_delay >= 0) { + if (priv->read_delay >= 0) { cadence_spi_write_speed(bus, hz); cadence_qspi_apb_readdata_capture(priv->regbase, 1, - plat->read_delay); + priv->read_delay); } else if (priv->previous_hz != hz || priv->qspi_calibrated_hz != hz || priv->qspi_calibrated_cs != spi_chip_select(bus)) { @@ -195,29 +197,44 @@ static int cadence_spi_probe(struct udevice *bus) struct clk clk; int ret; - priv->regbase = plat->regbase; - priv->ahbbase = plat->ahbbase; + priv->regbase = plat->regbase; + priv->ahbbase = plat->ahbbase; + priv->is_dma = plat->is_dma; + priv->is_decoded_cs = plat->is_decoded_cs; + priv->fifo_depth = plat->fifo_depth; + priv->fifo_width = plat->fifo_width; + priv->trigger_address = plat->trigger_address; + priv->read_delay = plat->read_delay; + priv->ahbsize = plat->ahbsize; + priv->max_hz = plat->max_hz; + + priv->page_size = plat->page_size; + priv->block_size = plat->block_size; + priv->tshsl_ns = plat->tshsl_ns; + priv->tsd2d_ns = plat->tsd2d_ns; + priv->tchsh_ns = plat->tchsh_ns; + priv->tslch_ns = plat->tslch_ns; if (CONFIG_IS_ENABLED(ZYNQMP_FIRMWARE)) xilinx_pm_request(PM_REQUEST_NODE, PM_DEV_OSPI, ZYNQMP_PM_CAPABILITY_ACCESS, ZYNQMP_PM_MAX_QOS, ZYNQMP_PM_REQUEST_ACK_NO, NULL); - if (plat->ref_clk_hz == 0) { + if (priv->ref_clk_hz == 0) { ret = clk_get_by_index(bus, 0, &clk); if (ret) { #ifdef CONFIG_HAS_CQSPI_REF_CLK - plat->ref_clk_hz = CONFIG_CQSPI_REF_CLK; + priv->ref_clk_hz = CONFIG_CQSPI_REF_CLK; #elif defined(CONFIG_ARCH_SOCFPGA) - plat->ref_clk_hz = cm_get_qspi_controller_clk_hz(); + priv->ref_clk_hz = cm_get_qspi_controller_clk_hz(); #else return ret; #endif } else { - plat->ref_clk_hz = clk_get_rate(&clk); + priv->ref_clk_hz = clk_get_rate(&clk); clk_free(&clk); - if (IS_ERR_VALUE(plat->ref_clk_hz)) - return plat->ref_clk_hz; + if (IS_ERR_VALUE(priv->ref_clk_hz)) + return priv->ref_clk_hz; } } @@ -226,16 +243,16 @@ static int cadence_spi_probe(struct udevice *bus) reset_deassert_bulk(priv->resets); if (!priv->qspi_is_init) { - cadence_qspi_apb_controller_init(plat); + cadence_qspi_apb_controller_init(priv); priv->qspi_is_init = 1; } - plat->wr_delay = 50 * DIV_ROUND_UP(NSEC_PER_SEC, plat->ref_clk_hz); + priv->wr_delay = 50 * DIV_ROUND_UP(NSEC_PER_SEC, priv->ref_clk_hz); if (CONFIG_IS_ENABLED(ARCH_VERSAL)) { /* Versal platform uses spi calibration to set read delay */ - if (plat->read_delay >= 0) - plat->read_delay = -1; + if (priv->read_delay >= 0) + priv->read_delay = -1; /* Reset ospi flash device */ ret = cadence_qspi_versal_flash_reset(bus); if (ret) @@ -258,7 +275,6 @@ static int cadence_spi_remove(struct udevice *dev) static int cadence_spi_set_mode(struct udevice *bus, uint mode) { - struct cadence_spi_plat *plat = dev_get_plat(bus); struct cadence_spi_priv *priv = dev_get_priv(bus); /* Disable QSPI */ @@ -268,7 +284,7 @@ static int cadence_spi_set_mode(struct udevice *bus, uint mode) cadence_qspi_apb_set_clk_mode(priv->regbase, mode); /* Enable Direct Access Controller */ - if (plat->use_dac_mode) + if (priv->use_dac_mode) cadence_qspi_apb_dac_mode_enable(priv->regbase); /* Enable QSPI */ @@ -281,7 +297,6 @@ static int cadence_spi_mem_exec_op(struct spi_slave *spi, const struct spi_mem_op *op) { struct udevice *bus = spi->dev->parent; - struct cadence_spi_plat *plat = dev_get_plat(bus); struct cadence_spi_priv *priv = dev_get_priv(bus); void *base = priv->regbase; int err = 0; @@ -289,7 +304,7 @@ static int cadence_spi_mem_exec_op(struct spi_slave *spi, /* Set Chip select */ cadence_qspi_apb_chipselect(base, spi_chip_select(spi->dev), - plat->is_decoded_cs); + priv->is_decoded_cs); if (op->data.dir == SPI_MEM_DATA_IN && op->data.buf.in) { if (!op->addr.nbytes) @@ -305,28 +320,28 @@ static int cadence_spi_mem_exec_op(struct spi_slave *spi, switch (mode) { case CQSPI_STIG_READ: - err = cadence_qspi_apb_command_read_setup(plat, op); + err = cadence_qspi_apb_command_read_setup(priv, op); if (!err) - err = cadence_qspi_apb_command_read(plat, op); + err = cadence_qspi_apb_command_read(priv, op); break; case CQSPI_STIG_WRITE: - err = cadence_qspi_apb_command_write_setup(plat, op); + err = cadence_qspi_apb_command_write_setup(priv, op); if (!err) - err = cadence_qspi_apb_command_write(plat, op); + err = cadence_qspi_apb_command_write(priv, op); break; case CQSPI_READ: - err = cadence_qspi_apb_read_setup(plat, op); + err = cadence_qspi_apb_read_setup(priv, op); if (!err) { - if (plat->is_dma) - err = cadence_qspi_apb_dma_read(plat, op); + if (priv->is_dma) + err = cadence_qspi_apb_dma_read(priv, op); else - err = cadence_qspi_apb_read_execute(plat, op); + err = cadence_qspi_apb_read_execute(priv, op); } break; case CQSPI_WRITE: - err = cadence_qspi_apb_write_setup(plat, op); + err = cadence_qspi_apb_write_setup(priv, op); if (!err) - err = cadence_qspi_apb_write_execute(plat, op); + err = cadence_qspi_apb_write_execute(priv, op); break; default: err = -1; @@ -359,6 +374,7 @@ static bool cadence_spi_mem_supports_op(struct spi_slave *slave, static int cadence_spi_of_to_plat(struct udevice *bus) { struct cadence_spi_plat *plat = dev_get_plat(bus); + struct cadence_spi_priv *priv = dev_get_priv(bus); ofnode subnode; plat->regbase = (void *)devfdt_get_addr_index(bus, 0); @@ -372,7 +388,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus) 0); /* Use DAC mode only when MMIO window is at least 8M wide */ if (plat->ahbsize >= SZ_8M) - plat->use_dac_mode = true; + priv->use_dac_mode = true; plat->is_dma = dev_read_bool(bus, "cdns,is-dma"); diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index c8d16bb0e44..1c59d1a9d9a 100644 --- a/drivers/spi/cadence_qspi.h +++ b/drivers/spi/cadence_qspi.h @@ -198,7 +198,6 @@ CQSPI_REG_SDRAMLEVEL_WR_LSB) & CQSPI_REG_SDRAMLEVEL_WR_MASK) struct cadence_spi_plat { - unsigned int ref_clk_hz; unsigned int max_hz; void *regbase; void *ahbbase; @@ -209,7 +208,6 @@ struct cadence_spi_plat { fdt_addr_t ahbsize; bool use_dac_mode; int read_delay; - u32 wr_delay; /* Flash parameters */ u32 page_size; @@ -219,17 +217,18 @@ struct cadence_spi_plat { u32 tchsh_ns; u32 tslch_ns; - /* Transaction protocol parameters. */ - u8 inst_width; - u8 addr_width; - u8 data_width; - bool dtr; bool is_dma; }; struct cadence_spi_priv { + unsigned int ref_clk_hz; + unsigned int max_hz; void *regbase; void *ahbbase; + unsigned int fifo_depth; + unsigned int fifo_width; + unsigned int trigger_address; + fdt_addr_t ahbsize; size_t cmd_len; u8 cmd_buf[32]; size_t data_len; @@ -238,32 +237,53 @@ struct cadence_spi_priv { unsigned int qspi_calibrated_hz; unsigned int qspi_calibrated_cs; unsigned int previous_hz; + u32 wr_delay; + int read_delay; struct reset_ctl_bulk *resets; + u32 page_size; + u32 block_size; + u32 tshsl_ns; + u32 tsd2d_ns; + u32 tchsh_ns; + u32 tslch_ns; + u8 edge_mode; + u8 dll_mode; + bool extra_dummy; + bool ddr_init; + bool is_decoded_cs; + bool use_dac_mode; + bool is_dma; + + /* Transaction protocol parameters. */ + u8 inst_width; + u8 addr_width; + u8 data_width; + bool dtr; }; /* Functions call declaration */ -void cadence_qspi_apb_controller_init(struct cadence_spi_plat *plat); +void cadence_qspi_apb_controller_init(struct cadence_spi_priv *priv); void cadence_qspi_apb_controller_enable(void *reg_base_addr); void cadence_qspi_apb_controller_disable(void *reg_base_addr); void cadence_qspi_apb_dac_mode_enable(void *reg_base); -int cadence_qspi_apb_command_read_setup(struct cadence_spi_plat *plat, +int cadence_qspi_apb_command_read_setup(struct cadence_spi_priv *priv, const struct spi_mem_op *op); -int cadence_qspi_apb_command_read(struct cadence_spi_plat *plat, +int cadence_qspi_apb_command_read(struct cadence_spi_priv *priv, const struct spi_mem_op *op); -int cadence_qspi_apb_command_write_setup(struct cadence_spi_plat *plat, +int cadence_qspi_apb_command_write_setup(struct cadence_spi_priv *priv, const struct spi_mem_op *op); -int cadence_qspi_apb_command_write(struct cadence_spi_plat *plat, +int cadence_qspi_apb_command_write(struct cadence_spi_priv *priv, const struct spi_mem_op *op); -int cadence_qspi_apb_read_setup(struct cadence_spi_plat *plat, +int cadence_qspi_apb_read_setup(struct cadence_spi_priv *priv, const struct spi_mem_op *op); -int cadence_qspi_apb_read_execute(struct cadence_spi_plat *plat, +int cadence_qspi_apb_read_execute(struct cadence_spi_priv *priv, const struct spi_mem_op *op); -int cadence_qspi_apb_write_setup(struct cadence_spi_plat *plat, +int cadence_qspi_apb_write_setup(struct cadence_spi_priv *priv, const struct spi_mem_op *op); -int cadence_qspi_apb_write_execute(struct cadence_spi_plat *plat, +int cadence_qspi_apb_write_execute(struct cadence_spi_priv *priv, const struct spi_mem_op *op); void cadence_qspi_apb_chipselect(void *reg_base, @@ -279,9 +299,9 @@ void cadence_qspi_apb_enter_xip(void *reg_base, char xip_dummy); void cadence_qspi_apb_readdata_capture(void *reg_base, unsigned int bypass, unsigned int delay); unsigned int cm_get_qspi_controller_clk_hz(void); -int cadence_qspi_apb_dma_read(struct cadence_spi_plat *plat, +int cadence_qspi_apb_dma_read(struct cadence_spi_priv *priv, const struct spi_mem_op *op); -int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_plat *plat); +int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_priv *priv); int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg); int cadence_qspi_versal_flash_reset(struct udevice *dev); void cadence_qspi_apb_enable_linear_mode(bool enable); diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index c00755050e1..cfae5dcbda0 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -83,13 +83,13 @@ static unsigned int cadence_qspi_calc_dummy(const struct spi_mem_op *op, return dummy_clk; } -static u32 cadence_qspi_calc_rdreg(struct cadence_spi_plat *plat) +static u32 cadence_qspi_calc_rdreg(struct cadence_spi_priv *priv) { u32 rdreg = 0; - rdreg |= plat->inst_width << CQSPI_REG_RD_INSTR_TYPE_INSTR_LSB; - rdreg |= plat->addr_width << CQSPI_REG_RD_INSTR_TYPE_ADDR_LSB; - rdreg |= plat->data_width << CQSPI_REG_RD_INSTR_TYPE_DATA_LSB; + rdreg |= priv->inst_width << CQSPI_REG_RD_INSTR_TYPE_INSTR_LSB; + rdreg |= priv->addr_width << CQSPI_REG_RD_INSTR_TYPE_ADDR_LSB; + rdreg |= priv->data_width << CQSPI_REG_RD_INSTR_TYPE_DATA_LSB; return rdreg; } @@ -115,27 +115,27 @@ static int cadence_qspi_buswidth_to_inst_type(u8 buswidth) } } -static int cadence_qspi_set_protocol(struct cadence_spi_plat *plat, +static int cadence_qspi_set_protocol(struct cadence_spi_priv *priv, const struct spi_mem_op *op) { int ret; - plat->dtr = op->data.dtr && op->cmd.dtr && op->addr.dtr; + priv->dtr = op->data.dtr && op->cmd.dtr && op->addr.dtr; ret = cadence_qspi_buswidth_to_inst_type(op->cmd.buswidth); if (ret < 0) return ret; - plat->inst_width = ret; + priv->inst_width = ret; ret = cadence_qspi_buswidth_to_inst_type(op->addr.buswidth); if (ret < 0) return ret; - plat->addr_width = ret; + priv->addr_width = ret; ret = cadence_qspi_buswidth_to_inst_type(op->data.buswidth); if (ret < 0) return ret; - plat->data_width = ret; + priv->data_width = ret; return 0; } @@ -314,31 +314,31 @@ void cadence_qspi_apb_delay(void *reg_base, cadence_qspi_apb_controller_enable(reg_base); } -void cadence_qspi_apb_controller_init(struct cadence_spi_plat *plat) +void cadence_qspi_apb_controller_init(struct cadence_spi_priv *priv) { unsigned reg; - cadence_qspi_apb_controller_disable(plat->regbase); + cadence_qspi_apb_controller_disable(priv->regbase); /* Configure the device size and address bytes */ - reg = readl(plat->regbase + CQSPI_REG_SIZE); + reg = readl(priv->regbase + CQSPI_REG_SIZE); /* Clear the previous value */ reg &= ~(CQSPI_REG_SIZE_PAGE_MASK << CQSPI_REG_SIZE_PAGE_LSB); reg &= ~(CQSPI_REG_SIZE_BLOCK_MASK << CQSPI_REG_SIZE_BLOCK_LSB); - reg |= (plat->page_size << CQSPI_REG_SIZE_PAGE_LSB); - reg |= (plat->block_size << CQSPI_REG_SIZE_BLOCK_LSB); - writel(reg, plat->regbase + CQSPI_REG_SIZE); + reg |= (priv->page_size << CQSPI_REG_SIZE_PAGE_LSB); + reg |= (priv->block_size << CQSPI_REG_SIZE_BLOCK_LSB); + writel(reg, priv->regbase + CQSPI_REG_SIZE); /* Configure the remap address register, no remap */ - writel(0, plat->regbase + CQSPI_REG_REMAP); + writel(0, priv->regbase + CQSPI_REG_REMAP); /* Indirect mode configurations */ - writel(plat->fifo_depth / 2, plat->regbase + CQSPI_REG_SRAMPARTITION); + writel(priv->fifo_depth / 2, priv->regbase + CQSPI_REG_SRAMPARTITION); /* Disable all interrupts */ - writel(0, plat->regbase + CQSPI_REG_IRQMASK); + writel(0, priv->regbase + CQSPI_REG_IRQMASK); - cadence_qspi_apb_controller_enable(plat->regbase); + cadence_qspi_apb_controller_enable(priv->regbase); } int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg) @@ -370,7 +370,7 @@ int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg) return 0; } -static int cadence_qspi_setup_opcode_ext(struct cadence_spi_plat *plat, +static int cadence_qspi_setup_opcode_ext(struct cadence_spi_priv *priv, const struct spi_mem_op *op, unsigned int shift) { @@ -383,15 +383,15 @@ static int cadence_qspi_setup_opcode_ext(struct cadence_spi_plat *plat, /* Opcode extension is the LSB. */ ext = op->cmd.opcode & 0xff; - reg = readl(plat->regbase + CQSPI_REG_OP_EXT_LOWER); + reg = readl(priv->regbase + CQSPI_REG_OP_EXT_LOWER); reg &= ~(0xff << shift); reg |= ext << shift; - writel(reg, plat->regbase + CQSPI_REG_OP_EXT_LOWER); + writel(reg, priv->regbase + CQSPI_REG_OP_EXT_LOWER); return 0; } -static int cadence_qspi_enable_dtr(struct cadence_spi_plat *plat, +static int cadence_qspi_enable_dtr(struct cadence_spi_priv *priv, const struct spi_mem_op *op, unsigned int shift, bool enable) @@ -399,14 +399,14 @@ static int cadence_qspi_enable_dtr(struct cadence_spi_plat *plat, unsigned int reg; int ret; - reg = readl(plat->regbase + CQSPI_REG_CONFIG); + reg = readl(priv->regbase + CQSPI_REG_CONFIG); if (enable) { reg |= CQSPI_REG_CONFIG_DTR_PROTO; reg |= CQSPI_REG_CONFIG_DUAL_OPCODE; /* Set up command opcode extension. */ - ret = cadence_qspi_setup_opcode_ext(plat, op, shift); + ret = cadence_qspi_setup_opcode_ext(priv, op, shift); if (ret) return ret; } else { @@ -414,37 +414,37 @@ static int cadence_qspi_enable_dtr(struct cadence_spi_plat *plat, reg &= ~CQSPI_REG_CONFIG_DUAL_OPCODE; } - writel(reg, plat->regbase + CQSPI_REG_CONFIG); + writel(reg, priv->regbase + CQSPI_REG_CONFIG); return 0; } -int cadence_qspi_apb_command_read_setup(struct cadence_spi_plat *plat, +int cadence_qspi_apb_command_read_setup(struct cadence_spi_priv *priv, const struct spi_mem_op *op) { int ret; unsigned int reg; - ret = cadence_qspi_set_protocol(plat, op); + ret = cadence_qspi_set_protocol(priv, op); if (ret) return ret; - ret = cadence_qspi_enable_dtr(plat, op, CQSPI_REG_OP_EXT_STIG_LSB, - plat->dtr); + ret = cadence_qspi_enable_dtr(priv, op, CQSPI_REG_OP_EXT_STIG_LSB, + priv->dtr); if (ret) return ret; - reg = cadence_qspi_calc_rdreg(plat); - writel(reg, plat->regbase + CQSPI_REG_RD_INSTR); + reg = cadence_qspi_calc_rdreg(priv); + writel(reg, priv->regbase + CQSPI_REG_RD_INSTR); return 0; } /* For command RDID, RDSR. */ -int cadence_qspi_apb_command_read(struct cadence_spi_plat *plat, +int cadence_qspi_apb_command_read(struct cadence_spi_priv *priv, const struct spi_mem_op *op) { - void *reg_base = plat->regbase; + void *reg_base = priv->regbase; unsigned int reg; unsigned int read_len; int status; @@ -458,7 +458,7 @@ int cadence_qspi_apb_command_read(struct cadence_spi_plat *plat, return -EINVAL; } - if (plat->dtr) + if (priv->dtr) opcode = op->cmd.opcode >> 8; else opcode = op->cmd.opcode; @@ -466,7 +466,7 @@ int cadence_qspi_apb_command_read(struct cadence_spi_plat *plat, reg = opcode << CQSPI_REG_CMDCTRL_OPCODE_LSB; /* Set up dummy cycles. */ - dummy_clk = cadence_qspi_calc_dummy(op, plat->dtr); + dummy_clk = cadence_qspi_calc_dummy(op, priv->dtr); if (dummy_clk > CQSPI_DUMMY_CLKS_MAX) return -ENOTSUPP; @@ -499,29 +499,29 @@ int cadence_qspi_apb_command_read(struct cadence_spi_plat *plat, return 0; } -int cadence_qspi_apb_command_write_setup(struct cadence_spi_plat *plat, +int cadence_qspi_apb_command_write_setup(struct cadence_spi_priv *priv, const struct spi_mem_op *op) { int ret; unsigned int reg; - ret = cadence_qspi_set_protocol(plat, op); + ret = cadence_qspi_set_protocol(priv, op); if (ret) return ret; - ret = cadence_qspi_enable_dtr(plat, op, CQSPI_REG_OP_EXT_STIG_LSB, - plat->dtr); + ret = cadence_qspi_enable_dtr(priv, op, CQSPI_REG_OP_EXT_STIG_LSB, + priv->dtr); if (ret) return ret; - reg = cadence_qspi_calc_rdreg(plat); - writel(reg, plat->regbase + CQSPI_REG_RD_INSTR); + reg = cadence_qspi_calc_rdreg(priv); + writel(reg, priv->regbase + CQSPI_REG_RD_INSTR); return 0; } /* For commands: WRSR, WREN, WRDI, CHIP_ERASE, BE, etc. */ -int cadence_qspi_apb_command_write(struct cadence_spi_plat *plat, +int cadence_qspi_apb_command_write(struct cadence_spi_priv *priv, const struct spi_mem_op *op) { unsigned int reg = 0; @@ -529,7 +529,7 @@ int cadence_qspi_apb_command_write(struct cadence_spi_plat *plat, unsigned int wr_len; unsigned int txlen = op->data.nbytes; const void *txbuf = op->data.buf.out; - void *reg_base = plat->regbase; + void *reg_base = priv->regbase; u32 addr; u8 opcode; @@ -547,7 +547,7 @@ int cadence_qspi_apb_command_write(struct cadence_spi_plat *plat, return -EINVAL; } - if (plat->dtr) + if (priv->dtr) opcode = op->cmd.opcode >> 8; else opcode = op->cmd.opcode; @@ -579,7 +579,7 @@ int cadence_qspi_apb_command_write(struct cadence_spi_plat *plat, } /* Opcode + Address (3/4 bytes) + dummy bytes (0-4 bytes) */ -int cadence_qspi_apb_read_setup(struct cadence_spi_plat *plat, +int cadence_qspi_apb_read_setup(struct cadence_spi_priv *priv, const struct spi_mem_op *op) { unsigned int reg; @@ -589,33 +589,33 @@ int cadence_qspi_apb_read_setup(struct cadence_spi_plat *plat, int ret; u8 opcode; - ret = cadence_qspi_set_protocol(plat, op); + ret = cadence_qspi_set_protocol(priv, op); if (ret) return ret; - ret = cadence_qspi_enable_dtr(plat, op, CQSPI_REG_OP_EXT_READ_LSB, - plat->dtr); + ret = cadence_qspi_enable_dtr(priv, op, CQSPI_REG_OP_EXT_READ_LSB, + priv->dtr); if (ret) return ret; /* Setup the indirect trigger address */ - writel(plat->trigger_address, - plat->regbase + CQSPI_REG_INDIRECTTRIGGER); + writel(priv->trigger_address, + priv->regbase + CQSPI_REG_INDIRECTTRIGGER); /* Configure the opcode */ - if (plat->dtr) + if (priv->dtr) opcode = op->cmd.opcode >> 8; else opcode = op->cmd.opcode; rd_reg = opcode << CQSPI_REG_RD_INSTR_OPCODE_LSB; - rd_reg |= cadence_qspi_calc_rdreg(plat); + rd_reg |= cadence_qspi_calc_rdreg(priv); - writel(op->addr.val, plat->regbase + CQSPI_REG_INDIRECTRDSTARTADDR); + writel(op->addr.val, priv->regbase + CQSPI_REG_INDIRECTRDSTARTADDR); if (dummy_bytes) { /* Convert to clock cycles. */ - dummy_clk = cadence_qspi_calc_dummy(op, plat->dtr); + dummy_clk = cadence_qspi_calc_dummy(op, priv->dtr); if (dummy_clk > CQSPI_DUMMY_CLKS_MAX) return -ENOTSUPP; @@ -625,30 +625,30 @@ int cadence_qspi_apb_read_setup(struct cadence_spi_plat *plat, << CQSPI_REG_RD_INSTR_DUMMY_LSB; } - writel(rd_reg, plat->regbase + CQSPI_REG_RD_INSTR); + writel(rd_reg, priv->regbase + CQSPI_REG_RD_INSTR); /* set device size */ - reg = readl(plat->regbase + CQSPI_REG_SIZE); + reg = readl(priv->regbase + CQSPI_REG_SIZE); reg &= ~CQSPI_REG_SIZE_ADDRESS_MASK; reg |= (op->addr.nbytes - 1); - writel(reg, plat->regbase + CQSPI_REG_SIZE); + writel(reg, priv->regbase + CQSPI_REG_SIZE); return 0; } -static u32 cadence_qspi_get_rd_sram_level(struct cadence_spi_plat *plat) +static u32 cadence_qspi_get_rd_sram_level(struct cadence_spi_priv *priv) { - u32 reg = readl(plat->regbase + CQSPI_REG_SDRAMLEVEL); + u32 reg = readl(priv->regbase + CQSPI_REG_SDRAMLEVEL); reg >>= CQSPI_REG_SDRAMLEVEL_RD_LSB; return reg & CQSPI_REG_SDRAMLEVEL_RD_MASK; } -static int cadence_qspi_wait_for_data(struct cadence_spi_plat *plat) +static int cadence_qspi_wait_for_data(struct cadence_spi_priv *priv) { unsigned int timeout = 10000; u32 reg; while (timeout--) { - reg = cadence_qspi_get_rd_sram_level(plat); + reg = cadence_qspi_get_rd_sram_level(priv); if (reg) return reg; udelay(1); @@ -658,21 +658,21 @@ static int cadence_qspi_wait_for_data(struct cadence_spi_plat *plat) } static int -cadence_qspi_apb_indirect_read_execute(struct cadence_spi_plat *plat, +cadence_qspi_apb_indirect_read_execute(struct cadence_spi_priv *priv, unsigned int n_rx, u8 *rxbuf) { unsigned int remaining = n_rx; unsigned int bytes_to_read = 0; int ret; - writel(n_rx, plat->regbase + CQSPI_REG_INDIRECTRDBYTES); + writel(n_rx, priv->regbase + CQSPI_REG_INDIRECTRDBYTES); /* Start the indirect read transfer */ writel(CQSPI_REG_INDIRECTRD_START, - plat->regbase + CQSPI_REG_INDIRECTRD); + priv->regbase + CQSPI_REG_INDIRECTRD); while (remaining > 0) { - ret = cadence_qspi_wait_for_data(plat); + ret = cadence_qspi_wait_for_data(priv); if (ret < 0) { printf("Indirect write timed out (%i)\n", ret); goto failrd; @@ -681,7 +681,7 @@ cadence_qspi_apb_indirect_read_execute(struct cadence_spi_plat *plat, bytes_to_read = ret; while (bytes_to_read != 0) { - bytes_to_read *= plat->fifo_width; + bytes_to_read *= priv->fifo_width; bytes_to_read = bytes_to_read > remaining ? remaining : bytes_to_read; /* @@ -689,18 +689,18 @@ cadence_qspi_apb_indirect_read_execute(struct cadence_spi_plat *plat, * data abort. */ if (((uintptr_t)rxbuf % 4) || (bytes_to_read % 4)) - readsb(plat->ahbbase, rxbuf, bytes_to_read); + readsb(priv->ahbbase, rxbuf, bytes_to_read); else - readsl(plat->ahbbase, rxbuf, + readsl(priv->ahbbase, rxbuf, bytes_to_read >> 2); rxbuf += bytes_to_read; remaining -= bytes_to_read; - bytes_to_read = cadence_qspi_get_rd_sram_level(plat); + bytes_to_read = cadence_qspi_get_rd_sram_level(priv); } } /* Check indirect done status */ - ret = wait_for_bit_le32(plat->regbase + CQSPI_REG_INDIRECTRD, + ret = wait_for_bit_le32(priv->regbase + CQSPI_REG_INDIRECTRD, CQSPI_REG_INDIRECTRD_DONE, 1, 10, 0); if (ret) { printf("Indirect read completion error (%i)\n", ret); @@ -709,10 +709,10 @@ cadence_qspi_apb_indirect_read_execute(struct cadence_spi_plat *plat, /* Clear indirect completion status */ writel(CQSPI_REG_INDIRECTRD_DONE, - plat->regbase + CQSPI_REG_INDIRECTRD); + priv->regbase + CQSPI_REG_INDIRECTRD); /* Check indirect done status */ - ret = wait_for_bit_le32(plat->regbase + CQSPI_REG_INDIRECTRD, + ret = wait_for_bit_le32(priv->regbase + CQSPI_REG_INDIRECTRD, CQSPI_REG_INDIRECTRD_DONE, 0, 10, 0); if (ret) { printf("Indirect read clear completion error (%i)\n", ret); @@ -724,11 +724,11 @@ cadence_qspi_apb_indirect_read_execute(struct cadence_spi_plat *plat, failrd: /* Cancel the indirect read */ writel(CQSPI_REG_INDIRECTRD_CANCEL, - plat->regbase + CQSPI_REG_INDIRECTRD); + priv->regbase + CQSPI_REG_INDIRECTRD); return ret; } -int cadence_qspi_apb_read_execute(struct cadence_spi_plat *plat, +int cadence_qspi_apb_read_execute(struct cadence_spi_priv *priv, const struct spi_mem_op *op) { u64 from = op->addr.val; @@ -738,57 +738,57 @@ int cadence_qspi_apb_read_execute(struct cadence_spi_plat *plat, if (CONFIG_IS_ENABLED(ARCH_VERSAL)) cadence_qspi_apb_enable_linear_mode(true); - if (plat->use_dac_mode && (from + len < plat->ahbsize)) { + if (priv->use_dac_mode && (from + len < priv->ahbsize)) { if (len < 256 || - dma_memcpy(buf, plat->ahbbase + from, len) < 0) { - memcpy_fromio(buf, plat->ahbbase + from, len); + dma_memcpy(buf, priv->ahbbase + from, len) < 0) { + memcpy_fromio(buf, priv->ahbbase + from, len); } - if (!cadence_qspi_wait_idle(plat->regbase)) + if (!cadence_qspi_wait_idle(priv->regbase)) return -EIO; return 0; } - return cadence_qspi_apb_indirect_read_execute(plat, len, buf); + return cadence_qspi_apb_indirect_read_execute(priv, len, buf); } /* Opcode + Address (3/4 bytes) */ -int cadence_qspi_apb_write_setup(struct cadence_spi_plat *plat, +int cadence_qspi_apb_write_setup(struct cadence_spi_priv *priv, const struct spi_mem_op *op) { unsigned int reg; int ret; u8 opcode; - ret = cadence_qspi_set_protocol(plat, op); + ret = cadence_qspi_set_protocol(priv, op); if (ret) return ret; - ret = cadence_qspi_enable_dtr(plat, op, CQSPI_REG_OP_EXT_WRITE_LSB, - plat->dtr); + ret = cadence_qspi_enable_dtr(priv, op, CQSPI_REG_OP_EXT_WRITE_LSB, + priv->dtr); if (ret) return ret; /* Setup the indirect trigger address */ - writel(plat->trigger_address, - plat->regbase + CQSPI_REG_INDIRECTTRIGGER); + writel(priv->trigger_address, + priv->regbase + CQSPI_REG_INDIRECTTRIGGER); /* Configure the opcode */ - if (plat->dtr) + if (priv->dtr) opcode = op->cmd.opcode >> 8; else opcode = op->cmd.opcode; reg = opcode << CQSPI_REG_WR_INSTR_OPCODE_LSB; - reg |= plat->data_width << CQSPI_REG_WR_INSTR_TYPE_DATA_LSB; - reg |= plat->addr_width << CQSPI_REG_WR_INSTR_TYPE_ADDR_LSB; - writel(reg, plat->regbase + CQSPI_REG_WR_INSTR); + reg |= priv->data_width << CQSPI_REG_WR_INSTR_TYPE_DATA_LSB; + reg |= priv->addr_width << CQSPI_REG_WR_INSTR_TYPE_ADDR_LSB; + writel(reg, priv->regbase + CQSPI_REG_WR_INSTR); - reg = cadence_qspi_calc_rdreg(plat); - writel(reg, plat->regbase + CQSPI_REG_RD_INSTR); + reg = cadence_qspi_calc_rdreg(priv); + writel(reg, priv->regbase + CQSPI_REG_RD_INSTR); - writel(op->addr.val, plat->regbase + CQSPI_REG_INDIRECTWRSTARTADDR); + writel(op->addr.val, priv->regbase + CQSPI_REG_INDIRECTWRSTARTADDR); - if (plat->dtr) { + if (priv->dtr) { /* * Some flashes like the cypress Semper flash expect a 4-byte * dummy address with the Read SR command in DTR mode, but this @@ -797,23 +797,23 @@ int cadence_qspi_apb_write_setup(struct cadence_spi_plat *plat, * controller's side. spi-nor will take care of polling the * status register. */ - reg = readl(plat->regbase + CQSPI_REG_WR_COMPLETION_CTRL); + reg = readl(priv->regbase + CQSPI_REG_WR_COMPLETION_CTRL); reg |= CQSPI_REG_WR_DISABLE_AUTO_POLL; - writel(reg, plat->regbase + CQSPI_REG_WR_COMPLETION_CTRL); + writel(reg, priv->regbase + CQSPI_REG_WR_COMPLETION_CTRL); } - reg = readl(plat->regbase + CQSPI_REG_SIZE); + reg = readl(priv->regbase + CQSPI_REG_SIZE); reg &= ~CQSPI_REG_SIZE_ADDRESS_MASK; reg |= (op->addr.nbytes - 1); - writel(reg, plat->regbase + CQSPI_REG_SIZE); + writel(reg, priv->regbase + CQSPI_REG_SIZE); return 0; } static int -cadence_qspi_apb_indirect_write_execute(struct cadence_spi_plat *plat, +cadence_qspi_apb_indirect_write_execute(struct cadence_spi_priv *priv, unsigned int n_tx, const u8 *txbuf) { - unsigned int page_size = plat->page_size; + unsigned int page_size = priv->page_size; unsigned int remaining = n_tx; const u8 *bb_txbuf = txbuf; void *bounce_buf = NULL; @@ -833,27 +833,27 @@ cadence_qspi_apb_indirect_write_execute(struct cadence_spi_plat *plat, } /* Configure the indirect read transfer bytes */ - writel(n_tx, plat->regbase + CQSPI_REG_INDIRECTWRBYTES); + writel(n_tx, priv->regbase + CQSPI_REG_INDIRECTWRBYTES); /* Start the indirect write transfer */ writel(CQSPI_REG_INDIRECTWR_START, - plat->regbase + CQSPI_REG_INDIRECTWR); + priv->regbase + CQSPI_REG_INDIRECTWR); /* * Some delay is required for the above bit to be internally * synchronized by the QSPI module. */ - ndelay(plat->wr_delay); + ndelay(priv->wr_delay); while (remaining > 0) { write_bytes = remaining > page_size ? page_size : remaining; - writesl(plat->ahbbase, bb_txbuf, write_bytes >> 2); + writesl(priv->ahbbase, bb_txbuf, write_bytes >> 2); if (write_bytes % 4) - writesb(plat->ahbbase, + writesb(priv->ahbbase, bb_txbuf + rounddown(write_bytes, 4), write_bytes % 4); - ret = wait_for_bit_le32(plat->regbase + CQSPI_REG_SDRAMLEVEL, + ret = wait_for_bit_le32(priv->regbase + CQSPI_REG_SDRAMLEVEL, CQSPI_REG_SDRAMLEVEL_WR_MASK << CQSPI_REG_SDRAMLEVEL_WR_LSB, 0, 10, 0); if (ret) { @@ -866,7 +866,7 @@ cadence_qspi_apb_indirect_write_execute(struct cadence_spi_plat *plat, } /* Check indirect done status */ - ret = wait_for_bit_le32(plat->regbase + CQSPI_REG_INDIRECTWR, + ret = wait_for_bit_le32(priv->regbase + CQSPI_REG_INDIRECTWR, CQSPI_REG_INDIRECTWR_DONE, 1, 10, 0); if (ret) { printf("Indirect write completion error (%i)\n", ret); @@ -875,10 +875,10 @@ cadence_qspi_apb_indirect_write_execute(struct cadence_spi_plat *plat, /* Clear indirect completion status */ writel(CQSPI_REG_INDIRECTWR_DONE, - plat->regbase + CQSPI_REG_INDIRECTWR); + priv->regbase + CQSPI_REG_INDIRECTWR); /* Check indirect done status */ - ret = wait_for_bit_le32(plat->regbase + CQSPI_REG_INDIRECTWR, + ret = wait_for_bit_le32(priv->regbase + CQSPI_REG_INDIRECTWR, CQSPI_REG_INDIRECTWR_DONE, 0, 10, 0); if (ret) { printf("Indirect write clear completion error (%i)\n", ret); @@ -892,13 +892,13 @@ cadence_qspi_apb_indirect_write_execute(struct cadence_spi_plat *plat, failwr: /* Cancel the indirect write */ writel(CQSPI_REG_INDIRECTWR_CANCEL, - plat->regbase + CQSPI_REG_INDIRECTWR); + priv->regbase + CQSPI_REG_INDIRECTWR); if (bounce_buf) free(bounce_buf); return ret; } -int cadence_qspi_apb_write_execute(struct cadence_spi_plat *plat, +int cadence_qspi_apb_write_execute(struct cadence_spi_priv *priv, const struct spi_mem_op *op) { u32 to = op->addr.val; @@ -916,14 +916,15 @@ int cadence_qspi_apb_write_execute(struct cadence_spi_plat *plat, * mode. So, we can not use direct mode when in DTR mode for writing * data. */ - if (!plat->dtr && plat->use_dac_mode && (to + len < plat->ahbsize)) { - memcpy_toio(plat->ahbbase + to, buf, len); - if (!cadence_qspi_wait_idle(plat->regbase)) + cadence_qspi_apb_enable_linear_mode(true); + if (!priv->dtr && priv->use_dac_mode && (to + len < priv->ahbsize)) { + memcpy_toio(priv->ahbbase + to, buf, len); + if (!cadence_qspi_wait_idle(priv->regbase)) return -EIO; return 0; } - return cadence_qspi_apb_indirect_write_execute(plat, len, buf); + return cadence_qspi_apb_indirect_write_execute(priv, len, buf); } void cadence_qspi_apb_enter_xip(void *reg_base, char xip_dummy) diff --git a/drivers/spi/mtk_snfi_spi.c b/drivers/spi/mtk_snfi_spi.c index 65d0ce0981b..5ea62776b4e 100644 --- a/drivers/spi/mtk_snfi_spi.c +++ b/drivers/spi/mtk_snfi_spi.c @@ -202,7 +202,7 @@ static int mtk_snfi_exec_op(struct spi_slave *slave, int addr_sh; int ret; - WATCHDOG_RESET(); + schedule(); ret = mtk_snfi_mac_reset(priv); if (ret) diff --git a/drivers/spi/octeon_spi.c b/drivers/spi/octeon_spi.c index c2a7ee232b9..4bc38beaa68 100644 --- a/drivers/spi/octeon_spi.c +++ b/drivers/spi/octeon_spi.c @@ -126,7 +126,7 @@ static void octeon_spi_wait_ready(struct udevice *dev) do { mpi_sts = readq(base + MPI_STS); - WATCHDOG_RESET(); + schedule(); } while (mpi_sts & MPI_STS_BUSY); debug("%s(%s)\n", __func__, dev->name); diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c new file mode 100644 index 00000000000..a3c9633382e --- /dev/null +++ b/drivers/spi/spi-aspeed-smc.c @@ -0,0 +1,1218 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * ASPEED FMC/SPI Controller driver + * + * Copyright (c) 2022 ASPEED Corporation. + * Copyright (c) 2022 IBM Corporation. + * + * Author: + * Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> + * Cedric Le Goater <clg@kaod.org> + */ + +#include <asm/io.h> +#include <clk.h> +#include <common.h> +#include <dm.h> +#include <dm/device_compat.h> +#include <linux/bitops.h> +#include <linux/bug.h> +#include <linux/err.h> +#include <linux/iopoll.h> +#include <linux/kernel.h> +#include <linux/mtd/spi-nor.h> +#include <linux/sizes.h> +#include <malloc.h> +#include <spi.h> +#include <spi-mem.h> + +#define ASPEED_SPI_MAX_CS 5 + +#define CTRL_IO_SINGLE_DATA 0 +#define CTRL_IO_QUAD_DATA BIT(30) +#define CTRL_IO_DUAL_DATA BIT(29) + +#define CTRL_IO_MODE_USER GENMASK(1, 0) +#define CTRL_IO_MODE_CMD_READ BIT(0) +#define CTRL_IO_MODE_CMD_WRITE BIT(1) +#define CTRL_STOP_ACTIVE BIT(2) + +struct aspeed_spi_regs { + u32 conf; /* 0x00 CE Type Setting */ + u32 ctrl; /* 0x04 CE Control */ + u32 intr_ctrl; /* 0x08 Interrupt Control and Status */ + u32 cmd_ctrl; /* 0x0c Command Control */ + u32 ce_ctrl[ASPEED_SPI_MAX_CS]; /* 0x10 .. 0x20 CEx Control */ + u32 _reserved0[3]; /* .. */ + u32 segment_addr[ASPEED_SPI_MAX_CS]; /* 0x30 .. 0x40 Segment Address */ + u32 _reserved1[3]; /* .. */ + u32 soft_rst_cmd_ctrl; /* 0x50 Auto Soft-Reset Command Control */ + u32 _reserved2[11]; /* .. */ + u32 dma_ctrl; /* 0x80 DMA Control/Status */ + u32 dma_flash_addr; /* 0x84 DMA Flash Side Address */ + u32 dma_dram_addr; /* 0x88 DMA DRAM Side Address */ + u32 dma_len; /* 0x8c DMA Length Register */ + u32 dma_checksum; /* 0x90 Checksum Calculation Result */ + u32 timings[ASPEED_SPI_MAX_CS]; /* 0x94 Read Timing Compensation */ +}; + +struct aspeed_spi_plat { + u8 max_cs; + void __iomem *ahb_base; /* AHB address base for all flash devices. */ + fdt_size_t ahb_sz; /* Overall AHB window size for all flash device. */ + u32 hclk_rate; /* AHB clock rate */ +}; + +struct aspeed_spi_flash { + void __iomem *ahb_base; + u32 ahb_decoded_sz; + u32 ce_ctrl_user; + u32 ce_ctrl_read; + u32 max_freq; +}; + +struct aspeed_spi_priv { + u32 num_cs; + struct aspeed_spi_regs *regs; + struct aspeed_spi_info *info; + struct aspeed_spi_flash flashes[ASPEED_SPI_MAX_CS]; + bool fixed_decoded_range; +}; + +struct aspeed_spi_info { + u32 io_mode_mask; + u32 max_bus_width; + u32 min_decoded_sz; + u32 clk_ctrl_mask; + void (*set_4byte)(struct udevice *bus, u32 cs); + u32 (*segment_start)(struct udevice *bus, u32 reg); + u32 (*segment_end)(struct udevice *bus, u32 reg); + u32 (*segment_reg)(u32 start, u32 end); + int (*adjust_decoded_sz)(struct udevice *bus); + u32 (*get_clk_setting)(struct udevice *dev, uint hz); +}; + +struct aspeed_spi_decoded_range { + u32 cs; + u32 ahb_base; + u32 sz; +}; + +static const struct aspeed_spi_info ast2400_spi_info; +static const struct aspeed_spi_info ast2500_fmc_info; +static const struct aspeed_spi_info ast2500_spi_info; +static int aspeed_spi_decoded_range_config(struct udevice *bus); +static int aspeed_spi_trim_decoded_size(struct udevice *bus); + +static u32 aspeed_spi_get_io_mode(u32 bus_width) +{ + switch (bus_width) { + case 1: + return CTRL_IO_SINGLE_DATA; + case 2: + return CTRL_IO_DUAL_DATA; + case 4: + return CTRL_IO_QUAD_DATA; + default: + /* keep in default value */ + return CTRL_IO_SINGLE_DATA; + } +} + +static u32 ast2400_spi_segment_start(struct udevice *bus, u32 reg) +{ + struct aspeed_spi_plat *plat = dev_get_plat(bus); + u32 start_offset = ((reg >> 16) & 0xff) << 23; + + if (start_offset == 0) + return (u32)plat->ahb_base; + + return (u32)plat->ahb_base + start_offset; +} + +static u32 ast2400_spi_segment_end(struct udevice *bus, u32 reg) +{ + struct aspeed_spi_plat *plat = dev_get_plat(bus); + u32 end_offset = ((reg >> 24) & 0xff) << 23; + + /* Meaningless end_offset, set to physical ahb base. */ + if (end_offset == 0) + return (u32)plat->ahb_base; + + return (u32)plat->ahb_base + end_offset; +} + +static u32 ast2400_spi_segment_reg(u32 start, u32 end) +{ + if (start == end) + return 0; + + return ((((start) >> 23) & 0xff) << 16) | ((((end) >> 23) & 0xff) << 24); +} + +static void ast2400_fmc_chip_set_4byte(struct udevice *bus, u32 cs) +{ + struct aspeed_spi_priv *priv = dev_get_priv(bus); + u32 reg_val; + + reg_val = readl(&priv->regs->ctrl); + reg_val |= 0x1 << cs; + writel(reg_val, &priv->regs->ctrl); +} + +static void ast2400_spi_chip_set_4byte(struct udevice *bus, u32 cs) +{ + struct aspeed_spi_priv *priv = dev_get_priv(bus); + struct aspeed_spi_flash *flash = &priv->flashes[cs]; + + flash->ce_ctrl_read |= BIT(13); + writel(flash->ce_ctrl_read, &priv->regs->ctrl); +} + +/* Transfer maximum clock frequency to register setting */ +static u32 ast2400_get_clk_setting(struct udevice *dev, uint max_hz) +{ + struct aspeed_spi_plat *plat = dev_get_plat(dev->parent); + struct aspeed_spi_priv *priv = dev_get_priv(dev->parent); + struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev); + u32 hclk_clk = plat->hclk_rate; + u32 hclk_div = 0x0000; /* default value */ + u32 i; + bool found = false; + /* HCLK/1 .. HCLK/16 */ + u32 hclk_masks[] = {15, 7, 14, 6, 13, 5, 12, 4, + 11, 3, 10, 2, 9, 1, 8, 0}; + + /* FMC/SPIR10[11:8] */ + for (i = 0; i < ARRAY_SIZE(hclk_masks); i++) { + if (hclk_clk / (i + 1) <= max_hz) { + found = true; + break; + } + } + + if (found) { + hclk_div = hclk_masks[i] << 8; + priv->flashes[slave_plat->cs].max_freq = hclk_clk / (i + 1); + } + + dev_dbg(dev, "found: %s, hclk: %d, max_clk: %d\n", found ? "yes" : "no", + hclk_clk, max_hz); + + if (found) { + dev_dbg(dev, "h_div: %d (mask %x), speed: %d\n", + i + 1, hclk_masks[i], priv->flashes[slave_plat->cs].max_freq); + } + + return hclk_div; +} + +static u32 ast2500_spi_segment_start(struct udevice *bus, u32 reg) +{ + struct aspeed_spi_plat *plat = dev_get_plat(bus); + u32 start_offset = ((reg >> 16) & 0xff) << 23; + + if (start_offset == 0) + return (u32)plat->ahb_base; + + return (u32)plat->ahb_base + start_offset; +} + +static u32 ast2500_spi_segment_end(struct udevice *bus, u32 reg) +{ + struct aspeed_spi_plat *plat = dev_get_plat(bus); + u32 end_offset = ((reg >> 24) & 0xff) << 23; + + /* Meaningless end_offset, set to physical ahb base. */ + if (end_offset == 0) + return (u32)plat->ahb_base; + + return (u32)plat->ahb_base + end_offset; +} + +static u32 ast2500_spi_segment_reg(u32 start, u32 end) +{ + if (start == end) + return 0; + + return ((((start) >> 23) & 0xff) << 16) | ((((end) >> 23) & 0xff) << 24); +} + +static void ast2500_spi_chip_set_4byte(struct udevice *bus, u32 cs) +{ + struct aspeed_spi_priv *priv = dev_get_priv(bus); + u32 reg_val; + + reg_val = readl(&priv->regs->ctrl); + reg_val |= 0x1 << cs; + writel(reg_val, &priv->regs->ctrl); +} + +/* + * For AST2500, the minimum address decoded size for each CS + * is 8MB instead of zero. This address decoded size is + * mandatory for each CS no matter whether it will be used. + * This is a HW limitation. + */ +static int ast2500_adjust_decoded_size(struct udevice *bus) +{ + struct aspeed_spi_plat *plat = dev_get_plat(bus); + struct aspeed_spi_priv *priv = dev_get_priv(bus); + struct aspeed_spi_flash *flashes = &priv->flashes[0]; + int ret; + int i; + int cs; + u32 pre_sz; + u32 lack_sz; + + /* Assign min_decoded_sz to unused CS. */ + for (cs = priv->num_cs; cs < plat->max_cs; cs++) + flashes[cs].ahb_decoded_sz = priv->info->min_decoded_sz; + + /* + * If commnad mode or normal mode is used, the start address of a + * decoded range should be multiple of its related flash size. + * Namely, the total decoded size from flash 0 to flash N should + * be multiple of the size of flash (N + 1). + */ + for (cs = priv->num_cs - 1; cs >= 0; cs--) { + pre_sz = 0; + for (i = 0; i < cs; i++) + pre_sz += flashes[i].ahb_decoded_sz; + + if (flashes[cs].ahb_decoded_sz != 0 && + (pre_sz % flashes[cs].ahb_decoded_sz) != 0) { + lack_sz = flashes[cs].ahb_decoded_sz - + (pre_sz % flashes[cs].ahb_decoded_sz); + flashes[0].ahb_decoded_sz += lack_sz; + } + } + + ret = aspeed_spi_trim_decoded_size(bus); + if (ret != 0) + return ret; + + return 0; +} + +static u32 ast2500_get_clk_setting(struct udevice *dev, uint max_hz) +{ + struct aspeed_spi_plat *plat = dev_get_plat(dev->parent); + struct aspeed_spi_priv *priv = dev_get_priv(dev->parent); + struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev); + u32 hclk_clk = plat->hclk_rate; + u32 hclk_div = 0x0000; /* default value */ + u32 i; + bool found = false; + /* HCLK/1 .. HCLK/16 */ + u32 hclk_masks[] = {15, 7, 14, 6, 13, 5, 12, 4, + 11, 3, 10, 2, 9, 1, 8, 0}; + + /* FMC/SPIR10[11:8] */ + for (i = 0; i < ARRAY_SIZE(hclk_masks); i++) { + if (hclk_clk / (i + 1) <= max_hz) { + found = true; + priv->flashes[slave_plat->cs].max_freq = + hclk_clk / (i + 1); + break; + } + } + + if (found) { + hclk_div = hclk_masks[i] << 8; + goto end; + } + + for (i = 0; i < ARRAY_SIZE(hclk_masks); i++) { + if (hclk_clk / ((i + 1) * 4) <= max_hz) { + found = true; + priv->flashes[slave_plat->cs].max_freq = + hclk_clk / ((i + 1) * 4); + break; + } + } + + if (found) + hclk_div = BIT(13) | (hclk_masks[i] << 8); + +end: + dev_dbg(dev, "found: %s, hclk: %d, max_clk: %d\n", found ? "yes" : "no", + hclk_clk, max_hz); + + if (found) { + dev_dbg(dev, "h_div: %d (mask %x), speed: %d\n", + i + 1, hclk_masks[i], priv->flashes[slave_plat->cs].max_freq); + } + + return hclk_div; +} + +static u32 ast2600_spi_segment_start(struct udevice *bus, u32 reg) +{ + struct aspeed_spi_plat *plat = dev_get_plat(bus); + u32 start_offset = (reg << 16) & 0x0ff00000; + + if (start_offset == 0) + return (u32)plat->ahb_base; + + return (u32)plat->ahb_base + start_offset; +} + +static u32 ast2600_spi_segment_end(struct udevice *bus, u32 reg) +{ + struct aspeed_spi_plat *plat = dev_get_plat(bus); + u32 end_offset = reg & 0x0ff00000; + + /* Meaningless end_offset, set to physical ahb base. */ + if (end_offset == 0) + return (u32)plat->ahb_base; + + return (u32)plat->ahb_base + end_offset + 0x100000; +} + +static u32 ast2600_spi_segment_reg(u32 start, u32 end) +{ + if (start == end) + return 0; + + return ((start & 0x0ff00000) >> 16) | ((end - 0x100000) & 0x0ff00000); +} + +static void ast2600_spi_chip_set_4byte(struct udevice *bus, u32 cs) +{ + struct aspeed_spi_priv *priv = dev_get_priv(bus); + u32 reg_val; + + reg_val = readl(&priv->regs->ctrl); + reg_val |= 0x11 << cs; + writel(reg_val, &priv->regs->ctrl); +} + +static int ast2600_adjust_decoded_size(struct udevice *bus) +{ + struct aspeed_spi_plat *plat = dev_get_plat(bus); + struct aspeed_spi_priv *priv = dev_get_priv(bus); + struct aspeed_spi_flash *flashes = &priv->flashes[0]; + int ret; + int i; + int cs; + u32 pre_sz; + u32 lack_sz; + + /* Close unused CS. */ + for (cs = priv->num_cs; cs < plat->max_cs; cs++) + flashes[cs].ahb_decoded_sz = 0; + + /* + * If commnad mode or normal mode is used, the start address of a + * decoded range should be multiple of its related flash size. + * Namely, the total decoded size from flash 0 to flash N should + * be multiple of the size of flash (N + 1). + */ + for (cs = priv->num_cs - 1; cs >= 0; cs--) { + pre_sz = 0; + for (i = 0; i < cs; i++) + pre_sz += flashes[i].ahb_decoded_sz; + + if (flashes[cs].ahb_decoded_sz != 0 && + (pre_sz % flashes[cs].ahb_decoded_sz) != 0) { + lack_sz = flashes[cs].ahb_decoded_sz - + (pre_sz % flashes[cs].ahb_decoded_sz); + flashes[0].ahb_decoded_sz += lack_sz; + } + } + + ret = aspeed_spi_trim_decoded_size(bus); + if (ret != 0) + return ret; + + return 0; +} + +static u32 ast2600_get_clk_setting(struct udevice *dev, uint max_hz) +{ + struct aspeed_spi_plat *plat = dev_get_plat(dev->parent); + struct aspeed_spi_priv *priv = dev_get_priv(dev->parent); + struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev); + u32 hclk_clk = plat->hclk_rate; + u32 hclk_div = 0x0400; /* default value */ + u32 i, j; + bool found = false; + /* HCLK/1 .. HCLK/16 */ + u32 hclk_masks[] = {15, 7, 14, 6, 13, 5, 12, 4, + 11, 3, 10, 2, 9, 1, 8, 0}; + + /* FMC/SPIR10[27:24] */ + for (j = 0; j < 0xf; j++) { + /* FMC/SPIR10[11:8] */ + for (i = 0; i < ARRAY_SIZE(hclk_masks); i++) { + if (i == 0 && j == 0) + continue; + + if (hclk_clk / (i + 1 + (j * 16)) <= max_hz) { + found = true; + break; + } + } + + if (found) { + hclk_div = ((j << 24) | hclk_masks[i] << 8); + priv->flashes[slave_plat->cs].max_freq = + hclk_clk / (i + 1 + j * 16); + break; + } + } + + dev_dbg(dev, "found: %s, hclk: %d, max_clk: %d\n", found ? "yes" : "no", + hclk_clk, max_hz); + + if (found) { + dev_dbg(dev, "base_clk: %d, h_div: %d (mask %x), speed: %d\n", + j, i + 1, hclk_masks[i], priv->flashes[slave_plat->cs].max_freq); + } + + return hclk_div; +} + +/* + * As the flash size grows up, we need to trim some decoded + * size if needed for the sake of conforming the maximum + * decoded size. We trim the decoded size from the largest + * CS in order to avoid affecting the default boot up sequence + * from CS0 where command mode or normal mode is used. + * Notice, if a CS decoded size is trimmed, command mode may + * not work perfectly on that CS. + */ +static int aspeed_spi_trim_decoded_size(struct udevice *bus) +{ + struct aspeed_spi_plat *plat = dev_get_plat(bus); + struct aspeed_spi_priv *priv = dev_get_priv(bus); + struct aspeed_spi_flash *flashes = &priv->flashes[0]; + u32 total_sz; + int cs = plat->max_cs - 1; + u32 i; + + do { + total_sz = 0; + for (i = 0; i < plat->max_cs; i++) + total_sz += flashes[i].ahb_decoded_sz; + + if (flashes[cs].ahb_decoded_sz <= priv->info->min_decoded_sz) + cs--; + + if (cs < 0) + return -ENOMEM; + + if (total_sz > plat->ahb_sz) { + flashes[cs].ahb_decoded_sz -= + priv->info->min_decoded_sz; + total_sz -= priv->info->min_decoded_sz; + } + } while (total_sz > plat->ahb_sz); + + return 0; +} + +static int aspeed_spi_read_from_ahb(void __iomem *ahb_base, void *buf, + size_t len) +{ + size_t offset = 0; + + if (IS_ALIGNED((uintptr_t)ahb_base, sizeof(uintptr_t)) && + IS_ALIGNED((uintptr_t)buf, sizeof(uintptr_t))) { + readsl(ahb_base, buf, len >> 2); + offset = len & ~0x3; + len -= offset; + } + + readsb(ahb_base, (u8 *)buf + offset, len); + + return 0; +} + +static int aspeed_spi_write_to_ahb(void __iomem *ahb_base, const void *buf, + size_t len) +{ + size_t offset = 0; + + if (IS_ALIGNED((uintptr_t)ahb_base, sizeof(uintptr_t)) && + IS_ALIGNED((uintptr_t)buf, sizeof(uintptr_t))) { + writesl(ahb_base, buf, len >> 2); + offset = len & ~0x3; + len -= offset; + } + + writesb(ahb_base, (u8 *)buf + offset, len); + + return 0; +} + +/* + * Currently, only support 1-1-1, 1-1-2 or 1-1-4 + * SPI NOR flash operation format. + */ +static bool aspeed_spi_supports_op(struct spi_slave *slave, + const struct spi_mem_op *op) +{ + struct udevice *bus = slave->dev->parent; + struct aspeed_spi_priv *priv = dev_get_priv(bus); + + if (op->cmd.buswidth > 1) + return false; + + if (op->addr.nbytes != 0) { + if (op->addr.buswidth > 1) + return false; + if (op->addr.nbytes < 3 || op->addr.nbytes > 4) + return false; + } + + if (op->dummy.nbytes != 0) { + if (op->dummy.buswidth > 1 || op->dummy.nbytes > 7) + return false; + } + + if (op->data.nbytes != 0 && + op->data.buswidth > priv->info->max_bus_width) + return false; + + if (!spi_mem_default_supports_op(slave, op)) + return false; + + return true; +} + +static int aspeed_spi_exec_op_user_mode(struct spi_slave *slave, + const struct spi_mem_op *op) +{ + struct udevice *dev = slave->dev; + struct udevice *bus = dev->parent; + struct aspeed_spi_priv *priv = dev_get_priv(bus); + struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(slave->dev); + u32 cs = slave_plat->cs; + u32 ce_ctrl_reg = (u32)&priv->regs->ce_ctrl[cs]; + u32 ce_ctrl_val; + struct aspeed_spi_flash *flash = &priv->flashes[cs]; + u8 dummy_data[16] = {0}; + u8 addr[4] = {0}; + int i; + + dev_dbg(dev, "cmd:%x(%d),addr:%llx(%d),dummy:%d(%d),data_len:0x%x(%d)\n", + op->cmd.opcode, op->cmd.buswidth, op->addr.val, + op->addr.buswidth, op->dummy.nbytes, op->dummy.buswidth, + op->data.nbytes, op->data.buswidth); + + if (priv->info == &ast2400_spi_info) + ce_ctrl_reg = (u32)&priv->regs->ctrl; + + /* + * Set controller to 4-byte address mode + * if flash is in 4-byte address mode. + */ + if (op->cmd.opcode == SPINOR_OP_EN4B) + priv->info->set_4byte(bus, cs); + + /* Start user mode */ + ce_ctrl_val = flash->ce_ctrl_user; + writel(ce_ctrl_val, ce_ctrl_reg); + ce_ctrl_val &= (~CTRL_STOP_ACTIVE); + writel(ce_ctrl_val, ce_ctrl_reg); + + /* Send command */ + aspeed_spi_write_to_ahb(flash->ahb_base, &op->cmd.opcode, 1); + + /* Send address */ + for (i = op->addr.nbytes; i > 0; i--) { + addr[op->addr.nbytes - i] = + ((u32)op->addr.val >> ((i - 1) * 8)) & 0xff; + } + + /* Change io_mode */ + ce_ctrl_val &= ~priv->info->io_mode_mask; + ce_ctrl_val |= aspeed_spi_get_io_mode(op->addr.buswidth); + writel(ce_ctrl_val, ce_ctrl_reg); + aspeed_spi_write_to_ahb(flash->ahb_base, addr, op->addr.nbytes); + + /* Send dummy cycles */ + aspeed_spi_write_to_ahb(flash->ahb_base, dummy_data, op->dummy.nbytes); + + /* Change io_mode */ + ce_ctrl_val &= ~priv->info->io_mode_mask; + ce_ctrl_val |= aspeed_spi_get_io_mode(op->data.buswidth); + writel(ce_ctrl_val, ce_ctrl_reg); + + /* Send data */ + if (op->data.dir == SPI_MEM_DATA_OUT) { + aspeed_spi_write_to_ahb(flash->ahb_base, op->data.buf.out, + op->data.nbytes); + } else { + aspeed_spi_read_from_ahb(flash->ahb_base, op->data.buf.in, + op->data.nbytes); + } + + ce_ctrl_val |= CTRL_STOP_ACTIVE; + writel(ce_ctrl_val, ce_ctrl_reg); + + /* Restore controller setting. */ + writel(flash->ce_ctrl_read, ce_ctrl_reg); + + return 0; +} + +static int aspeed_spi_dirmap_create(struct spi_mem_dirmap_desc *desc) +{ + int ret = 0; + struct udevice *dev = desc->slave->dev; + struct udevice *bus = dev->parent; + struct aspeed_spi_priv *priv = dev_get_priv(bus); + struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev); + const struct aspeed_spi_info *info = priv->info; + struct spi_mem_op op_tmpl = desc->info.op_tmpl; + u32 i; + u32 cs = slave_plat->cs; + u32 cmd_io_conf; + u32 ce_ctrl_reg; + + if (desc->info.op_tmpl.data.dir == SPI_MEM_DATA_OUT) { + /* + * dirmap_write is not supported currently due to a HW + * limitation for command write mode: The written data + * length should be multiple of 4-byte. + */ + return -EOPNOTSUPP; + } + + ce_ctrl_reg = (u32)&priv->regs->ce_ctrl[cs]; + if (info == &ast2400_spi_info) + ce_ctrl_reg = (u32)&priv->regs->ctrl; + + if (desc->info.length > 0x1000000) + priv->info->set_4byte(bus, cs); + + /* AST2400 SPI1 doesn't have decoded address segment register. */ + if (info != &ast2400_spi_info) { + priv->flashes[cs].ahb_decoded_sz = desc->info.length; + + for (i = 0; i < priv->num_cs; i++) { + dev_dbg(dev, "cs: %d, sz: 0x%x\n", i, + priv->flashes[cs].ahb_decoded_sz); + } + + ret = aspeed_spi_decoded_range_config(bus); + if (ret) + return ret; + } + + cmd_io_conf = aspeed_spi_get_io_mode(op_tmpl.data.buswidth) | + op_tmpl.cmd.opcode << 16 | + ((op_tmpl.dummy.nbytes) & 0x3) << 6 | + ((op_tmpl.dummy.nbytes) & 0x4) << 14 | + CTRL_IO_MODE_CMD_READ; + + priv->flashes[cs].ce_ctrl_read &= priv->info->clk_ctrl_mask; + priv->flashes[cs].ce_ctrl_read |= cmd_io_conf; + + writel(priv->flashes[cs].ce_ctrl_read, ce_ctrl_reg); + + dev_dbg(dev, "read bus width: %d ce_ctrl_val: 0x%08x\n", + op_tmpl.data.buswidth, priv->flashes[cs].ce_ctrl_read); + + return ret; +} + +static ssize_t aspeed_spi_dirmap_read(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, void *buf) +{ + struct udevice *dev = desc->slave->dev; + struct aspeed_spi_priv *priv = dev_get_priv(dev->parent); + struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev); + u32 cs = slave_plat->cs; + int ret; + + dev_dbg(dev, "read op:0x%x, addr:0x%llx, len:0x%x\n", + desc->info.op_tmpl.cmd.opcode, offs, len); + + if (priv->flashes[cs].ahb_decoded_sz < offs + len || + (offs % 4) != 0) { + ret = aspeed_spi_exec_op_user_mode(desc->slave, + &desc->info.op_tmpl); + if (ret != 0) + return 0; + } else { + memcpy_fromio(buf, priv->flashes[cs].ahb_base + offs, len); + } + + return len; +} + +static struct aspeed_spi_flash *aspeed_spi_get_flash(struct udevice *dev) +{ + struct udevice *bus = dev->parent; + struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev); + struct aspeed_spi_plat *plat = dev_get_plat(bus); + struct aspeed_spi_priv *priv = dev_get_priv(bus); + u32 cs = slave_plat->cs; + + if (cs >= plat->max_cs) { + dev_err(dev, "invalid CS %u\n", cs); + return NULL; + } + + return &priv->flashes[cs]; +} + +static void aspeed_spi_decoded_base_calculate(struct udevice *bus) +{ + struct aspeed_spi_plat *plat = dev_get_plat(bus); + struct aspeed_spi_priv *priv = dev_get_priv(bus); + u32 cs; + + if (priv->fixed_decoded_range) + return; + + priv->flashes[0].ahb_base = plat->ahb_base; + + for (cs = 1; cs < plat->max_cs; cs++) { + priv->flashes[cs].ahb_base = + priv->flashes[cs - 1].ahb_base + + priv->flashes[cs - 1].ahb_decoded_sz; + } +} + +static void aspeed_spi_decoded_range_set(struct udevice *bus) +{ + struct aspeed_spi_plat *plat = dev_get_plat(bus); + struct aspeed_spi_priv *priv = dev_get_priv(bus); + u32 decoded_reg_val; + u32 start_addr, end_addr; + u32 cs; + + for (cs = 0; cs < plat->max_cs; cs++) { + start_addr = (u32)priv->flashes[cs].ahb_base; + end_addr = (u32)priv->flashes[cs].ahb_base + + priv->flashes[cs].ahb_decoded_sz; + + decoded_reg_val = priv->info->segment_reg(start_addr, end_addr); + + writel(decoded_reg_val, &priv->regs->segment_addr[cs]); + + dev_dbg(bus, "cs: %d, decoded_reg: 0x%x, start: 0x%x, end: 0x%x\n", + cs, decoded_reg_val, start_addr, end_addr); + } +} + +static int aspeed_spi_decoded_range_config(struct udevice *bus) +{ + int ret = 0; + struct aspeed_spi_priv *priv = dev_get_priv(bus); + + if (priv->info->adjust_decoded_sz && + !priv->fixed_decoded_range) { + ret = priv->info->adjust_decoded_sz(bus); + if (ret != 0) + return ret; + } + + aspeed_spi_decoded_base_calculate(bus); + aspeed_spi_decoded_range_set(bus); + + return ret; +} + +static int aspeed_spi_decoded_ranges_sanity(struct udevice *bus) +{ + struct aspeed_spi_plat *plat = dev_get_plat(bus); + struct aspeed_spi_priv *priv = dev_get_priv(bus); + u32 cs; + u32 total_sz = 0; + + /* Check overall size. */ + for (cs = 0; cs < plat->max_cs; cs++) + total_sz += priv->flashes[cs].ahb_decoded_sz; + + if (total_sz > plat->ahb_sz) { + dev_err(bus, "invalid total size 0x%08x\n", total_sz); + return -EINVAL; + } + + /* Check each decoded range size for AST2500. */ + if (priv->info == &ast2500_fmc_info || + priv->info == &ast2500_spi_info) { + for (cs = 0; cs < plat->max_cs; cs++) { + if (priv->flashes[cs].ahb_decoded_sz < + priv->info->min_decoded_sz) { + dev_err(bus, "insufficient decoded range.\n"); + return -EINVAL; + } + } + } + + /* + * Check overlay. Here, we assume the deccded ranges and + * address base are monotonic increasing with CE#. + */ + for (cs = plat->max_cs - 1; cs > 0; cs--) { + if ((u32)priv->flashes[cs].ahb_base != 0 && + (u32)priv->flashes[cs].ahb_base < + (u32)priv->flashes[cs - 1].ahb_base + + priv->flashes[cs - 1].ahb_decoded_sz) { + dev_err(bus, "decoded range overlay 0x%08x 0x%08x\n", + (u32)priv->flashes[cs].ahb_base, + (u32)priv->flashes[cs - 1].ahb_base); + return -EINVAL; + } + } + + return 0; +} + +static int aspeed_spi_read_fixed_decoded_ranges(struct udevice *bus) +{ + int ret = 0; + struct aspeed_spi_plat *plat = dev_get_plat(bus); + struct aspeed_spi_priv *priv = dev_get_priv(bus); + const char *range_prop = "decoded-ranges"; + struct aspeed_spi_decoded_range ranges[ASPEED_SPI_MAX_CS]; + const struct property *prop; + u32 prop_sz; + u32 count; + u32 i; + + priv->fixed_decoded_range = false; + + prop = dev_read_prop(bus, range_prop, &prop_sz); + if (!prop) + return 0; + + count = prop_sz / sizeof(struct aspeed_spi_decoded_range); + if (count > plat->max_cs || count < priv->num_cs) { + dev_err(bus, "invalid '%s' property %d %d\n", + range_prop, count, priv->num_cs); + return -EINVAL; + } + + ret = dev_read_u32_array(bus, range_prop, (u32 *)ranges, count * 3); + if (ret) + return ret; + + for (i = 0; i < count; i++) { + priv->flashes[ranges[i].cs].ahb_base = + (void __iomem *)ranges[i].ahb_base; + priv->flashes[ranges[i].cs].ahb_decoded_sz = + ranges[i].sz; + } + + for (i = 0; i < plat->max_cs; i++) { + dev_dbg(bus, "ahb_base: 0x%p, size: 0x%08x\n", + priv->flashes[i].ahb_base, + priv->flashes[i].ahb_decoded_sz); + } + + ret = aspeed_spi_decoded_ranges_sanity(bus); + if (ret != 0) + return ret; + + priv->fixed_decoded_range = true; + + return 0; +} + +/* + * Initialize SPI controller for each chip select. + * Here, only the minimum decode range is configured + * in order to get device (SPI NOR flash) information + * at the early stage. + */ +static int aspeed_spi_ctrl_init(struct udevice *bus) +{ + int ret; + struct aspeed_spi_plat *plat = dev_get_plat(bus); + struct aspeed_spi_priv *priv = dev_get_priv(bus); + u32 cs; + u32 reg_val; + u32 decoded_sz; + + /* Enable write capability for all CS. */ + reg_val = readl(&priv->regs->conf); + if (priv->info == &ast2400_spi_info) { + writel(reg_val | BIT(0), &priv->regs->conf); + } else { + writel(reg_val | (GENMASK(plat->max_cs - 1, 0) << 16), + &priv->regs->conf); + } + + memset(priv->flashes, 0x0, + sizeof(struct aspeed_spi_flash) * ASPEED_SPI_MAX_CS); + + /* Initial user mode. */ + for (cs = 0; cs < priv->num_cs; cs++) { + priv->flashes[cs].ce_ctrl_user &= priv->info->clk_ctrl_mask; + priv->flashes[cs].ce_ctrl_user |= + (CTRL_STOP_ACTIVE | CTRL_IO_MODE_USER); + } + + /* + * SPI1 on AST2400 only supports CS0. + * It is unnecessary to configure segment address register. + */ + if (priv->info == &ast2400_spi_info) { + priv->flashes[cs].ahb_base = plat->ahb_base; + priv->flashes[cs].ahb_decoded_sz = 0x10000000; + return 0; + } + + + ret = aspeed_spi_read_fixed_decoded_ranges(bus); + if (ret != 0) + return ret; + + if (!priv->fixed_decoded_range) { + /* Assign basic AHB decoded size for each CS. */ + for (cs = 0; cs < plat->max_cs; cs++) { + reg_val = readl(&priv->regs->segment_addr[cs]); + decoded_sz = priv->info->segment_end(bus, reg_val) - + priv->info->segment_start(bus, reg_val); + + if (decoded_sz < priv->info->min_decoded_sz) + decoded_sz = priv->info->min_decoded_sz; + + priv->flashes[cs].ahb_decoded_sz = decoded_sz; + } + } + + ret = aspeed_spi_decoded_range_config(bus); + + return ret; +} + +static const struct aspeed_spi_info ast2400_fmc_info = { + .io_mode_mask = 0x70000000, + .max_bus_width = 2, + .min_decoded_sz = 0x800000, + .clk_ctrl_mask = 0x00002f00, + .set_4byte = ast2400_fmc_chip_set_4byte, + .segment_start = ast2400_spi_segment_start, + .segment_end = ast2400_spi_segment_end, + .segment_reg = ast2400_spi_segment_reg, + .get_clk_setting = ast2400_get_clk_setting, +}; + +static const struct aspeed_spi_info ast2400_spi_info = { + .io_mode_mask = 0x70000000, + .max_bus_width = 2, + .min_decoded_sz = 0x800000, + .clk_ctrl_mask = 0x00000f00, + .set_4byte = ast2400_spi_chip_set_4byte, + .segment_start = ast2400_spi_segment_start, + .segment_end = ast2400_spi_segment_end, + .segment_reg = ast2400_spi_segment_reg, + .get_clk_setting = ast2400_get_clk_setting, +}; + +static const struct aspeed_spi_info ast2500_fmc_info = { + .io_mode_mask = 0x70000000, + .max_bus_width = 2, + .min_decoded_sz = 0x800000, + .clk_ctrl_mask = 0x00002f00, + .set_4byte = ast2500_spi_chip_set_4byte, + .segment_start = ast2500_spi_segment_start, + .segment_end = ast2500_spi_segment_end, + .segment_reg = ast2500_spi_segment_reg, + .adjust_decoded_sz = ast2500_adjust_decoded_size, + .get_clk_setting = ast2500_get_clk_setting, +}; + +/* + * There are some different between FMC and SPI controllers. + * For example, DMA operation, but this isn't implemented currently. + */ +static const struct aspeed_spi_info ast2500_spi_info = { + .io_mode_mask = 0x70000000, + .max_bus_width = 2, + .min_decoded_sz = 0x800000, + .clk_ctrl_mask = 0x00002f00, + .set_4byte = ast2500_spi_chip_set_4byte, + .segment_start = ast2500_spi_segment_start, + .segment_end = ast2500_spi_segment_end, + .segment_reg = ast2500_spi_segment_reg, + .adjust_decoded_sz = ast2500_adjust_decoded_size, + .get_clk_setting = ast2500_get_clk_setting, +}; + +static const struct aspeed_spi_info ast2600_fmc_info = { + .io_mode_mask = 0xf0000000, + .max_bus_width = 4, + .min_decoded_sz = 0x200000, + .clk_ctrl_mask = 0x0f000f00, + .set_4byte = ast2600_spi_chip_set_4byte, + .segment_start = ast2600_spi_segment_start, + .segment_end = ast2600_spi_segment_end, + .segment_reg = ast2600_spi_segment_reg, + .adjust_decoded_sz = ast2600_adjust_decoded_size, + .get_clk_setting = ast2600_get_clk_setting, +}; + +static const struct aspeed_spi_info ast2600_spi_info = { + .io_mode_mask = 0xf0000000, + .max_bus_width = 4, + .min_decoded_sz = 0x200000, + .clk_ctrl_mask = 0x0f000f00, + .set_4byte = ast2600_spi_chip_set_4byte, + .segment_start = ast2600_spi_segment_start, + .segment_end = ast2600_spi_segment_end, + .segment_reg = ast2600_spi_segment_reg, + .adjust_decoded_sz = ast2600_adjust_decoded_size, + .get_clk_setting = ast2600_get_clk_setting, +}; + +static int aspeed_spi_claim_bus(struct udevice *dev) +{ + struct udevice *bus = dev->parent; + struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev); + struct aspeed_spi_priv *priv = dev_get_priv(dev->parent); + struct aspeed_spi_flash *flash = &priv->flashes[slave_plat->cs]; + u32 clk_setting; + + dev_dbg(bus, "%s: claim bus CS%u\n", bus->name, slave_plat->cs); + + if (flash->max_freq == 0) { + clk_setting = priv->info->get_clk_setting(dev, slave_plat->max_hz); + flash->ce_ctrl_user &= ~(priv->info->clk_ctrl_mask); + flash->ce_ctrl_user |= clk_setting; + flash->ce_ctrl_read &= ~(priv->info->clk_ctrl_mask); + flash->ce_ctrl_read |= clk_setting; + } + + return 0; +} + +static int aspeed_spi_release_bus(struct udevice *dev) +{ + struct udevice *bus = dev->parent; + struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev); + + dev_dbg(bus, "%s: release bus CS%u\n", bus->name, slave_plat->cs); + + if (!aspeed_spi_get_flash(dev)) + return -ENODEV; + + return 0; +} + +static int aspeed_spi_set_mode(struct udevice *bus, uint mode) +{ + dev_dbg(bus, "%s: setting mode to %x\n", bus->name, mode); + + return 0; +} + +static int aspeed_spi_set_speed(struct udevice *bus, uint hz) +{ + dev_dbg(bus, "%s: setting speed to %u\n", bus->name, hz); + /* + * ASPEED SPI controller supports multiple CS with different + * clock frequency. We cannot distinguish which CS here. + * Thus, the related implementation is postponed to claim_bus. + */ + + return 0; +} + +static int apseed_spi_of_to_plat(struct udevice *bus) +{ + struct aspeed_spi_plat *plat = dev_get_plat(bus); + struct aspeed_spi_priv *priv = dev_get_priv(bus); + int ret; + struct clk hclk; + + priv->regs = (void __iomem *)devfdt_get_addr_index(bus, 0); + if ((u32)priv->regs == FDT_ADDR_T_NONE) { + dev_err(bus, "wrong ctrl base\n"); + return -ENODEV; + } + + plat->ahb_base = + (void __iomem *)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz); + if ((u32)plat->ahb_base == FDT_ADDR_T_NONE) { + dev_err(bus, "wrong AHB base\n"); + return -ENODEV; + } + + plat->max_cs = dev_read_u32_default(bus, "num-cs", ASPEED_SPI_MAX_CS); + if (plat->max_cs > ASPEED_SPI_MAX_CS) + return -EINVAL; + + ret = clk_get_by_index(bus, 0, &hclk); + if (ret < 0) { + dev_err(bus, "%s could not get clock: %d\n", bus->name, ret); + return ret; + } + + plat->hclk_rate = clk_get_rate(&hclk); + clk_free(&hclk); + + dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%lx\n", + (u32)priv->regs, plat->ahb_base, plat->ahb_sz); + dev_dbg(bus, "hclk = %dMHz, max_cs = %d\n", + plat->hclk_rate / 1000000, plat->max_cs); + + return 0; +} + +static int aspeed_spi_probe(struct udevice *bus) +{ + int ret; + struct aspeed_spi_priv *priv = dev_get_priv(bus); + struct udevice *dev; + + priv->info = (struct aspeed_spi_info *)dev_get_driver_data(bus); + + priv->num_cs = 0; + for (device_find_first_child(bus, &dev); dev; + device_find_next_child(&dev)) { + priv->num_cs++; + } + + if (priv->num_cs > ASPEED_SPI_MAX_CS) + return -EINVAL; + + ret = aspeed_spi_ctrl_init(bus); + + return ret; +} + +static const struct spi_controller_mem_ops aspeed_spi_mem_ops = { + .supports_op = aspeed_spi_supports_op, + .exec_op = aspeed_spi_exec_op_user_mode, + .dirmap_create = aspeed_spi_dirmap_create, + .dirmap_read = aspeed_spi_dirmap_read, +}; + +static const struct dm_spi_ops aspeed_spi_ops = { + .claim_bus = aspeed_spi_claim_bus, + .release_bus = aspeed_spi_release_bus, + .set_speed = aspeed_spi_set_speed, + .set_mode = aspeed_spi_set_mode, + .mem_ops = &aspeed_spi_mem_ops, +}; + +static const struct udevice_id aspeed_spi_ids[] = { + { .compatible = "aspeed,ast2400-fmc", .data = (ulong)&ast2400_fmc_info, }, + { .compatible = "aspeed,ast2400-spi", .data = (ulong)&ast2400_spi_info, }, + { .compatible = "aspeed,ast2500-fmc", .data = (ulong)&ast2500_fmc_info, }, + { .compatible = "aspeed,ast2500-spi", .data = (ulong)&ast2500_spi_info, }, + { .compatible = "aspeed,ast2600-fmc", .data = (ulong)&ast2600_fmc_info, }, + { .compatible = "aspeed,ast2600-spi", .data = (ulong)&ast2600_spi_info, }, + { } +}; + +U_BOOT_DRIVER(aspeed_spi) = { + .name = "aspeed_spi_smc", + .id = UCLASS_SPI, + .of_match = aspeed_spi_ids, + .ops = &aspeed_spi_ops, + .of_to_plat = apseed_spi_of_to_plat, + .plat_auto = sizeof(struct aspeed_spi_plat), + .priv_auto = sizeof(struct aspeed_spi_priv), + .probe = aspeed_spi_probe, +}; diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index 9c1ede1b61c..8e8995fc537 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -21,6 +21,8 @@ #include <spi.h> #include <spi-mem.h> #include <dm/device_compat.h> +#include <dm/devres.h> +#include <linux/bug.h> #endif #ifndef __UBOOT__ @@ -491,6 +493,272 @@ int spi_mem_adjust_op_size(struct spi_slave *slave, struct spi_mem_op *op) } EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size); +static ssize_t spi_mem_no_dirmap_read(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, void *buf) +{ + struct spi_mem_op op = desc->info.op_tmpl; + int ret; + + op.addr.val = desc->info.offset + offs; + op.data.buf.in = buf; + op.data.nbytes = len; + ret = spi_mem_adjust_op_size(desc->slave, &op); + if (ret) + return ret; + + ret = spi_mem_exec_op(desc->slave, &op); + if (ret) + return ret; + + return op.data.nbytes; +} + +static ssize_t spi_mem_no_dirmap_write(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, const void *buf) +{ + struct spi_mem_op op = desc->info.op_tmpl; + int ret; + + op.addr.val = desc->info.offset + offs; + op.data.buf.out = buf; + op.data.nbytes = len; + ret = spi_mem_adjust_op_size(desc->slave, &op); + if (ret) + return ret; + + ret = spi_mem_exec_op(desc->slave, &op); + if (ret) + return ret; + + return op.data.nbytes; +} + +/** + * spi_mem_dirmap_create() - Create a direct mapping descriptor + * @mem: SPI mem device this direct mapping should be created for + * @info: direct mapping information + * + * This function is creating a direct mapping descriptor which can then be used + * to access the memory using spi_mem_dirmap_read() or spi_mem_dirmap_write(). + * If the SPI controller driver does not support direct mapping, this function + * falls back to an implementation using spi_mem_exec_op(), so that the caller + * doesn't have to bother implementing a fallback on his own. + * + * Return: a valid pointer in case of success, and ERR_PTR() otherwise. + */ +struct spi_mem_dirmap_desc * +spi_mem_dirmap_create(struct spi_slave *slave, + const struct spi_mem_dirmap_info *info) +{ + struct udevice *bus = slave->dev->parent; + struct dm_spi_ops *ops = spi_get_ops(bus); + struct spi_mem_dirmap_desc *desc; + int ret = -EOPNOTSUPP; + + /* Make sure the number of address cycles is between 1 and 8 bytes. */ + if (!info->op_tmpl.addr.nbytes || info->op_tmpl.addr.nbytes > 8) + return ERR_PTR(-EINVAL); + + /* data.dir should either be SPI_MEM_DATA_IN or SPI_MEM_DATA_OUT. */ + if (info->op_tmpl.data.dir == SPI_MEM_NO_DATA) + return ERR_PTR(-EINVAL); + + desc = kzalloc(sizeof(*desc), GFP_KERNEL); + if (!desc) + return ERR_PTR(-ENOMEM); + + desc->slave = slave; + desc->info = *info; + if (ops->mem_ops && ops->mem_ops->dirmap_create) + ret = ops->mem_ops->dirmap_create(desc); + + if (ret) { + desc->nodirmap = true; + if (!spi_mem_supports_op(desc->slave, &desc->info.op_tmpl)) + ret = -EOPNOTSUPP; + else + ret = 0; + } + + if (ret) { + kfree(desc); + return ERR_PTR(ret); + } + + return desc; +} +EXPORT_SYMBOL_GPL(spi_mem_dirmap_create); + +/** + * spi_mem_dirmap_destroy() - Destroy a direct mapping descriptor + * @desc: the direct mapping descriptor to destroy + * + * This function destroys a direct mapping descriptor previously created by + * spi_mem_dirmap_create(). + */ +void spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc *desc) +{ + struct udevice *bus = desc->slave->dev->parent; + struct dm_spi_ops *ops = spi_get_ops(bus); + + if (!desc->nodirmap && ops->mem_ops && ops->mem_ops->dirmap_destroy) + ops->mem_ops->dirmap_destroy(desc); + + kfree(desc); +} +EXPORT_SYMBOL_GPL(spi_mem_dirmap_destroy); + +#ifndef __UBOOT__ +static void devm_spi_mem_dirmap_release(struct udevice *dev, void *res) +{ + struct spi_mem_dirmap_desc *desc = *(struct spi_mem_dirmap_desc **)res; + + spi_mem_dirmap_destroy(desc); +} + +/** + * devm_spi_mem_dirmap_create() - Create a direct mapping descriptor and attach + * it to a device + * @dev: device the dirmap desc will be attached to + * @mem: SPI mem device this direct mapping should be created for + * @info: direct mapping information + * + * devm_ variant of the spi_mem_dirmap_create() function. See + * spi_mem_dirmap_create() for more details. + * + * Return: a valid pointer in case of success, and ERR_PTR() otherwise. + */ +struct spi_mem_dirmap_desc * +devm_spi_mem_dirmap_create(struct udevice *dev, struct spi_slave *slave, + const struct spi_mem_dirmap_info *info) +{ + struct spi_mem_dirmap_desc **ptr, *desc; + + ptr = devres_alloc(devm_spi_mem_dirmap_release, sizeof(*ptr), + GFP_KERNEL); + if (!ptr) + return ERR_PTR(-ENOMEM); + + desc = spi_mem_dirmap_create(slave, info); + if (IS_ERR(desc)) { + devres_free(ptr); + } else { + *ptr = desc; + devres_add(dev, ptr); + } + + return desc; +} +EXPORT_SYMBOL_GPL(devm_spi_mem_dirmap_create); + +static int devm_spi_mem_dirmap_match(struct udevice *dev, void *res, void *data) +{ + struct spi_mem_dirmap_desc **ptr = res; + + if (WARN_ON(!ptr || !*ptr)) + return 0; + + return *ptr == data; +} + +/** + * devm_spi_mem_dirmap_destroy() - Destroy a direct mapping descriptor attached + * to a device + * @dev: device the dirmap desc is attached to + * @desc: the direct mapping descriptor to destroy + * + * devm_ variant of the spi_mem_dirmap_destroy() function. See + * spi_mem_dirmap_destroy() for more details. + */ +void devm_spi_mem_dirmap_destroy(struct udevice *dev, + struct spi_mem_dirmap_desc *desc) +{ + devres_release(dev, devm_spi_mem_dirmap_release, + devm_spi_mem_dirmap_match, desc); +} +EXPORT_SYMBOL_GPL(devm_spi_mem_dirmap_destroy); +#endif /* __UBOOT__ */ + +/** + * spi_mem_dirmap_read() - Read data through a direct mapping + * @desc: direct mapping descriptor + * @offs: offset to start reading from. Note that this is not an absolute + * offset, but the offset within the direct mapping which already has + * its own offset + * @len: length in bytes + * @buf: destination buffer. This buffer must be DMA-able + * + * This function reads data from a memory device using a direct mapping + * previously instantiated with spi_mem_dirmap_create(). + * + * Return: the amount of data read from the memory device or a negative error + * code. Note that the returned size might be smaller than @len, and the caller + * is responsible for calling spi_mem_dirmap_read() again when that happens. + */ +ssize_t spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, void *buf) +{ + struct udevice *bus = desc->slave->dev->parent; + struct dm_spi_ops *ops = spi_get_ops(bus); + ssize_t ret; + + if (desc->info.op_tmpl.data.dir != SPI_MEM_DATA_IN) + return -EINVAL; + + if (!len) + return 0; + + if (desc->nodirmap) + ret = spi_mem_no_dirmap_read(desc, offs, len, buf); + else if (ops->mem_ops && ops->mem_ops->dirmap_read) + ret = ops->mem_ops->dirmap_read(desc, offs, len, buf); + else + ret = -EOPNOTSUPP; + + return ret; +} +EXPORT_SYMBOL_GPL(spi_mem_dirmap_read); + +/** + * spi_mem_dirmap_write() - Write data through a direct mapping + * @desc: direct mapping descriptor + * @offs: offset to start writing from. Note that this is not an absolute + * offset, but the offset within the direct mapping which already has + * its own offset + * @len: length in bytes + * @buf: source buffer. This buffer must be DMA-able + * + * This function writes data to a memory device using a direct mapping + * previously instantiated with spi_mem_dirmap_create(). + * + * Return: the amount of data written to the memory device or a negative error + * code. Note that the returned size might be smaller than @len, and the caller + * is responsible for calling spi_mem_dirmap_write() again when that happens. + */ +ssize_t spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, const void *buf) +{ + struct udevice *bus = desc->slave->dev->parent; + struct dm_spi_ops *ops = spi_get_ops(bus); + ssize_t ret; + + if (desc->info.op_tmpl.data.dir != SPI_MEM_DATA_OUT) + return -EINVAL; + + if (!len) + return 0; + + if (desc->nodirmap) + ret = spi_mem_no_dirmap_write(desc, offs, len, buf); + else if (ops->mem_ops && ops->mem_ops->dirmap_write) + ret = ops->mem_ops->dirmap_write(desc, offs, len, buf); + else + ret = -EOPNOTSUPP; + + return ret; +} +EXPORT_SYMBOL_GPL(spi_mem_dirmap_write); + #ifndef __UBOOT__ static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv) { diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c index ceba413727e..90c207d5184 100644 --- a/drivers/spi/stm32_qspi.c +++ b/drivers/spi/stm32_qspi.c @@ -172,7 +172,7 @@ static int _stm32_qspi_wait_cmd(struct stm32_qspi_priv *priv, static void _stm32_qspi_read_fifo(u8 *val, void __iomem *addr) { *val = readb(addr); - WATCHDOG_RESET(); + schedule(); } static void _stm32_qspi_write_fifo(u8 *val, void __iomem *addr) diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index c772bae3ccf..4e718c545c6 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -22,6 +22,8 @@ #include <dm/device_compat.h> #include <linux/bitops.h> #include <linux/err.h> +#include <linux/sizes.h> +#include <zynqmp_firmware.h> #define GQSPI_GFIFO_STRT_MODE_MASK BIT(29) #define GQSPI_CONFIG_MODE_EN_MASK (3 << 30) @@ -102,8 +104,10 @@ #define TAP_DLY_BYPASS_LQSPI_RX_VALUE 0x1 #define TAP_DLY_BYPASS_LQSPI_RX_SHIFT 2 #define GQSPI_DATA_DLY_ADJ_OFST 0x000001F8 -#define IOU_TAPDLY_BYPASS_OFST 0xFF180390 +#define IOU_TAPDLY_BYPASS_OFST !IS_ENABLED(CONFIG_ARCH_VERSAL) ? \ + 0xFF180390 : 0xF103003C #define GQSPI_LPBK_DLY_ADJ_LPBK_MASK 0x00000020 +#define GQSPI_FREQ_37_5MHZ 37500000 #define GQSPI_FREQ_40MHZ 40000000 #define GQSPI_FREQ_100MHZ 100000000 #define GQSPI_FREQ_150MHZ 150000000 @@ -163,6 +167,7 @@ struct zynqmp_qspi_plat { struct zynqmp_qspi_dma_regs *dma_regs; u32 frequency; u32 speed_hz; + unsigned int io_mode; }; struct zynqmp_qspi_priv { @@ -171,6 +176,7 @@ struct zynqmp_qspi_priv { const void *tx_buf; void *rx_buf; unsigned int len; + unsigned int io_mode; int bytes_to_transfer; int bytes_to_receive; const struct spi_mem_op *op; @@ -187,6 +193,8 @@ static int zynqmp_qspi_of_to_plat(struct udevice *bus) plat->dma_regs = (struct zynqmp_qspi_dma_regs *) (dev_read_addr(bus) + GQSPI_DMA_REG_OFFSET); + plat->io_mode = dev_read_bool(bus, "has-io-mode"); + return 0; } @@ -206,8 +214,11 @@ static void zynqmp_qspi_init_hw(struct zynqmp_qspi_priv *priv) config_reg = readl(®s->confr); config_reg &= ~(GQSPI_GFIFO_STRT_MODE_MASK | GQSPI_CONFIG_MODE_EN_MASK); - config_reg |= GQSPI_CONFIG_DMA_MODE | GQSPI_GFIFO_WP_HOLD | - GQSPI_DFLT_BAUD_RATE_DIV | GQSPI_GFIFO_STRT_MODE_MASK; + config_reg |= GQSPI_GFIFO_WP_HOLD | GQSPI_DFLT_BAUD_RATE_DIV; + config_reg |= GQSPI_GFIFO_STRT_MODE_MASK; + if (!priv->io_mode) + config_reg |= GQSPI_CONFIG_DMA_MODE; + writel(config_reg, ®s->confr); writel(GQSPI_ENABLE_ENABLE_MASK, ®s->enbr); @@ -297,28 +308,41 @@ void zynqmp_qspi_set_tapdelay(struct udevice *bus, u32 baudrateval) debug("%s, req_hz:%d, clk_rate:%d, baudrateval:%d\n", __func__, reqhz, clk_rate, baudrateval); - if (reqhz < GQSPI_FREQ_40MHZ) { - zynqmp_mmio_read(IOU_TAPDLY_BYPASS_OFST, &tapdlybypass); - tapdlybypass |= (TAP_DLY_BYPASS_LQSPI_RX_VALUE << - TAP_DLY_BYPASS_LQSPI_RX_SHIFT); - } else if (reqhz <= GQSPI_FREQ_100MHZ) { - zynqmp_mmio_read(IOU_TAPDLY_BYPASS_OFST, &tapdlybypass); - tapdlybypass |= (TAP_DLY_BYPASS_LQSPI_RX_VALUE << - TAP_DLY_BYPASS_LQSPI_RX_SHIFT); - lpbkdlyadj = readl(®s->lpbkdly); - lpbkdlyadj |= (GQSPI_LPBK_DLY_ADJ_LPBK_MASK); - datadlyadj = readl(®s->gqspidlyadj); - datadlyadj |= ((GQSPI_USE_DATA_DLY << GQSPI_USE_DATA_DLY_SHIFT) - | (GQSPI_DATA_DLY_ADJ_VALUE << - GQSPI_DATA_DLY_ADJ_SHIFT)); - } else if (reqhz <= GQSPI_FREQ_150MHZ) { - lpbkdlyadj = readl(®s->lpbkdly); - lpbkdlyadj |= ((GQSPI_LPBK_DLY_ADJ_LPBK_MASK) | - GQSPI_LPBK_DLY_ADJ_DLY_0); + if (!IS_ENABLED(CONFIG_ARCH_VERSAL)) { + if (reqhz <= GQSPI_FREQ_40MHZ) { + tapdlybypass = TAP_DLY_BYPASS_LQSPI_RX_VALUE << + TAP_DLY_BYPASS_LQSPI_RX_SHIFT; + } else if (reqhz <= GQSPI_FREQ_100MHZ) { + tapdlybypass = TAP_DLY_BYPASS_LQSPI_RX_VALUE << + TAP_DLY_BYPASS_LQSPI_RX_SHIFT; + lpbkdlyadj = GQSPI_LPBK_DLY_ADJ_LPBK_MASK; + datadlyadj = (GQSPI_USE_DATA_DLY << + GQSPI_USE_DATA_DLY_SHIFT) | + (GQSPI_DATA_DLY_ADJ_VALUE << + GQSPI_DATA_DLY_ADJ_SHIFT); + } else if (reqhz <= GQSPI_FREQ_150MHZ) { + lpbkdlyadj = GQSPI_LPBK_DLY_ADJ_LPBK_MASK | + GQSPI_LPBK_DLY_ADJ_DLY_0; + } + zynqmp_mmio_write(IOU_TAPDLY_BYPASS_OFST, + IOU_TAPDLY_BYPASS_MASK, tapdlybypass); + } else { + if (reqhz <= GQSPI_FREQ_37_5MHZ) { + tapdlybypass = TAP_DLY_BYPASS_LQSPI_RX_VALUE << + TAP_DLY_BYPASS_LQSPI_RX_SHIFT; + } else if (reqhz <= GQSPI_FREQ_100MHZ) { + tapdlybypass = TAP_DLY_BYPASS_LQSPI_RX_VALUE << + TAP_DLY_BYPASS_LQSPI_RX_SHIFT; + lpbkdlyadj = GQSPI_LPBK_DLY_ADJ_LPBK_MASK; + datadlyadj = GQSPI_USE_DATA_DLY << + GQSPI_USE_DATA_DLY_SHIFT; + } else if (reqhz <= GQSPI_FREQ_150MHZ) { + lpbkdlyadj = GQSPI_LPBK_DLY_ADJ_LPBK_MASK | + (GQSPI_LPBK_DLY_ADJ_DLY_1 << + GQSPI_LPBK_DLY_ADJ_DLY_1_SHIFT); + } + writel(tapdlybypass, IOU_TAPDLY_BYPASS_OFST); } - - zynqmp_mmio_write(IOU_TAPDLY_BYPASS_OFST, IOU_TAPDLY_BYPASS_MASK, - tapdlybypass); writel(lpbkdlyadj, ®s->lpbkdly); writel(datadlyadj, ®s->gqspidlyadj); } @@ -372,6 +396,7 @@ static int zynqmp_qspi_probe(struct udevice *bus) priv->regs = plat->regs; priv->dma_regs = plat->dma_regs; + priv->io_mode = plat->io_mode; ret = clk_get_by_index(bus, 0, &clk); if (ret < 0) { @@ -409,8 +434,7 @@ static int zynqmp_qspi_set_mode(struct udevice *bus, uint mode) debug("%s\n", __func__); /* Set the SPI Clock phase and polarities */ confr = readl(®s->confr); - confr &= ~(GQSPI_CONFIG_CPHA_MASK | - GQSPI_CONFIG_CPOL_MASK); + confr &= ~(GQSPI_CONFIG_CPHA_MASK | GQSPI_CONFIG_CPOL_MASK); if (mode & SPI_CPHA) confr |= GQSPI_CONFIG_CPHA_MASK; @@ -554,8 +578,7 @@ static int zynqmp_qspi_genfifo_fill_tx(struct zynqmp_qspi_priv *priv) gen_fifo_cmd = zynqmp_qspi_bus_select(priv); gen_fifo_cmd |= zynqmp_qspi_genfifo_mode(priv->op->data.buswidth); - gen_fifo_cmd |= GQSPI_GFIFO_TX | - GQSPI_GFIFO_DATA_XFR_MASK; + gen_fifo_cmd |= GQSPI_GFIFO_TX | GQSPI_GFIFO_DATA_XFR_MASK; while (priv->len) { len = zynqmp_qspi_calc_exp(priv, &gen_fifo_cmd); @@ -564,11 +587,9 @@ static int zynqmp_qspi_genfifo_fill_tx(struct zynqmp_qspi_priv *priv) debug("GFIFO_CMD_TX:0x%x\n", gen_fifo_cmd); if (gen_fifo_cmd & GQSPI_GFIFO_EXP_MASK) - ret = zynqmp_qspi_fill_tx_fifo(priv, - 1 << len); + ret = zynqmp_qspi_fill_tx_fifo(priv, 1 << len); else - ret = zynqmp_qspi_fill_tx_fifo(priv, - len); + ret = zynqmp_qspi_fill_tx_fifo(priv, len); if (ret) return ret; @@ -576,44 +597,119 @@ static int zynqmp_qspi_genfifo_fill_tx(struct zynqmp_qspi_priv *priv) return ret; } +static int zynqmp_qspi_start_io(struct zynqmp_qspi_priv *priv, + u32 gen_fifo_cmd, u32 *buf) +{ + u32 len; + u32 actuallen = priv->len; + u32 config_reg, ier, isr; + u32 timeout = GQSPI_TIMEOUT; + struct zynqmp_qspi_regs *regs = priv->regs; + u32 last_bits; + u32 *traverse = buf; + + while (priv->len) { + len = zynqmp_qspi_calc_exp(priv, &gen_fifo_cmd); + /* If exponent bit is set, reset immediate to be 2^len */ + if (gen_fifo_cmd & GQSPI_GFIFO_EXP_MASK) + priv->bytes_to_receive = (1 << len); + else + priv->bytes_to_receive = len; + zynqmp_qspi_fill_gen_fifo(priv, gen_fifo_cmd); + debug("GFIFO_CMD_RX:0x%x\n", gen_fifo_cmd); + /* Manual start */ + config_reg = readl(®s->confr); + config_reg |= GQSPI_STRT_GEN_FIFO; + writel(config_reg, ®s->confr); + /* Enable RX interrupts for IO mode */ + ier = readl(®s->ier); + ier |= GQSPI_IXR_ALL_MASK; + writel(ier, ®s->ier); + while (priv->bytes_to_receive && timeout) { + isr = readl(®s->isr); + if (isr & GQSPI_IXR_RXNEMTY_MASK) { + if (priv->bytes_to_receive >= 4) { + *traverse = readl(®s->drxr); + traverse++; + priv->bytes_to_receive -= 4; + } else { + last_bits = readl(®s->drxr); + memcpy(traverse, &last_bits, + priv->bytes_to_receive); + priv->bytes_to_receive = 0; + } + timeout = GQSPI_TIMEOUT; + } else { + udelay(1); + timeout--; + } + } + + debug("buf:0x%lx, rxbuf:0x%lx, *buf:0x%x len: 0x%x\n", + (unsigned long)buf, (unsigned long)priv->rx_buf, + *buf, actuallen); + if (!timeout) { + printf("IO timeout: %d\n", readl(®s->isr)); + return -1; + } + } + + return 0; +} + static int zynqmp_qspi_start_dma(struct zynqmp_qspi_priv *priv, u32 gen_fifo_cmd, u32 *buf) { u32 addr; u32 size; u32 actuallen = priv->len; + u32 totallen = priv->len; int ret = 0; struct zynqmp_qspi_dma_regs *dma_regs = priv->dma_regs; - writel((unsigned long)buf, &dma_regs->dmadst); - writel(roundup(priv->len, GQSPI_DMA_ALIGN), &dma_regs->dmasize); - writel(GQSPI_DMA_DST_I_STS_MASK, &dma_regs->dmaier); - addr = (unsigned long)buf; - size = roundup(priv->len, GQSPI_DMA_ALIGN); - flush_dcache_range(addr, addr + size); + while (totallen) { + if (totallen >= SZ_512M) + priv->len = SZ_256M; + else + priv->len = totallen; - while (priv->len) { - zynqmp_qspi_calc_exp(priv, &gen_fifo_cmd); - zynqmp_qspi_fill_gen_fifo(priv, gen_fifo_cmd); + totallen -= priv->len; /* Save remaining bytes length to read */ + actuallen = priv->len; /* Actual number of bytes reading */ - debug("GFIFO_CMD_RX:0x%x\n", gen_fifo_cmd); - } + writel((unsigned long)buf, &dma_regs->dmadst); + writel(roundup(priv->len, GQSPI_DMA_ALIGN), &dma_regs->dmasize); + writel(GQSPI_DMA_DST_I_STS_MASK, &dma_regs->dmaier); + addr = (unsigned long)buf; + size = roundup(priv->len, GQSPI_DMA_ALIGN); + flush_dcache_range(addr, addr + size); - ret = wait_for_bit_le32(&dma_regs->dmaisr, GQSPI_DMA_DST_I_STS_DONE, - 1, GQSPI_TIMEOUT, 1); - if (ret) { - printf("DMA Timeout:0x%x\n", readl(&dma_regs->dmaisr)); - return -ETIMEDOUT; - } + while (priv->len) { + zynqmp_qspi_calc_exp(priv, &gen_fifo_cmd); + zynqmp_qspi_fill_gen_fifo(priv, gen_fifo_cmd); + + debug("GFIFO_CMD_RX:0x%x\n", gen_fifo_cmd); + } + + ret = wait_for_bit_le32(&dma_regs->dmaisr, + GQSPI_DMA_DST_I_STS_DONE, 1, + GQSPI_TIMEOUT, 1); + if (ret) { + printf("DMA Timeout:0x%x\n", readl(&dma_regs->dmaisr)); + return -ETIMEDOUT; + } - writel(GQSPI_DMA_DST_I_STS_DONE, &dma_regs->dmaisr); + writel(GQSPI_DMA_DST_I_STS_DONE, &dma_regs->dmaisr); - debug("buf:0x%lx, rxbuf:0x%lx, *buf:0x%x len: 0x%x\n", - (unsigned long)buf, (unsigned long)priv->rx_buf, *buf, - actuallen); + debug("buf:0x%lx, rxbuf:0x%lx, *buf:0x%x len: 0x%x\n", + (unsigned long)buf, (unsigned long)priv->rx_buf, *buf, + actuallen); - if (buf != priv->rx_buf) - memcpy(priv->rx_buf, buf, actuallen); + if (buf != priv->rx_buf) + memcpy(priv->rx_buf, buf, actuallen); + + buf = (u32 *)((u8 *)buf + actuallen); + priv->rx_buf = (u8 *)priv->rx_buf + actuallen; + } return 0; } @@ -626,21 +722,22 @@ static int zynqmp_qspi_genfifo_fill_rx(struct zynqmp_qspi_priv *priv) gen_fifo_cmd = zynqmp_qspi_bus_select(priv); gen_fifo_cmd |= zynqmp_qspi_genfifo_mode(priv->op->data.buswidth); - gen_fifo_cmd |= GQSPI_GFIFO_RX | - GQSPI_GFIFO_DATA_XFR_MASK; + gen_fifo_cmd |= GQSPI_GFIFO_RX | GQSPI_GFIFO_DATA_XFR_MASK; /* * Check if receive buffer is aligned to 4 byte and length * is multiples of four byte as we are using dma to receive. */ - if (!((unsigned long)priv->rx_buf & (GQSPI_DMA_ALIGN - 1)) && - !(actuallen % GQSPI_DMA_ALIGN)) { + if ((!((unsigned long)priv->rx_buf & (GQSPI_DMA_ALIGN - 1)) && + !(actuallen % GQSPI_DMA_ALIGN)) || priv->io_mode) { buf = (u32 *)priv->rx_buf; - return zynqmp_qspi_start_dma(priv, gen_fifo_cmd, buf); + if (priv->io_mode) + return zynqmp_qspi_start_io(priv, gen_fifo_cmd, buf); + else + return zynqmp_qspi_start_dma(priv, gen_fifo_cmd, buf); } - ALLOC_CACHE_ALIGN_BUFFER(u8, tmp, roundup(priv->len, - GQSPI_DMA_ALIGN)); + ALLOC_CACHE_ALIGN_BUFFER(u8, tmp, roundup(priv->len, GQSPI_DMA_ALIGN)); buf = (u32 *)tmp; return zynqmp_qspi_start_dma(priv, gen_fifo_cmd, buf); } diff --git a/drivers/tee/optee/Kconfig b/drivers/tee/optee/Kconfig index d03028070b9..9dc65b0501e 100644 --- a/drivers/tee/optee/Kconfig +++ b/drivers/tee/optee/Kconfig @@ -37,6 +37,14 @@ config OPTEE_TA_SCP03 help Enables support for controlling (enabling, provisioning) the Secure Channel Protocol 03 operation in the OP-TEE SCP03 TA. + +config OPTEE_SERVICE_DISCOVERY + bool "OP-TEE service discovery" + default y + help + This implements automated driver binding of OP-TEE service drivers by + requesting OP-TEE firmware to enumerate its hosted services. + endmenu endif diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/core.c index a89d62aaf0b..9240277579b 100644 --- a/drivers/tee/optee/core.c +++ b/drivers/tee/optee/core.c @@ -14,6 +14,7 @@ #include <linux/arm-smccc.h> #include <linux/err.h> #include <linux/io.h> +#include <tee/optee_service.h> #include "optee_smc.h" #include "optee_msg.h" @@ -22,6 +23,25 @@ #define PAGELIST_ENTRIES_PER_PAGE \ ((OPTEE_MSG_NONCONTIG_PAGE_SIZE / sizeof(u64)) - 1) +/* + * PTA_DEVICE_ENUM interface exposed by OP-TEE to discover enumerated services + */ +#define PTA_DEVICE_ENUM { 0x7011a688, 0xddde, 0x4053, \ + { 0xa5, 0xa9, 0x7b, 0x3c, 0x4d, 0xdf, 0x13, 0xb8 } } +/* + * PTA_CMD_GET_DEVICES - List services without supplicant dependencies + * + * [out] memref[0]: List of the UUIDs of service enumerated by OP-TEE + */ +#define PTA_CMD_GET_DEVICES 0x0 + +/* + * PTA_CMD_GET_DEVICES_SUPP - List services depending on tee supplicant + * + * [out] memref[0]: List of the UUIDs of service enumerated by OP-TEE + */ +#define PTA_CMD_GET_DEVICES_SUPP 0x1 + typedef void (optee_invoke_fn)(unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, @@ -42,6 +62,134 @@ struct rpc_param { u32 a7; }; +static struct optee_service *find_service_driver(const struct tee_optee_ta_uuid *uuid) +{ + struct optee_service *service; + u8 loc_uuid[TEE_UUID_LEN]; + size_t service_cnt, idx; + + service_cnt = ll_entry_count(struct optee_service, optee_service); + service = ll_entry_start(struct optee_service, optee_service); + + for (idx = 0; idx < service_cnt; idx++, service++) { + tee_optee_ta_uuid_to_octets(loc_uuid, &service->uuid); + if (!memcmp(uuid, loc_uuid, sizeof(uuid))) + return service; + } + + return NULL; +} + +static int bind_service_list(struct udevice *dev, struct tee_shm *service_list, size_t count) +{ + const struct tee_optee_ta_uuid *service_uuid = (const void *)service_list->addr; + struct optee_service *service; + size_t idx; + int ret; + + for (idx = 0; idx < count; idx++) { + service = find_service_driver(service_uuid + idx); + if (!service) + continue; + + ret = device_bind_driver(dev, service->driver_name, service->driver_name, NULL); + if (ret) { + dev_warn(dev, "%s was not bound: %d, ignored\n", service->driver_name, ret); + continue; + } + } + + return 0; +} + +static int __enum_services(struct udevice *dev, struct tee_shm *shm, size_t *shm_size, u32 tee_sess) +{ + struct tee_invoke_arg arg = { }; + struct tee_param param = { }; + int ret = 0; + + arg.func = PTA_CMD_GET_DEVICES; + arg.session = tee_sess; + + /* Fill invoke cmd params */ + param.attr = TEE_PARAM_ATTR_TYPE_MEMREF_OUTPUT; + param.u.memref.shm = shm; + param.u.memref.size = *shm_size; + + ret = tee_invoke_func(dev, &arg, 1, ¶m); + if (ret || (arg.ret && arg.ret != TEE_ERROR_SHORT_BUFFER)) { + dev_err(dev, "PTA_CMD_GET_DEVICES invoke function err: 0x%x\n", arg.ret); + return -EINVAL; + } + + *shm_size = param.u.memref.size; + + return 0; +} + +static int enum_services(struct udevice *dev, struct tee_shm **shm, size_t *count, u32 tee_sess) +{ + size_t shm_size = 0; + int ret; + + ret = __enum_services(dev, NULL, &shm_size, tee_sess); + if (ret) + return ret; + + ret = tee_shm_alloc(dev, shm_size, 0, shm); + if (ret) { + dev_err(dev, "Failed to allocated shared memory: %d\n", ret); + return ret; + } + + ret = __enum_services(dev, *shm, &shm_size, tee_sess); + if (!ret) + *count = shm_size / sizeof(struct tee_optee_ta_uuid); + + return ret; +} + +static int open_enum_session(struct udevice *dev, u32 *tee_sess) +{ + const struct tee_optee_ta_uuid pta_uuid = PTA_DEVICE_ENUM; + struct tee_open_session_arg arg = { }; + int ret; + + tee_optee_ta_uuid_to_octets(arg.uuid, &pta_uuid); + + ret = tee_open_session(dev, &arg, 0, NULL); + if (ret || arg.ret) { + if (!ret) + ret = -EIO; + return ret; + } + + *tee_sess = arg.session; + + return 0; +} + +static int bind_service_drivers(struct udevice *dev) +{ + struct tee_shm *service_list = NULL; + size_t service_count; + u32 tee_sess; + int ret; + + ret = open_enum_session(dev, &tee_sess); + if (ret) + return ret; + + ret = enum_services(dev, &service_list, &service_count, tee_sess); + if (!ret) + ret = bind_service_list(dev, service_list, service_count); + + tee_shm_free(service_list); + tee_close_session(dev, tee_sess); + + return ret; +} + /** * reg_pair_to_ptr() - Make a pointer of 2 32-bit values * @reg0: High bits of the pointer @@ -638,11 +786,18 @@ static int optee_of_to_plat(struct udevice *dev) return 0; } +static int optee_bind(struct udevice *dev) +{ + if (IS_ENABLED(CONFIG_OPTEE_SERVICE_DISCOVERY)) + dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND); + + return 0; +} + static int optee_probe(struct udevice *dev) { struct optee_pdata *pdata = dev_get_plat(dev); u32 sec_caps; - struct udevice *child; int ret; if (!is_optee_api(pdata->invoke_fn)) { @@ -668,12 +823,16 @@ static int optee_probe(struct udevice *dev) return -ENOENT; } - /* - * in U-Boot, the discovery of TA on the TEE bus is not supported: - * only bind the drivers associated to the supported OP-TEE TA - */ - if (IS_ENABLED(CONFIG_RNG_OPTEE)) { - ret = device_bind_driver(dev, "optee-rng", "optee-rng", &child); + if (IS_ENABLED(CONFIG_OPTEE_SERVICE_DISCOVERY)) { + ret = bind_service_drivers(dev); + if (ret) + return ret; + } else if (IS_ENABLED(CONFIG_RNG_OPTEE)) { + /* + * Discovery of TAs on the TEE bus is not supported in U-Boot: + * only bind the drivers associated to the supported OP-TEE TA + */ + ret = device_bind_driver(dev, "optee-rng", "optee-rng", NULL); if (ret) return ret; } @@ -692,6 +851,7 @@ U_BOOT_DRIVER(optee) = { .of_match = optee_match, .of_to_plat = optee_of_to_plat, .probe = optee_probe, + .bind = optee_bind, .ops = &optee_ops, .plat_auto = sizeof(struct optee_pdata), .priv_auto = sizeof(struct optee_private), diff --git a/drivers/tee/optee/rpmb.c b/drivers/tee/optee/rpmb.c index cf5e0a08e61..5bc13757ea8 100644 --- a/drivers/tee/optee/rpmb.c +++ b/drivers/tee/optee/rpmb.c @@ -48,7 +48,7 @@ static void release_mmc(struct optee_private *priv) if (!priv->rpmb_mmc) return; - rc = blk_select_hwpart_devnum(IF_TYPE_MMC, priv->rpmb_dev_id, + rc = blk_select_hwpart_devnum(UCLASS_MMC, priv->rpmb_dev_id, priv->rpmb_original_part); if (rc) debug("%s: blk_select_hwpart_devnum() failed: %d\n", @@ -88,7 +88,7 @@ static struct mmc *get_mmc(struct optee_private *priv, int dev_id) priv->rpmb_original_part = mmc_get_blk_desc(mmc)->hwpart; - rc = blk_select_hwpart_devnum(IF_TYPE_MMC, dev_id, MMC_PART_RPMB); + rc = blk_select_hwpart_devnum(UCLASS_MMC, dev_id, MMC_PART_RPMB); if (rc) { debug("Device id %d: cannot select RPMB partition: %d\n", dev_id, rc); diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index 40492901481..1b492360396 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -73,6 +73,12 @@ config ARC_TIMER usually at least one of them exists. Either of them is supported in U-Boot. +config ARM_TWD_TIMER + bool "ARM timer watchdog (TWD) timer support" + depends on TIMER && CLK + help + Select this to enable support for the ARM global timer watchdog timer. + config AST_TIMER bool "Aspeed ast2400/ast2500 timer support" depends on TIMER diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile index 560e2d27e14..7bfb7749e97 100644 --- a/drivers/timer/Makefile +++ b/drivers/timer/Makefile @@ -6,6 +6,7 @@ obj-y += timer-uclass.o obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o obj-$(CONFIG_ANDES_PLMT_TIMER) += andes_plmt_timer.o obj-$(CONFIG_ARC_TIMER) += arc_timer.o +obj-$(CONFIG_ARM_TWD_TIMER) += arm_twd_timer.o obj-$(CONFIG_AST_TIMER) += ast_timer.o obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o obj-$(CONFIG_$(SPL_)ATMEL_PIT_TIMER) += atmel_pit_timer.o diff --git a/drivers/timer/arm_twd_timer.c b/drivers/timer/arm_twd_timer.c new file mode 100644 index 00000000000..40ccd165874 --- /dev/null +++ b/drivers/timer/arm_twd_timer.c @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2017-2022 Weidmüller Interface GmbH & Co. KG + * Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> + * + * Copyright (C) 2012 Michal Simek <monstr@monstr.eu> + * Copyright (C) 2011-2017 Xilinx, Inc. All rights reserved. + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> + * + * (C) Copyright 2004 + * Philippe Robin, ARM Ltd. <philippe.robin@arm.com> + * + * (C) Copyright 2002-2004 + * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> + * + * (C) Copyright 2003 + * Texas Instruments <www.ti.com> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Alex Zuepke <azu@sysgo.de> + */ + +#include <common.h> +#include <dm.h> +#include <fdtdec.h> +#include <timer.h> +#include <linux/bitops.h> + +#include <asm/io.h> + +#define SCUTIMER_CONTROL_PRESCALER_MASK 0x0000FF00 /* Prescaler */ +#define SCUTIMER_CONTROL_AUTO_RELOAD_MASK 0x00000002 /* Auto-reload */ +#define SCUTIMER_CONTROL_ENABLE_MASK 0x00000001 /* Timer enable */ + +#define TIMER_LOAD_VAL 0xFFFFFFFF + +struct arm_twd_timer_regs { + u32 load; /* Timer Load Register */ + u32 counter; /* Timer Counter Register */ + u32 control; /* Timer Control Register */ +}; + +struct arm_twd_timer_priv { + struct arm_twd_timer_regs *base; +}; + +static u64 arm_twd_timer_get_count(struct udevice *dev) +{ + struct arm_twd_timer_priv *priv = dev_get_priv(dev); + struct arm_twd_timer_regs *regs = priv->base; + u32 count = TIMER_LOAD_VAL - readl(®s->counter); + + return timer_conv_64(count); +} + +static int arm_twd_timer_probe(struct udevice *dev) +{ + struct arm_twd_timer_priv *priv = dev_get_priv(dev); + struct arm_twd_timer_regs *regs; + fdt_addr_t addr; + + addr = dev_read_addr(dev); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + priv->base = (struct arm_twd_timer_regs *)addr; + + regs = priv->base; + + /* Load the timer counter register */ + writel(0xFFFFFFFF, ®s->load); + + /* + * Start the A9Timer device + * Enable Auto reload mode, Clear prescaler control bits + * Set prescaler value, Enable the decrementer + */ + clrsetbits_le32(®s->control, SCUTIMER_CONTROL_PRESCALER_MASK, + SCUTIMER_CONTROL_AUTO_RELOAD_MASK | + SCUTIMER_CONTROL_ENABLE_MASK); + + return 0; +} + +static const struct timer_ops arm_twd_timer_ops = { + .get_count = arm_twd_timer_get_count, +}; + +static const struct udevice_id arm_twd_timer_ids[] = { + { .compatible = "arm,cortex-a9-twd-timer" }, + {} +}; + +U_BOOT_DRIVER(arm_twd_timer) = { + .name = "arm_twd_timer", + .id = UCLASS_TIMER, + .of_match = arm_twd_timer_ids, + .priv_auto = sizeof(struct arm_twd_timer_priv), + .probe = arm_twd_timer_probe, + .ops = &arm_twd_timer_ops, +}; diff --git a/drivers/timer/mpc83xx_timer.c b/drivers/timer/mpc83xx_timer.c index 952293195f8..410bf723d6b 100644 --- a/drivers/timer/mpc83xx_timer.c +++ b/drivers/timer/mpc83xx_timer.c @@ -176,7 +176,7 @@ void timer_interrupt(struct pt_regs *regs) #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) if (CONFIG_SYS_WATCHDOG_FREQ && (priv->timestamp % (CONFIG_SYS_WATCHDOG_FREQ)) == 0) - WATCHDOG_RESET(); + schedule(); #endif /* CONFIG_WATCHDOG || CONFIG_HW_WATCHDOG */ #ifdef CONFIG_LED_STATUS @@ -189,7 +189,7 @@ void wait_ticks(ulong ticks) ulong end = get_ticks() + ticks; while (end > get_ticks()) - WATCHDOG_RESET(); + schedule(); } static u64 mpc83xx_timer_get_count(struct udevice *dev) diff --git a/drivers/usb/eth/lan7x.h b/drivers/usb/eth/lan7x.h index f71e8c7268c..9480f4f6d15 100644 --- a/drivers/usb/eth/lan7x.h +++ b/drivers/usb/eth/lan7x.h @@ -157,7 +157,7 @@ static inline int lan7x_wait_for_bit(struct usb_device *udev, } udelay(1); - WATCHDOG_RESET(); + schedule(); } debug("%s: Timeout (reg=0x%x mask=%08x wait_set=%i)\n", prefix, reg, @@ -199,7 +199,7 @@ static inline int lan7x_mdio_wait_for_bit(struct usb_device *udev, } udelay(1); - WATCHDOG_RESET(); + schedule(); } debug("%s: Timeout (reg=0x%x mask=%08x wait_set=%i)\n", prefix, reg, diff --git a/drivers/usb/gadget/f_acm.c b/drivers/usb/gadget/f_acm.c index 388f73d1bc8..b2ddd1ada8b 100644 --- a/drivers/usb/gadget/f_acm.c +++ b/drivers/usb/gadget/f_acm.c @@ -579,7 +579,7 @@ static int acm_stdio_getc(struct stdio_dev *dev) /* Wait for a character to arrive. */ while (!acm_stdio_tstc(dev)) - WATCHDOG_RESET(); + schedule(); buf_pop(&f_acm->rx_buf, &c, 1); @@ -639,7 +639,7 @@ static int acm_stdio_start(struct stdio_dev *dev) if (ctrlc()) return -ECANCELED; - WATCHDOG_RESET(); + schedule(); } return 0; diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c index 0fa7230b992..74548ab603b 100644 --- a/drivers/usb/gadget/f_sdp.c +++ b/drivers/usb/gadget/f_sdp.c @@ -711,7 +711,7 @@ int sdp_init(int controller_index) return 1; } - WATCHDOG_RESET(); + schedule(); usb_gadget_handle_interrupts(controller_index); } @@ -927,7 +927,7 @@ int spl_sdp_handle(int controller_index, struct spl_image_info *spl_image, if (flag == SDP_EXIT) return 0; - WATCHDOG_RESET(); + schedule(); usb_gadget_handle_interrupts(controller_index); #ifdef CONFIG_SPL_BUILD diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index f033198a7c1..d30f2a0d13b 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -641,7 +641,7 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, token = hc32_to_cpu(vtd->qt_token); if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)) break; - WATCHDOG_RESET(); + schedule(); } while (get_timer(ts) < timeout); qhtoken = hc32_to_cpu(qh->qh_overlay.qt_token); diff --git a/drivers/usb/musb-new/musb_uboot.c b/drivers/usb/musb-new/musb_uboot.c index d186facc7e0..62c5e8e5fa4 100644 --- a/drivers/usb/musb-new/musb_uboot.c +++ b/drivers/usb/musb-new/musb_uboot.c @@ -378,7 +378,7 @@ static struct musb *gadget; int usb_gadget_handle_interrupts(int index) { - WATCHDOG_RESET(); + schedule(); if (!gadget || !gadget->isr) return -EINVAL; diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c index 4d2d961696a..082895a50ec 100644 --- a/drivers/video/video_bmp.c +++ b/drivers/video/video_bmp.c @@ -329,7 +329,7 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, byte_width = width; for (i = 0; i < height; ++i) { - WATCHDOG_RESET(); + schedule(); for (j = 0; j < width; j++) { write_pix8(fb, bpix, eformat, palette, bmap); bmap++; @@ -342,7 +342,7 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, case 16: if (IS_ENABLED(CONFIG_BMP_16BPP)) { for (i = 0; i < height; ++i) { - WATCHDOG_RESET(); + schedule(); for (j = 0; j < width; j++) { *fb++ = *bmap++; *fb++ = *bmap++; diff --git a/drivers/virtio/Kconfig b/drivers/virtio/Kconfig index 586263ec884..852f6735b60 100644 --- a/drivers/virtio/Kconfig +++ b/drivers/virtio/Kconfig @@ -64,7 +64,6 @@ config VIRTIO_NET config VIRTIO_BLK bool "virtio block driver" depends on VIRTIO - depends on BLK help This is the virtual block driver for virtio. It can be used with QEMU based targets. diff --git a/drivers/virtio/virtio_blk.c b/drivers/virtio/virtio_blk.c index 3ff74f4a975..9710b79117c 100644 --- a/drivers/virtio/virtio_blk.c +++ b/drivers/virtio/virtio_blk.c @@ -75,14 +75,14 @@ static int virtio_blk_bind(struct udevice *dev) struct blk_desc *desc = dev_get_uclass_plat(dev); int devnum; - desc->if_type = IF_TYPE_VIRTIO; + desc->if_type = UCLASS_VIRTIO; /* * Initialize the devnum to -ENODEV. This is to make sure that * blk_next_free_devnum() works as expected, since the default * value 0 is a valid devnum. */ desc->devnum = -ENODEV; - devnum = blk_next_free_devnum(IF_TYPE_VIRTIO); + devnum = blk_next_free_devnum(UCLASS_VIRTIO); if (devnum < 0) return devnum; desc->devnum = devnum; diff --git a/drivers/virtio/virtio_pci_modern.c b/drivers/virtio/virtio_pci_modern.c index 880a12cc283..cfde4007f5e 100644 --- a/drivers/virtio/virtio_pci_modern.c +++ b/drivers/virtio/virtio_pci_modern.c @@ -466,7 +466,7 @@ static void __iomem *virtio_pci_map_capability(struct udevice *udev, unsigned long mask = PCI_REGION_TYPE | PCI_REGION_SYS_MEMORY | PCI_REGION_RO; unsigned long flags = PCI_REGION_MEM; - u8 *p = dm_pci_map_bar(udev, PCI_BASE_ADDRESS_0 + cap->bar, cap->offset, + u8 *p = dm_pci_map_bar(udev, PCI_BASE_ADDRESS_0 + 4 * cap->bar, cap->offset, cap->length, mask, flags); return (void __iomem *)p; diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 50e6a1efba5..e55deaf906b 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -3,6 +3,7 @@ menu "Watchdog Timer Support" config WATCHDOG bool "Enable U-Boot watchdog reset" depends on !HW_WATCHDOG + select CYCLIC help This option enables U-Boot watchdog support where U-Boot is using watchdog_reset function to service watchdog device in U-Boot. Enable @@ -74,6 +75,7 @@ config WDT bool "Enable driver model for watchdog timer drivers" depends on DM imply WATCHDOG + select CYCLIC help Enable driver model for watchdog timer. At the moment the API is very simple and only supports four operations: diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c index dbf556467d3..3f342cd99fd 100644 --- a/drivers/watchdog/wdt-uclass.c +++ b/drivers/watchdog/wdt-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_WDT #include <common.h> +#include <cyclic.h> #include <dm.h> #include <errno.h> #include <hang.h> @@ -38,8 +39,25 @@ struct wdt_priv { bool running; /* No autostart */ bool noautostart; + + struct cyclic_info *cyclic; }; +static void wdt_cyclic(void *ctx) +{ + struct udevice *dev = ctx; + struct wdt_priv *priv; + + if (!device_active(dev)) + return; + + priv = dev_get_uclass_priv(dev); + if (!priv->running) + return; + + wdt_reset(dev); +} + static void init_watchdog_dev(struct udevice *dev) { struct wdt_priv *priv; @@ -64,9 +82,6 @@ static void init_watchdog_dev(struct udevice *dev) printf("WDT: Failed to start %s\n", dev->name); return; } - - printf("WDT: Started %s with%s servicing (%ds timeout)\n", dev->name, - IS_ENABLED(CONFIG_WATCHDOG) ? "" : "out", priv->timeout); } int initr_watchdog(void) @@ -105,8 +120,29 @@ int wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) ret = ops->start(dev, timeout_ms, flags); if (ret == 0) { struct wdt_priv *priv = dev_get_uclass_priv(dev); + char str[16]; priv->running = true; + + memset(str, 0, 16); + if (IS_ENABLED(CONFIG_WATCHDOG)) { + /* Register the watchdog driver as a cyclic function */ + priv->cyclic = cyclic_register(wdt_cyclic, + priv->reset_period * 1000, + dev->name, dev); + if (!priv->cyclic) { + printf("cyclic_register for %s failed\n", + dev->name); + return -ENODEV; + } else { + snprintf(str, 16, "every %ldms", + priv->reset_period); + } + } + + printf("WDT: Started %s with%s servicing %s (%ds timeout)\n", + dev->name, IS_ENABLED(CONFIG_WATCHDOG) ? "" : "out", + str, priv->timeout); } return ret; @@ -194,37 +230,10 @@ int wdt_expire_now(struct udevice *dev, ulong flags) */ void watchdog_reset(void) { - struct wdt_priv *priv; - struct udevice *dev; - struct uclass *uc; - ulong now; - - /* Exit if GD is not ready or watchdog is not initialized yet */ - if (!gd || !(gd->flags & GD_FLG_WDT_READY)) - return; - - if (uclass_get(UCLASS_WDT, &uc)) - return; - /* - * All devices bound to the wdt uclass should have been probed - * in initr_watchdog(). But just in case something went wrong, - * check device_active() before accessing the uclass private - * data. + * Empty function for now. The actual WDT handling is now done in + * the cyclic function instead. */ - uclass_foreach_dev(dev, uc) { - if (!device_active(dev)) - continue; - priv = dev_get_uclass_priv(dev); - if (!priv->running) - continue; - /* Do not reset the watchdog too often */ - now = get_timer(0); - if (time_after_eq(now, priv->next_reset)) { - priv->next_reset = now + priv->reset_period; - wdt_reset(dev); - } - } } #endif diff --git a/drivers/xen/Kconfig b/drivers/xen/Kconfig index 6ad2a936682..0ee74d036c7 100644 --- a/drivers/xen/Kconfig +++ b/drivers/xen/Kconfig @@ -2,7 +2,6 @@ config PVBLOCK bool "Xen para-virtualized block device" depends on DM select BLK - select HAVE_BLOCK_DEVICE help This driver implements the front-end of the Xen virtual block device driver. It communicates with a back-end driver diff --git a/drivers/xen/pvblock.c b/drivers/xen/pvblock.c index c25c3ea4fff..1090e528d02 100644 --- a/drivers/xen/pvblock.c +++ b/drivers/xen/pvblock.c @@ -665,14 +665,14 @@ static int pvblock_blk_bind(struct udevice *udev) struct blk_desc *desc = dev_get_uclass_plat(udev); int devnum; - desc->if_type = IF_TYPE_PVBLOCK; + desc->if_type = UCLASS_PVBLOCK; /* * Initialize the devnum to -ENODEV. This is to make sure that * blk_next_free_devnum() works as expected, since the default * value 0 is a valid devnum. */ desc->devnum = -ENODEV; - devnum = blk_next_free_devnum(IF_TYPE_PVBLOCK); + devnum = blk_next_free_devnum(UCLASS_PVBLOCK); if (devnum < 0) return devnum; desc->devnum = devnum; @@ -804,7 +804,7 @@ static void print_pvblock_devices(void) const char *class_name; class_name = uclass_get_name(UCLASS_PVBLOCK); - for (blk_first_device(IF_TYPE_PVBLOCK, &udev); udev; + for (blk_first_device(UCLASS_PVBLOCK, &udev); udev; blk_next_device(&udev), first = false) { struct blk_desc *desc = dev_get_uclass_plat(udev); diff --git a/env/Kconfig b/env/Kconfig index 238e4c70cf0..5329f7585be 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -570,6 +570,7 @@ config ENV_OFFSET_REDUND hex "Redundant environment offset" depends on (ENV_IS_IN_EEPROM || ENV_IS_IN_MMC || ENV_IS_IN_NAND || \ ENV_IS_IN_SPI_FLASH) && SYS_REDUNDAND_ENVIRONMENT + default 0x10C0000 if MICROBLAZE default 0 help Offset from the start of the device (or partition) of the redundant diff --git a/env/common.c b/env/common.c index f9226e0690d..8dd05ff76d9 100644 --- a/env/common.c +++ b/env/common.c @@ -115,7 +115,7 @@ char *env_get(const char *name) if (gd->flags & GD_FLG_ENV_READY) { /* after import into hashtable */ struct env_entry e, *ep; - WATCHDOG_RESET(); + schedule(); e.key = name; e.data = NULL; diff --git a/env/mmc.c b/env/mmc.c index 0c498d9a46b..c28f4c6c6dc 100644 --- a/env/mmc.c +++ b/env/mmc.c @@ -143,7 +143,7 @@ static int mmc_set_env_part(struct mmc *mmc, uint part) int dev = mmc_get_env_dev(); int ret = 0; - ret = blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part); + ret = blk_select_hwpart_devnum(UCLASS_MMC, dev, part); if (ret) puts("MMC partition switch failed\n"); @@ -179,7 +179,7 @@ static void fini_mmc_for_env(struct mmc *mmc) #ifdef CONFIG_SYS_MMC_ENV_PART int dev = mmc_get_env_dev(); - blk_select_hwpart_devnum(IF_TYPE_MMC, dev, env_mmc_orig_hwpart); + blk_select_hwpart_devnum(UCLASS_MMC, dev, env_mmc_orig_hwpart); #endif } diff --git a/fs/cramfs/uncompress.c b/fs/cramfs/uncompress.c index f431cc46c1f..0d071b69f4c 100644 --- a/fs/cramfs/uncompress.c +++ b/fs/cramfs/uncompress.c @@ -21,6 +21,7 @@ */ #include <common.h> +#include <cyclic.h> #include <malloc.h> #include <watchdog.h> #include <u-boot/zlib.h> @@ -62,7 +63,7 @@ int cramfs_uncompress_init (void) stream.avail_in = 0; #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) - stream.outcb = (cb_func) WATCHDOG_RESET; + stream.outcb = (cb_func)cyclic_run; #else stream.outcb = Z_NULL; #endif /* CONFIG_HW_WATCHDOG */ diff --git a/fs/fat/fat.c b/fs/fat/fat.c index df9ea2c028f..c64e253abd4 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -1144,7 +1144,7 @@ int file_fat_detectfs(void) return 1; } - if (IS_ENABLED(CONFIG_HAVE_BLOCK_DEVICE)) { + if (blk_enabled()) { printf("Interface: %s\n", blk_get_if_type_name(cur_dev->if_type)); printf(" Device %d: ", cur_dev->devnum); dev_print(cur_dev); diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c index ef7b302725c..49ba82ef959 100644 --- a/fs/jffs2/jffs2_1pass.c +++ b/fs/jffs2/jffs2_1pass.c @@ -1523,7 +1523,7 @@ jffs2_1pass_build_lists(struct part_info * part) /* Set buf_size to maximum length */ buf_size = DEFAULT_EMPTY_SCAN_SIZE; - WATCHDOG_RESET(); + schedule(); #ifdef CONFIG_JFFS2_SUMMARY buf_len = sizeof(*sm); diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index 2a747d91e16..4aeb61f08c4 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -20,6 +20,7 @@ */ #ifndef __ASSEMBLY__ +#include <cyclic.h> #include <event_internal.h> #include <fdtdec.h> #include <membuff.h> @@ -478,6 +479,12 @@ struct global_data { */ struct event_state event_state; #endif +#ifdef CONFIG_CYCLIC + /** + * @cyclic: cyclic driver data + */ + struct cyclic_drv *cyclic; +#endif /** * @dmtag_list: List of DM tags */ diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index 81f63f06f15..0fcf70983fb 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -127,6 +127,7 @@ struct gpio_desc { #define GPIOD_OPEN_SOURCE BIT(6) /* GPIO is open source type */ #define GPIOD_PULL_UP BIT(7) /* GPIO has pull-up enabled */ #define GPIOD_PULL_DOWN BIT(8) /* GPIO has pull-down enabled */ +#define GPIOD_IS_AF BIT(9) /* GPIO is an alternate function */ /* Flags for updating the above */ #define GPIOD_MASK_DIR (GPIOD_IS_OUT | GPIOD_IS_IN | \ diff --git a/include/blk.h b/include/blk.h index 9503369db83..279f9ea4a9d 100644 --- a/include/blk.h +++ b/include/blk.h @@ -7,6 +7,7 @@ #ifndef BLK_H #define BLK_H +#include <dm/uclass-id.h> #include <efi.h> #ifdef CONFIG_SYS_64BIT_LBA @@ -21,26 +22,10 @@ typedef ulong lbaint_t; struct udevice; -/* Interface types: */ -enum if_type { - IF_TYPE_UNKNOWN = 0, - IF_TYPE_IDE, - IF_TYPE_SCSI, - IF_TYPE_ATAPI, - IF_TYPE_USB, - IF_TYPE_DOC, - IF_TYPE_MMC, - IF_TYPE_SD, - IF_TYPE_SATA, - IF_TYPE_HOST, - IF_TYPE_NVME, - IF_TYPE_EFI_LOADER, - IF_TYPE_PVBLOCK, - IF_TYPE_VIRTIO, - IF_TYPE_EFI_MEDIA, - - IF_TYPE_COUNT, /* Number of interface types */ -}; +static inline bool blk_enabled(void) +{ + return CONFIG_IS_ENABLED(BLK) || IS_ENABLED(CONFIG_SPL_LEGACY_BLOCK); +} #define BLK_VEN_SIZE 40 #define BLK_PRD_SIZE 20 @@ -69,7 +54,7 @@ struct blk_desc { * TODO: With driver model we should be able to use the parent * device's uclass instead. */ - enum if_type if_type; /* type of the interface */ + enum uclass_id if_type; /* type of the interface */ int devnum; /* device number */ unsigned char part_type; /* partition type */ unsigned char target; /* target SCSI ID */ @@ -294,7 +279,7 @@ unsigned long blk_derase(struct blk_desc *block_dev, lbaint_t start, * This function does not activate the device. The device will be returned * whether or not it is activated. * - * @if_type: Interface type (enum if_type_t) + * @if_type: Interface type (enum uclass_id_t) * @devnum: Device number (specific to each interface type) * @devp: the device, if found * Return: 0 if found, -ENODEV if no device found, or other -ve error value @@ -304,7 +289,7 @@ int blk_find_device(int if_type, int devnum, struct udevice **devp); /** * blk_get_device() - Find and probe a block device ready for use * - * @if_type: Interface type (enum if_type_t) + * @if_type: Interface type (enum uclass_id_t) * @devnum: Device number (specific to each interface type) * @devp: the device, if found * Return: 0 if found, -ENODEV if no device found, or other -ve error value @@ -342,7 +327,7 @@ int blk_next_device(struct udevice **devp); * @parent: Parent of the new device * @drv_name: Driver name to use for the block device * @name: Name for the device - * @if_type: Interface type (enum if_type_t) + * @if_type: Interface type (enum uclass_id_t) * @devnum: Device number, specific to the interface type, or -1 to * allocate the next available number * @blksz: Block size of the device in bytes (typically 512) @@ -359,7 +344,7 @@ int blk_create_device(struct udevice *parent, const char *drv_name, * @parent: Parent of the new device * @drv_name: Driver name to use for the block device * @name: Name for the device (parent name is prepended) - * @if_type: Interface type (enum if_type_t) + * @if_type: Interface type (enum uclass_id_t) * @devnum: Device number, specific to the interface type, or -1 to * allocate the next available number * @blksz: Block size of the device in bytes (typically 512) @@ -402,7 +387,7 @@ int blk_unbind_all(int if_type); * Return: maximum device number found, or -ENODEV if none, or other -ve on * error */ -int blk_find_max_devnum(enum if_type if_type); +int blk_find_max_devnum(enum uclass_id if_type); /** * blk_next_free_devnum() - get the next device number for an interface type @@ -413,7 +398,7 @@ int blk_find_max_devnum(enum if_type if_type); * @if_type: Interface type to scan * Return: next device number safe to use, or -ve on error */ -int blk_next_free_devnum(enum if_type if_type); +int blk_next_free_devnum(enum uclass_id if_type); /** * blk_select_hwpart() - select a hardware partition @@ -508,7 +493,7 @@ static inline ulong blk_derase(struct blk_desc *block_dev, lbaint_t start, */ struct blk_driver { const char *if_typename; - enum if_type if_type; + enum uclass_id if_type; int max_devs; struct blk_desc *desc; /** @@ -569,7 +554,7 @@ struct blk_driver *blk_driver_lookup_type(int if_type); * @devnum: Device number * Return: point to block device descriptor, or NULL if not found */ -struct blk_desc *blk_get_devnum_by_type(enum if_type if_type, int devnum); +struct blk_desc *blk_get_devnum_by_type(enum uclass_id if_type, int devnum); /** * blk_get_devnum_by_type() - Get a block device by type name, and number @@ -606,7 +591,7 @@ int blk_dselect_hwpart(struct blk_desc *desc, int hwpart); * @if_type: Block device type * Return: 0 if OK, -ENODEV if there is none of that type */ -int blk_list_part(enum if_type if_type); +int blk_list_part(enum uclass_id if_type); /** * blk_list_devices() - list the block devices of a given type @@ -616,7 +601,7 @@ int blk_list_part(enum if_type if_type); * * @if_type: Block device type */ -void blk_list_devices(enum if_type if_type); +void blk_list_devices(enum uclass_id if_type); /** * blk_show_device() - show information about a given block device @@ -627,7 +612,7 @@ void blk_list_devices(enum if_type if_type); * @devnum: Device number * Return: 0 if OK, -ENODEV for invalid device number */ -int blk_show_device(enum if_type if_type, int devnum); +int blk_show_device(enum uclass_id if_type, int devnum); /** * blk_print_device_num() - show information about a given block device @@ -640,7 +625,7 @@ int blk_show_device(enum if_type if_type, int devnum); * Return: 0 if OK, -ENODEV for invalid device number, -ENOENT if the block * device is not connected */ -int blk_print_device_num(enum if_type if_type, int devnum); +int blk_print_device_num(enum uclass_id if_type, int devnum); /** * blk_print_part_devnum() - print the partition information for a device @@ -650,7 +635,7 @@ int blk_print_device_num(enum if_type if_type, int devnum); * Return: 0 if OK, -ENOENT if the block device is not connected, -ENOSYS if * the interface type is not supported, other -ve on other error */ -int blk_print_part_devnum(enum if_type if_type, int devnum); +int blk_print_part_devnum(enum uclass_id if_type, int devnum); /** * blk_read_devnum() - read blocks from a device @@ -661,7 +646,7 @@ int blk_print_part_devnum(enum if_type if_type, int devnum); * @buffer: Address to write data to * Return: number of blocks read, or -ve error number on error */ -ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start, +ulong blk_read_devnum(enum uclass_id if_type, int devnum, lbaint_t start, lbaint_t blkcnt, void *buffer); /** @@ -673,7 +658,7 @@ ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start, * @buffer: Address to read data from * Return: number of blocks written, or -ve error number on error */ -ulong blk_write_devnum(enum if_type if_type, int devnum, lbaint_t start, +ulong blk_write_devnum(enum uclass_id if_type, int devnum, lbaint_t start, lbaint_t blkcnt, const void *buffer); /** @@ -687,7 +672,7 @@ ulong blk_write_devnum(enum if_type if_type, int devnum, lbaint_t start, * @hwpart: Partition number to select * Return: 0 if OK, -ve on error */ -int blk_select_hwpart_devnum(enum if_type if_type, int devnum, int hwpart); +int blk_select_hwpart_devnum(enum uclass_id if_type, int devnum, int hwpart); /** * blk_get_if_type_name() - Get the name of an interface type @@ -695,7 +680,7 @@ int blk_select_hwpart_devnum(enum if_type if_type, int devnum, int hwpart); * @if_type: Interface type to check * Return: name of interface, or NULL if none */ -const char *blk_get_if_type_name(enum if_type if_type); +const char *blk_get_if_type_name(enum uclass_id if_type); /** * blk_common_cmd() - handle common commands with block devices @@ -706,7 +691,7 @@ const char *blk_get_if_type_name(enum if_type if_type); * @cur_devnump: Current device number for this interface type * Return: 0 if OK, CMD_RET_ERROR on error */ -int blk_common_cmd(int argc, char *const argv[], enum if_type if_type, +int blk_common_cmd(int argc, char *const argv[], enum uclass_id if_type, int *cur_devnump); enum blk_flag_t { diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index 5506f3168f3..fcb319a20ae 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -162,11 +162,13 @@ "scan_dev_for_efi=" \ "setenv efi_fdtfile ${fdtfile}; " \ BOOTENV_EFI_SET_FDTFILE_FALLBACK \ + BOOTENV_RUN_EXTENSION_INIT \ "for prefix in ${efi_dtb_prefixes}; do " \ "if test -e ${devtype} " \ "${devnum}:${distro_bootpart} " \ "${prefix}${efi_fdtfile}; then " \ "run load_efi_dtb; " \ + BOOTENV_RUN_EXTENSION_APPLY \ "fi;" \ "done;" \ "run boot_efi_bootmgr;" \ @@ -418,6 +420,34 @@ BOOT_TARGET_DEVICES_references_PXE_without_CONFIG_CMD_DHCP_or_PXE #endif +#if defined(CONFIG_CMD_EXTENSION) +#define BOOTENV_RUN_EXTENSION_INIT "run extension_init; " +#define BOOTENV_RUN_EXTENSION_APPLY "run extension_apply; " +#define BOOTENV_SET_EXTENSION_NEED_INIT \ + "extension_need_init=; " \ + "setenv extension_overlay_addr ${fdtoverlay_addr_r}; " +#define BOOTENV_SHARED_EXTENSION \ + "extension_init=" \ + "echo Extension init...; " \ + "if ${extension_need_init}; then " \ + "extension_need_init=false; " \ + "extension scan; " \ + "fi\0" \ + \ + "extension_overlay_cmd=" \ + "load ${devtype} ${devnum}:${distro_bootpart} " \ + "${extension_overlay_addr} ${prefix}${extension_overlay_name}\0" \ + "extension_apply=" \ + "if fdt addr -q ${fdt_addr_r}; then " \ + "extension apply all; " \ + "fi\0" +#else +#define BOOTENV_RUN_EXTENSION_INIT +#define BOOTENV_RUN_EXTENSION_APPLY +#define BOOTENV_SET_EXTENSION_NEED_INIT +#define BOOTENV_SHARED_EXTENSION +#endif + #define BOOTENV_DEV_NAME(devtypeu, devtypel, instance, ...) \ BOOTENV_DEV_NAME_##devtypeu(devtypeu, devtypel, instance, ## __VA_ARGS__) #define BOOTENV_BOOT_TARGETS \ @@ -437,6 +467,7 @@ BOOTENV_SHARED_UBIFS \ BOOTENV_SHARED_EFI \ BOOTENV_SHARED_VIRTIO \ + BOOTENV_SHARED_EXTENSION \ "boot_prefixes=/ /boot/\0" \ "boot_scripts=boot.scr.uimg boot.scr\0" \ "boot_script_dhcp=boot.scr.uimg\0" \ @@ -501,6 +532,7 @@ BOOTENV_SET_NVME_NEED_INIT \ BOOTENV_SET_IDE_NEED_INIT \ BOOTENV_SET_VIRTIO_NEED_INIT \ + BOOTENV_SET_EXTENSION_NEED_INIT \ "for target in ${boot_targets}; do " \ "run bootcmd_${target}; " \ "done\0" diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 0c710ef8865..eb7a8351794 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -255,9 +255,6 @@ #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } #endif -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_CCID - /* * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 7f5eaf88aa4..8492a64d439 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -351,10 +351,6 @@ extern unsigned long get_sdram_size(void); /* I2C EEPROM */ #if defined(CONFIG_TARGET_P1010RDB_PB) -#ifdef CONFIG_ID_EEPROM -#define CONFIG_SYS_I2C_EEPROM_NXID -#endif -#define CONFIG_SYS_EEPROM_BUS_NUM 0 #define MAX_NUM_PORTS 9 /* for 128Bytes EEPROM */ #endif /* enable read and write access to EEPROM */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 11a3db59025..925720d2340 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -67,10 +67,6 @@ #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull #endif -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - /* * DDR Setup */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index a5461d7fc68..e0aa2b9598c 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -112,10 +112,6 @@ #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull #endif -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - /* * DDR Setup */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 560083c5b31..918aabcbb5c 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -292,11 +292,6 @@ #if defined(CONFIG_TARGET_T1042RDB_PI) || \ defined(CONFIG_TARGET_T1040D4RDB) || \ defined(CONFIG_TARGET_T1042D4RDB) -/* LDI/DVI Encoder for display */ -#define CONFIG_SYS_I2C_LDI_ADDR 0x38 -#define CONFIG_SYS_I2C_DVI_ADDR 0x75 -#define CONFIG_SYS_I2C_DVI_BUS_NUM 0 - /* * RTC configuration */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index fc068c94a9e..e852fc4cdc8 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -82,10 +82,6 @@ #define CONFIG_SYS_DCSRBAR 0xf0000000 #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - /* * DDR Setup */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 056e2d1925b..68cf13581ad 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -77,10 +77,6 @@ #define CONFIG_SYS_DCSRBAR 0xf0000000 #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - /* * DDR Setup */ diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 87d3a27099b..fc82a8c003e 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -29,7 +29,6 @@ /* SPL defines. */ /* Enabling L2 Cache */ -#define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x48242000 /* diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index 6cb1a106002..2c5236aa58b 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -27,44 +27,18 @@ * the Linux kernel. */ -#ifdef CONFIG_SPL_OS_BOOT -/* RAW SD card / eMMC */ - -#endif /* CONFIG_SPL_OS_BOOT */ - -#ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#endif /* CONFIG_MTD_RAW_NAND */ - -#ifdef CONFIG_MTD_RAW_NAND -#define NANDTGTS \ -"cfgscr=mw ${dtbaddr} 0; nand read ${cfgaddr} cfgscr && source ${cfgaddr};" \ -" fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" \ -"nandargs=setenv bootargs console=${console} ${optargs} ${optargs_rot} " \ - "root=mtd6 rootfstype=jffs2 b_mode=${b_mode}\0" \ -"b_nand=nand read ${loadaddr} kernel; nand read ${dtbaddr} dtb; " \ - "run nandargs; run cfgscr; bootz ${loadaddr} - ${dtbaddr}\0" \ -"b_tgts_std=usb0 nand net\0" \ -"b_tgts_rcy=net usb0 nand\0" \ -"b_tgts_pme=usb0 nand net\0" -#else -#define NANDTGTS "" -#endif /* CONFIG_MTD_RAW_NAND */ - -#define MMCSPI_TGTS \ +#define MMC_TGTS \ "t30args#0=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \ - "b_mode=${b_mode} root=/dev/mmcblk0p2 rootfstype=ext4\0" \ + "b_mode=${b_mode} root=${root_dev} rootfstype=ext4 rootwait\0" \ "b_t30lgcy#0=" \ - "load ${loaddev}:2 ${loadaddr} /boot/PPTImage.md5 && " \ "load ${loaddev}:2 ${loadaddr} /boot/zImage && " \ - "load ${loaddev}:2 ${dtbaddr} /boot/am335x-ppt30.dtb || " \ - "load ${loaddev}:1 ${dtbaddr} am335x-ppt30-legacy.dtb; "\ + "run load_dtb && " \ "run t30args#0; run cfgscr; bootz ${loadaddr} - ${dtbaddr}\0" \ "t30args#1=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \ "b_mode=${b_mode}\0" \ "b_t30lgcy#1=" \ "load ${loaddev}:1 ${loadaddr} zImage && " \ - "load ${loaddev}:1 ${dtbaddr} am335x-ppt30.dtb && " \ + "load ${loaddev}:1 ${dtbaddr} am335x-brppt30.dtb && " \ "load ${loaddev}:1 ${ramaddr} rootfsPPT30.uboot && " \ "run t30args#1; run cfgscr; bootz ${loadaddr} ${ramaddr} ${dtbaddr}\0" \ "b_mmc0=load ${loaddev}:1 ${scraddr} bootscr.img && source ${scraddr}\0" \ @@ -72,28 +46,25 @@ "b_tgts_std=mmc0 mmc1 t30lgcy#0 t30lgcy#1 usb0 net\0" \ "b_tgts_rcy=t30lgcy#1 usb0 net\0" \ "b_tgts_pme=net usb0 mmc0 mmc1\0" \ -"loaddev=mmc 1\0" +"loaddev=mmc 1\0" \ +"root_dev=/dev/mmcblk0p2\0" \ +"load_dtb=load ${loaddev}:2 ${dtbaddr} /boot/am335x-brppt30.dtb; " \ + "if test $? -eq 0; then " \ + "setenv root_dev /dev/mmcblk1p2; " \ + "else; " \ + "load ${loaddev}:1 ${dtbaddr} am335x-brppt30-legacy.dtb; " \ + "fi;\0" #ifdef CONFIG_ENV_IS_IN_MMC #define MMCTGTS \ -MMCSPI_TGTS \ -"cfgscr=mw ${dtbaddr} 0;" \ +MMC_TGTS \ +"cfgscr=mw ${cfgaddr} 0;" \ " mmc dev 1; mmc read ${cfgaddr} 200 80; source ${cfgaddr};" \ " fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" #else #define MMCTGTS "" #endif /* CONFIG_MMC */ -#ifdef CONFIG_SPI -#define SPITGTS \ -MMCSPI_TGTS \ -"cfgscr=mw ${dtbaddr} 0;" \ -" sf probe; sf read ${cfgaddr} 0xC0000 10000; source ${cfgaddr};" \ -" fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" -#else -#define SPITGTS "" -#endif /* CONFIG_SPI */ - #define LOAD_OFFSET(x) 0x8##x #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -110,8 +81,6 @@ BUR_COMMON_ENV \ "b_usb0=usb start && load usb 0 ${scraddr} bootscr.img && source ${scraddr}\0" \ "b_net=tftp ${scraddr} netscript.img && source ${scraddr}\0" \ MMCTGTS \ -SPITGTS \ -NANDTGTS \ "b_deftgts=if test ${b_mode} = 12; then setenv b_tgts ${b_tgts_pme};" \ " elif test ${b_mode} = 0; then setenv b_tgts ${b_tgts_rcy};" \ " else setenv b_tgts ${b_tgts_std}; fi\0" \ @@ -119,28 +88,4 @@ NANDTGTS \ " do echo \"### booting ${target} ###\"; run b_${target};" \ " if test ${b_break} = 1; then; exit; fi; done\0" -#ifdef CONFIG_MTD_RAW_NAND -/* - * GPMC block. We support 1 device and the physical address to - * access CS0 at is 0x8000000. - */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x8000000 -/* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */ -#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, \ - 10, 11, 12, 13, 14, 15, 16, 17, \ - 18, 19, 20, 21, 22, 23, 24, 25, \ - 26, 27, 28, 29, 30, 31, 32, 33, \ - 34, 35, 36, 37, 38, 39, 40, 41, \ - 42, 43, 44, 45, 46, 47, 48, 49, \ - 50, 51, 52, 53, 54, 55, 56, 57, } - -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 14 - -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE - -#define CONFIG_NAND_OMAP_GPMC_WSCFG 1 -#endif /* CONFIG_MTD_RAW_NAND */ - #endif /* ! __CONFIG_BRPPT1_H__ */ diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index adaba410ce9..0c7fe5f3abb 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -13,7 +13,6 @@ /* -- i.mx6 specifica -- */ #ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE L2_PL310_BASE #endif /* !CONFIG_SYS_L2CACHE_OFF */ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index 07c5cb8ded1..50cb2a47187 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -36,7 +36,6 @@ #define CONFIG_POWER_TPS65218 /* Enabling L2 Cache */ -#define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x48242000 /* diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index 48fe8288aa1..9ad3a120118 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -49,10 +49,6 @@ #define RTC #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - /* Voltage monitor on channel 2*/ #define I2C_VOL_MONITOR_ADDR 0x40 diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index ec688741a07..f418c8ccf71 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -59,10 +59,6 @@ * I2C */ -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - /* * MMC */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index aaf28a346d0..d383b6c655b 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -246,10 +246,6 @@ /* GPIO */ -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - /* * I2C bus multiplexer */ diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index f318eb58603..157f218a8ec 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -71,10 +71,6 @@ /* I2C */ -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - /* PCIe */ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 5f3e8d5b712..83c74b66d3a 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -161,10 +161,6 @@ /* GPIO */ -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 1 - #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR 0x01ee0200 diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 8413e68f3a7..24422665e87 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -63,10 +63,6 @@ #define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ #define I2C_MUX_CH_DEFAULT 0x8 -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - /* DisplayPort */ #define DP_PWD_EN_DEFAULT_MASK 0x8 diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 49f6cd6be11..4158d15cc0f 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -37,10 +37,6 @@ /* SATA */ -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - #define CONFIG_SYS_SATA AHCI_BASE_ADDR /* diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index ff5da5d2754..4bfe4e3ecd0 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -184,12 +184,6 @@ #define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_CPLD_FTIM2 #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_CPLD_FTIM3 -/* EEPROM */ -#ifndef SPL_NO_EEPROM -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 -#endif - /* * Environment */ diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index 43717cdd4e6..2df5f3f6c0b 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -59,8 +59,6 @@ #define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 /* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 #define I2C_RETIMER_ADDR 0x18 /* I2C bus multiplexer */ diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 869bbd76346..1f54e516455 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -54,10 +54,6 @@ #define CFG_LPUART_EN 0x2 #endif -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - /* * IFC Definitions */ diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 382d5c76461..5d329577a63 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -98,8 +98,6 @@ #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_CPLD_FTIM3 /* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 #define I2C_RETIMER_ADDR 0x18 /* PMIC */ diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 747ee9d4428..2d3351e6b4f 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -287,10 +287,6 @@ #define RTC #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - #ifdef CONFIG_FSL_DSPI #if !defined(CONFIG_TFABOOT) && \ !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 3e829ea8659..d98ed39812a 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -198,10 +198,6 @@ #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ #endif -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - #ifndef SPL_NO_ENV /* Initial environment variables */ #ifdef CONFIG_TFABOOT diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 6487397f652..d02d7fc5886 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -235,10 +235,6 @@ #define CONFIG_RTC_DS3231 1 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - /* Initial environment variables */ #undef CONFIG_EXTRA_ENV_SETTINGS #ifdef CONFIG_NXP_ESBC diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 87d07b765c6..09484dc6094 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -222,10 +222,6 @@ #define CONFIG_SYS_I2C_RTC_ADDR 0x68 #endif -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ func(MMC, mmc, 0) \ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index d39c0032c4a..ed69b857582 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -78,10 +78,6 @@ #define RTC #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - /* Qixis */ #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h index 585aab26bff..4e8a9048596 100644 --- a/include/configs/lx2160aqds.h +++ b/include/configs/lx2160aqds.h @@ -13,10 +13,6 @@ /* MAC/PHY configuration */ -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ EXTRA_ENV_SETTINGS \ diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h index 5c4ea27787b..bb9239cc599 100644 --- a/include/configs/lx2160ardb.h +++ b/include/configs/lx2160ardb.h @@ -17,10 +17,6 @@ #define I2C_EMC2305_CMD 0x40 #define I2C_EMC2305_PWM 0x80 -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ EXTRA_ENV_SETTINGS \ diff --git a/include/configs/lx2162aqds.h b/include/configs/lx2162aqds.h index d1ae4034731..b70abb013f4 100644 --- a/include/configs/lx2162aqds.h +++ b/include/configs/lx2162aqds.h @@ -13,10 +13,6 @@ /* RTC */ #define CONFIG_SYS_RTC_BUS_NUM 0 -/* EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ EXTRA_ENV_SETTINGS \ diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 8eaac4f8bc2..dfae8cea7b5 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -97,10 +97,4 @@ #define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE -/* SP location before relocation, must use scratch RAM */ -/* BRAM start */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x0 -/* BRAM size - will be generated */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x100000 - #endif /* __CONFIG_H */ diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index e416f81e43a..43145567544 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -12,7 +12,6 @@ #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ #else #ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE L2_PL310_BASE #endif diff --git a/include/configs/odroid.h b/include/configs/odroid.h index 7448cc95203..babd3ca9631 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -14,7 +14,6 @@ #include <configs/exynos4-common.h> #ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 #endif diff --git a/include/configs/poleg.h b/include/configs/poleg.h index f1c259f4760..05253d59efd 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -7,7 +7,6 @@ #define __CONFIG_POLEG_H #ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_L2_PL310 1 #define CONFIG_SYS_PL310_BASE 0xF03FC000 /* L2 - Cache Regs Base (4k Space)*/ #endif diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index 9923f3d9c34..85fab927195 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -51,6 +51,4 @@ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ BOOTENV -#define CONFIG_SYS_EEPROM_BUS_NUM 0 - #endif /* __SIFIVE_UNMATCHED_H */ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 4a7da76e51e..c3f30afe2b5 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -48,7 +48,6 @@ /* * Cache */ -#define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS /* diff --git a/include/configs/stemmy.h b/include/configs/stemmy.h index 71b25c23b13..3c70856fc70 100644 --- a/include/configs/stemmy.h +++ b/include/configs/stemmy.h @@ -15,7 +15,6 @@ */ /* FIXME: This should be loaded from device tree... */ -#define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0xa0412000 /* Linux does not boot if FDT / initrd is loaded to end of RAM */ diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 3d78972bfeb..0568946fc82 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -12,7 +12,6 @@ #define __CONFIG_TI_OMAP4_COMMON_H #ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_L2_PL310 1 #define CONFIG_SYS_PL310_BASE 0x48242000 #endif diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index a782e3d02bd..9498dbeadf4 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -37,10 +37,6 @@ /* I2C Configs */ #define CONFIG_I2C_MULTI_BUS -/* I2C EEPROM (M24C64) */ -#define CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS 5 /* 32 Bytes */ -#define CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS 20 - #if !defined(CONFIG_DM_PMIC) #define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 diff --git a/include/configs/trats.h b/include/configs/trats.h index 53f5a6996bd..530b413d5b6 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -12,7 +12,6 @@ #include <configs/exynos4-common.h> #ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 #endif diff --git a/include/configs/trats2.h b/include/configs/trats2.h index b7449dab8bd..06c1fcd23e0 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -13,7 +13,6 @@ #include <configs/exynos4-common.h> #ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 #endif diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 75ae68766fa..dc0cba00103 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -11,7 +11,6 @@ /* Cache options */ #ifndef CONFIG_SYS_L2CACHE_OFF -# define CONFIG_SYS_L2_PL310 # define CONFIG_SYS_PL310_BASE 0xf8f02000 #endif diff --git a/include/cyclic.h b/include/cyclic.h new file mode 100644 index 00000000000..76016364334 --- /dev/null +++ b/include/cyclic.h @@ -0,0 +1,150 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * A general-purpose cyclic execution infrastructure, to allow "small" + * (run-time wise) functions to be executed at a specified frequency. + * Things like LED blinking or watchdog triggering are examples for such + * tasks. + * + * Copyright (C) 2022 Stefan Roese <sr@denx.de> + */ + +#ifndef __cyclic_h +#define __cyclic_h + +#include <linux/list.h> +#include <asm/types.h> + +/** + * struct cyclic_drv - Cyclic driver internal data + * + * @cyclic_list: Cylic list node + * @cyclic_ready: Flag if cyclic infrastructure is ready + * @cyclic_running: Flag if cyclic infrastructure is running + */ +struct cyclic_drv { + struct list_head cyclic_list; + bool cyclic_ready; + bool cyclic_running; +}; + +/** + * struct cyclic_info - Information about cyclic execution function + * + * @func: Function to call periodically + * @ctx: Context pointer to get passed to this function + * @name: Name of the cyclic function, e.g. shown in the commands + * @delay_ns: Delay is ns after which this function shall get executed + * @start_time_us: Start time in us, when this function started its execution + * @cpu_time_us: Total CPU time of this function + * @run_cnt: Counter of executions occurances + * @next_call: Next time in us, when the function shall be executed again + * @list: List node + */ +struct cyclic_info { + void (*func)(void *ctx); + void *ctx; + char *name; + uint64_t delay_us; + uint64_t start_time_us; + uint64_t cpu_time_us; + uint64_t run_cnt; + uint64_t next_call; + struct list_head list; +}; + +/** Function type for cyclic functions */ +typedef void (*cyclic_func_t)(void *ctx); + +#if defined(CONFIG_CYCLIC) +/** + * cyclic_register - Register a new cyclic function + * + * @func: Function to call periodically + * @delay_us: Delay is us after which this function shall get executed + * @name: Cyclic function name/id + * @ctx: Context to pass to the function + * @return: pointer to cyclic_struct if OK, NULL on error + */ +struct cyclic_info *cyclic_register(cyclic_func_t func, uint64_t delay_us, + const char *name, void *ctx); + +/** + * cyclic_unregister - Unregister a cyclic function + * + * @cyclic: Pointer to cyclic_struct of the function that shall be removed + * @return: 0 if OK, -ve on error + */ +int cyclic_unregister(struct cyclic_info *cyclic); + +/** + * cyclic_init() - Set up cyclic functions + * + * Init a list of cyclic functions, so that these can be added as needed + */ +int cyclic_init(void); + +/** + * cyclic_uninit() - Clean up cyclic functions + * + * This removes all cyclic functions + */ +int cyclic_uninit(void); + +/** + * cyclic_get_list() - Get cyclic list pointer + * + * Return the cyclic list pointer + * + * @return: pointer to cyclic_list + */ +struct list_head *cyclic_get_list(void); + +/** + * cyclic_run() - Interate over all registered cyclic functions + * + * Interate over all registered cyclic functions and if the it's function + * needs to be executed, then call into these registered functions. + */ +void cyclic_run(void); + +/** + * schedule() - Schedule all potentially waiting tasks + * + * Basically a wrapper for cyclic_run(), pontentially enhanced by some + * other parts, that need to get handled periodically. + */ +void schedule(void); +#else +static inline struct cyclic_info *cyclic_register(cyclic_func_t func, + uint64_t delay_us, + const char *name, + void *ctx) +{ + return NULL; +} + +static inline int cyclic_unregister(struct cyclic_info *cyclic) +{ + return 0; +} + +static inline void cyclic_run(void) +{ +} + +static inline void schedule(void) +{ +} + +static inline int cyclic_init(void) +{ + return 0; +} + +static inline int cyclic_uninit(void) +{ + return 0; +} +#endif + +#endif diff --git a/include/dm/of_access.h b/include/dm/of_access.h index 5b7821d0a1b..83f34f0d2ad 100644 --- a/include/dm/of_access.h +++ b/include/dm/of_access.h @@ -265,6 +265,38 @@ struct device_node *of_find_node_by_prop_value(struct device_node *from, struct device_node *of_find_node_by_phandle(phandle handle); /** + * of_read_u8() - Find and read a 8-bit integer from a property + * + * Search for a property in a device node and read a 8-bit value from + * it. + * + * @np: device node from which the property value is to be read. + * @propname: name of the property to be searched. + * @outp: pointer to return value, modified only if return value is 0. + * + * Return: 0 on success, -EINVAL if the property does not exist, + * -ENODATA if property does not have a value, and -EOVERFLOW if the + * property data isn't large enough. + */ +int of_read_u8(const struct device_node *np, const char *propname, u8 *outp); + +/** + * of_read_u16() - Find and read a 16-bit integer from a property + * + * Search for a property in a device node and read a 16-bit value from + * it. + * + * @np: device node from which the property value is to be read. + * @propname: name of the property to be searched. + * @outp: pointer to return value, modified only if return value is 0. + * + * Return: 0 on success, -EINVAL if the property does not exist, + * -ENODATA if property does not have a value, and -EOVERFLOW if the + * property data isn't large enough. + */ +int of_read_u16(const struct device_node *np, const char *propname, u16 *outp); + +/** * of_read_u32() - Find and read a 32-bit integer from a property * * Search for a property in a device node and read a 32-bit value from diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 7ce1e4c6d91..f6085231bbd 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -222,6 +222,46 @@ static inline oftree oftree_default(void) bool ofnode_name_eq(ofnode node, const char *name); /** + * ofnode_read_u8() - Read a 8-bit integer from a property + * + * @node: valid node reference to read property from + * @propname: name of the property to read from + * @outp: place to put value (if found) + * Return: 0 if OK, -ve on error + */ +int ofnode_read_u8(ofnode node, const char *propname, u8 *outp); + +/** + * ofnode_read_u8_default() - Read a 8-bit integer from a property + * + * @node: valid node reference to read property from + * @propname: name of the property to read from + * @def: default value to return if the property has no value + * Return: property value, or @def if not found + */ +u8 ofnode_read_u8_default(ofnode node, const char *propname, u8 def); + +/** + * ofnode_read_u16() - Read a 16-bit integer from a property + * + * @node: valid node reference to read property from + * @propname: name of the property to read from + * @outp: place to put value (if found) + * Return: 0 if OK, -ve on error + */ +int ofnode_read_u16(ofnode node, const char *propname, u16 *outp); + +/** + * ofnode_read_u16_default() - Read a 16-bit integer from a property + * + * @node: valid node reference to read property from + * @propname: name of the property to read from + * @def: default value to return if the property has no value + * Return: property value, or @def if not found + */ +u16 ofnode_read_u16_default(ofnode node, const char *propname, u16 def); + +/** * ofnode_read_u32() - Read a 32-bit integer from a property * * @node: valid node reference to read property from diff --git a/include/dm/read.h b/include/dm/read.h index 1b54b69acf0..122b9cd15b8 100644 --- a/include/dm/read.h +++ b/include/dm/read.h @@ -32,6 +32,47 @@ static inline const struct device_node *dev_np(const struct udevice *dev) #if !defined(CONFIG_DM_DEV_READ_INLINE) || CONFIG_IS_ENABLED(OF_PLATDATA) /** + * dev_read_u8() - read a 8-bit integer from a device's DT property + * + * @dev: device to read DT property from + * @propname: name of the property to read from + * @outp: place to put value (if found) + * Return: 0 if OK, -ve on error + */ +int dev_read_u8(const struct udevice *dev, const char *propname, u8 *outp); + +/** + * dev_read_u8_default() - read a 8-bit integer from a device's DT property + * + * @dev: device to read DT property from + * @propname: name of the property to read from + * @def: default value to return if the property has no value + * Return: property value, or @def if not found + */ +u8 dev_read_u8_default(const struct udevice *dev, const char *propname, u8 def); + +/** + * dev_read_u16() - read a 16-bit integer from a device's DT property + * + * @dev: device to read DT property from + * @propname: name of the property to read from + * @outp: place to put value (if found) + * Return: 0 if OK, -ve on error + */ +int dev_read_u16(const struct udevice *dev, const char *propname, u16 *outp); + +/** + * dev_read_u16_default() - read a 16-bit integer from a device's DT property + * + * @dev: device to read DT property from + * @propname: name of the property to read from + * @def: default value to return if the property has no value + * Return: property value, or @def if not found + */ +u16 dev_read_u16_default(const struct udevice *dev, const char *propname, + u16 def); + +/** * dev_read_u32() - read a 32-bit integer from a device's DT property * * @dev: device to read DT property from @@ -772,6 +813,30 @@ phy_interface_t dev_read_phy_mode(const struct udevice *dev); #else /* CONFIG_DM_DEV_READ_INLINE is enabled */ #include <asm/global_data.h> +static inline int dev_read_u8(const struct udevice *dev, + const char *propname, u8 *outp) +{ + return ofnode_read_u8(dev_ofnode(dev), propname, outp); +} + +static inline int dev_read_u8_default(const struct udevice *dev, + const char *propname, u8 def) +{ + return ofnode_read_u8_default(dev_ofnode(dev), propname, def); +} + +static inline int dev_read_u16(const struct udevice *dev, + const char *propname, u16 *outp) +{ + return ofnode_read_u16(dev_ofnode(dev), propname, outp); +} + +static inline int dev_read_u16_default(const struct udevice *dev, + const char *propname, u16 def) +{ + return ofnode_read_u16_default(dev_ofnode(dev), propname, def); +} + static inline int dev_read_u32(const struct udevice *dev, const char *propname, u32 *outp) { diff --git a/include/dt-bindings/gpio/sandbox-gpio.h b/include/dt-bindings/gpio/sandbox-gpio.h index e4bfdb3ce1d..05f98365839 100644 --- a/include/dt-bindings/gpio/sandbox-gpio.h +++ b/include/dt-bindings/gpio/sandbox-gpio.h @@ -21,4 +21,7 @@ /* Bit 18 express GPIO output is active */ #define GPIO_OUT_ACTIVE 0x40000 +/* Bit 19 express GPIO set as alternate function */ +#define GPIO_AF 0x80000 + #endif diff --git a/include/efi_config.h b/include/efi_config.h new file mode 100644 index 00000000000..098cac21153 --- /dev/null +++ b/include/efi_config.h @@ -0,0 +1,98 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Menu-driven UEFI Variable maintenance + * + * Copyright (c) 2022 Masahisa Kojima, Linaro Limited + */ + +#ifndef _EFI_CONFIG_H +#define _EFI_CONFIG_H + +#include <efi_loader.h> + +#define EFICONFIG_ENTRY_NUM_MAX 99 +#define EFICONFIG_VOLUME_PATH_MAX 512 +#define EFICONFIG_FILE_PATH_MAX 512 +#define EFICONFIG_FILE_PATH_BUF_SIZE (EFICONFIG_FILE_PATH_MAX * sizeof(u16)) + +typedef efi_status_t (*eficonfig_entry_func)(void *data); + +/** + * struct eficonfig_entry - menu entry structure + * + * @num: menu entry index + * @title: title of entry + * @key: unique key + * @efi_menu: pointer to the menu structure + * @func: callback function to be called when this entry is selected + * @data: data to be passed to the callback function, caller must free() this pointer + * @list: list structure + */ +struct eficonfig_entry { + u32 num; + char *title; + char key[3]; + struct efimenu *efi_menu; + eficonfig_entry_func func; + void *data; + struct list_head list; +}; + +/** + * struct efimenu - efi menu structure + * + * @delay: delay for autoboot + * @active: active menu entry index + * @count: total count of menu entry + * @menu_header: menu header string + * @list: menu entry list structure + */ +struct efimenu { + int delay; + int active; + int count; + char *menu_header; + struct list_head list; +}; + +/** + * struct eficonfig_item - structure to construct eficonfig_entry + * + * @title: title of entry + * @func: callback function to be called when this entry is selected + * @data: data to be passed to the callback function + */ +struct eficonfig_item { + char *title; + eficonfig_entry_func func; + void *data; +}; + +/** + * struct eficonfig_select_file_info - structure to be used for file selection + * + * @current_volume: pointer to the efi_simple_file_system_protocol + * @dp_volume: pointer to device path of the selected device + * @current_path: pointer to the selected file path string + * @filepath_list: list_head structure for file path list + * @file_selectred: flag indicates file selecting status + */ +struct eficonfig_select_file_info { + struct efi_simple_file_system_protocol *current_volume; + struct efi_device_path *dp_volume; + u16 *current_path; + struct list_head filepath_list; + bool file_selected; +}; + +void eficonfig_print_msg(char *msg); +void eficonfig_destroy(struct efimenu *efi_menu); +efi_status_t eficonfig_process_quit(void *data); +efi_status_t eficonfig_process_common(struct efimenu *efi_menu, char *menu_header); +efi_status_t eficonfig_select_file_handler(void *data); +efi_status_t eficonfig_get_unused_bootoption(u16 *buf, + efi_uintn_t buf_size, u32 *index); +efi_status_t eficonfig_append_bootorder(u16 index); +efi_status_t eficonfig_generate_media_device_boot_option(void); + +#endif diff --git a/include/efi_loader.h b/include/efi_loader.h index 545ba06d946..7554f3b7dbc 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -142,6 +142,11 @@ static inline efi_status_t efi_launch_capsules(void) EFI_GUID(0x63293792, 0xadf5, 0x9325, \ 0xb9, 0x9f, 0x4e, 0x0e, 0x45, 0x5c, 0x1b, 0x1e) +/* GUID for the auto generated boot menu entry */ +#define EFICONFIG_AUTO_GENERATED_ENTRY_GUID \ + EFI_GUID(0x38c1acc1, 0x9fc0, 0x41f0, \ + 0xb9, 0x01, 0xfa, 0x74, 0xd6, 0xd6, 0xe4, 0xde) + /* Use internal device tree when starting UEFI application */ #define EFI_FDT_USE_INTERNAL NULL @@ -156,7 +161,7 @@ extern bool efi_st_keep_devices; /* EFI system partition */ extern struct efi_system_partition { - enum if_type if_type; + enum uclass_id if_type; int devnum; u8 part; } efi_system_partition; @@ -226,6 +231,9 @@ const char *__efi_nesting_dec(void); #define EFI_CACHELINE_SIZE 128 #endif +/* max bootmenu title size for volume selection */ +#define BOOTMENU_DEVICE_NAME_MAX 16 + /* Key identifying current memory map */ extern efi_uintn_t efi_memory_map_key; @@ -249,6 +257,9 @@ extern const struct efi_hii_string_protocol efi_hii_string; uint16_t *efi_dp_str(struct efi_device_path *dp); +/* GUID for the auto generated boot menu entry */ +extern const efi_guid_t efi_guid_bootmenu_auto_generated; + /* GUID of the U-Boot root node */ extern const efi_guid_t efi_u_boot_guid; #ifdef CONFIG_SANDBOX @@ -314,6 +325,8 @@ extern const efi_guid_t efi_guid_firmware_management_protocol; extern const efi_guid_t efi_esrt_guid; /* GUID of the SMBIOS table */ extern const efi_guid_t smbios_guid; +/*GUID of console */ +extern const efi_guid_t efi_guid_text_input_protocol; extern char __efi_runtime_start[], __efi_runtime_stop[]; extern char __efi_runtime_rel_start[], __efi_runtime_rel_stop[]; @@ -942,6 +955,22 @@ struct efi_signature_store { struct x509_certificate; struct pkcs7_message; +/** + * struct eficonfig_media_boot_option - boot option for (removable) media device + * + * This structure is used to enumerate possible boot option + * + * @lo: Serialized load option data + * @size: Size of serialized load option data + * @exist: Flag to indicate the load option already exists + * in Non-volatile load option + */ +struct eficonfig_media_boot_option { + void *lo; + efi_uintn_t size; + bool exist; +}; + bool efi_hash_regions(struct image_region *regs, int count, void **hash, const char *hash_algo, int *len); bool efi_signature_lookup_digest(struct efi_image_regions *regs, @@ -1073,4 +1102,28 @@ efi_status_t efi_esrt_populate(void); efi_status_t efi_load_capsule_drivers(void); efi_status_t platform_get_eventlog(struct udevice *dev, u64 *addr, u32 *sz); + +efi_status_t efi_locate_handle_buffer_int(enum efi_locate_search_type search_type, + const efi_guid_t *protocol, void *search_key, + efi_uintn_t *no_handles, efi_handle_t **buffer); + +efi_status_t efi_open_volume_int(struct efi_simple_file_system_protocol *this, + struct efi_file_handle **root); +efi_status_t efi_file_open_int(struct efi_file_handle *this, + struct efi_file_handle **new_handle, + u16 *file_name, u64 open_mode, + u64 attributes); +efi_status_t efi_file_close_int(struct efi_file_handle *file); +efi_status_t efi_file_read_int(struct efi_file_handle *this, + efi_uintn_t *buffer_size, void *buffer); +efi_status_t efi_file_setpos_int(struct efi_file_handle *file, u64 pos); + +typedef efi_status_t (*efi_console_filter_func)(struct efi_input_key *key); +efi_status_t efi_console_get_u16_string + (struct efi_simple_text_input_protocol *cin, + u16 *buf, efi_uintn_t count, efi_console_filter_func filer_func, + int row, int col); + +efi_status_t efi_disk_get_device_name(const efi_handle_t handle, char *buf, int size); + #endif /* _EFI_LOADER_H */ diff --git a/include/image.h b/include/image.h index d7d756c6453..03424f05219 100644 --- a/include/image.h +++ b/include/image.h @@ -360,6 +360,12 @@ typedef struct bootm_headers { #endif } bootm_headers_t; +#ifdef CONFIG_LMB +#define images_lmb(_images) (&(_images)->lmb) +#else +#define images_lmb(_images) NULL +#endif + extern bootm_headers_t images; /* diff --git a/include/init.h b/include/init.h index 7b8f62c1218..02bb4ce13e7 100644 --- a/include/init.h +++ b/include/init.h @@ -343,6 +343,19 @@ void bdinfo_print_num_ll(const char *name, unsigned long long value); /* Print a clock speed in MHz */ void bdinfo_print_mhz(const char *name, unsigned long hz); +/** + * bdinfo_print_size - print size variables in bdinfo format + * @name: string to print before the size + * @size: size to print + * + * Helper function for displaying size variables as properly formatted bdinfo + * entries. The size is printed as "xxx Bytes", "xxx KiB", "xxx MiB", + * "xxx GiB", etc. as needed; + * + * For use in arch_print_bdinfo(). + */ +void bdinfo_print_size(const char *name, uint64_t size); + /* Show arch-specific information for the 'bd' command */ void arch_print_bdinfo(void); diff --git a/include/linux/compat.h b/include/linux/compat.h index 3d0acbd582e..921e698f407 100644 --- a/include/linux/compat.h +++ b/include/linux/compat.h @@ -2,6 +2,7 @@ #define _LINUX_COMPAT_H_ #include <console.h> +#include <cyclic.h> #include <log.h> #include <malloc.h> @@ -230,7 +231,6 @@ typedef unsigned long blkcnt_t; #define try_to_freeze(...) 0 #define set_current_state(...) do { } while (0) #define kthread_should_stop(...) 0 -#define schedule() do { } while (0) #define setup_timer(timer, func, data) do {} while (0) #define del_timer_sync(timer) do {} while (0) diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index aa45558b3d4..fb002ae6411 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -29,9 +29,8 @@ struct nand_flash_dev; struct device_node; /* Get the flash and manufacturer id and lookup if the type is supported. */ -struct nand_flash_dev *nand_get_flash_type(struct nand_chip *chip, - int *maf_id, int *dev_id, - struct nand_flash_dev *type); +int nand_detect(struct nand_chip *chip, int *maf_id, int *dev_id, + struct nand_flash_dev *type); /* Scan and identify a NAND device */ int nand_scan(struct mtd_info *mtd, int max_chips); @@ -976,7 +975,7 @@ struct nand_chip { void *priv; struct { - const struct nand_manufacturers *desc; + const struct nand_manufacturer *desc; void *priv; } manufacturer; }; @@ -1124,19 +1123,19 @@ struct nand_flash_dev { }; /** - * struct nand_manufacturers - NAND Flash Manufacturer ID Structure + * struct nand_manufacturer - NAND Flash Manufacturer ID Structure * @name: Manufacturer name * @id: manufacturer ID code of device. * @ops: manufacturer operations */ -struct nand_manufacturers { +struct nand_manufacturer { int id; char *name; const struct nand_manufacturer_ops *ops; }; extern struct nand_flash_dev nand_flash_ids[]; -extern struct nand_manufacturers nand_manuf_ids[]; +extern struct nand_manufacturer nand_manuf_ids[]; extern const struct nand_manufacturer_ops toshiba_nand_manuf_ops; extern const struct nand_manufacturer_ops samsung_nand_manuf_ops; diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 2595bad9dfe..638d807ee55 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -11,6 +11,7 @@ #include <linux/bitops.h> #include <linux/mtd/cfi.h> #include <linux/mtd/mtd.h> +#include <spi-mem.h> /* * Manufacturer IDs @@ -522,6 +523,7 @@ struct spi_flash { * @quad_enable: [FLASH-SPECIFIC] enables SPI NOR quad mode * @octal_dtr_enable: [FLASH-SPECIFIC] enables SPI NOR octal DTR mode. * @ready: [FLASH-SPECIFIC] check if the flash is ready + * @dirmap: pointers to struct spi_mem_dirmap_desc for reads/writes. * @priv: the private data */ struct spi_nor { @@ -572,6 +574,11 @@ struct spi_nor { int (*octal_dtr_enable)(struct spi_nor *nor); int (*ready)(struct spi_nor *nor); + struct { + struct spi_mem_dirmap_desc *rdesc; + struct spi_mem_dirmap_desc *wdesc; + } dirmap; + void *priv; char mtd_name[MTD_NAME_SIZE(MTD_DEV_TYPE_NOR)]; /* Compatibility for spi_flash, remove once sf layer is merged with mtd */ @@ -596,6 +603,17 @@ device_node *spi_nor_get_flash_node(struct spi_nor *nor) #endif /* __UBOOT__ */ /** + * spi_nor_setup_op() - Set up common properties of a spi-mem op. + * @nor: pointer to a 'struct spi_nor' + * @op: pointer to the 'struct spi_mem_op' whose properties + * need to be initialized. + * @proto: the protocol from which the properties need to be set. + */ +void spi_nor_setup_op(const struct spi_nor *nor, + struct spi_mem_op *op, + const enum spi_nor_protocol proto); + +/** * spi_nor_scan() - scan the SPI NOR * @nor: the spi_nor structure * diff --git a/include/menu.h b/include/menu.h index e74616cae87..702aacb170c 100644 --- a/include/menu.h +++ b/include/menu.h @@ -48,6 +48,9 @@ enum bootmenu_key { KEY_DOWN, KEY_SELECT, KEY_QUIT, + KEY_PLUS, + KEY_MINUS, + KEY_SPACE, }; void bootmenu_autoboot_loop(struct bootmenu_data *menu, diff --git a/include/mmc.h b/include/mmc.h index f519d869725..027e8bcc73a 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -767,7 +767,7 @@ struct mmc *mmc_create(const struct mmc_config *cfg, void *priv); /** * mmc_bind() - Set up a new MMC device ready for probing * - * A child block device is bound with the IF_TYPE_MMC interface type. This + * A child block device is bound with the UCLASS_MMC interface type. This * allows the device to be used with CONFIG_BLK * * @dev: MMC device to set up diff --git a/include/spi-mem.h b/include/spi-mem.h index 32ffdc2e0f9..b07cf2ed83d 100644 --- a/include/spi-mem.h +++ b/include/spi-mem.h @@ -134,6 +134,48 @@ struct spi_mem_op { .dummy = __dummy, \ .data = __data, \ } +/** + * struct spi_mem_dirmap_info - Direct mapping information + * @op_tmpl: operation template that should be used by the direct mapping when + * the memory device is accessed + * @offset: absolute offset this direct mapping is pointing to + * @length: length in byte of this direct mapping + * + * This information is used by the controller specific implementation to know + * the portion of memory that is directly mapped and the spi_mem_op that should + * be used to access the device. + * A direct mapping is only valid for one direction (read or write) and this + * direction is directly encoded in the ->op_tmpl.data.dir field. + */ +struct spi_mem_dirmap_info { + struct spi_mem_op op_tmpl; + u64 offset; + u64 length; +}; + +/** + * struct spi_mem_dirmap_desc - Direct mapping descriptor + * @mem: the SPI memory device this direct mapping is attached to + * @info: information passed at direct mapping creation time + * @nodirmap: set to 1 if the SPI controller does not implement + * ->mem_ops->dirmap_create() or when this function returned an + * error. If @nodirmap is true, all spi_mem_dirmap_{read,write}() + * calls will use spi_mem_exec_op() to access the memory. This is a + * degraded mode that allows spi_mem drivers to use the same code + * no matter whether the controller supports direct mapping or not + * @priv: field pointing to controller specific data + * + * Common part of a direct mapping descriptor. This object is created by + * spi_mem_dirmap_create() and controller implementation of ->create_dirmap() + * can create/attach direct mapping resources to the descriptor in the ->priv + * field. + */ +struct spi_mem_dirmap_desc { + struct spi_slave *slave; + struct spi_mem_dirmap_info info; + unsigned int nodirmap; + void *priv; +}; #ifndef __UBOOT__ /** @@ -183,10 +225,32 @@ static inline void *spi_mem_get_drvdata(struct spi_mem *mem) * limitations) * @supports_op: check if an operation is supported by the controller * @exec_op: execute a SPI memory operation + * @dirmap_create: create a direct mapping descriptor that can later be used to + * access the memory device. This method is optional + * @dirmap_destroy: destroy a memory descriptor previous created by + * ->dirmap_create() + * @dirmap_read: read data from the memory device using the direct mapping + * created by ->dirmap_create(). The function can return less + * data than requested (for example when the request is crossing + * the currently mapped area), and the caller of + * spi_mem_dirmap_read() is responsible for calling it again in + * this case. + * @dirmap_write: write data to the memory device using the direct mapping + * created by ->dirmap_create(). The function can return less + * data than requested (for example when the request is crossing + * the currently mapped area), and the caller of + * spi_mem_dirmap_write() is responsible for calling it again in + * this case. * * This interface should be implemented by SPI controllers providing an * high-level interface to execute SPI memory operation, which is usually the * case for QSPI controllers. + * + * Note on ->dirmap_{read,write}(): drivers should avoid accessing the direct + * mapping from the CPU because doing that can stall the CPU waiting for the + * SPI mem transaction to finish, and this will make real-time maintainers + * unhappy and might make your system less reactive. Instead, drivers should + * use DMA to access this direct mapping. */ struct spi_controller_mem_ops { int (*adjust_op_size)(struct spi_slave *slave, struct spi_mem_op *op); @@ -194,6 +258,12 @@ struct spi_controller_mem_ops { const struct spi_mem_op *op); int (*exec_op)(struct spi_slave *slave, const struct spi_mem_op *op); + int (*dirmap_create)(struct spi_mem_dirmap_desc *desc); + void (*dirmap_destroy)(struct spi_mem_dirmap_desc *desc); + ssize_t (*dirmap_read)(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, void *buf); + ssize_t (*dirmap_write)(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, const void *buf); }; #ifndef __UBOOT__ @@ -260,6 +330,15 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op); bool spi_mem_default_supports_op(struct spi_slave *mem, const struct spi_mem_op *op); +struct spi_mem_dirmap_desc * +spi_mem_dirmap_create(struct spi_slave *mem, + const struct spi_mem_dirmap_info *info); +void spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc *desc); +ssize_t spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, void *buf); +ssize_t spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, const void *buf); + #ifndef __UBOOT__ int spi_mem_driver_register_with_owner(struct spi_mem_driver *drv, struct module *owner); diff --git a/include/tee/optee_service.h b/include/tee/optee_service.h new file mode 100644 index 00000000000..fca468af7c4 --- /dev/null +++ b/include/tee/optee_service.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* + * (C) Copyright 2022 Linaro Limited + */ + +#ifndef _OPTEE_SERVICE_H +#define _OPTEE_SERVICE_H + +/* + * struct optee_service - Discoverable OP-TEE service + * + * @driver_name - Name of the related driver + * @uuid - UUID of the OP-TEE service related to the driver + * + * Use macro OPTEE_SERVICE_DRIVER() to register a driver related to an + * OP-TEE service discovered when driver asks OP-TEE services enumaration. + */ +struct optee_service { + const char *driver_name; + const struct tee_optee_ta_uuid uuid; +}; + +#ifdef CONFIG_OPTEE_SERVICE_DISCOVERY +#define OPTEE_SERVICE_DRIVER(__name, __uuid, __drv_name) \ + ll_entry_declare(struct optee_service, __name, optee_service) = { \ + .uuid = __uuid, \ + .driver_name = __drv_name, \ + } +#else +#define OPTEE_SERVICE_DRIVER(__name, __uuid, __drv_name) \ + static int __name##__COUNTER__ __always_unused +#endif + +#endif /* _OPTEE_SERVICE_H */ diff --git a/include/test/test.h b/include/test/test.h index c888d68b1ed..2b68331b546 100644 --- a/include/test/test.h +++ b/include/test/test.h @@ -20,6 +20,7 @@ * @testdev: Test device * @force_fail_alloc: Force all memory allocs to fail * @skip_post_probe: Skip uclass post-probe processing + * @runs_per_test: Number of times to run each test (typically 1) * @expect_str: Temporary string used to hold expected string value * @actual_str: Temporary string used to hold actual string value */ @@ -32,6 +33,7 @@ struct unit_test_state { struct udevice *testdev; int force_fail_alloc; int skip_post_probe; + int runs_per_test; char expect_str[512]; char actual_str[512]; }; diff --git a/include/test/ut.h b/include/test/ut.h index 18740f5807c..f7d1d18f7c1 100644 --- a/include/test/ut.h +++ b/include/test/ut.h @@ -403,9 +403,10 @@ void test_set_state(struct unit_test_state *uts); * @count: Number of tests to run * @select_name: Name of a single test to run (from the list provided). If NULL * then all tests are run + * @runs_per_test: Number of times to run each test (typically 1) * Return: 0 if all tests passed, -1 if any failed */ int ut_run_list(const char *name, const char *prefix, struct unit_test *tests, - int count, const char *select_name); + int count, const char *select_name, int runs_per_test); #endif diff --git a/include/time.h b/include/time.h index 9deb2cf61cc..3b2ba091247 100644 --- a/include/time.h +++ b/include/time.h @@ -83,6 +83,25 @@ uint64_t usec_to_tick(unsigned long usec); (time_after_eq(a,b) && \ time_before(a,c)) +/* Same as above, but does so with platform independent 64bit types. + * These must be used when utilizing jiffies_64 (i.e. return value of + * get_jiffies_64() */ +#define time_after64(a,b) \ + (typecheck(__u64, a) && \ + typecheck(__u64, b) && \ + ((__s64)((b) - (a)) < 0)) +#define time_before64(a,b) time_after64(b,a) + +#define time_after_eq64(a,b) \ + (typecheck(__u64, a) && \ + typecheck(__u64, b) && \ + ((__s64)((a) - (b)) >= 0)) +#define time_before_eq64(a,b) time_after_eq64(b,a) + +#define time_in_range64(a, b, c) \ + (time_after_eq64(a, b) && \ + time_before_eq64(a, c)) + /** * usec2ticks() - Convert microseconds to internal ticks * diff --git a/include/wait_bit.h b/include/wait_bit.h index dcc5c4fd396..f1d70aef873 100644 --- a/include/wait_bit.h +++ b/include/wait_bit.h @@ -63,7 +63,7 @@ static inline int wait_for_bit_##sfx(const void *reg, \ } \ \ udelay(1); \ - WATCHDOG_RESET(); \ + schedule(); \ } \ \ debug("%s: Timeout (reg=%p mask=%x wait_set=%i)\n", __func__, \ diff --git a/include/watchdog.h b/include/watchdog.h index 813cc8f2a5d..ac5f11e376f 100644 --- a/include/watchdog.h +++ b/include/watchdog.h @@ -10,7 +10,8 @@ #ifndef _WATCHDOG_H_ #define _WATCHDOG_H_ -#if !defined(__ASSEMBLY__) +#include <cyclic.h> + /* * Reset the watchdog timer, always returns 0 * @@ -18,7 +19,6 @@ * and the legacy arch/<arch>/board.c code. */ int init_func_watchdog_reset(void); -#endif #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) #define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init, @@ -33,61 +33,14 @@ int init_func_watchdog_reset(void); #endif /* - * Hardware watchdog - */ -#ifdef CONFIG_HW_WATCHDOG - #if defined(__ASSEMBLY__) - #define WATCHDOG_RESET bl hw_watchdog_reset - #else - extern void hw_watchdog_reset(void); - - #define WATCHDOG_RESET hw_watchdog_reset - #endif /* __ASSEMBLY__ */ -#else - /* - * Maybe a software watchdog? - */ - #if defined(CONFIG_WATCHDOG) - #if defined(__ASSEMBLY__) - /* Don't require the watchdog to be enabled in SPL */ - #if defined(CONFIG_SPL_BUILD) && \ - !defined(CONFIG_SPL_WATCHDOG) - #define WATCHDOG_RESET /*XXX DO_NOT_DEL_THIS_COMMENT*/ - #else - #define WATCHDOG_RESET bl watchdog_reset - #endif - #else - /* Don't require the watchdog to be enabled in SPL */ - #if defined(CONFIG_SPL_BUILD) && \ - !defined(CONFIG_SPL_WATCHDOG) - #define WATCHDOG_RESET() {} - #else - extern void watchdog_reset(void); - - #define WATCHDOG_RESET watchdog_reset - #endif - #endif - #else - /* - * No hardware or software watchdog. - */ - #if defined(__ASSEMBLY__) - #define WATCHDOG_RESET /*XXX DO_NOT_DEL_THIS_COMMENT*/ - #else - #define WATCHDOG_RESET() {} - #endif /* __ASSEMBLY__ */ - #endif /* CONFIG_WATCHDOG && !__ASSEMBLY__ */ -#endif /* CONFIG_HW_WATCHDOG */ - -/* * Prototypes from $(CPU)/cpu.c. */ -#if (defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)) && !defined(__ASSEMBLY__) +#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) void hw_watchdog_init(void); #endif -#if defined(CONFIG_MPC85xx) && !defined(__ASSEMBLY__) +#if defined(CONFIG_MPC85xx) void init_85xx_watchdog(void); #endif #endif /* _WATCHDOG_H_ */ diff --git a/lib/bzip2/bzlib.c b/lib/bzip2/bzlib.c index 377b269b06d..bd589aa810c 100644 --- a/lib/bzip2/bzlib.c +++ b/lib/bzip2/bzlib.c @@ -844,7 +844,7 @@ int BZ_API(BZ2_bzDecompress) ( bz_stream *strm ) while (True) { #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) - WATCHDOG_RESET(); + schedule(); #endif if (s->state == BZ_X_IDLE) return BZ_SEQUENCE_ERROR; if (s->state == BZ_X_OUTPUT) { diff --git a/lib/bzip2/bzlib_decompress.c b/lib/bzip2/bzlib_decompress.c index 4412b8a23ea..3b417d57b27 100644 --- a/lib/bzip2/bzlib_decompress.c +++ b/lib/bzip2/bzlib_decompress.c @@ -418,7 +418,7 @@ Int32 BZ2_decompress ( DState* s ) while (True) { #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) - WATCHDOG_RESET(); + schedule(); #endif if (nextSym == EOB) break; @@ -503,7 +503,7 @@ Int32 BZ2_decompress ( DState* s ) kk = MTFA_SIZE-1; for (ii = 256 / MTFL_SIZE-1; ii >= 0; ii--) { #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) - WATCHDOG_RESET(); + schedule(); #endif for (jj = MTFL_SIZE-1; jj >= 0; jj--) { s->mtfa[kk] = s->mtfa[s->mtfbase[ii] + jj]; @@ -568,7 +568,7 @@ Int32 BZ2_decompress ( DState* s ) while (i != s->origPtr); #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) - WATCHDOG_RESET(); + schedule(); #endif s->tPos = s->origPtr; s->nblock_used = 0; @@ -583,7 +583,7 @@ Int32 BZ2_decompress ( DState* s ) } else { #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) - WATCHDOG_RESET(); + schedule(); #endif /*-- compute the T^(-1) vector --*/ for (i = 0; i < nblock; i++) { diff --git a/lib/crc32.c b/lib/crc32.c index 5a3127e03ad..aa94d70ef3e 100644 --- a/lib/crc32.c +++ b/lib/crc32.c @@ -255,7 +255,7 @@ uint32_t crc32_wd(uint32_t crc, const unsigned char *buf, uInt len, chunk = chunk_sz; crc = crc32(crc, curr, chunk); curr += chunk; - WATCHDOG_RESET (); + schedule(); } #else crc = crc32(crc, buf, len); diff --git a/lib/efi_driver/efi_block_device.c b/lib/efi_driver/efi_block_device.c index d57d281f850..3177ab67b81 100644 --- a/lib/efi_driver/efi_block_device.c +++ b/lib/efi_driver/efi_block_device.c @@ -128,7 +128,7 @@ static int efi_bl_bind(efi_handle_t handle, void *interface) if (!obj) return -ENOENT; - devnum = blk_find_max_devnum(IF_TYPE_EFI_LOADER); + devnum = blk_find_max_devnum(UCLASS_EFI_LOADER); if (devnum == -ENODEV) devnum = 0; else if (devnum < 0) @@ -140,7 +140,7 @@ static int efi_bl_bind(efi_handle_t handle, void *interface) sprintf(name, "efiblk#%d", devnum); /* Create driver model udevice for the EFI block io device */ - ret = blk_create_device(parent, "efi_blk", name, IF_TYPE_EFI_LOADER, + ret = blk_create_device(parent, "efi_blk", name, UCLASS_EFI_LOADER, devnum, io->media->block_size, (lbaint_t)io->media->last_block, &bdev); if (ret) diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index b8fb2701a74..41756ea5396 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -20,7 +20,6 @@ config EFI_LOADER select EVENT_DYNAMIC select LIB_UUID imply PARTITION_UUIDS - select HAVE_BLOCK_DEVICE select REGEX imply FAT imply FAT_WRITE diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c index 234073ecb7e..4b24b410472 100644 --- a/lib/efi_loader/efi_bootmgr.c +++ b/lib/efi_loader/efi_bootmgr.c @@ -19,6 +19,9 @@ static const struct efi_boot_services *bs; static const struct efi_runtime_services *rs; +const efi_guid_t efi_guid_bootmenu_auto_generated = + EFICONFIG_AUTO_GENERATED_ENTRY_GUID; + /* * bootmgr implements the logic of trying to find a payload to boot * based on the BootOrder + BootXXXX variables, and then loading it. @@ -243,6 +246,10 @@ static efi_status_t try_load_entry(u16 n, efi_handle_t *handle, } /* Set load options */ + if (size >= sizeof(efi_guid_t) && + !guidcmp(lo.optional_data, &efi_guid_bootmenu_auto_generated)) + size = 0; + if (size) { *load_options = malloc(size); if (!*load_options) { diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c index 6f7333638ae..1bfd094e89f 100644 --- a/lib/efi_loader/efi_boottime.c +++ b/lib/efi_loader/efi_boottime.c @@ -833,7 +833,7 @@ void efi_timer_check(void) efi_signal_event(evt); } efi_process_event_queue(); - WATCHDOG_RESET(); + schedule(); } /** @@ -2198,7 +2198,7 @@ static efi_status_t EFIAPI efi_exit_boot_services(efi_handle_t image_handle, /* Give the payload some time to boot */ efi_set_watchdog(0); - WATCHDOG_RESET(); + schedule(); out: if (IS_ENABLED(CONFIG_EFI_TCG2_PROTOCOL)) { if (ret != EFI_SUCCESS) @@ -2458,6 +2458,35 @@ static efi_status_t EFIAPI efi_protocols_per_handle( return EFI_EXIT(EFI_SUCCESS); } +efi_status_t efi_locate_handle_buffer_int(enum efi_locate_search_type search_type, + const efi_guid_t *protocol, void *search_key, + efi_uintn_t *no_handles, efi_handle_t **buffer) +{ + efi_status_t r; + efi_uintn_t buffer_size = 0; + + if (!no_handles || !buffer) { + r = EFI_INVALID_PARAMETER; + goto out; + } + *no_handles = 0; + *buffer = NULL; + r = efi_locate_handle(search_type, protocol, search_key, &buffer_size, + *buffer); + if (r != EFI_BUFFER_TOO_SMALL) + goto out; + r = efi_allocate_pool(EFI_BOOT_SERVICES_DATA, buffer_size, + (void **)buffer); + if (r != EFI_SUCCESS) + goto out; + r = efi_locate_handle(search_type, protocol, search_key, &buffer_size, + *buffer); + if (r == EFI_SUCCESS) + *no_handles = buffer_size / sizeof(efi_handle_t); +out: + return r; +} + /** * efi_locate_handle_buffer() - locate handles implementing a protocol * @search_type: selection criterion @@ -2479,30 +2508,13 @@ efi_status_t EFIAPI efi_locate_handle_buffer( efi_uintn_t *no_handles, efi_handle_t **buffer) { efi_status_t r; - efi_uintn_t buffer_size = 0; EFI_ENTRY("%d, %pUs, %p, %p, %p", search_type, protocol, search_key, no_handles, buffer); - if (!no_handles || !buffer) { - r = EFI_INVALID_PARAMETER; - goto out; - } - *no_handles = 0; - *buffer = NULL; - r = efi_locate_handle(search_type, protocol, search_key, &buffer_size, - *buffer); - if (r != EFI_BUFFER_TOO_SMALL) - goto out; - r = efi_allocate_pool(EFI_BOOT_SERVICES_DATA, buffer_size, - (void **)buffer); - if (r != EFI_SUCCESS) - goto out; - r = efi_locate_handle(search_type, protocol, search_key, &buffer_size, - *buffer); - if (r == EFI_SUCCESS) - *no_handles = buffer_size / sizeof(efi_handle_t); -out: + r = efi_locate_handle_buffer_int(search_type, protocol, search_key, + no_handles, buffer); + return EFI_EXIT(r); } diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c index ee9dc6bbd82..cf9fbd9cb54 100644 --- a/lib/efi_loader/efi_console.c +++ b/lib/efi_loader/efi_console.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY LOGC_EFI +#include <ansi.h> #include <common.h> #include <charset.h> #include <malloc.h> @@ -1323,3 +1324,72 @@ out_of_memory: printf("ERROR: Out of memory\n"); return r; } + +/** + * efi_console_get_u16_string() - get user input string + * + * @cin: protocol interface to EFI_SIMPLE_TEXT_INPUT_PROTOCOL + * @buf: buffer to store user input string in UTF16 + * @count: number of u16 string including NULL terminator that buf has + * @filter_func: callback to filter user input + * @row: row number to locate user input form + * @col: column number to locate user input form + * Return: status code + */ +efi_status_t efi_console_get_u16_string(struct efi_simple_text_input_protocol *cin, + u16 *buf, efi_uintn_t count, + efi_console_filter_func filter_func, + int row, int col) +{ + efi_status_t ret; + efi_uintn_t len = 0; + struct efi_input_key key; + + printf(ANSI_CURSOR_POSITION + ANSI_CLEAR_LINE_TO_END + ANSI_CURSOR_SHOW, row, col); + + ret = EFI_CALL(cin->reset(cin, false)); + if (ret != EFI_SUCCESS) + return ret; + + for (;;) { + do { + ret = EFI_CALL(cin->read_key_stroke(cin, &key)); + mdelay(10); + } while (ret == EFI_NOT_READY); + + if (key.unicode_char == u'\b') { + if (len > 0) + buf[--len] = u'\0'; + + printf(ANSI_CURSOR_POSITION + "%ls" + ANSI_CLEAR_LINE_TO_END, row, col, buf); + continue; + } else if (key.unicode_char == u'\r') { + buf[len] = u'\0'; + return EFI_SUCCESS; + } else if (key.unicode_char == 0x3 || key.scan_code == 23) { + return EFI_ABORTED; + } else if (key.unicode_char < 0x20) { + /* ignore control codes other than Ctrl+C, '\r' and '\b' */ + continue; + } else if (key.scan_code != 0) { + /* only accept single ESC press for cancel */ + continue; + } + + if (filter_func) { + if (filter_func(&key) != EFI_SUCCESS) + continue; + } + + if (len >= (count - 1)) + continue; + + buf[len] = key.unicode_char; + len++; + printf(ANSI_CURSOR_POSITION "%ls", row, col, buf); + } +} diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c index 5feeb52ccb4..e39968a3f37 100644 --- a/lib/efi_loader/efi_disk.c +++ b/lib/efi_loader/efi_disk.c @@ -640,7 +640,7 @@ static int efi_disk_probe(void *ctx, struct event *event) * has already created an efi_disk at this moment. */ desc = dev_get_uclass_plat(dev); - if (desc->if_type != IF_TYPE_EFI_LOADER) { + if (desc->if_type != UCLASS_EFI_LOADER) { ret = efi_disk_create_raw(dev); if (ret) return -1; @@ -675,7 +675,7 @@ static int efi_disk_delete_raw(struct udevice *dev) return -1; desc = dev_get_uclass_plat(dev); - if (desc->if_type != IF_TYPE_EFI_LOADER) { + if (desc->if_type != UCLASS_EFI_LOADER) { diskobj = container_of(handle, struct efi_disk_obj, header); efi_free_pool(diskobj->dp); } @@ -762,6 +762,56 @@ efi_status_t efi_disk_init(void) } /** + * efi_disk_get_device_name() - get U-Boot device name associated with EFI handle + * + * @handle: pointer to the EFI handle + * @buf: pointer to the buffer to store the string + * @size: size of buffer + * Return: status code + */ +efi_status_t efi_disk_get_device_name(const efi_handle_t handle, char *buf, int size) +{ + int count; + int diskid; + enum uclass_id id; + unsigned int part; + struct udevice *dev; + struct blk_desc *desc; + const char *if_typename; + bool is_partition = false; + struct disk_part *part_data; + + if (!handle || !buf || !size) + return EFI_INVALID_PARAMETER; + + dev = handle->dev; + id = device_get_uclass_id(dev); + if (id == UCLASS_BLK) { + desc = dev_get_uclass_plat(dev); + } else if (id == UCLASS_PARTITION) { + desc = dev_get_uclass_plat(dev_get_parent(dev)); + is_partition = true; + } else { + return EFI_INVALID_PARAMETER; + } + if_typename = blk_get_if_type_name(desc->if_type); + diskid = desc->devnum; + + if (is_partition) { + part_data = dev_get_uclass_plat(dev); + part = part_data->partnum; + count = snprintf(buf, size, "%s %d:%d", if_typename, diskid, part); + } else { + count = snprintf(buf, size, "%s %d", if_typename, diskid); + } + + if (count < 0 || (count + 1) > size) + return EFI_INVALID_PARAMETER; + + return EFI_SUCCESS; +} + +/** * efi_disks_register() - ensure all block devices are available in UEFI * * The function probes all block devices. As we store UEFI variables on the diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c index 7a7077e6d03..c96a7f7ca37 100644 --- a/lib/efi_loader/efi_file.c +++ b/lib/efi_loader/efi_file.c @@ -246,10 +246,10 @@ error: return NULL; } -static efi_status_t efi_file_open_int(struct efi_file_handle *this, - struct efi_file_handle **new_handle, - u16 *file_name, u64 open_mode, - u64 attributes) +efi_status_t efi_file_open_int(struct efi_file_handle *this, + struct efi_file_handle **new_handle, + u16 *file_name, u64 open_mode, + u64 attributes) { struct file_handle *fh = to_fh(this); efi_status_t ret; @@ -369,11 +369,17 @@ static efi_status_t file_close(struct file_handle *fh) return EFI_SUCCESS; } -static efi_status_t EFIAPI efi_file_close(struct efi_file_handle *file) +efi_status_t efi_file_close_int(struct efi_file_handle *file) { struct file_handle *fh = to_fh(file); + + return file_close(fh); +} + +static efi_status_t EFIAPI efi_file_close(struct efi_file_handle *file) +{ EFI_ENTRY("%p", file); - return EFI_EXIT(file_close(fh)); + return EFI_EXIT(efi_file_close_int(file)); } static efi_status_t EFIAPI efi_file_delete(struct efi_file_handle *file) @@ -562,8 +568,8 @@ static efi_status_t dir_read(struct file_handle *fh, u64 *buffer_size, return EFI_SUCCESS; } -static efi_status_t efi_file_read_int(struct efi_file_handle *this, - efi_uintn_t *buffer_size, void *buffer) +efi_status_t efi_file_read_int(struct efi_file_handle *this, + efi_uintn_t *buffer_size, void *buffer) { struct file_handle *fh = to_fh(this); efi_status_t ret = EFI_SUCCESS; @@ -773,24 +779,11 @@ out: return EFI_EXIT(ret); } -/** - * efi_file_setpos() - set current position in file - * - * This function implements the SetPosition service of the EFI file protocol. - * See the UEFI spec for details. - * - * @file: file handle - * @pos: new file position - * Return: status code - */ -static efi_status_t EFIAPI efi_file_setpos(struct efi_file_handle *file, - u64 pos) +efi_status_t efi_file_setpos_int(struct efi_file_handle *file, u64 pos) { struct file_handle *fh = to_fh(file); efi_status_t ret = EFI_SUCCESS; - EFI_ENTRY("%p, %llu", file, pos); - if (fh->isdir) { if (pos != 0) { ret = EFI_UNSUPPORTED; @@ -812,6 +805,28 @@ static efi_status_t EFIAPI efi_file_setpos(struct efi_file_handle *file, fh->offset = pos; error: + return ret; +} + +/** + * efi_file_setpos() - set current position in file + * + * This function implements the SetPosition service of the EFI file protocol. + * See the UEFI spec for details. + * + * @file: file handle + * @pos: new file position + * Return: status code + */ +static efi_status_t EFIAPI efi_file_setpos(struct efi_file_handle *file, + u64 pos) +{ + efi_status_t ret = EFI_SUCCESS; + + EFI_ENTRY("%p, %llu", file, pos); + + ret = efi_file_setpos_int(file, pos); + return EFI_EXIT(ret); } @@ -1138,17 +1153,23 @@ struct efi_file_handle *efi_file_from_path(struct efi_device_path *fp) return f; } +efi_status_t efi_open_volume_int(struct efi_simple_file_system_protocol *this, + struct efi_file_handle **root) +{ + struct file_system *fs = to_fs(this); + + *root = file_open(fs, NULL, NULL, 0, 0); + + return EFI_SUCCESS; +} + static efi_status_t EFIAPI efi_open_volume(struct efi_simple_file_system_protocol *this, struct efi_file_handle **root) { - struct file_system *fs = to_fs(this); - EFI_ENTRY("%p, %p", this, root); - *root = file_open(fs, NULL, NULL, 0, 0); - - return EFI_EXIT(EFI_SUCCESS); + return EFI_EXIT(efi_open_volume_int(this, root)); } struct efi_simple_file_system_protocol * diff --git a/lib/efi_loader/efi_var_file.c b/lib/efi_loader/efi_var_file.c index 76a2ff9e412..994e66392fb 100644 --- a/lib/efi_loader/efi_var_file.c +++ b/lib/efi_loader/efi_var_file.c @@ -38,7 +38,7 @@ static efi_status_t __maybe_unused efi_set_blk_dev_to_system_partition(void) char part_str[PART_STR_LEN]; int r; - if (!efi_system_partition.if_type) { + if (efi_system_partition.if_type == UCLASS_INVALID) { log_err("No EFI system partition\n"); return EFI_DEVICE_ERROR; } diff --git a/lib/gunzip.c b/lib/gunzip.c index a8e498d98d8..932e3e8036d 100644 --- a/lib/gunzip.c +++ b/lib/gunzip.c @@ -251,7 +251,7 @@ int gzwrite(unsigned char *src, int len, puts("abort\n"); goto out; } - WATCHDOG_RESET(); + schedule(); } while (s.avail_out == 0); /* done when inflate() says it's done */ } while (r != Z_STREAM_END); diff --git a/lib/lzma/LzmaDec.c b/lib/lzma/LzmaDec.c index 4f45f80fe26..341149f766b 100644 --- a/lib/lzma/LzmaDec.c +++ b/lib/lzma/LzmaDec.c @@ -153,7 +153,7 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte UInt32 range = p->range; UInt32 code = p->code; - WATCHDOG_RESET(); + schedule(); do { @@ -177,7 +177,7 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte state -= (state < 4) ? state : 3; symbol = 1; - WATCHDOG_RESET(); + schedule(); do { GET_BIT(prob + symbol, symbol) } while (symbol < 0x100); } @@ -188,7 +188,7 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte state -= (state < 10) ? 3 : 6; symbol = 1; - WATCHDOG_RESET(); + schedule(); do { @@ -321,7 +321,7 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte UInt32 mask = 1; unsigned i = 1; - WATCHDOG_RESET(); + schedule(); do { @@ -335,7 +335,7 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte { numDirectBits -= kNumAlignBits; - WATCHDOG_RESET(); + schedule(); do { @@ -409,7 +409,7 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte const Byte *lim = dest + curLen; dicPos += curLen; - WATCHDOG_RESET(); + schedule(); do *(dest) = (Byte)*(dest + src); @@ -418,7 +418,7 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte else { - WATCHDOG_RESET(); + schedule(); do { @@ -433,7 +433,7 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte } while (dicPos < limit && buf < bufLimit); - WATCHDOG_RESET(); + schedule(); NORMALIZE; p->buf = buf; diff --git a/lib/lzma/LzmaTools.c b/lib/lzma/LzmaTools.c index af88900d315..55f64cd2890 100644 --- a/lib/lzma/LzmaTools.c +++ b/lib/lzma/LzmaTools.c @@ -104,7 +104,7 @@ int lzmaBuffToBuffDecompress(unsigned char *outStream, SizeT *uncompressedSize, /* Decompress */ outProcessed = min(outSizeFull, *uncompressedSize); - WATCHDOG_RESET(); + schedule(); res = LzmaDecode( outStream, &outProcessed, diff --git a/lib/md5.c b/lib/md5.c index 9d34465564e..1636ab93661 100644 --- a/lib/md5.c +++ b/lib/md5.c @@ -304,7 +304,7 @@ md5_wd(const unsigned char *input, unsigned int len, unsigned char output[16], chunk = chunk_sz; MD5Update(&context, curr, chunk); curr += chunk; - WATCHDOG_RESET (); + schedule(); } #else MD5Update(&context, input, len); diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c index 1d95cfbdee0..9605c376390 100644 --- a/lib/rsa/rsa-verify.c +++ b/lib/rsa/rsa-verify.c @@ -215,6 +215,8 @@ out: * @msg_len: Message length * @hash: Pointer to the expected hash * @hash_len: Length of the hash + * + * Return: 0 if padding is correct, non-zero otherwise */ int padding_pss_verify(struct image_sign_info *info, const uint8_t *msg, int msg_len, @@ -234,6 +236,9 @@ int padding_pss_verify(struct image_sign_info *info, uint8_t leftmost_mask; struct checksum_algo *checksum = info->checksum; + if (db_len <= 0) + return -EINVAL; + /* first, allocate everything */ db_mask = malloc(db_len); db = malloc(db_len); diff --git a/lib/sha1.c b/lib/sha1.c index e5e42bc9fe3..8d074078934 100644 --- a/lib/sha1.c +++ b/lib/sha1.c @@ -344,7 +344,7 @@ void sha1_csum_wd(const unsigned char *input, unsigned int ilen, chunk = chunk_sz; sha1_update (&ctx, curr, chunk); curr += chunk; - WATCHDOG_RESET (); + schedule(); } #else sha1_update (&ctx, input, ilen); diff --git a/lib/sha256.c b/lib/sha256.c index 50b0b511834..4d26aea1c8c 100644 --- a/lib/sha256.c +++ b/lib/sha256.c @@ -293,7 +293,7 @@ void sha256_csum_wd(const unsigned char *input, unsigned int ilen, chunk = chunk_sz; sha256_update(&ctx, curr, chunk); curr += chunk; - WATCHDOG_RESET(); + schedule(); } #else sha256_update(&ctx, input, ilen); diff --git a/lib/sha512.c b/lib/sha512.c index a421f249ba2..fbe8d5f5bfe 100644 --- a/lib/sha512.c +++ b/lib/sha512.c @@ -309,7 +309,7 @@ void sha384_csum_wd(const unsigned char *input, unsigned int ilen, chunk = chunk_sz; sha384_update(&ctx, curr, chunk); curr += chunk; - WATCHDOG_RESET(); + schedule(); } #else sha384_update(&ctx, input, ilen); @@ -372,7 +372,7 @@ void sha512_csum_wd(const unsigned char *input, unsigned int ilen, chunk = chunk_sz; sha512_update(&ctx, curr, chunk); curr += chunk; - WATCHDOG_RESET(); + schedule(); } #else sha512_update(&ctx, input, ilen); diff --git a/lib/time.c b/lib/time.c index bbf191f6732..f3aaf472d10 100644 --- a/lib/time.c +++ b/lib/time.c @@ -198,7 +198,7 @@ void udelay(unsigned long usec) ulong kv; do { - WATCHDOG_RESET(); + schedule(); kv = usec > CONFIG_WD_PERIOD ? CONFIG_WD_PERIOD : usec; __udelay(kv); usec -= kv; diff --git a/lib/zlib/inflate.c b/lib/zlib/inflate.c index 6411c479325..30dfe155995 100644 --- a/lib/zlib/inflate.c +++ b/lib/zlib/inflate.c @@ -25,7 +25,7 @@ int ZEXPORT inflateReset(z_streamp strm) state->hold = 0; state->bits = 0; state->lencode = state->distcode = state->next = state->codes; - WATCHDOG_RESET(); + schedule(); Tracev((stderr, "inflate: reset\n")); return Z_OK; } @@ -543,7 +543,7 @@ int ZEXPORT inflate(z_streamp strm, int flush) strm->adler = state->check = adler32(0L, Z_NULL, 0); state->mode = TYPE; case TYPE: - WATCHDOG_RESET(); + schedule(); if (flush == Z_BLOCK) goto inf_leave; case TYPEDO: if (state->last) { @@ -721,7 +721,7 @@ int ZEXPORT inflate(z_streamp strm, int flush) Tracev((stderr, "inflate: codes ok\n")); state->mode = LEN; case LEN: - WATCHDOG_RESET(); + schedule(); if (have >= 6 && left >= 258) { RESTORE(); inflate_fast(strm, out); @@ -933,7 +933,7 @@ int ZEXPORT inflateEnd(z_streamp strm) return Z_STREAM_ERROR; state = (struct inflate_state FAR *)strm->state; if (state->window != Z_NULL) { - WATCHDOG_RESET(); + schedule(); ZFREE(strm, state->window); } ZFREE(strm, strm->state); diff --git a/net/net.c b/net/net.c index 81905f63159..f9d11c08d2e 100644 --- a/net/net.c +++ b/net/net.c @@ -559,7 +559,7 @@ restart: * someone sets `net_state' to a state that terminates. */ for (;;) { - WATCHDOG_RESET(); + schedule(); if (arp_timeout_check() > 0) time_start = get_timer(0); diff --git a/post/cpu/mpc83xx/ecc.c b/post/cpu/mpc83xx/ecc.c index f88eff8998f..edd74115672 100644 --- a/post/cpu/mpc83xx/ecc.c +++ b/post/cpu/mpc83xx/ecc.c @@ -73,7 +73,7 @@ int ecc_post_test(int flags) for (addr = (u64*)CONFIG_SYS_POST_ECC_START_ADDR, errbit=0; addr < (u64*)CONFIG_SYS_POST_ECC_STOP_ADDR; addr++, errbit++ ) { - WATCHDOG_RESET(); + schedule(); ecc_clear(ddr); diff --git a/post/drivers/memory.c b/post/drivers/memory.c index 281989da6fa..d249942af06 100644 --- a/post/drivers/memory.c +++ b/post/drivers/memory.c @@ -228,9 +228,8 @@ static int memory_post_dataline(unsigned long long * pmem) hi = (temp64>>32) & 0xffffffff; lo = temp64 & 0xffffffff; - post_log("Memory (data line) error at %08x, " - "wrote %08x%08x, read %08x%08x !\n", - pmem, pathi, patlo, hi, lo); + post_log("Memory (data line) error at %p, wrote %08x%08x, read %08x%08x !\n", + pmem, pathi, patlo, hi, lo); ret = -1; } } @@ -259,9 +258,8 @@ static int memory_post_addrline(ulong *testaddr, ulong *base, ulong size) } #endif if(readback == *testaddr) { - post_log("Memory (address line) error at %08x<->%08x, " - "XOR value %08x !\n", - testaddr, target, xor); + post_log("Memory (address line) error at %p<->%p, XOR value %08lx !\n", + testaddr, target, xor); ret = -1; } } @@ -281,21 +279,20 @@ static int memory_post_test1(unsigned long start, for (i = 0; i < size / sizeof (ulong); i++) { mem[i] = val; if (i % 1024 == 0) - WATCHDOG_RESET(); + schedule(); } for (i = 0; i < size / sizeof (ulong) && !ret; i++) { readback = mem[i]; if (readback != val) { - post_log("Memory error at %08x, " - "wrote %08x, read %08x !\n", - mem + i, val, readback); + post_log("Memory error at %p, wrote %08lx, read %08lx !\n", + mem + i, val, readback); ret = -1; break; } if (i % 1024 == 0) - WATCHDOG_RESET(); + schedule(); } return ret; @@ -311,21 +308,20 @@ static int memory_post_test2(unsigned long start, unsigned long size) for (i = 0; i < size / sizeof (ulong); i++) { mem[i] = 1 << (i % 32); if (i % 1024 == 0) - WATCHDOG_RESET(); + schedule(); } for (i = 0; i < size / sizeof (ulong) && !ret; i++) { readback = mem[i]; if (readback != (1 << (i % 32))) { - post_log("Memory error at %08x, " - "wrote %08x, read %08x !\n", - mem + i, 1 << (i % 32), readback); + post_log("Memory error at %p, wrote %08lx, read %08lx !\n", + mem + i, 1UL << (i % 32), readback); ret = -1; break; } if (i % 1024 == 0) - WATCHDOG_RESET(); + schedule(); } return ret; @@ -341,21 +337,20 @@ static int memory_post_test3(unsigned long start, unsigned long size) for (i = 0; i < size / sizeof (ulong); i++) { mem[i] = i; if (i % 1024 == 0) - WATCHDOG_RESET(); + schedule(); } for (i = 0; i < size / sizeof (ulong) && !ret; i++) { readback = mem[i]; if (readback != i) { - post_log("Memory error at %08x, " - "wrote %08x, read %08x !\n", - mem + i, i, readback); + post_log("Memory error at %p, wrote %08lx, read %08lx !\n", + mem + i, i, readback); ret = -1; break; } if (i % 1024 == 0) - WATCHDOG_RESET(); + schedule(); } return ret; @@ -371,21 +366,20 @@ static int memory_post_test4(unsigned long start, unsigned long size) for (i = 0; i < size / sizeof (ulong); i++) { mem[i] = ~i; if (i % 1024 == 0) - WATCHDOG_RESET(); + schedule(); } for (i = 0; i < size / sizeof (ulong) && !ret; i++) { readback = mem[i]; if (readback != ~i) { - post_log("Memory error at %08x, " - "wrote %08x, read %08x !\n", - mem + i, ~i, readback); + post_log("Memory error at %p, wrote %08lx, read %08lx !\n", + mem + i, ~i, readback); ret = -1; break; } if (i % 1024 == 0) - WATCHDOG_RESET(); + schedule(); } return ret; @@ -396,15 +390,15 @@ static int memory_post_test_lines(unsigned long start, unsigned long size) int ret = 0; ret = memory_post_dataline((unsigned long long *)start); - WATCHDOG_RESET(); + schedule(); if (!ret) ret = memory_post_addrline((ulong *)start, (ulong *)start, size); - WATCHDOG_RESET(); + schedule(); if (!ret) ret = memory_post_addrline((ulong *)(start+size-8), (ulong *)start, size); - WATCHDOG_RESET(); + schedule(); return ret; } @@ -414,25 +408,25 @@ static int memory_post_test_patterns(unsigned long start, unsigned long size) int ret = 0; ret = memory_post_test1(start, size, 0x00000000); - WATCHDOG_RESET(); + schedule(); if (!ret) ret = memory_post_test1(start, size, 0xffffffff); - WATCHDOG_RESET(); + schedule(); if (!ret) ret = memory_post_test1(start, size, 0x55555555); - WATCHDOG_RESET(); + schedule(); if (!ret) ret = memory_post_test1(start, size, 0xaaaaaaaa); - WATCHDOG_RESET(); + schedule(); if (!ret) ret = memory_post_test2(start, size); - WATCHDOG_RESET(); + schedule(); if (!ret) ret = memory_post_test3(start, size); - WATCHDOG_RESET(); + schedule(); if (!ret) ret = memory_post_test4(start, size); - WATCHDOG_RESET(); + schedule(); return ret; } diff --git a/post/lib_powerpc/cpu.c b/post/lib_powerpc/cpu.c index 8506fd6b715..1d471073429 100644 --- a/post/lib_powerpc/cpu.c +++ b/post/lib_powerpc/cpu.c @@ -61,7 +61,7 @@ int cpu_post_test (int flags) int ic = icache_status(); int ret = 0; - WATCHDOG_RESET(); + schedule(); if (ic) icache_disable(); @@ -73,7 +73,7 @@ int cpu_post_test (int flags) ret = cpu_post_test_two (); if (ret == 0) ret = cpu_post_test_twox (); - WATCHDOG_RESET(); + schedule(); if (ret == 0) ret = cpu_post_test_three (); if (ret == 0) @@ -82,7 +82,7 @@ int cpu_post_test (int flags) ret = cpu_post_test_threei (); if (ret == 0) ret = cpu_post_test_andi (); - WATCHDOG_RESET(); + schedule(); if (ret == 0) ret = cpu_post_test_srawi (); if (ret == 0) @@ -91,7 +91,7 @@ int cpu_post_test (int flags) ret = cpu_post_test_rlwinm (); if (ret == 0) ret = cpu_post_test_rlwimi (); - WATCHDOG_RESET(); + schedule(); if (ret == 0) ret = cpu_post_test_store (); if (ret == 0) @@ -100,20 +100,20 @@ int cpu_post_test (int flags) ret = cpu_post_test_cr (); if (ret == 0) ret = cpu_post_test_b (); - WATCHDOG_RESET(); + schedule(); if (ret == 0) ret = cpu_post_test_multi (); - WATCHDOG_RESET(); + schedule(); if (ret == 0) ret = cpu_post_test_string (); if (ret == 0) ret = cpu_post_test_complex (); - WATCHDOG_RESET(); + schedule(); if (ic) icache_enable(); - WATCHDOG_RESET(); + schedule(); return ret; } diff --git a/post/lib_powerpc/fpu/fpu.c b/post/lib_powerpc/fpu/fpu.c index 0de76ce0514..bd65f623d50 100644 --- a/post/lib_powerpc/fpu/fpu.c +++ b/post/lib_powerpc/fpu/fpu.c @@ -43,7 +43,7 @@ int fpu_post_test (int flags) int ret = 0; - WATCHDOG_RESET (); + schedule(); if (!fpu) fpu_enable (); @@ -66,7 +66,7 @@ int fpu_post_test (int flags) if (!fpu) fpu_disable (); - WATCHDOG_RESET (); + schedule(); return ret; } diff --git a/post/post.c b/post/post.c index d67c43ed8ae..b81425d8cf8 100644 --- a/post/post.c +++ b/post/post.c @@ -245,7 +245,7 @@ static int post_run_single(struct post_test *test, { if ((flags & test_flags & POST_ALWAYS) && (flags & test_flags & POST_MEM)) { - WATCHDOG_RESET(); + schedule(); if (!(flags & POST_REBOOT)) { if ((test_flags & POST_REBOOT) && @@ -350,7 +350,7 @@ int post_run(char *name, int flags) } if (i < post_list_size) { - WATCHDOG_RESET(); + schedule(); return post_run_single(post_list + i, test_flags[i], flags, i); diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index 3bafeb4fe98..0b3a51da13b 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -489,7 +489,7 @@ endif # Rule to link u-boot-spl # May be overridden by arch/$(ARCH)/config.mk -ifdef CONFIG_LTO +ifeq ($(LTO_ENABLE),y) quiet_cmd_u-boot-spl ?= LTO $@ cmd_u-boot-spl ?= \ ( \ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index f505722f6b0..49e3b3847e4 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -622,7 +622,6 @@ CONFIG_SYS_DPAA_PME CONFIG_SYS_DPAA_RMAN CONFIG_SYS_DRAM_TEST CONFIG_SYS_DV_NOR_BOOT_CFG -CONFIG_SYS_EEPROM_BUS_NUM CONFIG_SYS_EEPROM_WREN CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_ETHOC_BASE @@ -786,18 +785,11 @@ CONFIG_SYS_GPIO_OUT CONFIG_SYS_GPR1 CONFIG_SYS_HZ_CLOCK CONFIG_SYS_I2C_BUSES -CONFIG_SYS_I2C_DVI_ADDR -CONFIG_SYS_I2C_DVI_BUS_NUM -CONFIG_SYS_I2C_EEPROM_CCID -CONFIG_SYS_I2C_EEPROM_NXID -CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS -CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS CONFIG_SYS_I2C_EXPANDER_ADDR CONFIG_SYS_I2C_FPGA_ADDR CONFIG_SYS_I2C_G762_ADDR CONFIG_SYS_I2C_IFDR_DIV CONFIG_SYS_I2C_INIT_BOARD -CONFIG_SYS_I2C_LDI_ADDR CONFIG_SYS_I2C_MAX_HOPS CONFIG_SYS_I2C_NOPROBES CONFIG_SYS_I2C_PCA953X_ADDR @@ -840,7 +832,6 @@ CONFIG_SYS_JFFS2_FIRST_SECTOR CONFIG_SYS_JFFS2_NUM_BANKS CONFIG_SYS_KMBEC_FPGA_BASE CONFIG_SYS_KMBEC_FPGA_SIZE -CONFIG_SYS_L2_PL310 CONFIG_SYS_L2_SIZE CONFIG_SYS_L3_SIZE CONFIG_SYS_LATCH_ADDR diff --git a/test/bootm.c b/test/bootm.c index 7d03e1e0c68..4bb3ca0655c 100644 --- a/test/bootm.c +++ b/test/bootm.c @@ -208,7 +208,8 @@ BOOTM_TEST(bootm_test_silent_var, 0); /* Test substitution processing in the bootargs variable */ static int bootm_test_subst_var(struct unit_test_state *uts) { - env_set("bootargs", NULL); + ut_assertok(env_set("silent_linux", "yes")); + ut_assertok(env_set("bootargs", NULL)); ut_assertok(bootm_process_cmdline_env(BOOTM_CL_SILENT)); ut_asserteq_str("console=ttynull", env_get("bootargs")); diff --git a/test/cmd/Makefile b/test/cmd/Makefile index c331757425e..1bb02d93a23 100644 --- a/test/cmd/Makefile +++ b/test/cmd/Makefile @@ -5,6 +5,9 @@ ifdef CONFIG_HUSH_PARSER obj-$(CONFIG_CONSOLE_RECORD) += test_echo.o endif +ifdef CONFIG_CONSOLE_RECORD +obj-$(CONFIG_CMD_PAUSE) += test_pause.o +endif obj-y += mem.o obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o obj-$(CONFIG_CMD_FDT) += fdt.o diff --git a/test/cmd/test_pause.c b/test/cmd/test_pause.c new file mode 100644 index 00000000000..2b85cce3271 --- /dev/null +++ b/test/cmd/test_pause.c @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Tests for pause command + * + * Copyright 2022, Samuel Dionne-Riel <samuel@dionne-riel.com> + */ + +#include <common.h> +#include <asm/global_data.h> +#include <test/lib.h> +#include <test/ut.h> + +DECLARE_GLOBAL_DATA_PTR; + +static int lib_test_hush_pause(struct unit_test_state *uts) +{ + /* Test default message */ + console_record_reset_enable(); + /* Cook a newline when the command is expected to pause */ + console_in_puts("\n"); + ut_assertok(run_command("pause", 0)); + console_record_readline(uts->actual_str, sizeof(uts->actual_str)); + ut_asserteq_str("Press any key to continue...", uts->actual_str); + ut_assertok(ut_check_console_end(uts)); + + /* Test provided message */ + console_record_reset_enable(); + /* Cook a newline when the command is expected to pause */ + console_in_puts("\n"); + ut_assertok(run_command("pause 'Prompt for pause...'", 0)); + console_record_readline(uts->actual_str, sizeof(uts->actual_str)); + ut_asserteq_str("Prompt for pause...", uts->actual_str); + ut_assertok(ut_check_console_end(uts)); + + /* Test providing more than one params */ + console_record_reset_enable(); + /* No newline cooked here since the command is expected to fail */ + ut_asserteq(1, run_command("pause a b", 0)); + console_record_readline(uts->actual_str, sizeof(uts->actual_str)); + ut_asserteq_str("pause - delay until user input", uts->actual_str); + ut_asserteq(1, ut_check_console_end(uts)); + + return 0; +} +LIB_TEST(lib_test_hush_pause, 0); diff --git a/test/cmd_ut.c b/test/cmd_ut.c index 3789c6b784c..11c219b48ac 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -18,10 +18,17 @@ int cmd_ut_category(const char *name, const char *prefix, struct unit_test *tests, int n_ents, int argc, char *const argv[]) { + int runs_per_text = 1; int ret; + if (argc > 1 && !strncmp("-r", argv[1], 2)) { + runs_per_text = dectoul(argv[1] + 2, NULL); + argv++; + argc++; + } + ret = ut_run_list(name, prefix, tests, n_ents, - argc > 1 ? argv[1] : NULL); + argc > 1 ? argv[1] : NULL, runs_per_text); return ret ? CMD_RET_FAILURE : 0; } @@ -168,7 +175,8 @@ static char ut_help_text[] = #ifdef CONFIG_CMD_LOADM "ut loadm [test-name]- test of parameters and load memory blob\n" #endif - ; + "All commands accept an optional [-r<runs>] flag before [test-name], to\n" + "run each test multiple times (<runs> is in decimal)"; #endif /* CONFIG_SYS_LONGHELP */ U_BOOT_CMD( diff --git a/test/common/Makefile b/test/common/Makefile index 9087788ba6a..cc918f64e54 100644 --- a/test/common/Makefile +++ b/test/common/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0+ obj-y += cmd_ut_common.o obj-$(CONFIG_AUTOBOOT) += test_autoboot.o +obj-$(CONFIG_CYCLIC) += cyclic.o obj-$(CONFIG_EVENT) += event.o diff --git a/test/common/cyclic.c b/test/common/cyclic.c new file mode 100644 index 00000000000..6e758e89dbd --- /dev/null +++ b/test/common/cyclic.c @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Stefan Roese <sr@denx.de> + */ + +#include <common.h> +#include <cyclic.h> +#include <dm.h> +#include <test/common.h> +#include <test/test.h> +#include <test/ut.h> +#include <watchdog.h> +#include <linux/delay.h> + +/* Test that cyclic function is called */ +static bool cyclic_active = false; + +static void cyclic_test(void *ctx) +{ + cyclic_active = true; +} + +static int dm_test_cyclic_running(struct unit_test_state *uts) +{ + cyclic_active = false; + ut_assertnonnull(cyclic_register(cyclic_test, 10 * 1000, "cyclic_demo", + NULL)); + + /* Execute all registered cyclic functions */ + schedule(); + ut_asserteq(true, cyclic_active); + + return 0; +} +COMMON_TEST(dm_test_cyclic_running, 0); diff --git a/test/dm/blk.c b/test/dm/blk.c index 85c3a3bd45c..35bd5318f0b 100644 --- a/test/dm/blk.c +++ b/test/dm/blk.c @@ -25,19 +25,19 @@ static int dm_test_blk_base(struct unit_test_state *uts) /* Create two, one the parent of the other */ ut_assertok(blk_create_device(gd->dm_root, "sandbox_host_blk", "test", - IF_TYPE_HOST, 1, 512, 2, &blk1)); + UCLASS_ROOT, 1, 512, 2, &blk1)); ut_assertok(blk_create_device(blk1, "sandbox_host_blk", "test", - IF_TYPE_HOST, 3, 512, 2, &blk3)); + UCLASS_ROOT, 3, 512, 2, &blk3)); /* Check we can find them */ - ut_asserteq(-ENODEV, blk_get_device(IF_TYPE_HOST, 0, &dev)); - ut_assertok(blk_get_device(IF_TYPE_HOST, 1, &dev)); + ut_asserteq(-ENODEV, blk_get_device(UCLASS_ROOT, 0, &dev)); + ut_assertok(blk_get_device(UCLASS_ROOT, 1, &dev)); ut_asserteq_ptr(blk1, dev); - ut_assertok(blk_get_device(IF_TYPE_HOST, 3, &dev)); + ut_assertok(blk_get_device(UCLASS_ROOT, 3, &dev)); ut_asserteq_ptr(blk3, dev); /* Check we can iterate */ - ut_assertok(blk_first_device(IF_TYPE_HOST, &dev)); + ut_assertok(blk_first_device(UCLASS_ROOT, &dev)); ut_asserteq_ptr(blk1, dev); ut_assertok(blk_next_device(&dev)); ut_asserteq_ptr(blk3, dev); @@ -79,7 +79,7 @@ static int dm_test_blk_usb(struct unit_test_state *uts) ut_assertok(blk_get_device_by_str("usb", "0", &dev_desc)); /* The parent should be a block device */ - ut_assertok(blk_get_device(IF_TYPE_USB, 0, &dev)); + ut_assertok(blk_get_device(UCLASS_USB, 0, &dev)); ut_asserteq_ptr(usb_dev, dev_get_parent(dev)); /* Check we have one block device for each mass storage device */ @@ -101,14 +101,14 @@ static int dm_test_blk_find(struct unit_test_state *uts) struct udevice *blk, *dev; ut_assertok(blk_create_device(gd->dm_root, "sandbox_host_blk", "test", - IF_TYPE_HOST, 1, 512, 2, &blk)); - ut_asserteq(-ENODEV, blk_find_device(IF_TYPE_HOST, 0, &dev)); - ut_assertok(blk_find_device(IF_TYPE_HOST, 1, &dev)); + UCLASS_ROOT, 1, 512, 2, &blk)); + ut_asserteq(-ENODEV, blk_find_device(UCLASS_ROOT, 0, &dev)); + ut_assertok(blk_find_device(UCLASS_ROOT, 1, &dev)); ut_asserteq_ptr(blk, dev); ut_asserteq(false, device_active(dev)); /* Now activate it */ - ut_assertok(blk_get_device(IF_TYPE_HOST, 1, &dev)); + ut_assertok(blk_get_device(UCLASS_ROOT, 1, &dev)); ut_asserteq_ptr(blk, dev); ut_asserteq(true, device_active(dev)); @@ -134,7 +134,7 @@ static int dm_test_blk_devnum(struct unit_test_state *uts) /* Check that the bblock device is attached */ ut_assertok(uclass_get_device_by_seq(UCLASS_MMC, i, &mmc_dev)); - ut_assertok(blk_find_device(IF_TYPE_MMC, i, &dev)); + ut_assertok(blk_find_device(UCLASS_MMC, i, &dev)); parent = dev_get_parent(dev); ut_asserteq_ptr(parent, mmc_dev); ut_asserteq(trailing_strtol(mmc_dev->name), i); diff --git a/test/dm/gpio.c b/test/dm/gpio.c index 33ae98701f4..a8c35d43704 100644 --- a/test/dm/gpio.c +++ b/test/dm/gpio.c @@ -778,3 +778,33 @@ static int dm_test_gpio_get_values_as_int_base3(struct unit_test_state *uts) } DM_TEST(dm_test_gpio_get_values_as_int_base3, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +/* Check that gpio_get_status return the label of a GPIO configured as GPIOD_AF */ +static int dm_test_gpio_function(struct unit_test_state *uts) +{ + struct gpio_desc desc; + struct udevice *dev; + ulong flags; + unsigned int offset, gpio; + char buf[80]; + + ut_assertok(uclass_get_device(UCLASS_TEST_FDT, 0, &dev)); + ut_asserteq_str("a-test", dev->name); + + /* request gpio_b 5 */ + ut_assertok(gpio_request_by_name(dev, "test-gpios", 2, &desc, 0)); + /* update gpio_b 5 function to GPIO_AF */ + ut_assertok(dm_gpio_clrset_flags(&desc, GPIOD_IS_AF, GPIOD_IS_AF)); + ut_assertok(dm_gpio_get_flags(&desc, &flags)); + ut_asserteq(GPIOD_IS_AF, flags); + /* check using gpio_get_status that label is displayed for a pin with GPIO_AF function */ + ut_assertok(gpio_lookup_name("b5", &dev, &offset, &gpio)); + ut_assertok(gpio_get_status(dev, offset, buf, sizeof(buf))); + ut_asserteq_str("b5: func a-test.test-gpios2", buf); + + ut_assertok(dm_gpio_free(dev, &desc)); + + return 0; +} +DM_TEST(dm_test_gpio_function, + UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); diff --git a/test/dm/rtc.c b/test/dm/rtc.c index c7f9f8f0ce7..bf97dbbd2f9 100644 --- a/test/dm/rtc.c +++ b/test/dm/rtc.c @@ -60,16 +60,27 @@ static int dm_test_rtc_set_get(struct unit_test_state *uts) { struct rtc_time now, time, cmp; struct udevice *dev, *emul; - long offset, old_offset, old_base_time; + long offset, check_offset, old_offset, old_base_time; + int i; ut_assertok(uclass_get_device(UCLASS_RTC, 0, &dev)); - ut_assertok(dm_rtc_get(dev, &now)); ut_assertok(i2c_emul_find(dev, &emul)); - ut_assert(emul != NULL); + ut_assertnonnull(emul); + + /* Get the offset, putting the RTC into manual mode */ + i = 0; + do { + check_offset = sandbox_i2c_rtc_set_offset(emul, false, 0); + ut_assertok(dm_rtc_get(dev, &now)); + + /* Tell the RTC to go into manual mode */ + old_offset = sandbox_i2c_rtc_set_offset(emul, false, 0); + + /* If the times changed in that period, read it again */ + } while (++i < 2 && check_offset != old_offset); + ut_asserteq(check_offset, old_offset); - /* Tell the RTC to go into manual mode */ - old_offset = sandbox_i2c_rtc_set_offset(emul, false, 0); old_base_time = sandbox_i2c_rtc_get_set_base_time(emul, -1); memset(&time, '\0', sizeof(time)); @@ -127,7 +138,8 @@ static int dm_test_rtc_set_get(struct unit_test_state *uts) ut_asserteq(now.tm_sec + 1, cmp.tm_sec); } - old_offset = sandbox_i2c_rtc_set_offset(emul, true, 0); + /* return RTC to normal mode */ + sandbox_i2c_rtc_set_offset(emul, true, 0); return 0; } @@ -161,7 +173,7 @@ static int dm_test_rtc_read_write(struct unit_test_state *uts) ut_asserteq(memcmp(buf, "at", 3), 0); ut_assertok(i2c_emul_find(dev, &emul)); - ut_assert(emul != NULL); + ut_assertnonnull(emul); old_offset = sandbox_i2c_rtc_set_offset(emul, false, 0); ut_assertok(dm_rtc_get(dev, &time)); @@ -240,20 +252,31 @@ static int dm_test_rtc_reset(struct unit_test_state *uts) struct rtc_time now; struct udevice *dev, *emul; long old_base_time, base_time; + int i; ut_assertok(uclass_get_device(UCLASS_RTC, 0, &dev)); ut_assertok(dm_rtc_get(dev, &now)); ut_assertok(i2c_emul_find(dev, &emul)); - ut_assert(emul != NULL); + ut_assertnonnull(emul); + + i = 0; + do { + old_base_time = sandbox_i2c_rtc_get_set_base_time(emul, 0); - old_base_time = sandbox_i2c_rtc_get_set_base_time(emul, 0); + ut_asserteq(0, sandbox_i2c_rtc_get_set_base_time(emul, -1)); - ut_asserteq(0, sandbox_i2c_rtc_get_set_base_time(emul, -1)); + ut_assertok(dm_rtc_reset(dev)); + base_time = sandbox_i2c_rtc_get_set_base_time(emul, -1); - /* Resetting the RTC should put he base time back to normal */ - ut_assertok(dm_rtc_reset(dev)); - base_time = sandbox_i2c_rtc_get_set_base_time(emul, -1); + /* + * Resetting the RTC should put the base time back to normal. + * Allow for a one-timeadjustment in case the time flips over + * while this test process is pre-empted (either by a second + * or a daylight-saving change), since reset_time() in + * i2c_rtc_emul.c reads the time from the OS. + */ + } while (++i < 2 && base_time != old_base_time); ut_asserteq(old_base_time, base_time); return 0; @@ -274,9 +297,9 @@ static int dm_test_rtc_dual(struct unit_test_state *uts) ut_assertok(dm_rtc_get(dev2, &now2)); ut_assertok(i2c_emul_find(dev1, &emul1)); - ut_assert(emul1 != NULL); + ut_assertnonnull(emul1); ut_assertok(i2c_emul_find(dev2, &emul2)); - ut_assert(emul2 != NULL); + ut_assertnonnull(emul2); offset = sandbox_i2c_rtc_set_offset(emul1, false, -1); sandbox_i2c_rtc_set_offset(emul2, false, offset + 1); diff --git a/test/dm/test-dm.c b/test/dm/test-dm.c index f5cda81bbfc..eb3581333b9 100644 --- a/test/dm/test-dm.c +++ b/test/dm/test-dm.c @@ -29,13 +29,14 @@ DECLARE_GLOBAL_DATA_PTR; * "fdt_pre_reloc"), or NULL to run all * Return: 0 if all tests passed, 1 if not */ -static int dm_test_run(const char *test_name) +static int dm_test_run(const char *test_name, int runs_per_text) { struct unit_test *tests = UNIT_TEST_SUITE_START(dm_test); const int n_ents = UNIT_TEST_SUITE_COUNT(dm_test); int ret; - ret = ut_run_list("driver model", "dm_test_", tests, n_ents, test_name); + ret = ut_run_list("driver model", "dm_test_", tests, n_ents, test_name, + runs_per_text); return ret ? CMD_RET_FAILURE : 0; } @@ -43,9 +44,15 @@ static int dm_test_run(const char *test_name) int do_ut_dm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { const char *test_name = NULL; + int runs_per_text = 1; + if (argc > 1 && !strncmp("-r", argv[1], 2)) { + runs_per_text = dectoul(argv[1] + 2, NULL); + argv++; + argc++; + } if (argc > 1) test_name = argv[1]; - return dm_test_run(test_name); + return dm_test_run(test_name, runs_per_text); } diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c index 6118ad42ca8..012f2f455f6 100644 --- a/test/dm/test-fdt.c +++ b/test/dm/test-fdt.c @@ -815,6 +815,8 @@ DM_TEST(dm_test_first_child, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); static int dm_test_read_int(struct unit_test_state *uts) { struct udevice *dev; + u8 val8; + u16 val16; u32 val32; s32 sval; uint val; @@ -822,6 +824,23 @@ static int dm_test_read_int(struct unit_test_state *uts) ut_assertok(uclass_first_device_err(UCLASS_TEST_FDT, &dev)); ut_asserteq_str("a-test", dev->name); + + ut_assertok(dev_read_u8(dev, "int8-value", &val8)); + ut_asserteq(0x12, val8); + + ut_asserteq(-EINVAL, dev_read_u8(dev, "missing", &val8)); + ut_asserteq(6, dev_read_u8_default(dev, "missing", 6)); + + ut_asserteq(0x12, dev_read_u8_default(dev, "int8-value", 6)); + + ut_assertok(dev_read_u16(dev, "int16-value", &val16)); + ut_asserteq(0x1234, val16); + + ut_asserteq(-EINVAL, dev_read_u16(dev, "missing", &val16)); + ut_asserteq(6, dev_read_u16_default(dev, "missing", 6)); + + ut_asserteq(0x1234, dev_read_u16_default(dev, "int16-value", 6)); + ut_assertok(dev_read_u32(dev, "int-value", &val32)); ut_asserteq(1234, val32); diff --git a/test/dm/wdt.c b/test/dm/wdt.c index 535f00a8740..653d7b1c8b3 100644 --- a/test/dm/wdt.c +++ b/test/dm/wdt.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <cyclic.h> #include <dm.h> #include <wdt.h> #include <asm/gpio.h> @@ -130,7 +131,7 @@ static int dm_test_wdt_watchdog_reset(struct unit_test_state *uts) /* Neither device should be "started", so watchdog_reset() should be a no-op. */ reset_count = state->wdt.reset_count; val = sandbox_gpio_get_value(gpio, offset); - watchdog_reset(); + cyclic_run(); ut_asserteq(reset_count, state->wdt.reset_count); ut_asserteq(val, sandbox_gpio_get_value(gpio, offset)); @@ -140,19 +141,19 @@ static int dm_test_wdt_watchdog_reset(struct unit_test_state *uts) /* Make sure both devices have just been pinged. */ timer_test_add_offset(100); - watchdog_reset(); + cyclic_run(); reset_count = state->wdt.reset_count; val = sandbox_gpio_get_value(gpio, offset); /* The gpio watchdog should be pinged, the sandbox one not. */ timer_test_add_offset(30); - watchdog_reset(); + cyclic_run(); ut_asserteq(reset_count, state->wdt.reset_count); ut_asserteq(!val, sandbox_gpio_get_value(gpio, offset)); /* After another ~30ms, both devices should get pinged. */ timer_test_add_offset(30); - watchdog_reset(); + cyclic_run(); ut_asserteq(reset_count + 1, state->wdt.reset_count); ut_asserteq(val, sandbox_gpio_get_value(gpio, offset)); diff --git a/test/nokia_rx51_test.sh b/test/nokia_rx51_test.sh index 28aa554ed8b..a516ec2967c 100755 --- a/test/nokia_rx51_test.sh +++ b/test/nokia_rx51_test.sh @@ -34,9 +34,20 @@ echo "========== Compiling U-Boot for Nokia RX-51 board ==========" echo "============================================================" echo -# First compile u-boot.bin binary for Nokia RX-51 board +# First compile u-boot-ubifs.bin binary with UBI/UBIFS support for Nokia RX-51 board according to doc/board/nokia/rx51.rst make nokia_rx51_config -make -j4 u-boot.bin ARCH=arm CROSS_COMPILE=arm-linux-gnueabi- +cat >> .config << EOF +CONFIG_CMD_UBI=y +CONFIG_CMD_UBIFS=y +CONFIG_MTD_UBI_BEB_LIMIT=10 +EOF +make olddefconfig +make -j4 u-boot.bin CROSS_COMPILE=arm-linux-gnueabi- +mv u-boot.bin u-boot-ubifs.bin + +# Then compile standard u-boot.bin binary for Nokia RX-51 board +make nokia_rx51_config +make -j4 u-boot.bin CROSS_COMPILE=arm-linux-gnueabi- # And then do all stuff in temporary directory mkdir -p nokia_rx51_tmp @@ -44,6 +55,7 @@ cd nokia_rx51_tmp test -f mkimage || ln -s ../tools/mkimage . test -f u-boot.bin || ln -s ../u-boot.bin . +test -f u-boot-ubifs.bin || ln -s ../u-boot-ubifs.bin . echo echo "==========================================================================" @@ -99,6 +111,10 @@ echo "========== Generating images ==========" echo "=======================================" echo +# Generate kernel image in zImage and uImage format from FIASCO format +dd if=kernel_2.6.28/boot/zImage-2.6.28-20103103+0m5.fiasco of=zImage-2.6.28-omap1 skip=95 bs=1 +./mkimage -A arm -O linux -T kernel -C none -a 80008000 -e 80008000 -n zImage-2.6.28-omap1 -d zImage-2.6.28-omap1 uImage-2.6.28-omap1 + # Generate rootfs directory mkdir -p rootfs mkdir -p rootfs/dev/ @@ -123,20 +139,7 @@ echo EOF chmod +x rootfs/sbin/preinit -# Generate ubi config file for ubi rootfs image -cat > ubi.ini << EOF -[rootfs] -mode=ubi -image=ubifs.img -vol_id=0 -vol_size=160MiB -vol_type=dynamic -vol_name=rootfs -vol_alignment=1 -vol_flags=autoresize -EOF - -# Generate ubi rootfs image from rootfs directory +# Generate ubifs image from rootfs directory # NOTE: Character device on host filesystem can be created only by root # But we do not need it on host filesystem, just in ubifs image # So run mknod and mkfs.ubifs commands under fakeroot program @@ -149,8 +152,35 @@ fakeroot sh -c ' mknod rootfs/dev/console c 5 1; /usr/sbin/mkfs.ubifs -m 2048 -e 129024 -c 2047 -r rootfs ubifs.img; ' + +# Generate ubi image with rootfs on first volume +cat > ubi.ini << EOF +[rootfs] +mode=ubi +image=ubifs.img +vol_id=0 +vol_size=230MiB # 1870 LEBs +vol_type=dynamic +vol_name=rootfs +vol_alignment=1 +vol_flags=autoresize +EOF /usr/sbin/ubinize -o ubi.img -p 128KiB -m 2048 -s 512 ubi.ini +# Generate ubi image with rootfs on first volume and kernel in zImage format on second volume for UBI booting +cp ubi.ini ubi_with_kernel.ini +cat >> ubi_with_kernel.ini << EOF +[kernel] +mode=ubi +image=zImage-2.6.28-omap1 +vol_id=1 +vol_size=2MiB +vol_type=dynamic +vol_name=kernel +vol_alignment=1 +EOF +/usr/sbin/ubinize -o ubi_with_kernel.img -p 128KiB -m 2048 -s 512 ubi_with_kernel.ini + # Generate bootmenu for U-Boot serial console testing cat > bootmenu_uboot << EOF setenv bootmenu_0 'Serial console test=echo; echo "Testing serial console"; echo; echo "Successfully booted"; echo; poweroff'; @@ -178,15 +208,24 @@ setenv bootdelay 1; EOF ./mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n bootmenu_emmc2 -d bootmenu_emmc2 bootmenu_emmc2.scr -# Generate bootmenu for OneNAND booting +# Generate bootmenu for OneNAND booting (uImage) cat > bootmenu_nand << EOF -setenv bootmenu_0 'uImage-2.6.28-omap1 from OneNAND=mtd read initfs \${kernaddr}; setenv bootargs; setenv setup_omap_atag 1; bootm \${kernaddr}'; +setenv bootmenu_0 'uImage-2.6.28-omap1 from OneNAND=setenv bootargs; setenv setup_omap_atag 1; mtd read initfs \${kernaddr} && bootm \${kernaddr}'; setenv bootmenu_1; setenv bootmenu_delay 1; setenv bootdelay 1; EOF ./mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n bootmenu_nand -d bootmenu_nand bootmenu_nand.scr +# Generate bootmenu for UBI booting (zImage) +cat > bootmenu_ubi << EOF +setenv bootmenu_0 'zImage-2.6.28-omap1 from UBI=setenv bootargs; setenv setup_omap_atag 1; ubi part rootfs && ubi read \${kernaddr} kernel && bootz \${kernaddr}'; +setenv bootmenu_1; +setenv bootmenu_delay 1; +setenv bootdelay 1; +EOF +./mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n bootmenu_ubi -d bootmenu_ubi bootmenu_ubi.scr + # Generate bootmenu for default booting cat > bootmenu_default << EOF setenv bootmenu_delay 1; @@ -195,9 +234,7 @@ EOF ./mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n bootmenu_default -d bootmenu_default bootmenu_default.scr # Generate combined image from u-boot and Maemo fiasco kernel -dd if=kernel_2.6.28/boot/zImage-2.6.28-20103103+0m5.fiasco of=zImage-2.6.28-omap1 skip=95 bs=1 ./u-boot-gen-combined u-boot.bin zImage-2.6.28-omap1 combined_zimage.bin -./mkimage -A arm -O linux -T kernel -C none -a 80008000 -e 80008000 -n zImage-2.6.28-omap1 -d zImage-2.6.28-omap1 uImage-2.6.28-omap1 ./u-boot-gen-combined u-boot.bin uImage-2.6.28-omap1 combined_uimage.bin # Generate combined hack image from u-boot and Maemo fiasco kernel (kernel starts at 2MB offset and qflasher puts 2kB header before supplied image) @@ -221,11 +258,16 @@ mformat -m 0xf8 -F -h 4 -s 16 -c 1 -t $((50*1024*1024/(4*16*512))) :: -i emmc_em mcopy zImage-2.6.28-omap1 ::/zImage-2.6.28-omap1 -i emmc_emmc2.img mcopy bootmenu_emmc2.scr ::/bootmenu.scr -i emmc_emmc2.img -# Generate FAT32 eMMC image for OneNAND booting +# Generate FAT32 eMMC image for OneNAND booting (uImage) truncate -s 50MiB emmc_nand.img mformat -m 0xf8 -F -h 4 -s 16 -c 1 -t $((50*1024*1024/(4*16*512))) :: -i emmc_nand.img mcopy bootmenu_nand.scr ::/bootmenu.scr -i emmc_nand.img +# Generate FAT32 eMMC image for UBI booting (zImage) +truncate -s 50MiB emmc_ubi.img +mformat -m 0xf8 -F -h 4 -s 16 -c 1 -t $((50*1024*1024/(4*16*512))) :: -i emmc_ubi.img +mcopy bootmenu_ubi.scr ::/bootmenu.scr -i emmc_ubi.img + # Generate FAT32 eMMC image for default booting truncate -s 50MiB emmc_default.img mformat -m 0xf8 -F -h 4 -s 16 -c 1 -t $((50*1024*1024/(4*16*512))) :: -i emmc_default.img @@ -251,6 +293,10 @@ rm -f mtd_emmc.img rm -f mtd_nand.img ./qflasher -v -x xloader-qemu.bin -s secondary-qemu.bin -k combined_hack.bin -r ubi.img -m rx51 -p k=4094,i=2 -o mtd_nand.img +# Generate MTD image for UBI booting from bootloader nolo images, u-boot image with UBI/UBIFS support and rootfs image with kernel volume +rm -f mtd_ubi.img +./qflasher -v -x xloader-qemu.bin -s secondary-qemu.bin -k u-boot-ubifs.bin -r ubi_with_kernel.img -m rx51 -o mtd_ubi.img + echo echo "======================================================" echo "========== Running test images in n900 qemu ==========" @@ -329,6 +375,18 @@ wait -n $sleep_pid $qemu_pid || true kill -9 $tail_pid $sleep_pid $qemu_pid 2>/dev/null || true wait || true +# Run MTD image in qemu and wait for 300s if kernel from UBI is correctly booted +rm -f qemu_ubi.log +./qemu-system-arm -M n900 -mtdblock mtd_ubi.img -sd emmc_ubi.img -serial /dev/stdout -display none > qemu_ubi.log & +qemu_pid=$! +tail -F qemu_ubi.log & +tail_pid=$! +sleep 300 & +sleep_pid=$! +wait -n $sleep_pid $qemu_pid || true +kill -9 $tail_pid $sleep_pid $qemu_pid 2>/dev/null || true +wait || true + echo echo "=============================" echo "========== Results ==========" @@ -341,10 +399,11 @@ if grep -q 'Successfully booted' qemu_ram2.log; then echo "Kernel (zImage) was s if grep -q 'Successfully booted' qemu_emmc.log; then echo "Kernel (uImage) was successfully booted from eMMC"; else echo "Failed to boot kernel (uImage) from eMMC"; fi if grep -q 'Successfully booted' qemu_emmc2.log; then echo "Kernel (zImage) was successfully booted from eMMC"; else echo "Failed to boot kernel (zImage) from eMMC"; fi if grep -q 'Successfully booted' qemu_nand.log; then echo "Kernel (uImage) was successfully booted from OneNAND"; else echo "Failed to boot kernel (uImage) from OneNAND"; fi +if grep -q 'Successfully booted' qemu_ubi.log; then echo "Kernel (zImage) was successfully booted from UBI"; else echo "Failed to boot kernel (zImage) from UBI"; fi echo -if grep -q 'Successfully booted' qemu_uboot.log && grep -q 'Successfully booted' qemu_ram.log && grep -q 'Successfully booted' qemu_ram2.log && grep -q 'Successfully booted' qemu_emmc.log && grep -q 'Successfully booted' qemu_emmc2.log && grep -q 'Successfully booted' qemu_nand.log; then +if grep -q 'Successfully booted' qemu_uboot.log && grep -q 'Successfully booted' qemu_ram.log && grep -q 'Successfully booted' qemu_ram2.log && grep -q 'Successfully booted' qemu_emmc.log && grep -q 'Successfully booted' qemu_emmc2.log && grep -q 'Successfully booted' qemu_nand.log && grep -q 'Successfully booted' qemu_ubi.log; then echo "All tests passed" exit 0 else diff --git a/test/py/conftest.py b/test/py/conftest.py index 2ba34479e03..304e93164aa 100644 --- a/test/py/conftest.py +++ b/test/py/conftest.py @@ -15,9 +15,11 @@ import atexit import configparser import errno +import filelock import io import os import os.path +from pathlib import Path import pytest import re from _pytest.runner import runtestprotocol @@ -27,6 +29,8 @@ import sys log = None console = None +TEST_PY_DIR = os.path.dirname(os.path.abspath(__file__)) + def mkdir_p(path): """Create a directory path. @@ -76,6 +80,53 @@ def pytest_addoption(parser): help='Run sandbox under gdbserver. The argument is the channel '+ 'over which gdbserver should communicate, e.g. localhost:1234') +def run_build(config, source_dir, build_dir, board_type, log): + """run_build: Build U-Boot + + Args: + config: The pytest configuration. + soruce_dir (str): Directory containing source code + build_dir (str): Directory to build in + board_type (str): board_type parameter (e.g. 'sandbox') + log (Logfile): Log file to use + """ + if config.getoption('buildman'): + if build_dir != source_dir: + dest_args = ['-o', build_dir, '-w'] + else: + dest_args = ['-i'] + cmds = (['buildman', '--board', board_type] + dest_args,) + name = 'buildman' + else: + if build_dir != source_dir: + o_opt = 'O=%s' % build_dir + else: + o_opt = '' + cmds = ( + ['make', o_opt, '-s', board_type + '_defconfig'], + ['make', o_opt, '-s', '-j{}'.format(os.cpu_count())], + ) + name = 'make' + + with log.section(name): + runner = log.get_runner(name, sys.stdout) + for cmd in cmds: + runner.run(cmd, cwd=source_dir) + runner.close() + log.status_pass('OK') + +def pytest_xdist_setupnodes(config, specs): + """Clear out any 'done' file from a previous build""" + global build_done_file + build_dir = config.getoption('build_dir') + board_type = config.getoption('board_type') + source_dir = os.path.dirname(os.path.dirname(TEST_PY_DIR)) + if not build_dir: + build_dir = source_dir + '/build-' + board_type + build_done_file = Path(build_dir) / 'build.done' + if build_done_file.exists(): + os.remove(build_done_file) + def pytest_configure(config): """pytest hook: Perform custom initialization at startup time. @@ -110,8 +161,7 @@ def pytest_configure(config): global console global ubconfig - test_py_dir = os.path.dirname(os.path.abspath(__file__)) - source_dir = os.path.dirname(os.path.dirname(test_py_dir)) + source_dir = os.path.dirname(os.path.dirname(TEST_PY_DIR)) board_type = config.getoption('board_type') board_type_filename = board_type.replace('-', '_') @@ -142,30 +192,13 @@ def pytest_configure(config): log = multiplexed_log.Logfile(result_dir + '/test-log.html') if config.getoption('build'): - if config.getoption('buildman'): - if build_dir != source_dir: - dest_args = ['-o', build_dir, '-w'] - else: - dest_args = ['-i'] - cmds = (['buildman', '--board', board_type] + dest_args,) - name = 'buildman' - else: - if build_dir != source_dir: - o_opt = 'O=%s' % build_dir - else: - o_opt = '' - cmds = ( - ['make', o_opt, '-s', board_type + '_defconfig'], - ['make', o_opt, '-s', '-j{}'.format(os.cpu_count())], - ) - name = 'make' - - with log.section(name): - runner = log.get_runner(name, sys.stdout) - for cmd in cmds: - runner.run(cmd, cwd=source_dir) - runner.close() - log.status_pass('OK') + worker_id = os.environ.get("PYTEST_XDIST_WORKER") + with filelock.FileLock(os.path.join(build_dir, 'build.lock')): + build_done_file = Path(build_dir) / 'build.done' + if (not worker_id or worker_id == 'master' or + not build_done_file.exists()): + run_build(config, source_dir, build_dir, board_type, log) + build_done_file.touch() class ArbitraryAttributeContainer(object): pass @@ -197,7 +230,7 @@ def pytest_configure(config): else: parse_config('include/autoconf.mk') - ubconfig.test_py_dir = test_py_dir + ubconfig.test_py_dir = TEST_PY_DIR ubconfig.source_dir = source_dir ubconfig.build_dir = build_dir ubconfig.result_dir = result_dir @@ -521,6 +554,22 @@ def setup_requiredtool(item): if not tool_is_in_path(tool): pytest.skip('tool "%s" not in $PATH' % tool) +def setup_singlethread(item): + """Process any 'singlethread' marker for a test. + + Skip this test if running in parallel. + + Args: + item: The pytest test item. + + Returns: + Nothing. + """ + for single in item.iter_markers('singlethread'): + worker_id = os.environ.get("PYTEST_XDIST_WORKER") + if worker_id and worker_id != 'master': + pytest.skip('must run single-threaded') + def start_test_section(item): anchors[item.name] = log.start_section(item.name) @@ -541,6 +590,7 @@ def pytest_runtest_setup(item): setup_boardspec(item) setup_buildconfigspec(item) setup_requiredtool(item) + setup_singlethread(item) def pytest_runtest_protocol(item, nextitem): """pytest hook: Called to execute a test. diff --git a/test/py/pytest.ini b/test/py/pytest.ini index e93d010f1fa..26d83f83e00 100644 --- a/test/py/pytest.ini +++ b/test/py/pytest.ini @@ -11,3 +11,4 @@ markers = notbuildconfigspec: U-Boot: Describes required disabled Kconfig options. requiredtool: U-Boot: Required host tools for a test. slow: U-Boot: Specific test will run slowly. + singlethread: Cannot run in parallel diff --git a/test/py/requirements.txt b/test/py/requirements.txt index ead92ed8b48..1bf77b59d84 100644 --- a/test/py/requirements.txt +++ b/test/py/requirements.txt @@ -2,6 +2,7 @@ atomicwrites==1.4.1 attrs==19.3.0 coverage==4.5.4 extras==1.0.0 +filelock==3.0.12 fixtures==3.0.0 importlib-metadata==0.23 linecache2==1.0.0 @@ -15,6 +16,7 @@ pyelftools==0.27 pygit2==1.9.2 pyparsing==2.4.2 pytest==6.2.5 +pytest-xdist==2.5.0 python-mimeparse==1.6.0 python-subunit==1.3.0 requests==2.25.1 diff --git a/test/py/tests/test_bind.py b/test/py/tests/test_bind.py index c90c54d266f..1376ab5ed28 100644 --- a/test/py/tests/test_bind.py +++ b/test/py/tests/test_bind.py @@ -119,6 +119,7 @@ def get_next_line(tree, name): @pytest.mark.boardspec('sandbox') @pytest.mark.buildconfigspec('cmd_bind') +@pytest.mark.singlethread def test_bind_unbind_with_uclass(u_boot_console): #bind /bind-test response = u_boot_console.run_command('bind /bind-test simple_bus') diff --git a/test/py/tests/test_efi_bootmgr/test_efi_bootmgr.py b/test/py/tests/test_efi_bootmgr/test_efi_bootmgr.py index 75a6e7c9629..1bb59d8fcf8 100644 --- a/test/py/tests/test_efi_bootmgr/test_efi_bootmgr.py +++ b/test/py/tests/test_efi_bootmgr/test_efi_bootmgr.py @@ -7,6 +7,7 @@ import pytest @pytest.mark.boardspec('sandbox') @pytest.mark.buildconfigspec('cmd_efidebug') @pytest.mark.buildconfigspec('cmd_bootefi_bootmgr') +@pytest.mark.singlethread def test_efi_bootmgr(u_boot_console, efi_bootmgr_data): """ Unit test for UEFI bootmanager The efidebug command is used to set up UEFI load options. diff --git a/test/py/tests/test_eficonfig/conftest.py b/test/py/tests/test_eficonfig/conftest.py new file mode 100644 index 00000000000..f289df03626 --- /dev/null +++ b/test/py/tests/test_eficonfig/conftest.py @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: GPL-2.0+ + +"""Fixture for UEFI eficonfig test +""" + +import os +import shutil +from subprocess import check_call +import pytest + +@pytest.fixture(scope='session') +def efi_eficonfig_data(u_boot_config): + """Set up a file system to be used in UEFI "eficonfig" command + tests + + Args: + u_boot_config -- U-boot configuration. + + Return: + A path to disk image to be used for testing + """ + mnt_point = u_boot_config.persistent_data_dir + '/test_efi_eficonfig' + image_path = u_boot_config.persistent_data_dir + '/efi_eficonfig.img' + + shutil.rmtree(mnt_point, ignore_errors=True) + os.mkdir(mnt_point, mode = 0o755) + + with open(mnt_point + '/initrd-1.img', 'w', encoding = 'ascii') as file: + file.write("initrd 1") + + with open(mnt_point + '/initrd-2.img', 'w', encoding = 'ascii') as file: + file.write("initrd 2") + + shutil.copyfile(u_boot_config.build_dir + '/lib/efi_loader/initrddump.efi', + mnt_point + '/initrddump.efi') + + check_call(f'virt-make-fs --partition=gpt --size=+1M --type=vfat {mnt_point} {image_path}', + shell=True) + + return image_path diff --git a/test/py/tests/test_eficonfig/test_eficonfig.py b/test/py/tests/test_eficonfig/test_eficonfig.py new file mode 100644 index 00000000000..99606d9c4b8 --- /dev/null +++ b/test/py/tests/test_eficonfig/test_eficonfig.py @@ -0,0 +1,354 @@ +# SPDX-License-Identifier: GPL-2.0+ +""" Unit test for UEFI menu-driven configuration +""" + +import pytest +import time + +@pytest.mark.boardspec('sandbox') +@pytest.mark.buildconfigspec('cmd_eficonfig') +@pytest.mark.buildconfigspec('cmd_bootefi_bootmgr') +def test_efi_eficonfig(u_boot_console, efi_eficonfig_data): + + def send_user_input_and_wait(user_str, expect_str): + time.sleep(0.1) # TODO: does not work correctly without sleep + u_boot_console.run_command(cmd=user_str, wait_for_prompt=False, + wait_for_echo=True, send_nl=False) + u_boot_console.run_command(cmd='\x0d', wait_for_prompt=False, + wait_for_echo=False, send_nl=False) + if expect_str is not None: + for i in expect_str: + u_boot_console.p.expect([i]) + + def press_up_down_enter_and_wait(up_count, down_count, enter, expect_str): + # press UP key + for i in range(up_count): + u_boot_console.run_command(cmd='\x1b\x5b\x41', wait_for_prompt=False, + wait_for_echo=False, send_nl=False) + # press DOWN key + for i in range(down_count): + u_boot_console.run_command(cmd='\x1b\x5b\x42', wait_for_prompt=False, + wait_for_echo=False, send_nl=False) + # press ENTER if requested + if enter: + u_boot_console.run_command(cmd='\x0d', wait_for_prompt=False, + wait_for_echo=False, send_nl=False) + # wait expected output + if expect_str is not None: + for i in expect_str: + u_boot_console.p.expect([i]) + + def press_escape_key(wait_prompt): + u_boot_console.run_command(cmd='\x1b', wait_for_prompt=wait_prompt, wait_for_echo=False, send_nl=False) + + def press_enter_key(wait_prompt): + u_boot_console.run_command(cmd='\x0d', wait_for_prompt=wait_prompt, + wait_for_echo=False, send_nl=False) + + def check_current_is_maintenance_menu(): + for i in ('UEFI Maintenance Menu', 'Add Boot Option', 'Edit Boot Option', + 'Change Boot Order', 'Delete Boot Option', 'Quit'): + u_boot_console.p.expect([i]) + + """ Unit test for "eficonfig" command + The menu-driven interface is used to set up UEFI load options. + The bootefi bootmgr loads initrddump.efi as a payload. + The crc32 of the loaded initrd.img is checked + + Args: + u_boot_console -- U-Boot console + efi__data -- Path to the disk image used for testing. + Test disk image has following files. + initrd-1.img + initrd-2.img + initrddump.efi + + """ + + # Restart the system to clean the previous state + u_boot_console.restart_uboot() + + with u_boot_console.temporary_timeout(500): + # + # Test Case 1: Check the menu is displayed + # + u_boot_console.run_command('eficonfig', wait_for_prompt=False) + for i in ('UEFI Maintenance Menu', 'Add Boot Option', 'Edit Boot Option', + 'Change Boot Order', 'Delete Boot Option', 'Quit'): + u_boot_console.p.expect([i]) + # Select "Add Boot Option" + press_enter_key(False) + for i in ('Add Boot Option', 'Description:', 'File', 'Initrd File', 'Optional Data', + 'Save', 'Quit'): + u_boot_console.p.expect([i]) + press_escape_key(False) + check_current_is_maintenance_menu() + # return to U-Boot console + press_escape_key(True) + + # + # Test Case 2: check auto generated media device entry + # + + # bind the test disk image for succeeding tests + u_boot_console.run_command(cmd = f'host bind 0 {efi_eficonfig_data}') + + u_boot_console.run_command('eficonfig', wait_for_prompt=False) + + # Change the Boot Order + press_up_down_enter_and_wait(0, 2, True, 'Quit') + for i in ('host 0:1', 'Save', 'Quit'): + u_boot_console.p.expect([i]) + # disable auto generated boot option for succeeding test + u_boot_console.run_command(cmd=' ', wait_for_prompt=False, + wait_for_echo=False, send_nl=False) + # Save the BootOrder + press_up_down_enter_and_wait(0, 1, True, None) + check_current_is_maintenance_menu() + + # + # Test Case 3: Add first Boot Option and load it + # + + # Select 'Add Boot Option' + press_up_down_enter_and_wait(0, 0, True, 'Quit') + + # Press the enter key to select 'Description:' entry, then enter Description + press_up_down_enter_and_wait(0, 0, True, 'enter description:') + # Send Description user input, press ENTER key to complete + send_user_input_and_wait('test 1', 'Quit') + + # Set EFI image(initrddump.efi) + press_up_down_enter_and_wait(0, 1, True, 'Quit') + press_up_down_enter_and_wait(0, 0, True, 'host 0:1') + # Select 'host 0:1' + press_up_down_enter_and_wait(0, 0, True, 'Quit') + # Press down key to select "initrddump.efi" entry followed by the enter key + press_up_down_enter_and_wait(0, 2, True, 'Quit') + + # Set Initrd file(initrd-1.img) + press_up_down_enter_and_wait(0, 2, True, 'Quit') + press_up_down_enter_and_wait(0, 0, True, 'host 0:1') + # Select 'host 0:1' + press_up_down_enter_and_wait(0, 0, True, 'Quit') + # Press down key to select "initrd-1.img" entry followed by the enter key + press_up_down_enter_and_wait(0, 0, True, 'Quit') + + # Set optional_data + press_up_down_enter_and_wait(0, 3, True, 'Optional Data:') + # Send Description user input, press ENTER key to complete + send_user_input_and_wait('nocolor', None) + for i in ('Description: test 1', 'File: host 0:1/initrddump.efi', + 'Initrd File: host 0:1/initrd-1.img', 'Optional Data: nocolor', 'Save', 'Quit'): + u_boot_console.p.expect([i]) + + # Save the Boot Option + press_up_down_enter_and_wait(0, 4, True, None) + check_current_is_maintenance_menu() + + # Check the newly added Boot Option is handled correctly + # Return to U-Boot console + press_escape_key(True) + u_boot_console.run_command(cmd = 'bootefi bootmgr') + response = u_boot_console.run_command(cmd = 'load', wait_for_echo=False) + assert 'crc32: 0x181464af' in response + u_boot_console.run_command(cmd = 'exit', wait_for_echo=False) + + # + # Test Case 4: Add second Boot Option and load it + # + u_boot_console.run_command('eficonfig', wait_for_prompt=False) + + # Select 'Add Boot Option' + press_up_down_enter_and_wait(0, 0, True, 'Quit') + + # Press the enter key to select 'Description:' entry, then enter Description + press_up_down_enter_and_wait(0, 0, True, 'enter description:') + # Send Description user input, press ENTER key to complete + send_user_input_and_wait('test 2', 'Quit') + + # Set EFI image(initrddump.efi) + press_up_down_enter_and_wait(0, 1, True, 'Quit') + press_up_down_enter_and_wait(0, 0, True, 'host 0:1') + # Select 'host 0:1' + press_up_down_enter_and_wait(0, 0, True, 'Quit') + # Press down key to select "initrddump.efi" entry followed by the enter key + press_up_down_enter_and_wait(0, 2, True, 'Quit') + + # Set Initrd file(initrd-2.img) + press_up_down_enter_and_wait(0, 2, True, 'Quit') + press_up_down_enter_and_wait(0, 0, True, 'host 0:1') + # Select 'host 0:1' + press_up_down_enter_and_wait(0, 0, True, 'Quit') + # Press down key to select "initrd-2.img" entry followed by the enter key + press_up_down_enter_and_wait(0, 1, True, 'Quit') + + # Set optional_data + press_up_down_enter_and_wait(0, 3, True, 'Optional Data:') + # Send Description user input, press ENTER key to complete + send_user_input_and_wait('nocolor', None) + for i in ('Description: test 2', 'File: host 0:1/initrddump.efi', + 'Initrd File: host 0:1/initrd-2.img', 'Optional Data: nocolor', 'Save', 'Quit'): + u_boot_console.p.expect([i]) + + # Save the Boot Option + press_up_down_enter_and_wait(0, 4, True, 'Quit') + + # Change the Boot Order + press_up_down_enter_and_wait(0, 2, True, 'Quit') + press_up_down_enter_and_wait(0, 1, False, 'Quit') + # move 'test 1' to the second entry + u_boot_console.run_command(cmd='+', wait_for_prompt=False, + wait_for_echo=False, send_nl=False) + for i in ('test 2', 'test 1', 'host 0:1', 'Save', 'Quit'): + u_boot_console.p.expect([i]) + # Save the BootOrder + press_up_down_enter_and_wait(0, 3, True, None) + check_current_is_maintenance_menu() + + # Check the newly added Boot Option is handled correctly + # Return to U-Boot console + press_escape_key(True) + u_boot_console.run_command(cmd = 'bootefi bootmgr') + response = u_boot_console.run_command(cmd = 'load', wait_for_echo=False) + assert 'crc32: 0x811d3515' in response + u_boot_console.run_command(cmd = 'exit', wait_for_echo=False) + + # + # Test Case 5: Change BootOrder and load it + # + u_boot_console.run_command('eficonfig', wait_for_prompt=False) + + # Change the Boot Order + press_up_down_enter_and_wait(0, 2, True, None) + # Check the curren BootOrder + for i in ('test 2', 'test 1', 'host 0:1', 'Save', 'Quit'): + u_boot_console.p.expect([i]) + # move 'test 2' to the second entry + u_boot_console.run_command(cmd='-', wait_for_prompt=False, + wait_for_echo=False, send_nl=False) + for i in ('test 1', 'test 2', 'host 0:1', 'Save', 'Quit'): + u_boot_console.p.expect([i]) + # Save the BootOrder + press_up_down_enter_and_wait(0, 2, True, None) + check_current_is_maintenance_menu() + + # Return to U-Boot console + press_escape_key(True) + u_boot_console.run_command(cmd = 'bootefi bootmgr') + response = u_boot_console.run_command(cmd = 'load', wait_for_echo=False) + assert 'crc32: 0x181464af' in response + u_boot_console.run_command(cmd = 'exit', wait_for_echo=False) + + # + # Test Case 6: Delete Boot Option(label:test 2) + # + u_boot_console.run_command('eficonfig', wait_for_prompt=False) + + # Select 'Delete Boot Option' + press_up_down_enter_and_wait(0, 3, True, None) + # Check the current BootOrder + for i in ('test 1', 'test 2', 'Quit'): + u_boot_console.p.expect([i]) + + # Delete 'test 2' + press_up_down_enter_and_wait(0, 1, True, None) + for i in ('test 1', 'Quit'): + u_boot_console.p.expect([i]) + press_escape_key(False) + check_current_is_maintenance_menu() + # Return to U-Boot console + press_escape_key(True) + + # + # Test Case 7: Edit Boot Option + # + u_boot_console.run_command('eficonfig', wait_for_prompt=False) + # Select 'Edit Boot Option' + press_up_down_enter_and_wait(0, 1, True, None) + # Check the curren BootOrder + for i in ('test 1', 'Quit'): + u_boot_console.p.expect([i]) + press_up_down_enter_and_wait(0, 0, True, None) + for i in ('Description: test 1', 'File: host 0:1/initrddump.efi', + 'Initrd File: host 0:1/initrd-1.img', 'Optional Data: nocolor', 'Save', 'Quit'): + u_boot_console.p.expect([i]) + + # Press the enter key to select 'Description:' entry, then enter Description + press_up_down_enter_and_wait(0, 0, True, 'enter description:') + # Send Description user input, press ENTER key to complete + send_user_input_and_wait('test 3', 'Quit') + + # Set EFI image(initrddump.efi) + press_up_down_enter_and_wait(0, 1, True, 'Quit') + press_up_down_enter_and_wait(0, 0, True, 'host 0:1') + # Select 'host 0:1' + press_up_down_enter_and_wait(0, 0, True, 'Quit') + # Press down key to select "initrddump.efi" entry followed by the enter key + press_up_down_enter_and_wait(0, 2, True, 'Quit') + + # Set Initrd file(initrd-2.img) + press_up_down_enter_and_wait(0, 2, True, 'Quit') + press_up_down_enter_and_wait(0, 0, True, 'host 0:1') + # Select 'host 0:1' + press_up_down_enter_and_wait(0, 0, True, 'Quit') + # Press down key to select "initrd-1.img" entry followed by the enter key + press_up_down_enter_and_wait(0, 1, True, 'Quit') + + # Set optional_data + press_up_down_enter_and_wait(0, 3, True, 'Optional Data:') + # Send Description user input, press ENTER key to complete + send_user_input_and_wait('', None) + for i in ('Description: test 3', 'File: host 0:1/initrddump.efi', + 'Initrd File: host 0:1/initrd-2.img', 'Optional Data:', 'Save', 'Quit'): + u_boot_console.p.expect([i]) + + # Save the Boot Option + press_up_down_enter_and_wait(0, 4, True, 'Quit') + press_escape_key(False) + check_current_is_maintenance_menu() + + # Check the updated Boot Option is handled correctly + # Return to U-Boot console + press_escape_key(True) + u_boot_console.run_command(cmd = 'bootefi bootmgr') + response = u_boot_console.run_command(cmd = 'load', wait_for_echo=False) + assert 'crc32: 0x811d3515' in response + u_boot_console.run_command(cmd = 'exit', wait_for_echo=False) + + # + # Test Case 8: Delete Boot Option(label:test 3) + # + u_boot_console.run_command('eficonfig', wait_for_prompt=False) + + # Select 'Delete Boot Option' + press_up_down_enter_and_wait(0, 3, True, None) + # Check the curren BootOrder + for i in ('test 3', 'Quit'): + u_boot_console.p.expect([i]) + + # Delete 'test 3' + press_up_down_enter_and_wait(0, 0, True, 'Quit') + press_escape_key(False) + check_current_is_maintenance_menu() + # Return to U-Boot console + press_escape_key(True) + + # remove the host device + u_boot_console.run_command(cmd = f'host bind -r 0') + + # + # Test Case 9: No block device found + # + u_boot_console.run_command('eficonfig', wait_for_prompt=False) + + # Select 'Add Boot Option' + press_up_down_enter_and_wait(0, 0, True, 'Quit') + + # Set EFI image + press_up_down_enter_and_wait(0, 1, True, 'Quit') + press_up_down_enter_and_wait(0, 0, True, 'No block device found!') + press_escape_key(False) + check_current_is_maintenance_menu() + # Return to U-Boot console + press_escape_key(True) diff --git a/test/py/tests/test_fit_ecdsa.py b/test/py/tests/test_fit_ecdsa.py index 87b60812229..cc6c0c4dc42 100644 --- a/test/py/tests/test_fit_ecdsa.py +++ b/test/py/tests/test_fit_ecdsa.py @@ -10,6 +10,7 @@ signature is then extracted, and verified against pyCryptodome. This test doesn't run the sandbox. It only checks the host tool 'mkimage' """ +import os import pytest import u_boot_utils as util from Cryptodome.Hash import SHA256 @@ -84,7 +85,8 @@ def test_fit_ecdsa(u_boot_console): cons = u_boot_console mkimage = cons.config.build_dir + '/tools/mkimage' datadir = cons.config.source_dir + '/test/py/tests/vboot/' - tempdir = cons.config.result_dir + tempdir = os.path.join(cons.config.result_dir, 'ecdsa') + os.makedirs(tempdir, exist_ok=True) key_file = f'{tempdir}/ecdsa-test-key.pem' fit_file = f'{tempdir}/test.fit' dtc('sandbox-kernel.dts') diff --git a/test/py/tests/test_fit_hashes.py b/test/py/tests/test_fit_hashes.py index e228ea96d31..4891e77ca2d 100644 --- a/test/py/tests/test_fit_hashes.py +++ b/test/py/tests/test_fit_hashes.py @@ -10,6 +10,7 @@ output of a fixed data block with known good hashes. This test doesn't run the sandbox. It only checks the host tool 'mkimage' """ +import os import pytest import u_boot_utils as util @@ -93,7 +94,9 @@ def test_mkimage_hashes(u_boot_console): cons = u_boot_console mkimage = cons.config.build_dir + '/tools/mkimage' datadir = cons.config.source_dir + '/test/py/tests/vboot/' - tempdir = cons.config.result_dir + tempdir = os.path.join(cons.config.result_dir, 'hashes') + os.makedirs(tempdir, exist_ok=True) + fit_file = f'{tempdir}/test.fit' dtc('sandbox-kernel.dts') diff --git a/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py b/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py index 9eb00d6888f..527a556ed80 100644 --- a/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py +++ b/test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py @@ -105,6 +105,7 @@ def sqfs_run_all_ls_tests(u_boot_console): @pytest.mark.buildconfigspec('cmd_squashfs') @pytest.mark.buildconfigspec('fs_squashfs') @pytest.mark.requiredtool('mksquashfs') +@pytest.mark.singlethread def test_sqfs_ls(u_boot_console): """ Executes the sqfsls test suite. diff --git a/test/py/tests/test_gpio.py b/test/py/tests/test_gpio.py index fa0af5f82b2..0af186f2360 100644 --- a/test/py/tests/test_gpio.py +++ b/test/py/tests/test_gpio.py @@ -51,6 +51,7 @@ def test_gpio_exit_statuses(u_boot_console): def test_gpio_read(u_boot_console): """Test that gpio read correctly sets the variable to the value of a gpio pin.""" + u_boot_console.run_command('gpio clear 0') response = u_boot_console.run_command('gpio read var 0; echo val:$var,rc:$?') expected_response = 'val:0,rc:0' assert(expected_response in response) diff --git a/test/py/tests/test_gpt.py b/test/py/tests/test_gpt.py index f707d9f2534..cb44e1d7896 100644 --- a/test/py/tests/test_gpt.py +++ b/test/py/tests/test_gpt.py @@ -13,6 +13,9 @@ These tests rely on a 4 MB disk image, which is automatically created by the test. """ +# Mark all tests here as slow +pytestmark = pytest.mark.slow + class GptTestDiskImage(object): """Disk Image used by the GPT tests.""" diff --git a/test/py/tests/test_pinmux.py b/test/py/tests/test_pinmux.py index b3ae2ab0240..794994e12d1 100644 --- a/test/py/tests/test_pinmux.py +++ b/test/py/tests/test_pinmux.py @@ -68,6 +68,7 @@ def test_pinmux_dev(u_boot_console): def test_pinmux_status(u_boot_console): """Test that 'pinmux status' displays selected pincontroller's pin muxing descriptions.""" + u_boot_console.run_command('pinmux dev pinctrl') output = u_boot_console.run_command('pinmux status') assert (not 'pinctrl-gpio:' in output) diff --git a/test/py/tests/test_vboot.py b/test/py/tests/test_vboot.py index 040147d88b8..e3e7ca4b215 100644 --- a/test/py/tests/test_vboot.py +++ b/test/py/tests/test_vboot.py @@ -42,7 +42,7 @@ import vboot_evil # Only run the full suite on a few combinations, since it doesn't add any more # test coverage. -TESTDATA = [ +TESTDATA_IN = [ ['sha1-basic', 'sha1', '', None, False, True, False, False], ['sha1-pad', 'sha1', '', '-E -p 0x10000', False, False, False, False], ['sha1-pss', 'sha1', '-pss', None, False, False, False, False], @@ -60,6 +60,10 @@ TESTDATA = [ ['sha256-global-sign-pss', 'sha256', '-pss', '', False, False, False, True], ] +# Mark all but the first test as slow, so they are not run with '-k not slow' +TESTDATA = [TESTDATA_IN[0]] +TESTDATA += [pytest.param(*v, marks=pytest.mark.slow) for v in TESTDATA_IN[1:]] + @pytest.mark.boardspec('sandbox') @pytest.mark.buildconfigspec('fit_signature') @pytest.mark.requiredtool('dtc') @@ -13,25 +13,47 @@ run_test() { [ $? -ne 0 ] && failures=$((failures+1)) } -# SKip slow tests if requested -[ "$1" == "quick" ] && mark_expr="not slow" -[ "$1" == "quick" ] && skip=--skip-net-tests +# Select test attributes +ut_mark_expr=test_ut +if [ "$1" = "quick" ]; then + mark_expr="not slow" + ut_mark_expr="test_ut and not slow" + skip=--skip-net-tests +fi + [ "$1" == "tools" ] && tools_only=y +if [ "$1" = "parallel" ]; then + if ! echo 'import xdist' | python3 2>/dev/null; then + echo "Please install python3-pytest-xdist - see doc/develop/py_testing.rst" + exit 1 + fi + jobs="$(($(nproc) > 16 ? 16 : $(nproc)))" + para="-n${jobs} -q" + prompt="Building and..." + skip=--skip-net-tests + mark_expr="not slow and not bootstd and not spi_flash" + ut_mark_expr="test_ut and not slow and not bootstd and not spi_flash" + echo "Note: test log is garbled with parallel tests" +fi + failures=0 if [ -z "$tools_only" ]; then # Run all tests that the standard sandbox build can support - run_test "sandbox" ./test/py/test.py --bd sandbox --build \ - -m "${mark_expr}" + echo "${prompt}" + run_test "sandbox" ./test/py/test.py --bd sandbox --build ${para} \ + -k "${mark_expr}" fi # Run tests which require sandbox_spl -run_test "sandbox_spl" ./test/py/test.py --bd sandbox_spl --build \ +echo "${prompt}" +run_test "sandbox_spl" ./test/py/test.py --bd sandbox_spl --build ${para} \ -k 'test_ofplatdata or test_handoff or test_spl' # Run the sane tests with sandbox_noinst (i.e. without OF_PLATDATA_INST) -run_test "sandbox_spl" ./test/py/test.py --bd sandbox_noinst --build \ +echo "${prompt}" +run_test "sandbox_spl" ./test/py/test.py --bd sandbox_noinst --build ${para} \ -k 'test_ofplatdata or test_handoff or test_spl' if [ -z "$tools_only" ]; then @@ -39,8 +61,9 @@ if [ -z "$tools_only" ]; then # build which does not enable CONFIG_OF_LIVE for the live device tree, so we can # check that functionality is the same. The standard sandbox build (above) uses # CONFIG_OF_LIVE. + echo "${prompt}" run_test "sandbox_flattree" ./test/py/test.py --bd sandbox_flattree \ - --build -k test_ut + ${para} --build -k "${ut_mark_expr}" fi # Set up a path to dtc (device-tree compiler) and libfdt.py, a library it @@ -61,10 +84,14 @@ run_test "dtoc" ./tools/dtoc/dtoc -t # This needs you to set up Python test coverage tools. # To enable Python test coverage on Debian-type distributions (e.g. Ubuntu): # $ sudo apt-get install python-pytest python-coverage -export PATH=$PATH:${TOOLS_DIR} -run_test "binman code coverage" ./tools/binman/binman test -T -run_test "dtoc code coverage" ./tools/dtoc/dtoc -T -run_test "fdt code coverage" ./tools/dtoc/test_fdt -T + +# Code-coverage tests cannot run in parallel, so skip them in that case +if [ -z "${para}" ]; then + export PATH=$PATH:${TOOLS_DIR} + run_test "binman code coverage" ./tools/binman/binman test -T + run_test "dtoc code coverage" ./tools/dtoc/dtoc -T + run_test "fdt code coverage" ./tools/dtoc/test_fdt -T +fi if [ $failures == 0 ]; then echo "Tests passed!" diff --git a/test/test-main.c b/test/test-main.c index 31837e57a8f..ae34002a3d4 100644 --- a/test/test-main.c +++ b/test/test-main.c @@ -6,6 +6,7 @@ #include <common.h> #include <console.h> +#include <cyclic.h> #include <dm.h> #include <event.h> #include <dm/root.h> @@ -220,6 +221,7 @@ static int dm_test_restore(struct device_node *of_root) static int test_pre_run(struct unit_test_state *uts, struct unit_test *test) { ut_assertok(event_init()); + ut_assertok(cyclic_init()); if (test->flags & UT_TESTF_DM) ut_assertok(dm_test_pre_run(uts)); @@ -265,6 +267,7 @@ static int test_post_run(struct unit_test_state *uts, struct unit_test *test) ut_unsilence_console(uts); if (test->flags & UT_TESTF_DM) ut_assertok(dm_test_post_run(uts)); + ut_assertok(cyclic_uninit()); ut_assertok(event_uninit()); return 0; @@ -390,11 +393,17 @@ static int ut_run_tests(struct unit_test_state *uts, const char *prefix, for (test = tests; test < tests + count; test++) { const char *test_name = test->name; - int ret; + int ret, i, old_fail_count; if (!test_matches(prefix, test_name, select_name)) continue; - ret = ut_run_test_live_flat(uts, test, select_name); + old_fail_count = uts->fail_count; + for (i = 0; i < uts->runs_per_test; i++) + ret = ut_run_test_live_flat(uts, test, select_name); + if (uts->fail_count != old_fail_count) { + printf("Test %s failed %d times\n", select_name, + uts->fail_count - old_fail_count); + } found++; if (ret == -EAGAIN) continue; @@ -408,7 +417,8 @@ static int ut_run_tests(struct unit_test_state *uts, const char *prefix, } int ut_run_list(const char *category, const char *prefix, - struct unit_test *tests, int count, const char *select_name) + struct unit_test *tests, int count, const char *select_name, + int runs_per_test) { struct unit_test_state uts = { .fail_count = 0 }; bool has_dm_tests = false; @@ -432,6 +442,7 @@ int ut_run_list(const char *category, const char *prefix, printf("Running %d %s tests\n", count, category); uts.of_root = gd_of_root(); + uts.runs_per_test = runs_per_test; ret = ut_run_tests(&uts, prefix, tests, count, select_name); if (ret == -ENOENT) diff --git a/tools/dtoc/test_fdt.py b/tools/dtoc/test_fdt.py index 8a990b8bd77..a3e36ea363f 100755 --- a/tools/dtoc/test_fdt.py +++ b/tools/dtoc/test_fdt.py @@ -851,4 +851,3 @@ def main(): if __name__ == '__main__': sys.exit(main()) -sys.exit(1) |