diff options
Diffstat (limited to 'arch/arm/dts/imx6qdl-pico.dtsi')
| -rw-r--r-- | arch/arm/dts/imx6qdl-pico.dtsi | 226 |
1 files changed, 215 insertions, 11 deletions
diff --git a/arch/arm/dts/imx6qdl-pico.dtsi b/arch/arm/dts/imx6qdl-pico.dtsi index 50379d04b70..f7a56d6b160 100644 --- a/arch/arm/dts/imx6qdl-pico.dtsi +++ b/arch/arm/dts/imx6qdl-pico.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0 OR MIT // // Copyright 2018 Technexion Ltd. // @@ -9,11 +9,6 @@ #include <dt-bindings/gpio/gpio.h> / { - aliases { - mmc0 = &usdhc3; - usb0 = &usbotg; - }; - chosen { stdout-path = &uart1; }; @@ -42,6 +37,22 @@ regulator-always-on; }; + reg_1p5v: regulator-1p5v { + compatible = "regulator-fixed"; + regulator-name = "1P5V"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + }; + + reg_2p8v: regulator-2p8v { + compatible = "regulator-fixed"; + regulator-name = "2P8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + reg_usb_otg_vbus: regulator-usb-otg-vbus { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg_vbus>; @@ -51,6 +62,81 @@ regulator-max-microvolt = <5000000>; gpio = <&gpio3 22 GPIO_ACTIVE_LOW>; }; + + codec_osc: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + }; + + sound { + compatible = "fsl,imx-audio-sgtl5000"; + model = "imx6-pico-sgtl5000"; + ssi-controller = <&ssi1>; + audio-codec = <&sgtl5000>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + mux-int-port = <1>; + mux-ext-port = <3>; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm4 0 50000 0>; + brightness-levels = <0 36 72 108 144 180 216 255>; + default-brightness-level = <6>; + status = "okay"; + }; + + reg_lcd_3v3: regulator-lcd-3v3 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_lcd>; + regulator-name = "lcd-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + lcd_display: disp0 { + compatible = "fsl,imx-parallel-display"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ipu1>; + status = "okay"; + + port@0 { + reg = <0>; + + lcd_display_in: endpoint { + remote-endpoint = <&ipu1_di0_disp0>; + }; + }; + + port@1 { + reg = <1>; + + lcd_display_out: endpoint { + remote-endpoint = <&lcd_panel_in>; + }; + }; + }; + + panel { + compatible = "vxt,vl050-8048nt-c01"; + backlight = <&backlight>; + power-supply = <®_lcd_3v3>; + + port { + lcd_panel_in: endpoint { + remote-endpoint = <&lcd_display_out>; + }; + }; + }; }; &audmux { @@ -81,7 +167,7 @@ &ecspi2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi2>; - cs-gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; status = "okay"; }; @@ -90,7 +176,18 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; + phy-handle = <&phy>; status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy: ethernet-phy@1 { + reg = <1>; + qca,clk-out-frequency = <125000000>; + }; + }; }; &hdmi { @@ -102,6 +199,15 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; + + sgtl5000: audio-codec@a { + #sound-dai-cells = <0>; + reg = <0x0a>; + compatible = "fsl,sgtl5000"; + clocks = <&codec_osc>; + VDDA-supply = <®_2p5v>; + VDDIO-supply = <®_1p8v>; + }; }; &i2c2 { @@ -109,6 +215,40 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; + + touchscreen@38 { + compatible = "edt,edt-ft5x06"; + reg = <0x38>; + interrupt-parent = <&gpio5>; + interrupts = <31 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&gpio5 27 GPIO_ACTIVE_LOW>; + touchscreen-size-x = <800>; + touchscreen-size-y = <480>; + wakeup-source; + }; + + camera@3c { + compatible = "ovti,ov5645"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ov5645>; + reg = <0x3c>; + clocks = <&clks IMX6QDL_CLK_CKO2>; + clock-names = "xclk"; + clock-frequency = <24000000>; + vdddo-supply = <®_1p8v>; + vdda-supply = <®_2p8v>; + vddd-supply = <®_1p5v>; + enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + + port { + ov5645_to_mipi_csi2: endpoint { + remote-endpoint = <&mipi_csi2_in>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; }; &i2c3 { @@ -117,11 +257,28 @@ status = "okay"; }; +&ipu1_di0_disp0 { + remote-endpoint = <&lcd_display_in>; +}; + +&mipi_csi { + status = "okay"; + + port@0 { + reg = <0>; + + mipi_csi2_in: endpoint { + remote-endpoint = <&ov5645_to_mipi_csi2>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; +}; + &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie_reset>; reset-gpio = <&gpio5 21 GPIO_ACTIVE_LOW>; - status = "okay"; }; &pwm1 { @@ -161,14 +318,14 @@ &uart2 { /* Bluetooth module */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; - fsl,uart-has-rtscts; + uart-has-rtscts; status = "okay"; }; &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; - fsl,uart-has-rtscts; + uart-has-rtscts; status = "okay"; }; @@ -219,7 +376,6 @@ pinctrl_hog: hoggrp { fsl,pins = < MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x4001b0b5 /* PICO_P24 */ - MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x4001b0b5 /* PICO_P25 */ MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x4001b0b5 /* PICO_P26 */ MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x4001b0b5 /* PICO_P28 */ MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x4001b0b5 /* PICO_P30 */ @@ -316,6 +472,48 @@ >; }; + pinctrl_ipu1: ipu1grp { + fsl,pins = < + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 + MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x10 + MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 + MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 + MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 + MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 + MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 + MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 + MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 + MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 + MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 + MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 + MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 + MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 + MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 + MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 + MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 + MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 + MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 + MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 + MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 + MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 + MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 + MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 + MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 + MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 + >; + }; + + pinctrl_ov5645: ov5645grp { + fsl,pins = < + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x0b0b0 + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0b0b0 + MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x000b0 + >; + }; + pinctrl_pcie_reset: pciegrp { fsl,pins = < MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x130b0 @@ -346,6 +544,12 @@ >; }; + pinctrl_reg_lcd: reglcdgrp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 |