aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/dts/uniphier-ph1-ld11-ref.dts
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/dts/uniphier-ph1-ld11-ref.dts')
-rw-r--r--arch/arm/dts/uniphier-ph1-ld11-ref.dts69
1 files changed, 69 insertions, 0 deletions
diff --git a/arch/arm/dts/uniphier-ph1-ld11-ref.dts b/arch/arm/dts/uniphier-ph1-ld11-ref.dts
new file mode 100644
index 00000000000..a624a49314c
--- /dev/null
+++ b/arch/arm/dts/uniphier-ph1-ld11-ref.dts
@@ -0,0 +1,69 @@
+/*
+ * Device Tree Source for UniPhier PH1-LD11 Reference Board
+ *
+ * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+/dts-v1/;
+/include/ "uniphier-ph1-ld11.dtsi"
+/include/ "uniphier-support-card.dtsi"
+
+/ {
+ model = "UniPhier PH1-LD11 Reference Board";
+ compatible = "socionext,ph1-ld11-ref", "socionext,ph1-ld11";
+
+ memory {
+ device_type = "memory";
+ reg = <0 0x80000000 0 0x40000000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ };
+};
+
+&ethsc {
+ interrupts = <0 48 4>;
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+/* for U-Boot only */
+/ {
+ soc {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&serial0 {
+ u-boot,dm-pre-reloc;
+};
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&pinctrl_uart0 {
+ u-boot,dm-pre-reloc;
+};