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Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/cpu.h')
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/cpu.h24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
index 4db479140ea..20f96713871 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
@@ -35,17 +35,17 @@
#define CONFIG_SYS_FSL_QBMAN_SIZE 0x8000000
#define CONFIG_SYS_FSL_QBMAN_SIZE_1 0x4000000
#ifdef CONFIG_ARCH_LS2080A
-#define CONFIG_SYS_PCIE1_PHYS_SIZE 0x200000000
-#define CONFIG_SYS_PCIE2_PHYS_SIZE 0x200000000
-#define CONFIG_SYS_PCIE3_PHYS_SIZE 0x200000000
-#define CONFIG_SYS_PCIE4_PHYS_SIZE 0x200000000
+#define CFG_SYS_PCIE1_PHYS_SIZE 0x200000000
+#define CFG_SYS_PCIE2_PHYS_SIZE 0x200000000
+#define CFG_SYS_PCIE3_PHYS_SIZE 0x200000000
+#define CFG_SYS_PCIE4_PHYS_SIZE 0x200000000
#else
-#define CONFIG_SYS_PCIE1_PHYS_SIZE 0x800000000
-#define CONFIG_SYS_PCIE2_PHYS_SIZE 0x800000000
-#ifndef CONFIG_SYS_PCIE3_PHYS_SIZE
-#define CONFIG_SYS_PCIE3_PHYS_SIZE 0x800000000
+#define CFG_SYS_PCIE1_PHYS_SIZE 0x800000000
+#define CFG_SYS_PCIE2_PHYS_SIZE 0x800000000
+#ifndef CFG_SYS_PCIE3_PHYS_SIZE
+#define CFG_SYS_PCIE3_PHYS_SIZE 0x800000000
#endif
-#define CONFIG_SYS_PCIE4_PHYS_SIZE 0x800000000
+#define CFG_SYS_PCIE4_PHYS_SIZE 0x800000000
#define SYS_PCIE5_PHYS_SIZE 0x800000000
#define SYS_PCIE6_PHYS_SIZE 0x800000000
#endif
@@ -83,9 +83,9 @@
#define CONFIG_SYS_FSL_QBMAN_SIZE 0x10000000
#define CONFIG_SYS_FSL_DRAM_BASE2 0x880000000
#define CONFIG_SYS_FSL_DRAM_SIZE2 0x780000000 /* 30GB */
-#define CONFIG_SYS_PCIE1_PHYS_SIZE 0x800000000
-#define CONFIG_SYS_PCIE2_PHYS_SIZE 0x800000000
-#define CONFIG_SYS_PCIE3_PHYS_SIZE 0x800000000
+#define CFG_SYS_PCIE1_PHYS_SIZE 0x800000000
+#define CFG_SYS_PCIE2_PHYS_SIZE 0x800000000
+#define CFG_SYS_PCIE3_PHYS_SIZE 0x800000000
#define CONFIG_SYS_FSL_DRAM_BASE3 0x8800000000
#define CONFIG_SYS_FSL_DRAM_SIZE3 0x7800000000 /* 480GB */
#endif