diff options
Diffstat (limited to 'arch/arm/include/asm/arch-mx7')
-rw-r--r-- | arch/arm/include/asm/arch-mx7/crm_regs.h | 4 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-mx7/imx-regs.h | 2 |
2 files changed, 0 insertions, 6 deletions
diff --git a/arch/arm/include/asm/arch-mx7/crm_regs.h b/arch/arm/include/asm/arch-mx7/crm_regs.h index bfa68a9d2a0..bb2642d46c8 100644 --- a/arch/arm/include/asm/arch-mx7/crm_regs.h +++ b/arch/arm/include/asm/arch-mx7/crm_regs.h @@ -229,7 +229,6 @@ struct mxc_ccm_anatop_reg { #define ANADIG_PLL_ENET_PWDN_MASK (0x01 << 5) #define ANADIG_PLL_VIDEO_PWDN_MASK (0x01 << 12) - #define ANATOP_PFD480B_PFD4_FRAC_MASK 0x0000003f #define ANATOP_PFD480B_PFD4_FRAC_320M_VAL 0x0000001B #define ANATOP_PFD480B_PFD4_FRAC_392M_VAL 0x00000016 @@ -1784,7 +1783,6 @@ struct mxc_ccm_anatop_reg { #define PMU_LOWPWR_CTRL_TOG_CONTROL1_SHIFT 24 #define PMU_LOWPWR_CTRL_TOG_CONTROL1(x) (((uint32_t)(((uint32_t)(x))<<PMU_LOWPWR_CTRL_TOG_CONTROL1_SHIFT))&PMU_LOWPWR_CTRL_TOG_CONTROL1_MASK) - /* HW_ANADIG_TEMPSENSE0 Bit Fields */ #define TEMPMON_HW_ANADIG_TEMPSENSE0_LOW_ALARM_VALUE_MASK 0x1FFu #define TEMPMON_HW_ANADIG_TEMPSENSE0_LOW_ALARM_VALUE_SHIFT 0 @@ -1998,7 +1996,6 @@ struct mxc_ccm_anatop_reg { #define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR_SHIFT 29 #define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR(x) (((uint32_t)(((uint32_t)(x))<<TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR_SHIFT))&TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR_MASK) - #define CCM_GPR(i) (CCM_BASE_ADDR + CCM_GPR0_OFFSET + 0x10 * (i)) #define CCM_OBSERVE(i) (CCM_BASE_ADDR + CCM_OBSERVE0_OFFSET + 0x10 * (i)) #define CCM_SCTRL(i) (CCM_BASE_ADDR + CCM_SCTRL0_OFFSET + 0x10 * (i)) @@ -2091,7 +2088,6 @@ struct mxc_ccm_anatop_reg { #define CLK_ROOT_ALT6 0x06000000 #define CLK_ROOT_ALT7 0x07000000 - #define DRAM_CLK_ROOT_POST_DIV_MASK 0x00000007 #define CLK_ROOT_POST_DIV_MASK 0x0000003f #define CLK_ROOT_POST_DIV_SHIFT 0 diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h index 6f5ae5173c0..849c5482241 100644 --- a/arch/arm/include/asm/arch-mx7/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7/imx-regs.h @@ -71,7 +71,6 @@ #define GLOBAL_TIMER_BASE_ADDR (ARM_PERIPHBASE + 0x0200) #define PRIVATE_TIMERS_WD_BASE_ADDR (ARM_PERIPHBASE + 0x0600) - /* Defines for Blocks connected via AIPS (SkyBlue) */ #define AIPS_TZ1_BASE_ADDR AIPS1_ARB_BASE_ADDR #define AIPS_TZ2_BASE_ADDR AIPS2_ARB_BASE_ADDR @@ -1162,7 +1161,6 @@ struct rdc_sema_regs { #define LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT_MASK 0x3ffff #define LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT_OFFSET 0 - extern void check_cpu_temperature(void); extern void pcie_power_up(void); |