4 files changed, 117 insertions, 0 deletions
diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig
new file mode 100644
index 00000000000..d2e76f4afc6
--- /dev/null
+++ b/arch/arm/mach-versatile/Kconfig
@@ -0,0 +1,15 @@
+if ARCH_VERSATILE
+
+config SYS_BOARD
+	default "versatile"
+
+config SYS_VENDOR
+	default "armltd"
+
+config SYS_SOC
+	default "versatile"
+
+config SYS_CONFIG_NAME
+	default "versatile"
+
+endif
diff --git a/arch/arm/mach-versatile/Makefile b/arch/arm/mach-versatile/Makefile
new file mode 100644
index 00000000000..907f5161a8e
--- /dev/null
+++ b/arch/arm/mach-versatile/Makefile
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	= timer.o
+obj-y	+= reset.o
diff --git a/arch/arm/mach-versatile/reset.S b/arch/arm/mach-versatile/reset.S
new file mode 100644
index 00000000000..1c557b0d910
--- /dev/null
+++ b/arch/arm/mach-versatile/reset.S
@@ -0,0 +1,29 @@
+/*
+ *  armboot - Startup Code for ARM926EJS CPU-core
+ *
+ *  Copyright (c) 2003  Texas Instruments
+ *
+ *  ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
+ *
+ *  Copyright (c) 2001	Marius Gröger <mag@sysgo.de>
+ *  Copyright (c) 2002	Alex Züpke <azu@sysgo.de>
+ *  Copyright (c) 2002	Gary Jennejohn <garyj@denx.de>
+ *  Copyright (c) 2003	Richard Woodruff <r-woodruff2@ti.com>
+ *  Copyright (c) 2003	Kshitij <kshitij@ti.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+	.align	5
+.globl reset_cpu
+reset_cpu:
+	ldr	r1, rstctl1	/* get clkm1 reset ctl */
+	mov	r3, #0x0
+	strh	r3, [r1]	/* clear it */
+	mov	r3, #0x8
+	strh	r3, [r1]	/* force dsp+arm reset */
+_loop_forever:
+	b	_loop_forever
+
+rstctl1:
+	.word	0xfffece10
diff --git a/arch/arm/mach-versatile/timer.c b/arch/arm/mach-versatile/timer.c
new file mode 100644
index 00000000000..5d694d85ef6
--- /dev/null
+++ b/arch/arm/mach-versatile/timer.c
@@ -0,0 +1,64 @@
+/*
+ * (C) Copyright 2003
+ * Texas Instruments <www.ti.com>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Alex Zuepke <azu@sysgo.de>
+ *
+ * (C) Copyright 2002-2004
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+ *
+ * (C) Copyright 2004
+ * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+
+#define TIMER_ENABLE	(1 << 7)
+#define TIMER_MODE_MSK	(1 << 6)
+#define TIMER_MODE_FR	(0 << 6)
+#define TIMER_MODE_PD	(1 << 6)
+
+#define TIMER_INT_EN	(1 << 5)
+#define TIMER_PRS_MSK	(3 << 2)
+#define TIMER_PRS_8S	(1 << 3)
+#define TIMER_SIZE_MSK	(1 << 2)
+#define TIMER_ONE_SHT	(1 << 0)
+
+int timer_init (void)
+{
+	ulong	tmr_ctrl_val;
+
+	/* 1st disable the Timer */
+	tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8);
+	tmr_ctrl_val &= ~TIMER_ENABLE;
+	*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
+
+	/*
+	 * The Timer Control Register has one Undefined/Shouldn't Use Bit
+	 * So we should do read/modify/write Operation
+	 */
+
+	/*
+	 * Timer Mode : Free Running
+	 * Interrupt : Disabled
+	 * Prescale : 8 Stage, Clk/256
+	 * Tmr Siz : 16 Bit Counter
+	 * Tmr in Wrapping Mode
+	 */
+	tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8);
+	tmr_ctrl_val &= ~(TIMER_MODE_MSK | TIMER_INT_EN | TIMER_PRS_MSK | TIMER_SIZE_MSK | TIMER_ONE_SHT );
+	tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S);
+
+	*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
+
+	return 0;
+}
+