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-rw-r--r--arch/arm/config.mk11
-rw-r--r--arch/arm/cpu/arm1136/config.mk1
-rw-r--r--arch/arm/cpu/arm1176/config.mk1
-rw-r--r--arch/arm/cpu/arm720t/config.mk2
-rw-r--r--arch/arm/cpu/arm920t/config.mk2
-rw-r--r--arch/arm/cpu/arm925t/config.mk2
-rw-r--r--arch/arm/cpu/arm926ejs/config.mk2
-rw-r--r--arch/arm/cpu/arm946es/config.mk2
-rw-r--r--arch/arm/cpu/arm_intcm/config.mk2
-rw-r--r--arch/arm/cpu/armv7/config.mk1
-rw-r--r--arch/arm/cpu/armv7/lowlevel_init.S4
-rw-r--r--arch/arm/cpu/armv7/rmobile/config.mk1
-rw-r--r--arch/arm/cpu/armv7/zynq/timer.c2
-rw-r--r--arch/arm/cpu/ixp/config.mk2
-rw-r--r--arch/arm/cpu/pxa/config.mk2
-rw-r--r--arch/arm/cpu/sa1100/config.mk2
-rw-r--r--arch/arm/include/asm/global_data.h2
-rw-r--r--arch/arm/lib/crt0.S16
-rw-r--r--arch/arm/lib/relocate.S6
19 files changed, 24 insertions, 39 deletions
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index ce3903ba9f5..d0cf43ff417 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -16,7 +16,8 @@ endif
endif
LDFLAGS_FINAL += --gc-sections
-PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
+PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \
+ -fno-common -ffixed-r9 -msoft-float
# Support generic board on ARM
__HAVE_ARCH_GENERIC_BOARD := y
@@ -94,7 +95,11 @@ PLATFORM_RELFLAGS += -fno-optimize-sibling-calls
endif
endif
-# check that only R_ARM_RELATIVE relocations are generated
ifneq ($(CONFIG_SPL_BUILD),y)
-ALL-y += checkarmreloc
+# Check that only R_ARM_RELATIVE relocations are generated.
+ALL-y += checkarmreloc
+# The movt / movw can hardcode 16 bit parts of the addresses in the
+# instruction. Relocation is not supported for that case, so disable
+# such usage by requiring word relocations.
+PLATFORM_CPPFLAGS += $(call cc-option, -mword-relocations)
endif
diff --git a/arch/arm/cpu/arm1136/config.mk b/arch/arm/cpu/arm1136/config.mk
index 1ef60613657..b4d396de841 100644
--- a/arch/arm/cpu/arm1136/config.mk
+++ b/arch/arm/cpu/arm1136/config.mk
@@ -4,7 +4,6 @@
#
# SPDX-License-Identifier: GPL-2.0+
#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
# Make ARMv5 to allow more compilers to work, even though its v6.
PLATFORM_CPPFLAGS += -march=armv5
diff --git a/arch/arm/cpu/arm1176/config.mk b/arch/arm/cpu/arm1176/config.mk
index 917da030d6c..f4631cb777a 100644
--- a/arch/arm/cpu/arm1176/config.mk
+++ b/arch/arm/cpu/arm1176/config.mk
@@ -4,7 +4,6 @@
#
# SPDX-License-Identifier: GPL-2.0+
#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
# Make ARMv5 to allow more compilers to work, even though its v6.
PLATFORM_CPPFLAGS += -march=armv5t
diff --git a/arch/arm/cpu/arm720t/config.mk b/arch/arm/cpu/arm720t/config.mk
index 56b6280d5ab..2581f0ae67c 100644
--- a/arch/arm/cpu/arm720t/config.mk
+++ b/arch/arm/cpu/arm720t/config.mk
@@ -6,8 +6,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
-
PLATFORM_CPPFLAGS += -march=armv4 -mtune=arm7tdmi
# =========================================================================
#
diff --git a/arch/arm/cpu/arm920t/config.mk b/arch/arm/cpu/arm920t/config.mk
index 58fd756586f..67537dcedc9 100644
--- a/arch/arm/cpu/arm920t/config.mk
+++ b/arch/arm/cpu/arm920t/config.mk
@@ -5,8 +5,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
-
PLATFORM_CPPFLAGS += -march=armv4
# =========================================================================
#
diff --git a/arch/arm/cpu/arm925t/config.mk b/arch/arm/cpu/arm925t/config.mk
index 58fd756586f..67537dcedc9 100644
--- a/arch/arm/cpu/arm925t/config.mk
+++ b/arch/arm/cpu/arm925t/config.mk
@@ -5,8 +5,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
-
PLATFORM_CPPFLAGS += -march=armv4
# =========================================================================
#
diff --git a/arch/arm/cpu/arm926ejs/config.mk b/arch/arm/cpu/arm926ejs/config.mk
index 917ff7edec6..12b0d09d372 100644
--- a/arch/arm/cpu/arm926ejs/config.mk
+++ b/arch/arm/cpu/arm926ejs/config.mk
@@ -5,8 +5,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
-
PLATFORM_CPPFLAGS += -march=armv5te
# =========================================================================
#
diff --git a/arch/arm/cpu/arm946es/config.mk b/arch/arm/cpu/arm946es/config.mk
index 1e41c116866..eb81a5708df 100644
--- a/arch/arm/cpu/arm946es/config.mk
+++ b/arch/arm/cpu/arm946es/config.mk
@@ -5,8 +5,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
-
PLATFORM_CPPFLAGS += -march=armv4
# =========================================================================
#
diff --git a/arch/arm/cpu/arm_intcm/config.mk b/arch/arm/cpu/arm_intcm/config.mk
index 1e41c116866..eb81a5708df 100644
--- a/arch/arm/cpu/arm_intcm/config.mk
+++ b/arch/arm/cpu/arm_intcm/config.mk
@@ -5,8 +5,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
-
PLATFORM_CPPFLAGS += -march=armv4
# =========================================================================
#
diff --git a/arch/arm/cpu/armv7/config.mk b/arch/arm/cpu/armv7/config.mk
index ca4a9e72c09..f0d9c043271 100644
--- a/arch/arm/cpu/armv7/config.mk
+++ b/arch/arm/cpu/armv7/config.mk
@@ -4,7 +4,6 @@
#
# SPDX-License-Identifier: GPL-2.0+
#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
# If armv7-a is not supported by GCC fall-back to armv5, which is
# supported by more tool-chains
diff --git a/arch/arm/cpu/armv7/lowlevel_init.S b/arch/arm/cpu/armv7/lowlevel_init.S
index 82b2b86520e..69e3053a426 100644
--- a/arch/arm/cpu/armv7/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/lowlevel_init.S
@@ -22,11 +22,11 @@ ENTRY(lowlevel_init)
ldr sp, =CONFIG_SYS_INIT_SP_ADDR
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
#ifdef CONFIG_SPL_BUILD
- ldr r8, =gdata
+ ldr r9, =gdata
#else
sub sp, #GD_SIZE
bic sp, sp, #7
- mov r8, sp
+ mov r9, sp
#endif
/*
* Save the old lr(passed in ip) and the current lr to stack
diff --git a/arch/arm/cpu/armv7/rmobile/config.mk b/arch/arm/cpu/armv7/rmobile/config.mk
index 4f016108680..3a36ab65e12 100644
--- a/arch/arm/cpu/armv7/rmobile/config.mk
+++ b/arch/arm/cpu/armv7/rmobile/config.mk
@@ -4,7 +4,6 @@
#
# SPDX-License-Identifier: GPL-2.0+
#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
# Make ARMv5 to allow more compilers to work, even though its v7a.
PLATFORM_CPPFLAGS += -march=armv5
diff --git a/arch/arm/cpu/armv7/zynq/timer.c b/arch/arm/cpu/armv7/zynq/timer.c
index 0133565299f..3b8d9497a0d 100644
--- a/arch/arm/cpu/armv7/zynq/timer.c
+++ b/arch/arm/cpu/armv7/zynq/timer.c
@@ -57,7 +57,7 @@ int timer_init(void)
SCUTIMER_CONTROL_ENABLE_MASK;
/* Load the timer counter register */
- writel(0xFFFFFFFF, &timer_base->counter);
+ writel(0xFFFFFFFF, &timer_base->load);
/*
* Start the A9Timer device
diff --git a/arch/arm/cpu/ixp/config.mk b/arch/arm/cpu/ixp/config.mk
index 0f12f8b1c75..fd47c60939a 100644
--- a/arch/arm/cpu/ixp/config.mk
+++ b/arch/arm/cpu/ixp/config.mk
@@ -8,7 +8,7 @@
BIG_ENDIAN = y
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float -mbig-endian
+PLATFORM_RELFLAGS += -mbig-endian
PLATFORM_CPPFLAGS += -mbig-endian -march=armv5te -mtune=strongarm1100
diff --git a/arch/arm/cpu/pxa/config.mk b/arch/arm/cpu/pxa/config.mk
index 535bca3e9f0..d8d263d404d 100644
--- a/arch/arm/cpu/pxa/config.mk
+++ b/arch/arm/cpu/pxa/config.mk
@@ -6,8 +6,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
-
PLATFORM_CPPFLAGS += -mcpu=xscale
# =========================================================================
#
diff --git a/arch/arm/cpu/sa1100/config.mk b/arch/arm/cpu/sa1100/config.mk
index 576f685c58d..b3026cc50da 100644
--- a/arch/arm/cpu/sa1100/config.mk
+++ b/arch/arm/cpu/sa1100/config.mk
@@ -6,8 +6,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
-
PLATFORM_CPPFLAGS += -march=armv4 -mtune=strongarm1100
# =========================================================================
#
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index 79a95974194..e126436093d 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -47,6 +47,6 @@ struct arch_global_data {
#include <asm-generic/global_data.h>
-#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r8")
+#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9")
#endif /* __ASM_GBL_DATA_H */
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 960d12e7327..ac54b9359ae 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -69,7 +69,7 @@ ENTRY(_main)
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
sub sp, #GD_SIZE /* allocate one GD above SP */
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
- mov r8, sp /* GD is above SP */
+ mov r9, sp /* GD is above SP */
mov r0, #0
bl board_init_f
@@ -81,15 +81,15 @@ ENTRY(_main)
* 'here' but relocated.
*/
- ldr sp, [r8, #GD_START_ADDR_SP] /* sp = gd->start_addr_sp */
+ ldr sp, [r9, #GD_START_ADDR_SP] /* sp = gd->start_addr_sp */
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
- ldr r8, [r8, #GD_BD] /* r8 = gd->bd */
- sub r8, r8, #GD_SIZE /* new GD is below bd */
+ ldr r9, [r9, #GD_BD] /* r9 = gd->bd */
+ sub r9, r9, #GD_SIZE /* new GD is below bd */
adr lr, here
- ldr r0, [r8, #GD_RELOC_OFF] /* r0 = gd->reloc_off */
+ ldr r0, [r9, #GD_RELOC_OFF] /* r0 = gd->reloc_off */
add lr, lr, r0
- ldr r0, [r8, #GD_RELOCADDR] /* r0 = gd->relocaddr */
+ ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
b relocate_code
here:
@@ -111,8 +111,8 @@ clbss_l:cmp r0, r1 /* while not at end of BSS */
bl red_led_on
/* call board_init_r(gd_t *id, ulong dest_addr) */
- mov r0, r8 /* gd_t */
- ldr r1, [r8, #GD_RELOCADDR] /* dest_addr */
+ mov r0, r9 /* gd_t */
+ ldr r1, [r9, #GD_RELOCADDR] /* dest_addr */
/* call board_init_r */
ldr pc, =board_init_r /* this is auto-relocated! */
diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S
index ab90430dced..a62a5565612 100644
--- a/arch/arm/lib/relocate.S
+++ b/arch/arm/lib/relocate.S
@@ -22,7 +22,7 @@
ENTRY(relocate_code)
ldr r1, =__image_copy_start /* r1 <- SRC &__image_copy_start */
- subs r9, r0, r1 /* r9 <- relocation offset */
+ subs r4, r0, r1 /* r4 <- relocation offset */
beq relocate_done /* skip relocation */
ldr r2, =__image_copy_end /* r2 <- SRC &__image_copy_end */
@@ -44,9 +44,9 @@ fixloop:
bne fixnext
/* relative fix: increase location by offset */
- add r0, r0, r9
+ add r0, r0, r4
ldr r1, [r0]
- add r1, r1, r9
+ add r1, r1, r4
str r1, [r0]
fixnext:
cmp r2, r3
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-11 08:01:32 +0000