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-rw-r--r--arch/arm/dts/Makefile1
-rw-r--r--arch/arm/dts/versal-mini.dts36
2 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c61c0c62002..2bbe47d8a2c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -187,6 +187,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-zc1751-xm018-dc4.dtb \
zynqmp-zc1751-xm019-dc5.dtb
dtb-$(CONFIG_ARCH_VERSAL) += \
+ versal-mini.dtb \
versal-mini-emmc0.dtb \
versal-mini-emmc1.dtb
dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \
diff --git a/arch/arm/dts/versal-mini.dts b/arch/arm/dts/versal-mini.dts
new file mode 100644
index 00000000000..6a83981cc2a
--- /dev/null
+++ b/arch/arm/dts/versal-mini.dts
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal Mini Configuration
+ *
+ * (C) Copyright 2019, Xilinx, Inc.
+ *
+ * Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
+ */
+
+/dts-v1/;
+
+/ {
+ model = "Versal MINI";
+ compatible = "xlnx,versal";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &dcc;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0xfffc0000 0x0 0x40000>, <0x0 0x0 0x0 0x80000000>;
+ };
+
+ dcc: dcc {
+ compatible = "arm,dcc";
+ status = "okay";
+ u-boot,dm-pre-reloc;
+ };
+};