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-rw-r--r--board/avionic-design/tec-ng/Makefile4
-rw-r--r--board/avionic-design/tec-ng/tec-ng-spl.c34
2 files changed, 37 insertions, 1 deletions
diff --git a/board/avionic-design/tec-ng/Makefile b/board/avionic-design/tec-ng/Makefile
index 46df14d991c..d6890e5797f 100644
--- a/board/avionic-design/tec-ng/Makefile
+++ b/board/avionic-design/tec-ng/Makefile
@@ -3,4 +3,6 @@
# (C) Copyright 2013
# Avionic Design GmbH <www.avionic-design.de>
-obj-y := ../common/tamonten-ng.o
+obj-$(CONFIG_SPL_BUILD) += tec-ng-spl.o
+
+obj-y += ../common/tamonten-ng.o
diff --git a/board/avionic-design/tec-ng/tec-ng-spl.c b/board/avionic-design/tec-ng/tec-ng-spl.c
new file mode 100644
index 00000000000..6e544641833
--- /dev/null
+++ b/board/avionic-design/tec-ng/tec-ng-spl.c
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2010-2013
+ * NVIDIA Corporation <www.nvidia.com>
+ *
+ * (C) Copyright 2021
+ * Svyatoslav Ryhel <clamor95@gmail.com>
+ */
+
+#include <common.h>
+#include <asm/arch-tegra/tegra_i2c.h>
+#include <linux/delay.h>
+
+/* I2C addr is in 8 bit */
+#define TPS65911_I2C_ADDR 0x5A
+#define TPS65911_VDDCTRL_OP_REG 0x28
+#define TPS65911_VDDCTRL_SR_REG 0x27
+#define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG)
+#define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG)
+
+void pmic_enable_cpu_vdd(void)
+{
+ /*
+ * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus.
+ * First set VDD to 1.0125V, then enable the VDD regulator.
+ */
+ udelay(1000);
+ tegra_i2c_ll_write(TPS65911_I2C_ADDR,
+ TPS65911_VDDCTRL_OP_DATA);
+ udelay(1000);
+ tegra_i2c_ll_write(TPS65911_I2C_ADDR,
+ TPS65911_VDDCTRL_SR_DATA);
+ udelay(10 * 1000);
+}