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Diffstat (limited to 'doc/board/ti/am62x_sk.rst')
| -rw-r--r-- | doc/board/ti/am62x_sk.rst | 68 |
1 files changed, 1 insertions, 67 deletions
diff --git a/doc/board/ti/am62x_sk.rst b/doc/board/ti/am62x_sk.rst index 0a3bbdfaf02..dd697e70915 100644 --- a/doc/board/ti/am62x_sk.rst +++ b/doc/board/ti/am62x_sk.rst @@ -42,73 +42,7 @@ Boot Flow: ---------- Below is the pictorial representation of boot flow: -.. code-block:: text - - +------------------------------------------------------------------------+ - | TIFS | Main R5 | A53 | - +------------------------------------------------------------------------+ - | +--------+ | | | - | | Reset | | | | - | +--------+ | | | - | : | | | - | +--------+ | +-----------+ | | - | | *ROM* |----------|-->| Reset rls | | | - | +--------+ | +-----------+ | | - | | | | : | | - | | ROM | | : | | - | |services| | : | | - | | | | +-------------+ | | - | | | | | *R5 ROM* | | | - | | | | +-------------+ | | - | | |<---------|---|Load and auth| | | - | | | | | tiboot3.bin | | | - | +--------+ | +-------------+ | | - | | |<---------|---| Load sysfw | | | - | | | | | part to TIFS| | | - | | | | | core | | | - | | | | +-------------+ | | - | | | | : | | - | | | | : | | - | | | | : | | - | | | | +-------------+ | | - | | | | | *R5 SPL* | | | - | | | | +-------------+ | | - | | | | | DDR | | | - | | | | | config | | | - | | | | +-------------+ | | - | | | | | Load | | | - | | | | | tispl.bin | | | - | | | | +-------------+ | | - | | | | | Load R5 | | | - | | | | | firmware | | | - | | | | +-------------+ | | - | | |<---------|---| Start A53 | | | - | | | | | and jump to | | | - | | | | | DM fw image | | | - | | | | +-------------+ | | - | | | | | +-----------+ | - | | |----------|-----------------------|---->| Reset rls | | - | | | | | +-----------+ | - | | TIFS | | | : | - | |Services| | | +-------------+ | - | | |<---------|-----------------------|---->|*TF-A/OP-TEE*| | - | | | | | +-------------+ | - | | | | | : | - | | | | | +-----------+ | - | | |<---------|-----------------------|---->| *A53 SPL* | | - | | | | | +-----------+ | - | | | | | | Load | | - | | | | | | u-boot.img| | - | | | | | +-----------+ | - | | | | | : | - | | | | | +-----------+ | - | | |<---------|-----------------------|---->| *U-Boot* | | - | | | | | +-----------+ | - | | | | | | prompt | | - | | |----------|-----------------------|-----+-----------+-----| - | +--------+ | | | - | | | | - +------------------------------------------------------------------------+ +.. image:: img/boot_diagram_k3_current.svg - Here TIFS acts as master and provides all the critical services. R5/A53 requests TIFS to get these services done as shown in the above diagram. |