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-rw-r--r--drivers/adc/Kconfig8
-rw-r--r--drivers/adc/Makefile1
-rw-r--r--drivers/adc/imx93-adc.c290
-rw-r--r--drivers/clk/imx/clk-imx8mp.c3
-rw-r--r--drivers/misc/Kconfig4
-rw-r--r--drivers/misc/Makefile2
-rw-r--r--drivers/misc/imx8/scu_api.c78
-rw-r--r--drivers/misc/imx_ele/Makefile (renamed from drivers/misc/sentinel/Makefile)2
-rw-r--r--drivers/misc/imx_ele/ele_api.c (renamed from drivers/misc/sentinel/s400_api.c)333
-rw-r--r--drivers/misc/imx_ele/ele_mu.c (renamed from drivers/misc/sentinel/s4mu.c)38
-rw-r--r--drivers/misc/imx_ele/fuse.c (renamed from drivers/misc/sentinel/fuse.c)40
-rw-r--r--drivers/mtd/nand/raw/pxa3xx_nand.c20
-rw-r--r--drivers/power/domain/imx8-power-domain-legacy.c9
-rw-r--r--drivers/power/domain/imx8m-power-domain.c3
-rw-r--r--drivers/serial/serial_pl01x.c16
15 files changed, 696 insertions, 151 deletions
diff --git a/drivers/adc/Kconfig b/drivers/adc/Kconfig
index e719c38bb31..4336732dee5 100644
--- a/drivers/adc/Kconfig
+++ b/drivers/adc/Kconfig
@@ -63,3 +63,11 @@ config STM32_ADC
- core driver to deal with common resources
- child driver to deal with individual ADC resources (declare ADC
device and associated channels, start/stop conversions)
+
+config ADC_IMX93
+ bool "Enable NXP IMX93 ADC driver"
+ help
+ This enables basic driver for NXP IMX93 ADC.
+ It provides:
+ - 4 analog input channels
+ - 12-bit resolution
diff --git a/drivers/adc/Makefile b/drivers/adc/Makefile
index c1387f3a346..5336c820973 100644
--- a/drivers/adc/Makefile
+++ b/drivers/adc/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_ADC_SANDBOX) += sandbox.o
obj-$(CONFIG_SARADC_ROCKCHIP) += rockchip-saradc.o
obj-$(CONFIG_SARADC_MESON) += meson-saradc.o
obj-$(CONFIG_STM32_ADC) += stm32-adc.o stm32-adc-core.o
+obj-$(CONFIG_ADC_IMX93) += imx93-adc.o
diff --git a/drivers/adc/imx93-adc.c b/drivers/adc/imx93-adc.c
new file mode 100644
index 00000000000..41d04e0426c
--- /dev/null
+++ b/drivers/adc/imx93-adc.c
@@ -0,0 +1,290 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 ASEM Srl
+ * Author: Luca Ellero <l.ellero@asem.it>
+ *
+ * Originally based on NXP linux-imx kernel v5.15 drivers/iio/adc/imx93_adc.c
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <dm.h>
+#include <linux/bitfield.h>
+#include <linux/iopoll.h>
+#include <clk.h>
+#include <adc.h>
+
+#define IMX93_ADC_MCR 0x00
+#define IMX93_ADC_MSR 0x04
+#define IMX93_ADC_ISR 0x10
+#define IMX93_ADC_IMR 0x20
+#define IMX93_ADC_CIMR0 0x24
+#define IMX93_ADC_CTR0 0x94
+#define IMX93_ADC_NCMR0 0xA4
+#define IMX93_ADC_PCDR0 0x100
+#define IMX93_ADC_PCDR1 0x104
+#define IMX93_ADC_PCDR2 0x108
+#define IMX93_ADC_PCDR3 0x10c
+#define IMX93_ADC_PCDR4 0x110
+#define IMX93_ADC_PCDR5 0x114
+#define IMX93_ADC_PCDR6 0x118
+#define IMX93_ADC_PCDR7 0x11c
+#define IMX93_ADC_CALSTAT 0x39C
+
+#define IMX93_ADC_MCR_MODE_MASK BIT(29)
+#define IMX93_ADC_MCR_NSTART_MASK BIT(24)
+#define IMX93_ADC_MCR_CALSTART_MASK BIT(14)
+#define IMX93_ADC_MCR_ADCLKSE_MASK BIT(8)
+#define IMX93_ADC_MCR_PWDN_MASK BIT(0)
+
+#define IMX93_ADC_MSR_CALFAIL_MASK BIT(30)
+#define IMX93_ADC_MSR_CALBUSY_MASK BIT(29)
+#define IMX93_ADC_MSR_ADCSTATUS_MASK GENMASK(2, 0)
+
+#define IMX93_ADC_ISR_EOC_MASK BIT(1)
+
+#define IMX93_ADC_IMR_EOC_MASK BIT(1)
+#define IMX93_ADC_IMR_ECH_MASK BIT(0)
+
+#define IMX93_ADC_PCDR_CDATA_MASK GENMASK(11, 0)
+
+#define IDLE 0
+#define POWER_DOWN 1
+#define WAIT_STATE 2
+#define BUSY_IN_CALIBRATION 3
+#define SAMPLE 4
+#define CONVERSION 6
+
+#define IMX93_ADC_MAX_CHANNEL 3
+#define IMX93_ADC_DAT_MASK 0xfff
+#define IMX93_ADC_TIMEOUT 100000
+
+struct imx93_adc_priv {
+ int active_channel;
+ void __iomem *regs;
+ struct clk ipg_clk;
+};
+
+static void imx93_adc_power_down(struct imx93_adc_priv *adc)
+{
+ u32 mcr, msr;
+ int ret;
+
+ mcr = readl(adc->regs + IMX93_ADC_MCR);
+ mcr |= FIELD_PREP(IMX93_ADC_MCR_PWDN_MASK, 1);
+ writel(mcr, adc->regs + IMX93_ADC_MCR);
+
+ ret = readl_poll_timeout(adc->regs + IMX93_ADC_MSR, msr,
+ ((msr & IMX93_ADC_MSR_ADCSTATUS_MASK) == POWER_DOWN), 50);
+ if (ret == -ETIMEDOUT)
+ pr_warn("ADC not in power down mode, current MSR: %x\n", msr);
+}
+
+static void imx93_adc_power_up(struct imx93_adc_priv *adc)
+{
+ u32 mcr;
+
+ /* bring ADC out of power down state, in idle state */
+ mcr = readl(adc->regs + IMX93_ADC_MCR);
+ mcr &= ~FIELD_PREP(IMX93_ADC_MCR_PWDN_MASK, 1);
+ writel(mcr, adc->regs + IMX93_ADC_MCR);
+}
+
+static void imx93_adc_config_ad_clk(struct imx93_adc_priv *adc)
+{
+ u32 mcr;
+
+ /* put adc in power down mode */
+ imx93_adc_power_down(adc);
+
+ /* config the AD_CLK equal to bus clock */
+ mcr = readl(adc->regs + IMX93_ADC_MCR);
+ mcr |= FIELD_PREP(IMX93_ADC_MCR_ADCLKSE_MASK, 1);
+ writel(mcr, adc->regs + IMX93_ADC_MCR);
+
+ /* bring ADC out of power down state, in idle state */
+ imx93_adc_power_up(adc);
+}
+
+static int imx93_adc_calibration(struct imx93_adc_priv *adc)
+{
+ u32 mcr, msr;
+ int ret;
+
+ /* make sure ADC is in power down mode */
+ imx93_adc_power_down(adc);
+
+ /* config SAR controller operating clock */
+ mcr = readl(adc->regs + IMX93_ADC_MCR);
+ mcr &= ~FIELD_PREP(IMX93_ADC_MCR_ADCLKSE_MASK, 1);
+ writel(mcr, adc->regs + IMX93_ADC_MCR);
+
+ /* bring ADC out of power down state */
+ imx93_adc_power_up(adc);
+
+ /*
+ * we use the default TSAMP/NRSMPL/AVGEN in MCR,
+ * can add the setting of these bit if need
+ */
+
+ /* run calibration */
+ mcr = readl(adc->regs + IMX93_ADC_MCR);
+ mcr |= FIELD_PREP(IMX93_ADC_MCR_CALSTART_MASK, 1);
+ writel(mcr, adc->regs + IMX93_ADC_MCR);
+
+ /* wait calibration to be finished */
+ ret = readl_poll_timeout(adc->regs + IMX93_ADC_MSR, msr,
+ !(msr & IMX93_ADC_MSR_CALBUSY_MASK), 2000000);
+ if (ret == -ETIMEDOUT) {
+ pr_warn("ADC calibration timeout\n");
+ return ret;
+ }
+
+ /* check whether calbration is successful or not */
+ msr = readl(adc->regs + IMX93_ADC_MSR);
+ if (msr & IMX93_ADC_MSR_CALFAIL_MASK) {
+ pr_warn("ADC calibration failed!\n");
+ return -EAGAIN;
+ }
+
+ return 0;
+}
+
+static int imx93_adc_channel_data(struct udevice *dev, int channel,
+ unsigned int *data)
+{
+ struct imx93_adc_priv *adc = dev_get_priv(dev);
+ u32 isr, pcda;
+ int ret;
+
+ if (channel != adc->active_channel) {
+ pr_err("Requested channel is not active!\n");
+ return -EINVAL;
+ }
+
+ ret = readl_poll_timeout(adc->regs + IMX93_ADC_ISR, isr,
+ (isr & IMX93_ADC_ISR_EOC_MASK), IMX93_ADC_TIMEOUT);
+
+ /* clear interrupts */
+ writel(isr, adc->regs + IMX93_ADC_ISR);
+
+ if (ret == -ETIMEDOUT) {
+ pr_warn("ADC conversion timeout!\n");
+ return ret;
+ }
+
+ pcda = readl(adc->regs + IMX93_ADC_PCDR0 + channel * 4);
+
+ *data = FIELD_GET(IMX93_ADC_PCDR_CDATA_MASK, pcda);
+
+ return 0;
+}
+
+static int imx93_adc_start_channel(struct udevice *dev, int channel)
+{
+ struct imx93_adc_priv *adc = dev_get_priv(dev);
+ u32 imr, mcr;
+
+ /* config channel mask register */
+ writel(1 << channel, adc->regs + IMX93_ADC_NCMR0);
+
+ /* config interrupt mask */
+ imr = FIELD_PREP(IMX93_ADC_IMR_EOC_MASK, 1);
+ writel(imr, adc->regs + IMX93_ADC_IMR);
+ writel(1 << channel, adc->regs + IMX93_ADC_CIMR0);
+
+ /* config one-shot mode */
+ mcr = readl(adc->regs + IMX93_ADC_MCR);
+ mcr &= ~FIELD_PREP(IMX93_ADC_MCR_MODE_MASK, 1);
+ writel(mcr, adc->regs + IMX93_ADC_MCR);
+
+ /* start normal conversion */
+ mcr = readl(adc->regs + IMX93_ADC_MCR);
+ mcr |= FIELD_PREP(IMX93_ADC_MCR_NSTART_MASK, 1);
+ writel(mcr, adc->regs + IMX93_ADC_MCR);
+
+ adc->active_channel = channel;
+
+ return 0;
+}
+
+static int imx93_adc_stop(struct udevice *dev)
+{
+ struct imx93_adc_priv *adc = dev_get_priv(dev);
+
+ imx93_adc_power_down(adc);
+
+ adc->active_channel = -1;
+
+ return 0;
+}
+
+static int imx93_adc_probe(struct udevice *dev)
+{
+ struct imx93_adc_priv *adc = dev_get_priv(dev);
+ unsigned int ret;
+
+ ret = imx93_adc_calibration(adc);
+ if (ret < 0)
+ return ret;
+
+ imx93_adc_config_ad_clk(adc);
+
+ adc->active_channel = -1;
+
+ return 0;
+}
+
+static int imx93_adc_of_to_plat(struct udevice *dev)
+{
+ struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev);
+ struct imx93_adc_priv *adc = dev_get_priv(dev);
+ unsigned int ret;
+
+ adc->regs = dev_read_addr_ptr(dev);
+ if (adc->regs == (struct imx93_adc *)FDT_ADDR_T_NONE) {
+ pr_err("Dev: %s - can't get address!", dev->name);
+ return -ENODATA;
+ }
+
+ ret = clk_get_by_name(dev, "ipg", &adc->ipg_clk);
+ if (ret < 0) {
+ pr_err("Can't get ADC ipg clk: %d\n", ret);
+ return ret;
+ }
+ ret = clk_enable(&adc->ipg_clk);
+ if(ret) {
+ pr_err("Can't enable ADC ipg clk: %d\n", ret);
+ return ret;
+ }
+
+ uc_pdata->data_mask = IMX93_ADC_DAT_MASK;
+ uc_pdata->data_format = ADC_DATA_FORMAT_BIN;
+ uc_pdata->data_timeout_us = IMX93_ADC_TIMEOUT;
+
+ /* Mask available channel bits: [0:3] */
+ uc_pdata->channel_mask = (2 << IMX93_ADC_MAX_CHANNEL) - 1;
+
+ return 0;
+}
+
+static const struct adc_ops imx93_adc_ops = {
+ .start_channel = imx93_adc_start_channel,
+ .channel_data = imx93_adc_channel_data,
+ .stop = imx93_adc_stop,
+};
+
+static const struct udevice_id imx93_adc_ids[] = {
+ { .compatible = "nxp,imx93-adc" },
+ { }
+};
+
+U_BOOT_DRIVER(imx93_adc) = {
+ .name = "imx93-adc",
+ .id = UCLASS_ADC,
+ .of_match = imx93_adc_ids,
+ .ops = &imx93_adc_ops,
+ .probe = imx93_adc_probe,
+ .of_to_plat = imx93_adc_of_to_plat,
+ .priv_auto = sizeof(struct imx93_adc_priv),
+};
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 09bef596f22..a21a3ce34bb 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -337,7 +337,8 @@ static int imx8mp_clk_probe(struct udevice *dev)
clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0));
clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0));
clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0));
- clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", "usb_core_ref", base + 0x44d0, 0));
+ clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate2("usb_root_clk", "hsio_axi", base + 0x44d0, 0));
+ clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate2("usb_suspend_clk", "clock-osc-24m", base + 0x44d0, 0));
clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0));
clk_dm(IMX8MP_CLK_USDHC1_ROOT, imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0));
clk_dm(IMX8MP_CLK_USDHC2_ROOT, imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0));
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 04460f1acb2..b9f5c7a37ae 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -364,8 +364,8 @@ config NPCM_OTP
To compile this driver as a module, choose M here: the module
will be called npcm_otp.
-config IMX_SENTINEL
- bool "Enable i.MX Sentinel MU driver and API"
+config IMX_ELE
+ bool "Enable i.MX EdgeLock Enclave MU driver and API"
depends on MISC && (ARCH_IMX9 || ARCH_IMX8ULP)
help
If you say Y here to enable Message Unit driver to work with
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 52aed096021..fd8805f34bd 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -47,7 +47,7 @@ obj-$(CONFIG_SANDBOX) += irq_sandbox.o irq_sandbox_test.o
obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o
obj-$(CONFIG_IMX8) += imx8/
-obj-$(CONFIG_IMX_SENTINEL) += sentinel/
+obj-$(CONFIG_IMX_ELE) += imx_ele/
obj-$(CONFIG_LED_STATUS) += status_led.o
obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o
diff --git a/drivers/misc/imx8/scu_api.c b/drivers/misc/imx8/scu_api.c
index dfede7f1d5f..3e3002ba6df 100644
--- a/drivers/misc/imx8/scu_api.c
+++ b/drivers/misc/imx8/scu_api.c
@@ -481,6 +481,22 @@ int sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, sc_misc_temp_t temp,
return 0;
}
+void sc_misc_get_button_status(sc_ipc_t ipc, sc_bool_t *status)
+{
+ struct sc_rpc_msg_s msg;
+ struct udevice *dev = gd->arch.scu_dev;
+
+ RPC_VER(&msg) = SC_RPC_VERSION;
+ RPC_SIZE(&msg) = 1U;
+ RPC_SVC(&msg) = (u8)(SC_RPC_SVC_MISC);
+ RPC_FUNC(&msg) = (u8)(MISC_FUNC_GET_BUTTON_STATUS);
+
+ misc_call(dev, SC_FALSE, &msg, 1U, &msg, 1U);
+
+ if (status)
+ *status = (sc_bool_t)(!!(RPC_U8(&msg, 0U)));
+}
+
/* RM */
sc_bool_t sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr)
{
@@ -851,6 +867,21 @@ int sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable,
return ret;
}
+void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type)
+{
+ struct udevice *dev = gd->arch.scu_dev;
+ struct sc_rpc_msg_s msg;
+ int size = sizeof(struct sc_rpc_msg_s);
+
+ RPC_VER(&msg) = SC_RPC_VERSION;
+ RPC_SVC(&msg) = (u8)(SC_RPC_SVC_PM);
+ RPC_FUNC(&msg) = (u8)(PM_FUNC_REBOOT);
+ RPC_U8(&msg, 0U) = (u8)(type);
+ RPC_SIZE(&msg) = 2U;
+
+ misc_call(dev, SC_TRUE, &msg, size, &msg, size);
+}
+
int sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
sc_pm_power_mode_t *mode)
{
@@ -877,6 +908,28 @@ int sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
return ret;
}
+int sc_timer_set_wdog_window(sc_ipc_t ipc, sc_timer_wdog_time_t window)
+{
+ struct udevice *dev = gd->arch.scu_dev;
+ struct sc_rpc_msg_s msg;
+ int size = sizeof(struct sc_rpc_msg_s);
+ int ret;
+
+ RPC_VER(&msg) = SC_RPC_VERSION;
+ RPC_SIZE(&msg) = 2U;
+ RPC_SVC(&msg) = (u8)(SC_RPC_SVC_TIMER);
+ RPC_FUNC(&msg) = (u8)(TIMER_FUNC_SET_WDOG_WINDOW);
+
+ RPC_U32(&msg, 0U) = (u32)(window);
+
+ ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size);
+ if (ret)
+ printf("%s: window:%u: res:%d\n",
+ __func__, window, RPC_R8(&msg));
+
+ return ret;
+}
+
int sc_seco_authenticate(sc_ipc_t ipc, sc_seco_auth_cmd_t cmd,
sc_faddr_t addr)
{
@@ -974,6 +1027,31 @@ void sc_seco_build_info(sc_ipc_t ipc, u32 *version, u32 *commit)
*commit = RPC_U32(&msg, 4U);
}
+int sc_seco_v2x_build_info(sc_ipc_t ipc, u32 *version, u32 *commit)
+{
+ struct udevice *dev = gd->arch.scu_dev;
+ struct sc_rpc_msg_s msg;
+ int size = sizeof(struct sc_rpc_msg_s);
+ int ret;
+
+ RPC_VER(&msg) = SC_RPC_VERSION;
+ RPC_SIZE(&msg) = 1U;
+ RPC_SVC(&msg) = (u8)(SC_RPC_SVC_SECO);
+ RPC_FUNC(&msg) = (u8)(SECO_FUNC_V2X_BUILD_INFO);
+
+ ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size);
+ if (ret)
+ printf("%s: res:%d\n", __func__, RPC_R8(&msg));
+
+ if (version)
+ *version = RPC_U32(&msg, 0U);
+
+ if (commit)
+ *commit = RPC_U32(&msg, 4U);
+
+ return ret;
+}
+
int sc_seco_get_event(sc_ipc_t ipc, u8 idx, u32 *event)
{
struct udevice *dev = gd->arch.scu_dev;
diff --git a/drivers/misc/sentinel/Makefile b/drivers/misc/imx_ele/Makefile
index 446154cb201..f8d8c55f983 100644
--- a/drivers/misc/sentinel/Makefile
+++ b/drivers/misc/imx_ele/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0+
-obj-y += s400_api.o s4mu.o
+obj-y += ele_api.o ele_mu.o
obj-$(CONFIG_CMD_FUSE) += fuse.o
diff --git a/drivers/misc/sentinel/s400_api.c b/drivers/misc/imx_ele/ele_api.c
index 6c0d0b3f18a..0c017734a49 100644
--- a/drivers/misc/sentinel/s400_api.c
+++ b/drivers/misc/imx_ele/ele_api.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright 2020 NXP
+ * Copyright 2020, 2023 NXP
*
*/
@@ -9,25 +9,37 @@
#include <malloc.h>
#include <asm/io.h>
#include <dm.h>
-#include <asm/mach-imx/s400_api.h>
+#include <asm/mach-imx/ele_api.h>
#include <misc.h>
DECLARE_GLOBAL_DATA_PTR;
-int ahab_release_rdc(u8 core_id, u8 xrdc, u32 *response)
+static u32 compute_crc(const struct ele_msg *msg)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ u32 crc = 0;
+ size_t i = 0;
+ u32 *data = (u32 *)msg;
+
+ for (i = 0; i < (msg->size - 1); i++)
+ crc ^= data[i];
+
+ return crc;
+}
+
+int ele_release_rdc(u8 core_id, u8 xrdc, u32 *response)
+{
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 2;
msg.command = ELE_RELEASE_RDC_REQ;
switch (xrdc) {
@@ -59,20 +71,20 @@ int ahab_release_rdc(u8 core_id, u8 xrdc, u32 *response)
return ret;
}
-int ahab_auth_oem_ctnr(ulong ctnr_addr, u32 *response)
+int ele_auth_oem_ctnr(ulong ctnr_addr, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 3;
msg.command = ELE_OEM_CNTN_AUTH_REQ;
msg.data[0] = upper_32_bits(ctnr_addr);
@@ -89,20 +101,20 @@ int ahab_auth_oem_ctnr(ulong ctnr_addr, u32 *response)
return ret;
}
-int ahab_release_container(u32 *response)
+int ele_release_container(u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 1;
msg.command = ELE_RELEASE_CONTAINER_REQ;
@@ -117,20 +129,20 @@ int ahab_release_container(u32 *response)
return ret;
}
-int ahab_verify_image(u32 img_id, u32 *response)
+int ele_verify_image(u32 img_id, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 2;
msg.command = ELE_VERIFY_IMAGE_REQ;
msg.data[0] = 1 << img_id;
@@ -146,20 +158,20 @@ int ahab_verify_image(u32 img_id, u32 *response)
return ret;
}
-int ahab_forward_lifecycle(u16 life_cycle, u32 *response)
+int ele_forward_lifecycle(u16 life_cycle, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 2;
msg.command = ELE_FWD_LIFECYCLE_UP_REQ;
msg.data[0] = life_cycle;
@@ -175,15 +187,15 @@ int ahab_forward_lifecycle(u16 life_cycle, u32 *response)
return ret;
}
-int ahab_read_common_fuse(u16 fuse_id, u32 *fuse_words, u32 fuse_num, u32 *response)
+int ele_read_common_fuse(u16 fuse_id, u32 *fuse_words, u32 fuse_num, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
@@ -198,8 +210,8 @@ int ahab_read_common_fuse(u16 fuse_id, u32 *fuse_words, u32 fuse_num, u32 *respo
return -EINVAL;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 2;
msg.command = ELE_READ_FUSE_REQ;
msg.data[0] = fuse_id;
@@ -223,20 +235,20 @@ int ahab_read_common_fuse(u16 fuse_id, u32 *fuse_words, u32 fuse_num, u32 *respo
return ret;
}
-int ahab_write_fuse(u16 fuse_id, u32 fuse_val, bool lock, u32 *response)
+int ele_write_fuse(u16 fuse_id, u32 fuse_val, bool lock, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 3;
msg.command = ELE_WRITE_FUSE_REQ;
msg.data[0] = (32 << 16) | (fuse_id << 5);
@@ -256,20 +268,20 @@ int ahab_write_fuse(u16 fuse_id, u32 fuse_val, bool lock, u32 *response)
return ret;
}
-int ahab_release_caam(u32 core_did, u32 *response)
+int ele_release_caam(u32 core_did, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 2;
msg.command = ELE_RELEASE_CAAM_REQ;
msg.data[0] = core_did;
@@ -285,15 +297,15 @@ int ahab_release_caam(u32 core_did, u32 *response)
return ret;
}
-int ahab_get_fw_version(u32 *fw_version, u32 *sha1, u32 *response)
+int ele_get_fw_version(u32 *fw_version, u32 *sha1, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
@@ -307,8 +319,8 @@ int ahab_get_fw_version(u32 *fw_version, u32 *sha1, u32 *response)
return -EINVAL;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 1;
msg.command = ELE_GET_FW_VERSION_REQ;
@@ -326,20 +338,20 @@ int ahab_get_fw_version(u32 *fw_version, u32 *sha1, u32 *response)
return ret;
}
-int ahab_dump_buffer(u32 *buffer, u32 buffer_length)
+int ele_dump_buffer(u32 *buffer, u32 buffer_length)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret, i = 0;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 1;
msg.command = ELE_DUMP_DEBUG_BUFFER_REQ;
@@ -360,25 +372,25 @@ int ahab_dump_buffer(u32 *buffer, u32 buffer_length)
return i;
}
-int ahab_get_info(struct sentinel_get_info_data *info, u32 *response)
+int ele_get_info(struct ele_get_info_data *info, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 4;
msg.command = ELE_GET_INFO_REQ;
msg.data[0] = upper_32_bits((ulong)info);
msg.data[1] = lower_32_bits((ulong)info);
- msg.data[2] = sizeof(struct sentinel_get_info_data);
+ msg.data[2] = sizeof(struct ele_get_info_data);
ret = misc_call(dev, false, &msg, size, &msg, size);
if (ret)
@@ -391,20 +403,20 @@ int ahab_get_info(struct sentinel_get_info_data *info, u32 *response)
return ret;
}
-int ahab_get_fw_status(u32 *status, u32 *response)
+int ele_get_fw_status(u32 *status, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 1;
msg.command = ELE_GET_FW_STATUS_REQ;
@@ -421,20 +433,20 @@ int ahab_get_fw_status(u32 *status, u32 *response)
return ret;
}
-int ahab_release_m33_trout(void)
+int ele_release_m33_trout(void)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 1;
msg.command = ELE_ENABLE_RTC_REQ;
@@ -446,16 +458,16 @@ int ahab_release_m33_trout(void)
return ret;
}
-int ahab_get_events(u32 *events, u32 *events_cnt, u32 *response)
+int ele_get_events(u32 *events, u32 *events_cnt, u32 *response)
{
- struct udevice *dev = gd->arch.s400_dev;
- int size = sizeof(struct sentinel_msg);
- struct sentinel_msg msg;
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
int ret, i = 0;
u32 actual_events;
if (!dev) {
- printf("s400 dev is not initialized\n");
+ printf("ele dev is not initialized\n");
return -ENODEV;
}
@@ -464,8 +476,8 @@ int ahab_get_events(u32 *events, u32 *events_cnt, u32 *response)
return -EINVAL;
}
- msg.version = AHAB_VERSION;
- msg.tag = AHAB_CMD_TAG;
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
msg.size = 1;
msg.command = ELE_GET_EVENTS_REQ;
@@ -490,3 +502,122 @@ int ahab_get_events(u32 *events, u32 *events_cnt, u32 *response)
return ret;
}
+
+int ele_start_rng(void)
+{
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
+ int ret;
+
+ if (!dev) {
+ printf("ele dev is not initialized\n");
+ return -ENODEV;
+ }
+
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
+ msg.size = 1;
+ msg.command = ELE_START_RNG;
+
+ ret = misc_call(dev, false, &msg, size, &msg, size);
+ if (ret)
+ printf("Error: %s: ret %d, response 0x%x\n",
+ __func__, ret, msg.data[0]);
+
+ return ret;
+}
+
+int ele_write_secure_fuse(ulong signed_msg_blk, u32 *response)
+{
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
+ int ret;
+
+ if (!dev) {
+ printf("ele dev is not initialized\n");
+ return -ENODEV;
+ }
+
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
+ msg.size = 3;
+ msg.command = ELE_WRITE_SECURE_FUSE_REQ;
+
+ msg.data[0] = upper_32_bits(signed_msg_blk);
+ msg.data[1] = lower_32_bits(signed_msg_blk);
+
+ ret = misc_call(dev, false, &msg, size, &msg, size);
+ if (ret)
+ printf("Error: %s: ret %d, response 0x%x, failed fuse row index %u\n",
+ __func__, ret, msg.data[0], msg.data[1]);
+
+ if (response)
+ *response = msg.data[0];
+
+ return ret;
+}
+
+int ele_return_lifecycle_update(ulong signed_msg_blk, u32 *response)
+{
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
+ int ret;
+
+ if (!dev) {
+ printf("ele dev is not initialized\n");
+ return -ENODEV;
+ }
+
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
+ msg.size = 3;
+ msg.command = ELE_RET_LIFECYCLE_UP_REQ;
+
+ msg.data[0] = upper_32_bits(signed_msg_blk);
+ msg.data[1] = lower_32_bits(signed_msg_blk);
+
+ ret = misc_call(dev, false, &msg, size, &msg, size);
+ if (ret)
+ printf("Error: %s: ret %d, response 0x%x, failed fuse row index %u\n",
+ __func__, ret, msg.data[0], msg.data[1]);
+
+ if (response)
+ *response = msg.data[0];
+
+ return ret;
+}
+
+int ele_generate_dek_blob(u32 key_id, u32 src_paddr, u32 dst_paddr, u32 max_output_size)
+{
+ struct udevice *dev = gd->arch.ele_dev;
+ int size = sizeof(struct ele_msg);
+ struct ele_msg msg;
+ int ret;
+
+ if (!dev) {
+ printf("ele dev is not initialized\n");
+ return -ENODEV;
+ }
+
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
+ msg.size = 8;
+ msg.command = ELE_GENERATE_DEK_BLOB;
+ msg.data[0] = key_id;
+ msg.data[1] = 0x0;
+ msg.data[2] = src_paddr;
+ msg.data[3] = 0x0;
+ msg.data[4] = dst_paddr;
+ msg.data[5] = max_output_size;
+ msg.data[6] = compute_crc(&msg);
+
+ ret = misc_call(dev, false, &msg, size, &msg, size);
+ if (ret)
+ printf("Error: %s: ret 0x%x, response 0x%x\n",
+ __func__, ret, msg.data[0]);
+
+ return ret;
+}
diff --git a/drivers/misc/sentinel/s4mu.c b/drivers/misc/imx_ele/ele_mu.c
index 794fc40c620..053cdcf0fe0 100644
--- a/drivers/misc/sentinel/s4mu.c
+++ b/drivers/misc/imx_ele/ele_mu.c
@@ -9,7 +9,7 @@
#include <dm/lists.h>
#include <dm/root.h>
#include <dm/device-internal.h>
-#include <asm/mach-imx/s400_api.h>
+#include <asm/mach-imx/ele_api.h>
#include <asm/arch/imx-regs.h>
#include <linux/iopoll.h>
#include <misc.h>
@@ -22,7 +22,7 @@ struct imx8ulp_mu {
#define MU_SR_TE0_MASK BIT(0)
#define MU_SR_RF0_MASK BIT(0)
-#define MU_TR_COUNT 4
+#define MU_TR_COUNT 8
#define MU_RR_COUNT 4
void mu_hal_init(ulong base)
@@ -42,7 +42,7 @@ int mu_hal_sendmsg(ulong base, u32 reg_index, u32 msg)
assert(reg_index < MU_TR_COUNT);
- debug("sendmsg sr 0x%x\n", readl(&mu_base->sr));
+ debug("sendmsg tsr 0x%x\n", readl(&mu_base->tsr));
/* Wait TX register to be empty. */
ret = readl_poll_timeout(&mu_base->tsr, val, val & mask, 10000);
@@ -64,14 +64,24 @@ int mu_hal_receivemsg(ulong base, u32 reg_index, u32 *msg)
u32 mask = MU_SR_RF0_MASK << reg_index;
u32 val;
int ret;
+ u32 count = 10;
- assert(reg_index < MU_TR_COUNT);
+ assert(reg_index < MU_RR_COUNT);
- debug("receivemsg sr 0x%x\n", readl(&mu_base->sr));
+ debug("receivemsg rsr 0x%x\n", readl(&mu_base->rsr));
- /* Wait RX register to be full. */
- ret = readl_poll_timeout(&mu_base->rsr, val, val & mask, 10000);
- if (ret < 0) {
+ do {
+ /* Wait RX register to be full. */
+ ret = readl_poll_timeout(&mu_base->rsr, val, val & mask, 1000000);
+ if (ret < 0) {
+ count--;
+ printf("mu receive msg wait %us\n", 10 - count);
+ } else {
+ break;
+ }
+ } while (count > 0);
+
+ if (count == 0) {
debug("%s timeout\n", __func__);
return -ETIMEDOUT;
}
@@ -85,7 +95,7 @@ int mu_hal_receivemsg(ulong base, u32 reg_index, u32 *msg)
static int imx8ulp_mu_read(struct mu_type *base, void *data)
{
- struct sentinel_msg *msg = (struct sentinel_msg *)data;
+ struct ele_msg *msg = (struct ele_msg *)data;
int ret;
u8 count = 0;
@@ -99,7 +109,7 @@ static int imx8ulp_mu_read(struct mu_type *base, void *data)
count++;
/* Check size */
- if (msg->size > S400_MAX_MSG) {
+ if (msg->size > ELE_MAX_MSG) {
*((u32 *)msg) = 0;
return -EINVAL;
}
@@ -118,7 +128,7 @@ static int imx8ulp_mu_read(struct mu_type *base, void *data)
static int imx8ulp_mu_write(struct mu_type *base, void *data)
{
- struct sentinel_msg *msg = (struct sentinel_msg *)data;
+ struct ele_msg *msg = (struct ele_msg *)data;
int ret;
u8 count = 0;
@@ -126,7 +136,7 @@ static int imx8ulp_mu_write(struct mu_type *base, void *data)
return -EINVAL;
/* Check size */
- if (msg->size > S400_MAX_MSG)
+ if (msg->size > ELE_MAX_MSG)
return -EINVAL;
/* Write first word */
@@ -171,7 +181,7 @@ static int imx8ulp_mu_call(struct udevice *dev, int no_resp, void *tx_msg,
return ret;
}
- result = ((struct sentinel_msg *)rx_msg)->data[0];
+ result = ((struct ele_msg *)rx_msg)->data[0];
if ((result & 0xff) == 0xd6)
return 0;
@@ -196,7 +206,7 @@ static int imx8ulp_mu_probe(struct udevice *dev)
/* U-Boot not enable interrupts, so need to enable RX interrupts */
mu_hal_init((ulong)priv->base);
- gd->arch.s400_dev = dev;
+ gd->arch.ele_dev = dev;
return 0;
}
diff --git a/drivers/misc/sentinel/fuse.c b/drivers/misc/imx_ele/fuse.c
index 99342d33c06..4e4dcb42cdd 100644
--- a/drivers/misc/sentinel/fuse.c
+++ b/drivers/misc/imx_ele/fuse.c
@@ -10,7 +10,7 @@
#include <asm/arch/sys_proto.h>
#include <asm/arch/imx-regs.h>
#include <env.h>
-#include <asm/mach-imx/s400_api.h>
+#include <asm/mach-imx/ele_api.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -24,11 +24,11 @@ struct fsb_map_entry {
bool redundancy;
};
-struct s400_map_entry {
+struct ele_map_entry {
s32 fuse_bank;
u32 fuse_words;
u32 fuse_offset;
- u32 s400_index;
+ u32 ele_index;
};
#if defined(CONFIG_IMX8ULP)
@@ -65,7 +65,7 @@ u32 nonecc_fuse_banks[] = {
0, 1, 8, 12, 16, 22, 24, 25, 26, 27, 36, 41, 51, 56
};
-struct s400_map_entry s400_api_mapping_table[] = {
+struct ele_map_entry ele_api_mapping_table[] = {
{ 1, 8 }, /* LOCK */
{ 2, 8 }, /* ECID */
{ 7, 4, 0, 1 }, /* OTP_UNIQ_ID */
@@ -122,7 +122,7 @@ struct fsb_map_entry fsb_mapping_table[] = {
{ 63, 8 },
};
-struct s400_map_entry s400_api_mapping_table[] = {
+struct ele_map_entry ele_api_mapping_table[] = {
{ 7, 1, 7, 63 },
{ 16, 8, },
{ 17, 8, },
@@ -159,18 +159,18 @@ static s32 map_fsb_fuse_index(u32 bank, u32 word, bool *redundancy)
return word + word_pos;
}
-static s32 map_s400_fuse_index(u32 bank, u32 word)
+static s32 map_ele_fuse_index(u32 bank, u32 word)
{
- s32 size = ARRAY_SIZE(s400_api_mapping_table);
+ s32 size = ARRAY_SIZE(ele_api_mapping_table);
s32 i;
/* map the fuse from ocotp fuse map to FSB*/
for (i = 0; i < size; i++) {
- if (s400_api_mapping_table[i].fuse_bank != -1 &&
- s400_api_mapping_table[i].fuse_bank == bank) {
- if (word >= s400_api_mapping_table[i].fuse_offset &&
- word < (s400_api_mapping_table[i].fuse_offset +
- s400_api_mapping_table[i].fuse_words))
+ if (ele_api_mapping_table[i].fuse_bank != -1 &&
+ ele_api_mapping_table[i].fuse_bank == bank) {
+ if (word >= ele_api_mapping_table[i].fuse_offset &&
+ word < (ele_api_mapping_table[i].fuse_offset +
+ ele_api_mapping_table[i].fuse_words))
break;
}
}
@@ -178,10 +178,10 @@ static s32 map_s400_fuse_index(u32 bank, u32 word)
if (i == size)
return -1; /* Failed to find */
- if (s400_api_mapping_table[i].s400_index != 0)
- return s400_api_mapping_table[i].s400_index;
+ if (ele_api_mapping_table[i].ele_index != 0)
+ return ele_api_mapping_table[i].ele_index;
- return s400_api_mapping_table[i].fuse_bank * 8 + word;
+ return ele_api_mapping_table[i].fuse_bank * 8 + word;
}
#if defined(CONFIG_IMX8ULP)
@@ -202,7 +202,7 @@ int fuse_sense(u32 bank, u32 word, u32 *val)
return 0;
}
- word_index = map_s400_fuse_index(bank, word);
+ word_index = map_ele_fuse_index(bank, word);
if (word_index >= 0) {
u32 data[4];
u32 res, size = 4;
@@ -212,7 +212,7 @@ int fuse_sense(u32 bank, u32 word, u32 *val)
if (word_index != 1)
size = 1;
- ret = ahab_read_common_fuse(word_index, data, size, &res);
+ ret = ele_read_common_fuse(word_index, data, size, &res);
if (ret) {
printf("ahab read fuse failed %d, 0x%x\n", ret, res);
return ret;
@@ -255,13 +255,13 @@ int fuse_sense(u32 bank, u32 word, u32 *val)
return 0;
}
- word_index = map_s400_fuse_index(bank, word);
+ word_index = map_ele_fuse_index(bank, word);
if (word_index >= 0) {
u32 data;
u32 res, size = 1;
int ret;
- ret = ahab_read_common_fuse(word_index, &data, size, &res);
+ ret = ele_read_common_fuse(word_index, &data, size, &res);
if (ret) {
printf("ahab read fuse failed %d, 0x%x\n", ret, res);
return ret;
@@ -304,7 +304,7 @@ int fuse_prog(u32 bank, u32 word, u32 val)
lock = true;
#endif
- ret = ahab_write_fuse((bank * 8 + word), val, lock, &res);
+ ret = ele_write_fuse((bank * 8 + word), val, lock, &res);
if (ret) {
printf("ahab write fuse failed %d, 0x%x\n", ret, res);
return ret;
diff --git a/drivers/mtd/nand/raw/pxa3xx_nand.c b/drivers/mtd/nand/raw/pxa3xx_nand.c
index fcd1b9c6361..d502e967f92 100644
--- a/drivers/mtd/nand/raw/pxa3xx_nand.c
+++ b/drivers/mtd/nand/raw/pxa3xx_nand.c
@@ -125,6 +125,7 @@ DECLARE_GLOBAL_DATA_PTR;
/* System control register and bit to enable NAND on some SoCs */
#define GENCONF_SOC_DEVICE_MUX 0x208
#define GENCONF_SOC_DEVICE_MUX_NFC_EN BIT(0)
+#define GENCONF_SOC_DEVICE_MUX_NFC_DEVBUS_ARB_EN BIT(27)
/*
* This should be large enough to read 'ONFI' and 'JEDEC'.
@@ -167,6 +168,7 @@ enum pxa3xx_nand_variant {
PXA3XX_NAND_VARIANT_PXA,
PXA3XX_NAND_VARIANT_ARMADA370,
PXA3XX_NAND_VARIANT_ARMADA_8K,
+ PXA3XX_NAND_VARIANT_AC5,
};
struct pxa3xx_nand_host {
@@ -391,6 +393,10 @@ static const struct udevice_id pxa3xx_nand_dt_ids[] = {
.compatible = "marvell,armada-8k-nand-controller",
.data = PXA3XX_NAND_VARIANT_ARMADA_8K,
},
+ {
+ .compatible = "marvell,mvebu-ac5-pxa3xx-nand",
+ .data = PXA3XX_NAND_VARIANT_AC5,
+ },
{}
};
@@ -505,6 +511,9 @@ static int pxa3xx_nand_init_timings(struct pxa3xx_nand_host *host)
if (mode < 0)
mode = 0;
+ if (info->variant == PXA3XX_NAND_VARIANT_AC5)
+ mode = min(mode, 3);
+
timings = onfi_async_timing_mode_to_sdr_timings(mode);
if (IS_ERR(timings))
return PTR_ERR(timings);
@@ -730,7 +739,8 @@ static irqreturn_t pxa3xx_nand_irq(struct pxa3xx_nand_info *info)
/* NDCB3 register is available in NFCv2 (Armada 370/XP SoC) */
if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370 ||
- info->variant == PXA3XX_NAND_VARIANT_ARMADA_8K)
+ info->variant == PXA3XX_NAND_VARIANT_ARMADA_8K ||
+ info->variant == PXA3XX_NAND_VARIANT_AC5)
nand_writel(info, NDCB0, info->ndcb3);
}
@@ -1579,7 +1589,8 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
/* Device detection must be done with ECC disabled */
if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370 ||
- info->variant == PXA3XX_NAND_VARIANT_ARMADA_8K)
+ info->variant == PXA3XX_NAND_VARIANT_ARMADA_8K ||
+ info->variant == PXA3XX_NAND_VARIANT_AC5)
nand_writel(info, NDECCCTRL, 0x0);
if (nand_scan_ident(mtd, 1, NULL))
@@ -1630,7 +1641,8 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
*/
if (mtd->writesize > info->chunk_size) {
if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370 ||
- info->variant == PXA3XX_NAND_VARIANT_ARMADA_8K) {
+ info->variant == PXA3XX_NAND_VARIANT_ARMADA_8K ||
+ info->variant == PXA3XX_NAND_VARIANT_AC5) {
chip->cmdfunc = nand_cmdfunc_extended;
} else {
dev_err(mtd->dev,
@@ -1728,7 +1740,7 @@ static int alloc_nand_resource(struct udevice *dev, struct pxa3xx_nand_info *inf
return PTR_ERR(sysctrl_base);
regmap_read(sysctrl_base, GENCONF_SOC_DEVICE_MUX, &reg);
- reg |= GENCONF_SOC_DEVICE_MUX_NFC_EN;
+ reg |= GENCONF_SOC_DEVICE_MUX_NFC_EN | GENCONF_SOC_DEVICE_MUX_NFC_DEVBUS_ARB_EN;
regmap_write(sysctrl_base, GENCONF_SOC_DEVICE_MUX, reg);
}
diff --git a/drivers/power/domain/imx8-power-domain-legacy.c b/drivers/power/domain/imx8-power-domain-legacy.c
index 37b0f95abac..c8ca2665752 100644
--- a/drivers/power/domain/imx8-power-domain-legacy.c
+++ b/drivers/power/domain/imx8-power-domain-legacy.c
@@ -89,7 +89,6 @@ static int imx8_power_domain_on(struct power_domain *power_domain)
struct udevice *dev = power_domain->dev;
struct imx8_power_domain_plat *pdata;
struct imx8_power_domain_priv *ppriv;
- sc_err_t ret;
int err;
struct power_domain parent_domain;
@@ -117,11 +116,11 @@ static int imx8_power_domain_on(struct power_domain *power_domain)
if (!sc_rm_is_resource_owned(-1, pdata->resource_id))
printf("%s [%d] not owned by curr partition\n", dev->name, pdata->resource_id);
- ret = sc_pm_set_resource_power_mode(-1, pdata->resource_id,
+ err = sc_pm_set_resource_power_mode(-1, pdata->resource_id,
SC_PM_PW_MODE_ON);
- if (ret) {
+ if (err) {
printf("Error: %s Power up failed! (error = %d)\n",
- dev->name, ret);
+ dev->name, err);
return -EIO;
}
}
@@ -139,7 +138,7 @@ static int imx8_power_domain_off_node(struct power_domain *power_domain)
struct imx8_power_domain_priv *ppriv;
struct imx8_power_domain_priv *child_ppriv;
struct imx8_power_domain_plat *pdata;
- sc_err_t ret;
+ int ret;
ppriv = dev_get_priv(dev);
pdata = dev_get_plat(dev);
diff --git a/drivers/power/domain/imx8m-power-domain.c b/drivers/power/domain/imx8m-power-domain.c
index 145f6ec0cd3..df5d7d69562 100644
--- a/drivers/power/domain/imx8m-power-domain.c
+++ b/drivers/power/domain/imx8m-power-domain.c
@@ -338,6 +338,9 @@ static int imx8m_power_domain_on(struct power_domain *power_domain)
}
}
+ /* delay for reset to propagate */
+ udelay(5);
+
if (domain->bits.pxx) {
/* request the domain to power up */
setbits_le32(base + regs->pup, domain->bits.pxx);
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index f5468353e10..428a4d210de 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -291,8 +291,16 @@ int pl01x_serial_probe(struct udevice *dev)
struct pl01x_serial_plat *plat = dev_get_plat(dev);
struct pl01x_priv *priv = dev_get_priv(dev);
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct dtd_serial_pl01x *dtplat = &plat->dtplat;
+
+ priv->regs = (struct pl01x_regs *)dtplat->reg[0];
+ plat->type = dtplat->type;
+#else
priv->regs = (struct pl01x_regs *)plat->base;
+#endif
priv->type = plat->type;
+
if (!plat->skip_init)
return pl01x_generic_serial_init(priv->regs, priv->type);
else
@@ -321,7 +329,7 @@ int pl01x_serial_pending(struct udevice *dev, bool input)
if (input)
return pl01x_tstc(priv->regs);
else
- return fr & UART_PL01x_FR_TXFF ? 0 : 1;
+ return fr & UART_PL01x_FR_TXFE ? 0 : 1;
}
static const struct dm_serial_ops pl01x_serial_ops = {
@@ -331,7 +339,7 @@ static const struct dm_serial_ops pl01x_serial_ops = {
.setbrg = pl01x_serial_setbrg,
};
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_REAL)
static const struct udevice_id pl01x_serial_id[] ={
{.compatible = "arm,pl011", .data = TYPE_PL011},
{.compatible = "arm,pl010", .data = TYPE_PL010},
@@ -380,8 +388,10 @@ int pl01x_serial_of_to_plat(struct udevice *dev)
U_BOOT_DRIVER(serial_pl01x) = {
.name = "serial_pl01x",
.id = UCLASS_SERIAL,
+#if CONFIG_IS_ENABLED(OF_REAL)
.of_match = of_match_ptr(pl01x_serial_id),
.of_to_plat = of_match_ptr(pl01x_serial_of_to_plat),
+#endif
.plat_auto = sizeof(struct pl01x_serial_plat),
.probe = pl01x_serial_probe,
.ops = &pl01x_serial_ops,
@@ -389,6 +399,8 @@ U_BOOT_DRIVER(serial_pl01x) = {
.priv_auto = sizeof(struct pl01x_priv),
};
+DM_DRIVER_ALIAS(serial_pl01x, arm_pl011)
+DM_DRIVER_ALIAS(serial_pl01x, arm_pl010)
#endif
#if defined(CONFIG_DEBUG_UART_PL010) || defined(CONFIG_DEBUG_UART_PL011)
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-15 10:46:49 +0000