diff options
Diffstat (limited to 'drivers')
115 files changed, 639 insertions, 173 deletions
diff --git a/drivers/ata/sata.c b/drivers/ata/sata.c index be1ee01b296..784d9bbeacb 100644 --- a/drivers/ata/sata.c +++ b/drivers/ata/sata.c @@ -61,7 +61,7 @@ int sata_rescan(bool verbose) ret = uclass_find_first_device(UCLASS_AHCI, &dev); if (ret || !dev) { printf("Cannot find SATA device (err=%d)\n", ret); - return -ENOSYS; + return -ENOENT; } ret = device_remove(dev, DM_REMOVE_NORMAL); diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 26bf429acbc..af27ceb27da 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -27,7 +27,6 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_ARCH_SOCFPGA) += altera/ obj-$(CONFIG_ARCH_STM32) += stm32/ obj-$(CONFIG_ARCH_STM32MP) += stm32/ -obj-$(CONFIG_ARCH_SUNXI) += sunxi/ obj-$(CONFIG_CLK_AT91) += at91/ obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o obj-$(CONFIG_CLK_BOSTON) += clk_boston.o @@ -43,6 +42,7 @@ obj-$(CONFIG_CLK_OWL) += owl/ obj-$(CONFIG_CLK_RENESAS) += renesas/ obj-$(CONFIG_$(SPL_TPL_)CLK_SCMI) += clk_scmi.o obj-$(CONFIG_CLK_SIFIVE) += sifive/ +obj-$(CONFIG_CLK_SUNXI) += sunxi/ obj-$(CONFIG_CLK_UNIPHIER) += uniphier/ obj-$(CONFIG_CLK_VERSACLOCK) += clk_versaclock.o obj-$(CONFIG_CLK_VERSAL) += clk_versal.o diff --git a/drivers/clk/clk-cdce9xx.c b/drivers/clk/clk-cdce9xx.c index f23465d7e1f..b8700f517fc 100644 --- a/drivers/clk/clk-cdce9xx.c +++ b/drivers/clk/clk-cdce9xx.c @@ -2,7 +2,7 @@ /* * Texas Instruments CDCE913/925/937/949 clock synthesizer driver * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> * * Based on Linux kernel clk-cdce925.c. diff --git a/drivers/clk/ti/clk-k3-pll.c b/drivers/clk/ti/clk-k3-pll.c index c1158c13290..8323e6e6919 100644 --- a/drivers/clk/ti/clk-k3-pll.c +++ b/drivers/clk/ti/clk-k3-pll.c @@ -2,7 +2,7 @@ /* * Texas Instruments K3 SoC PLL clock driver * - * Copyright (C) 2020-2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> */ diff --git a/drivers/clk/ti/clk-k3.c b/drivers/clk/ti/clk-k3.c index 10f7240f77a..eb76195bd75 100644 --- a/drivers/clk/ti/clk-k3.c +++ b/drivers/clk/ti/clk-k3.c @@ -2,7 +2,7 @@ /* * Texas Instruments K3 clock driver * - * Copyright (C) 2020-2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> */ diff --git a/drivers/clk/ti/clk-sci.c b/drivers/clk/ti/clk-sci.c index 8fc3254c996..9e5760d3354 100644 --- a/drivers/clk/ti/clk-sci.c +++ b/drivers/clk/ti/clk-sci.c @@ -2,7 +2,7 @@ /* * Texas Instruments System Control Interface (TI SCI) clock driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Andreas Dannenberg <dannenberg@ti.com> * * Loosely based on Linux kernel sci-clk.c... diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index 209d90e01fa..1081d61fcf0 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -48,7 +48,6 @@ config VPL_DM config DM_WARN bool "Enable warnings in driver model" depends on DM - default y help Enable this to see warnings related to driver model. diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 29a42945102..f72ea416cf1 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -991,6 +991,24 @@ ofnode ofnode_get_chosen_node(const char *name) return ofnode_path(prop); } +int ofnode_read_baud(void) +{ + const char *str, *p; + u32 baud; + + str = ofnode_read_chosen_string("stdout-path"); + if (!str) + return -EINVAL; + + /* Parse string serial0:115200n8 */ + p = strchr(str, ':'); + if (!p) + return -EINVAL; + + baud = dectoul(p + 1, NULL); + return baud; +} + const void *ofnode_read_aliases_prop(const char *propname, int *sizep) { ofnode node; diff --git a/drivers/dma/ti/k3-psil-am64.c b/drivers/dma/ti/k3-psil-am64.c index 15742c3723d..6180e2a1996 100644 --- a/drivers/dma/ti/k3-psil-am64.c +++ b/drivers/dma/ti/k3-psil-am64.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> */ diff --git a/drivers/dma/ti/k3-psil-am654.c b/drivers/dma/ti/k3-psil-am654.c index d16c07566b5..ce86600e556 100644 --- a/drivers/dma/ti/k3-psil-am654.c +++ b/drivers/dma/ti/k3-psil-am654.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> */ diff --git a/drivers/dma/ti/k3-psil-priv.h b/drivers/dma/ti/k3-psil-priv.h index 28078c6bd8d..563bc57e206 100644 --- a/drivers/dma/ti/k3-psil-priv.h +++ b/drivers/dma/ti/k3-psil-priv.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #ifndef K3_PSIL_PRIV_H_ diff --git a/drivers/dma/ti/k3-psil.c b/drivers/dma/ti/k3-psil.c index f23c8ca2b74..963321aa1e3 100644 --- a/drivers/dma/ti/k3-psil.c +++ b/drivers/dma/ti/k3-psil.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> */ diff --git a/drivers/dma/ti/k3-psil.h b/drivers/dma/ti/k3-psil.h index 1e0fe06c0a4..af60a9924e2 100644 --- a/drivers/dma/ti/k3-psil.h +++ b/drivers/dma/ti/k3-psil.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #ifndef K3_PSIL_H_ diff --git a/drivers/dma/ti/k3-udma-hwdef.h b/drivers/dma/ti/k3-udma-hwdef.h index 5d50bbcb031..3d6b4d10fff 100644 --- a/drivers/dma/ti/k3-udma-hwdef.h +++ b/drivers/dma/ti/k3-udma-hwdef.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com * * * This program is free software; you can redistribute it and/or modify diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index 9273c70e9d9..8a62d63dfef 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> */ #define pr_fmt(fmt) "udma: " fmt diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c index 43fb7fa7787..8ea15c7ed33 100644 --- a/drivers/firmware/firmware-zynqmp.c +++ b/drivers/firmware/firmware-zynqmp.c @@ -203,6 +203,8 @@ int zynqmp_pm_feature(const u32 api_id) /* Check feature check API version */ ret = xilinx_pm_request(PM_FEATURE_CHECK, api_id, 0, 0, 0, ret_payload); + if (ret) + return ret; /* Return feature check version */ return ret_payload[1] & FIRMWARE_VERSION_MASK; diff --git a/drivers/firmware/scmi/sandbox-scmi_agent.c b/drivers/firmware/scmi/sandbox-scmi_agent.c index 9f5f497e0a6..d1318096266 100644 --- a/drivers/firmware/scmi/sandbox-scmi_agent.c +++ b/drivers/firmware/scmi/sandbox-scmi_agent.c @@ -576,7 +576,7 @@ static int sandbox_scmi_pwd_attribs(struct udevice *dev, struct scmi_msg *msg) domain_id = *(u32 *)msg->in_msg; out = (struct scmi_pwd_attrs_out *)msg->out_msg; - if (domain_id > ARRAY_SIZE(scmi_pwdom)) { + if (domain_id >= ARRAY_SIZE(scmi_pwdom)) { out->status = SCMI_NOT_FOUND; return 0; @@ -613,7 +613,7 @@ static int sandbox_scmi_pwd_state_set(struct udevice *dev, struct scmi_msg *msg) in = (struct scmi_pwd_state_set_in *)msg->in_msg; status = (s32 *)msg->out_msg; - if (in->domain_id > ARRAY_SIZE(scmi_pwdom)) { + if (in->domain_id >= ARRAY_SIZE(scmi_pwdom)) { *status = SCMI_NOT_FOUND; return 0; @@ -653,7 +653,7 @@ static int sandbox_scmi_pwd_state_get(struct udevice *dev, struct scmi_msg *msg) domain_id = *(u32 *)msg->in_msg; out = (struct scmi_pwd_state_get_out *)msg->out_msg; - if (domain_id > ARRAY_SIZE(scmi_pwdom)) { + if (domain_id >= ARRAY_SIZE(scmi_pwdom)) { out->status = SCMI_NOT_FOUND; return 0; @@ -686,7 +686,7 @@ static int sandbox_scmi_pwd_name_get(struct udevice *dev, struct scmi_msg *msg) domain_id = *(u32 *)msg->in_msg; out = (struct scmi_pwd_name_get_out *)msg->out_msg; - if (domain_id > ARRAY_SIZE(scmi_pwdom)) { + if (domain_id >= ARRAY_SIZE(scmi_pwdom)) { out->status = SCMI_NOT_FOUND; return 0; diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c index 166bd78ca50..6e9f93e9a30 100644 --- a/drivers/firmware/ti_sci.c +++ b/drivers/firmware/ti_sci.c @@ -3,7 +3,7 @@ * Texas Instruments System Control Interface Protocol Driver * Based on drivers/firmware/ti_sci.c from Linux. * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h index 101210eb215..bb8bc7beead 100644 --- a/drivers/firmware/ti_sci.h +++ b/drivers/firmware/ti_sci.h @@ -6,7 +6,7 @@ * The system works in a message response protocol * See: http://processors.wiki.ti.com/index.php/TISCI for details * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Based on drivers/firmware/ti_sci.h from Linux. * */ diff --git a/drivers/firmware/ti_sci_static_data.h b/drivers/firmware/ti_sci_static_data.h index 1a461fab619..567ce8911a7 100644 --- a/drivers/firmware/ti_sci_static_data.h +++ b/drivers/firmware/ti_sci_static_data.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* - * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ * */ diff --git a/drivers/gpio/pcf8575_gpio.c b/drivers/gpio/pcf8575_gpio.c index d5930d941fc..f38e215c4d6 100644 --- a/drivers/gpio/pcf8575_gpio.c +++ b/drivers/gpio/pcf8575_gpio.c @@ -2,7 +2,7 @@ /* * PCF8575 I2C GPIO EXPANDER DRIVER * - * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/ * * Vignesh R <vigneshr@ti.com> * diff --git a/drivers/mailbox/k3-sec-proxy.c b/drivers/mailbox/k3-sec-proxy.c index e0a18d8a97d..05f6b1795d6 100644 --- a/drivers/mailbox/k3-sec-proxy.c +++ b/drivers/mailbox/k3-sec-proxy.c @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 Secure proxy Driver * - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/drivers/memory/ti-gpmc.c b/drivers/memory/ti-gpmc.c index f511a529b1e..775e78c9a5b 100644 --- a/drivers/memory/ti-gpmc.c +++ b/drivers/memory/ti-gpmc.c @@ -2,7 +2,7 @@ /* * Texas Instruments GPMC Driver * - * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ */ #include <asm/io.h> diff --git a/drivers/memory/ti-gpmc.h b/drivers/memory/ti-gpmc.h index 90f8e656c8f..6fe098af0ec 100644 --- a/drivers/memory/ti-gpmc.h +++ b/drivers/memory/ti-gpmc.h @@ -2,7 +2,7 @@ /* * Texas Instruments GPMC Driver * - * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ */ /* GPMC register offsets */ diff --git a/drivers/misc/esm_pmic.c b/drivers/misc/esm_pmic.c index b971f32f6a1..a518f750611 100644 --- a/drivers/misc/esm_pmic.c +++ b/drivers/misc/esm_pmic.c @@ -2,7 +2,7 @@ /* * PMIC Error Signal Monitor driver * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> * */ diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c index 9a088244dd1..0d29eff1ac0 100644 --- a/drivers/misc/k3_avs.c +++ b/drivers/misc/k3_avs.c @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 Clas 0 Adaptive Voltage Scaling driver * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> * */ diff --git a/drivers/misc/k3_esm.c b/drivers/misc/k3_esm.c index 41faeb3d858..f6ac18bdc75 100644 --- a/drivers/misc/k3_esm.c +++ b/drivers/misc/k3_esm.c @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 Error Signalling Module driver * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> * */ diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c index 4814e0e501c..4f757083a1b 100644 --- a/drivers/misc/rockchip-otp.c +++ b/drivers/misc/rockchip-otp.c @@ -61,11 +61,20 @@ #define RK3588_OTPC_INT_ST 0x0084 #define RK3588_RD_DONE BIT(1) +#define RV1126_OTP_NVM_CEB 0x00 +#define RV1126_OTP_NVM_RSTB 0x04 +#define RV1126_OTP_NVM_ST 0x18 +#define RV1126_OTP_NVM_RADDR 0x1C +#define RV1126_OTP_NVM_RSTART 0x20 +#define RV1126_OTP_NVM_RDATA 0x24 +#define RV1126_OTP_READ_ST 0x30 + struct rockchip_otp_plat { void __iomem *base; }; struct rockchip_otp_data { + int (*init)(struct udevice *dev); int (*read)(struct udevice *dev, int offset, void *buf, int size); int offset; int size; @@ -232,6 +241,48 @@ static int rockchip_rk3588_otp_read(struct udevice *dev, int offset, return 0; } +static int rockchip_rv1126_otp_init(struct udevice *dev) +{ + struct rockchip_otp_plat *otp = dev_get_plat(dev); + int ret; + + writel(0x0, otp->base + RV1126_OTP_NVM_CEB); + ret = rockchip_otp_poll_timeout(otp, 0x1, RV1126_OTP_NVM_ST); + + if (ret) + return ret; + + writel(0x1, otp->base + RV1126_OTP_NVM_RSTB); + ret = rockchip_otp_poll_timeout(otp, 0x4, RV1126_OTP_NVM_ST); + + if (ret) + return ret; + + return 0; +} + +static int rockchip_rv1126_otp_read(struct udevice *dev, int offset, void *buf, + int size) +{ + struct rockchip_otp_plat *otp = dev_get_plat(dev); + u32 status = 0; + u8 *buffer = buf; + int ret = 0; + + while (size--) { + writel(offset++, otp->base + RV1126_OTP_NVM_RADDR); + writel(0x1, otp->base + RV1126_OTP_NVM_RSTART); + ret = readl_poll_timeout(otp->base + RV1126_OTP_READ_ST, + status, !status, OTPC_TIMEOUT); + if (ret) + return ret; + + *buffer++ = (u8)(readl(otp->base + RV1126_OTP_NVM_RDATA) & 0xFF); + } + + return 0; +} + static int rockchip_otp_read(struct udevice *dev, int offset, void *buf, int size) { @@ -286,6 +337,20 @@ static int rockchip_otp_of_to_plat(struct udevice *dev) return 0; } +static int rockchip_otp_probe(struct udevice *dev) +{ + struct rockchip_otp_data *data; + + data = (struct rockchip_otp_data *)dev_get_driver_data(dev); + if (!data) + return -EINVAL; + + if (data->init) + return data->init(dev); + + return 0; +} + static const struct rockchip_otp_data px30_data = { .read = rockchip_px30_otp_read, .size = 0x40, @@ -304,6 +369,12 @@ static const struct rockchip_otp_data rk3588_data = { .block_size = 4, }; +static const struct rockchip_otp_data rv1126_data = { + .init = rockchip_rv1126_otp_init, + .read = rockchip_rv1126_otp_read, + .size = 0x40, +}; + static const struct udevice_id rockchip_otp_ids[] = { { .compatible = "rockchip,px30-otp", @@ -321,6 +392,10 @@ static const struct udevice_id rockchip_otp_ids[] = { .compatible = "rockchip,rk3588-otp", .data = (ulong)&rk3588_data, }, + { + .compatible = "rockchip,rv1126-otp", + .data = (ulong)&rv1126_data, + }, {} }; @@ -331,4 +406,5 @@ U_BOOT_DRIVER(rockchip_otp) = { .of_to_plat = rockchip_otp_of_to_plat, .plat_auto = sizeof(struct rockchip_otp_plat), .ops = &rockchip_otp_ops, + .probe = rockchip_otp_probe, }; diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c index fd667aeafda..05595bdac39 100644 --- a/drivers/mmc/am654_sdhci.c +++ b/drivers/mmc/am654_sdhci.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * * Texas Instruments' K3 SD Host Controller Interface */ diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 8cd501c5f7c..97aaf1e4ec3 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -318,7 +318,7 @@ static unsigned int renesas_sdhi_init_tuning(struct tmio_sd_priv *priv) RENESAS_SDHI_SCC_DTCNTL_TAPNUM_MASK; } -static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv) +static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv, bool clk_disable) { u32 reg; @@ -350,6 +350,12 @@ static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv) reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); reg &= ~RENESAS_SDHI_SCC_RVSCNTL_RVSEN; tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL); + + if (clk_disable) { + reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL); + reg &= ~TMIO_SD_CLKCTL_SCLKEN; + tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL); + } } static int renesas_sdhi_hs400(struct udevice *dev) @@ -629,7 +635,7 @@ int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode) out: if (ret < 0) { dev_warn(dev, "Tuning procedure failed\n"); - renesas_sdhi_reset_tuning(priv); + renesas_sdhi_reset_tuning(priv, true); } return ret; @@ -668,7 +674,7 @@ static int renesas_sdhi_set_ios(struct udevice *dev) (mmc->selected_mode != UHS_SDR104) && (mmc->selected_mode != MMC_HS_200) && (mmc->selected_mode != MMC_HS_400)) { - renesas_sdhi_reset_tuning(priv); + renesas_sdhi_reset_tuning(priv, mmc->clk_disable); } #endif @@ -1095,7 +1101,7 @@ static int renesas_sdhi_probe(struct udevice *dev) CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \ CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) if (priv->caps & TMIO_SD_CAP_RCAR_UHS) - renesas_sdhi_reset_tuning(priv); + renesas_sdhi_reset_tuning(priv, true); #endif return 0; diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 4d6351bf275..714706d2411 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -25,10 +25,14 @@ #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/cpu.h> +#if !CONFIG_IS_ENABLED(DM_MMC) #include <asm/arch/mmc.h> +#endif #include <linux/delay.h> #include <sunxi_gpio.h> +#include "sunxi_mmc.h" + #ifndef CCM_MMC_CTRL_MODE_SEL_NEW #define CCM_MMC_CTRL_MODE_SEL_NEW 0 #endif @@ -701,13 +705,13 @@ static const struct udevice_id sunxi_mmc_ids[] = { { .compatible = "allwinner,sun7i-a20-mmc" }, { .compatible = "allwinner,sun8i-a83t-emmc" }, { .compatible = "allwinner,sun9i-a80-mmc" }, + { .compatible = "allwinner,sun20i-d1-mmc" }, { .compatible = "allwinner,sun50i-a64-mmc" }, { .compatible = "allwinner,sun50i-a64-emmc" }, { .compatible = "allwinner,sun50i-h6-mmc" }, { .compatible = "allwinner,sun50i-h6-emmc" }, { .compatible = "allwinner,sun50i-a100-mmc" }, { .compatible = "allwinner,sun50i-a100-emmc" }, - { .compatible = "allwinner,sun20i-d1-mmc" }, { /* sentinel */ } }; diff --git a/drivers/mmc/sunxi_mmc.h b/drivers/mmc/sunxi_mmc.h new file mode 100644 index 00000000000..f4ae5a790c8 --- /dev/null +++ b/drivers/mmc/sunxi_mmc.h @@ -0,0 +1,138 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2007-2011 + * Allwinner Technology Co., Ltd. <www.allwinnertech.com> + * Aaron <leafy.myeh@allwinnertech.com> + * + * MMC register definition for allwinner sunxi platform. + */ + +#ifndef _SUNXI_MMC_H +#define _SUNXI_MMC_H + +#include <linux/types.h> + +struct sunxi_mmc { + u32 gctrl; /* 0x00 global control */ + u32 clkcr; /* 0x04 clock control */ + u32 timeout; /* 0x08 time out */ + u32 width; /* 0x0c bus width */ + u32 blksz; /* 0x10 block size */ + u32 bytecnt; /* 0x14 byte count */ + u32 cmd; /* 0x18 command */ + u32 arg; /* 0x1c argument */ + u32 resp0; /* 0x20 response 0 */ + u32 resp1; /* 0x24 response 1 */ + u32 resp2; /* 0x28 response 2 */ + u32 resp3; /* 0x2c response 3 */ + u32 imask; /* 0x30 interrupt mask */ + u32 mint; /* 0x34 masked interrupt status */ + u32 rint; /* 0x38 raw interrupt status */ + u32 status; /* 0x3c status */ + u32 ftrglevel; /* 0x40 FIFO threshold watermark*/ + u32 funcsel; /* 0x44 function select */ + u32 cbcr; /* 0x48 CIU byte count */ + u32 bbcr; /* 0x4c BIU byte count */ + u32 dbgc; /* 0x50 debug enable */ + u32 res0; /* 0x54 reserved */ + u32 a12a; /* 0x58 Auto command 12 argument */ + u32 ntsr; /* 0x5c New timing set register */ + u32 res1[8]; + u32 dmac; /* 0x80 internal DMA control */ + u32 dlba; /* 0x84 internal DMA descr list base address */ + u32 idst; /* 0x88 internal DMA status */ + u32 idie; /* 0x8c internal DMA interrupt enable */ + u32 chda; /* 0x90 */ + u32 cbda; /* 0x94 */ + u32 res2[26]; +#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6) || defined(CONFIG_SUNXI_GEN_NCAT2) + u32 res3[17]; + u32 samp_dl; + u32 res4[46]; +#endif + u32 fifo; /* 0x100 / 0x200 FIFO access address */ +}; + +#define SUNXI_MMC_CLK_POWERSAVE (0x1 << 17) +#define SUNXI_MMC_CLK_ENABLE (0x1 << 16) +#define SUNXI_MMC_CLK_DIVIDER_MASK (0xff) + +#define SUNXI_MMC_GCTRL_SOFT_RESET (0x1 << 0) +#define SUNXI_MMC_GCTRL_FIFO_RESET (0x1 << 1) +#define SUNXI_MMC_GCTRL_DMA_RESET (0x1 << 2) +#define SUNXI_MMC_GCTRL_RESET (SUNXI_MMC_GCTRL_SOFT_RESET|\ + SUNXI_MMC_GCTRL_FIFO_RESET|\ + SUNXI_MMC_GCTRL_DMA_RESET) +#define SUNXI_MMC_GCTRL_DMA_ENABLE (0x1 << 5) +#define SUNXI_MMC_GCTRL_ACCESS_BY_AHB (0x1 << 31) + +#define SUNXI_MMC_CMD_RESP_EXPIRE (0x1 << 6) +#define SUNXI_MMC_CMD_LONG_RESPONSE (0x1 << 7) +#define SUNXI_MMC_CMD_CHK_RESPONSE_CRC (0x1 << 8) +#define SUNXI_MMC_CMD_DATA_EXPIRE (0x1 << 9) +#define SUNXI_MMC_CMD_WRITE (0x1 << 10) +#define SUNXI_MMC_CMD_AUTO_STOP (0x1 << 12) +#define SUNXI_MMC_CMD_WAIT_PRE_OVER (0x1 << 13) +#define SUNXI_MMC_CMD_SEND_INIT_SEQ (0x1 << 15) +#define SUNXI_MMC_CMD_UPCLK_ONLY (0x1 << 21) +#define SUNXI_MMC_CMD_START (0x1 << 31) + +#define SUNXI_MMC_RINT_RESP_ERROR (0x1 << 1) +#define SUNXI_MMC_RINT_COMMAND_DONE (0x1 << 2) +#define SUNXI_MMC_RINT_DATA_OVER (0x1 << 3) +#define SUNXI_MMC_RINT_TX_DATA_REQUEST (0x1 << 4) +#define SUNXI_MMC_RINT_RX_DATA_REQUEST (0x1 << 5) +#define SUNXI_MMC_RINT_RESP_CRC_ERROR (0x1 << 6) +#define SUNXI_MMC_RINT_DATA_CRC_ERROR (0x1 << 7) +#define SUNXI_MMC_RINT_RESP_TIMEOUT (0x1 << 8) +#define SUNXI_MMC_RINT_DATA_TIMEOUT (0x1 << 9) +#define SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE (0x1 << 10) +#define SUNXI_MMC_RINT_FIFO_RUN_ERROR (0x1 << 11) +#define SUNXI_MMC_RINT_HARD_WARE_LOCKED (0x1 << 12) +#define SUNXI_MMC_RINT_START_BIT_ERROR (0x1 << 13) +#define SUNXI_MMC_RINT_AUTO_COMMAND_DONE (0x1 << 14) +#define SUNXI_MMC_RINT_END_BIT_ERROR (0x1 << 15) +#define SUNXI_MMC_RINT_SDIO_INTERRUPT (0x1 << 16) +#define SUNXI_MMC_RINT_CARD_INSERT (0x1 << 30) +#define SUNXI_MMC_RINT_CARD_REMOVE (0x1 << 31) +#define SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT \ + (SUNXI_MMC_RINT_RESP_ERROR | \ + SUNXI_MMC_RINT_RESP_CRC_ERROR | \ + SUNXI_MMC_RINT_DATA_CRC_ERROR | \ + SUNXI_MMC_RINT_RESP_TIMEOUT | \ + SUNXI_MMC_RINT_DATA_TIMEOUT | \ + SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE | \ + SUNXI_MMC_RINT_FIFO_RUN_ERROR | \ + SUNXI_MMC_RINT_HARD_WARE_LOCKED | \ + SUNXI_MMC_RINT_START_BIT_ERROR | \ + SUNXI_MMC_RINT_END_BIT_ERROR) /* 0xbfc2 */ +#define SUNXI_MMC_RINT_INTERRUPT_DONE_BIT \ + (SUNXI_MMC_RINT_AUTO_COMMAND_DONE | \ + SUNXI_MMC_RINT_DATA_OVER | \ + SUNXI_MMC_RINT_COMMAND_DONE | \ + SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE) + +#define SUNXI_MMC_STATUS_RXWL_FLAG (0x1 << 0) +#define SUNXI_MMC_STATUS_TXWL_FLAG (0x1 << 1) +#define SUNXI_MMC_STATUS_FIFO_EMPTY (0x1 << 2) +#define SUNXI_MMC_STATUS_FIFO_FULL (0x1 << 3) +#define SUNXI_MMC_STATUS_CARD_PRESENT (0x1 << 8) +#define SUNXI_MMC_STATUS_CARD_DATA_BUSY (0x1 << 9) +#define SUNXI_MMC_STATUS_DATA_FSM_BUSY (0x1 << 10) +#define SUNXI_MMC_STATUS_FIFO_LEVEL(reg) (((reg) >> 17) & 0x3fff) + +#define SUNXI_MMC_NTSR_MODE_SEL_NEW (0x1 << 31) + +#define SUNXI_MMC_IDMAC_RESET (0x1 << 0) +#define SUNXI_MMC_IDMAC_FIXBURST (0x1 << 1) +#define SUNXI_MMC_IDMAC_ENABLE (0x1 << 7) + +#define SUNXI_MMC_IDIE_TXIRQ (0x1 << 0) +#define SUNXI_MMC_IDIE_RXIRQ (0x1 << 1) + +#define SUNXI_MMC_COMMON_CLK_GATE (1 << 16) +#define SUNXI_MMC_COMMON_RESET (1 << 18) + +#define SUNXI_MMC_CAL_DL_SW_EN (0x1 << 7) + +#endif /* _SUNXI_MMC_H */ diff --git a/drivers/mtd/hbmc-am654.c b/drivers/mtd/hbmc-am654.c index c86e504da30..8161087b50c 100644 --- a/drivers/mtd/hbmc-am654.c +++ b/drivers/mtd/hbmc-am654.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 // -// Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ +// Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ // Author: Vignesh Raghavendra <vigneshr@ti.com> #include <common.h> diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index 2b2efc85318..732b0760452 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -134,6 +134,13 @@ config SPI_FLASH_BAR Bank/Extended address registers are used to access the flash which has size > 16MiB in 3-byte addressing. +config SPI_FLASH_LOCK + bool "Enable the Locking feature" + default y + help + Enable the SPI flash lock support. By default this is set to y. + If you intend not to use the lock support you should say n here. + config SPI_FLASH_UNLOCK_ALL bool "Unlock the entire SPI flash on u-boot startup" default y diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index db20feb4dae..9a1801ba93d 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -1100,6 +1100,7 @@ static int spansion_erase_non_uniform(struct spi_nor *nor, u32 addr, } #endif +#if defined(CONFIG_SPI_FLASH_LOCK) #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) /* Write status register and ensure bits in mask match written values */ static int write_sr_and_check(struct spi_nor *nor, u8 status_new, u8 mask) @@ -1387,6 +1388,7 @@ static int stm_is_unlocked(struct spi_nor *nor, loff_t ofs, uint64_t len) return stm_is_unlocked_sr(nor, ofs, len, status); } #endif /* CONFIG_SPI_FLASH_STMICRO */ +#endif static const struct flash_info *spi_nor_read_id(struct spi_nor *nor) { @@ -1462,6 +1464,7 @@ read_err: return ret; } +#if defined(CONFIG_SPI_FLASH_LOCK) #ifdef CONFIG_SPI_FLASH_SST /* * sst26 flash series has its own block protection implementation: @@ -1730,6 +1733,8 @@ sst_write_err: return ret; } #endif +#endif + /* * Write an address range to the nor chip. Data must be written in * FLASH_PAGESIZE chunks. The address range may be any size provided @@ -4104,6 +4109,7 @@ int spi_nor_scan(struct spi_nor *nor) mtd->_read = spi_nor_read; mtd->_write = spi_nor_write; +#if defined(CONFIG_SPI_FLASH_LOCK) #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) /* NOR protection support for STmicro/Micron chips and similar */ if (JEDEC_MFR(info) == SNOR_MFR_ST || @@ -4127,7 +4133,7 @@ int spi_nor_scan(struct spi_nor *nor) nor->flash_is_unlocked = sst26_is_unlocked; } #endif - +#endif if (info->flags & USE_FSR) nor->flags |= SNOR_F_USE_FSR; if (info->flags & SPI_NOR_HAS_TB) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 77eb9f352c6..3cb132dcffc 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -3,7 +3,7 @@ * * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. * Copyright (C) 2016 Jagan Teki <jagan@openedev.com> - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/drivers/mux/mux-uclass.c b/drivers/mux/mux-uclass.c index 8870305313a..c98576ceb81 100644 --- a/drivers/mux/mux-uclass.c +++ b/drivers/mux/mux-uclass.c @@ -7,7 +7,7 @@ * Copyright (C) 2017 Axentia Technologies AB * Author: Peter Rosin <peda@axentia.se> * - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/net/phy/et1011c.c b/drivers/net/phy/et1011c.c index fa4831427d5..db879bc73f2 100644 --- a/drivers/net/phy/et1011c.c +++ b/drivers/net/phy/et1011c.c @@ -3,7 +3,7 @@ * ET1011C PHY driver * * Derived from Linux kernel driver by Chaithrika U S - * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ #include <config.h> #include <phy.h> diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index 4ba9ee1529e..a12f7e32e8f 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -168,9 +168,7 @@ struct emac_eth_dev { struct clk ephy_clk; struct reset_ctl tx_rst; struct reset_ctl ephy_rst; -#if CONFIG_IS_ENABLED(DM_GPIO) struct gpio_desc reset_gpio; -#endif struct udevice *phy_reg; }; @@ -617,7 +615,6 @@ err_tx_clk: return ret; } -#if CONFIG_IS_ENABLED(DM_GPIO) static int sun8i_mdio_reset(struct mii_dev *bus) { struct udevice *dev = bus->priv; @@ -649,7 +646,6 @@ static int sun8i_mdio_reset(struct mii_dev *bus) return 0; } -#endif static int sun8i_mdio_init(const char *name, struct udevice *priv) { @@ -664,9 +660,7 @@ static int sun8i_mdio_init(const char *name, struct udevice *priv) bus->write = sun8i_mdio_write; snprintf(bus->name, sizeof(bus->name), name); bus->priv = (void *)priv; -#if CONFIG_IS_ENABLED(DM_GPIO) bus->reset = sun8i_mdio_reset; -#endif return mdio_register(bus); } @@ -783,9 +777,7 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev) const fdt32_t *reg; int node = dev_of_offset(dev); int offset = 0; -#if CONFIG_IS_ENABLED(DM_GPIO) int reset_flags = GPIOD_IS_OUT; -#endif int ret; pdata->iobase = dev_read_addr(dev); @@ -872,7 +864,6 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev) printf("%s: Invalid RX delay value %d\n", __func__, sun8i_pdata->rx_delay_ps); -#if CONFIG_IS_ENABLED(DM_GPIO) if (fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), "snps,reset-active-low")) reset_flags |= GPIOD_ACTIVE_LOW; @@ -887,7 +878,6 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev) } else if (ret == -ENOENT) { ret = 0; } -#endif return 0; } diff --git a/drivers/net/ti/Kconfig b/drivers/net/ti/Kconfig index 02660e4fbb4..c75f4186285 100644 --- a/drivers/net/ti/Kconfig +++ b/drivers/net/ti/Kconfig @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ config DRIVER_TI_CPSW bool "TI Common Platform Ethernet Switch" diff --git a/drivers/net/ti/Makefile b/drivers/net/ti/Makefile index 8d3808bb4b6..0ce0cf2828a 100644 --- a/drivers/net/ti/Makefile +++ b/drivers/net/ti/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ obj-$(CONFIG_DRIVER_TI_CPSW) += cpsw.o cpsw-common.o cpsw_mdio.o obj-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o diff --git a/drivers/net/ti/cpsw.c b/drivers/net/ti/cpsw.c index 877be7fca52..9a5e9642df1 100644 --- a/drivers/net/ti/cpsw.c +++ b/drivers/net/ti/cpsw.c @@ -2,7 +2,7 @@ /* * CPSW Ethernet Switch Driver * - * Copyright (C) 2010-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010-2018 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/drivers/net/ti/cpsw_mdio.c b/drivers/net/ti/cpsw_mdio.c index ac791faa813..74cc956785f 100644 --- a/drivers/net/ti/cpsw_mdio.c +++ b/drivers/net/ti/cpsw_mdio.c @@ -2,7 +2,7 @@ /* * CPSW MDIO generic driver for TI AMxx/K2x/EMAC devices. * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/drivers/net/ti/cpsw_mdio.h b/drivers/net/ti/cpsw_mdio.h index 9b98763656f..ddf65a4686d 100644 --- a/drivers/net/ti/cpsw_mdio.h +++ b/drivers/net/ti/cpsw_mdio.h @@ -2,7 +2,7 @@ /* * CPSW MDIO generic driver API for TI AMxx/K2x/EMAC devices. * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef CPSW_MDIO_H_ diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 5d4de86e71a..2e8723186c0 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ # Written by Jean-Jacques Hiblot <jjhiblot@ti.com> obj-y += allwinner/ diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index fc5044fd5d3..4bb8a0ca7f3 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -7,7 +7,7 @@ * Copyright (c) 2018 Cadence Design Systems * Author: Alan Douglas <adouglas@cadence.com> * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Jean-Jacques Hiblot <jjhiblot@ti.com> * */ diff --git a/drivers/phy/keystone-usb-phy.c b/drivers/phy/keystone-usb-phy.c index 6799e232370..3bb9c0814c1 100644 --- a/drivers/phy/keystone-usb-phy.c +++ b/drivers/phy/keystone-usb-phy.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/phy/nop-phy.c b/drivers/phy/nop-phy.c index d0904f4f075..c53e3216d0f 100644 --- a/drivers/phy/nop-phy.c +++ b/drivers/phy/nop-phy.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/phy/omap-usb2-phy.c b/drivers/phy/omap-usb2-phy.c index 2a9604cdcc4..d3d38062ecf 100644 --- a/drivers/phy/omap-usb2-phy.c +++ b/drivers/phy/omap-usb2-phy.c @@ -2,7 +2,7 @@ /* * OMAP USB2 PHY LAYER * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c index 22f2fe91487..0dcfe258bc4 100644 --- a/drivers/phy/phy-uclass.c +++ b/drivers/phy/phy-uclass.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/phy/sandbox-phy.c b/drivers/phy/sandbox-phy.c index 7b3d988613b..7e123da25fb 100644 --- a/drivers/phy/sandbox-phy.c +++ b/drivers/phy/sandbox-phy.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/phy/ti-pipe3-phy.c b/drivers/phy/ti-pipe3-phy.c index 313735844ab..29a35ae5ffb 100644 --- a/drivers/phy/ti-pipe3-phy.c +++ b/drivers/phy/ti-pipe3-phy.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c index 72613399073..daf62f5deda 100644 --- a/drivers/phy/ti/phy-j721e-wiz.c +++ b/drivers/phy/ti/phy-j721e-wiz.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index bdf6360f176..37ea93715d1 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -50,7 +50,7 @@ static const char *sunxi_pinctrl_get_pin_name(struct udevice *dev, uint pin_selector) { const struct sunxi_pinctrl_desc *desc = dev_get_priv(dev); - static char pin_name[sizeof("PN31")]; + static char pin_name[sizeof("PN31")] __section(".data"); snprintf(pin_name, sizeof(pin_name), "P%c%d", pin_selector / SUNXI_GPIOS_PER_BANK + desc->first_bank + 'A', diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 7f3b990d231..2395720c99c 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -101,6 +101,15 @@ config AXP305_POWER Select this to enable support for the axp305 pmic found on most H616 boards. +config AXP313_POWER + bool "axp313 pmic support" + depends on MACH_SUN50I_H616 + select AXP_PMIC_BUS + select CMD_POWEROFF + ---help--- + Select this to enable support for the AXP313 PMIC found on some + H616 boards. + config AXP809_POWER bool "axp809 pmic support" depends on MACH_SUN9I @@ -143,9 +152,10 @@ config AXP_DCDC1_VOLT config AXP_DCDC2_VOLT int "axp pmic dcdc2 voltage" - depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER + depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER || AXP313_POWER default 900 if AXP818_POWER default 1400 if AXP152_POWER || AXP209_POWER + default 1000 if AXP313_POWER default 1200 if MACH_SUN6I default 1100 if MACH_SUN8I default 0 if MACH_SUN9I @@ -158,13 +168,15 @@ config AXP_DCDC2_VOLT On A80 boards dcdc2 powers the GPU and can be left off. On A83T boards dcdc2 is used for VDD-CPUA(cluster 0) and should be 0.9V. On R40 boards dcdc2 is VDD-CPU and should be 1.1V + On boards using the AXP313 it's often VDD-CPU. config AXP_DCDC3_VOLT int "axp pmic dcdc3 voltage" - depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER + depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER || AXP313_POWER default 900 if AXP809_POWER || AXP818_POWER default 1500 if AXP152_POWER default 1250 if AXP209_POWER + default 1100 if AXP313_POWER default 1100 if MACH_SUN8I_R40 default 1200 if MACH_SUN6I || MACH_SUN8I ---help--- @@ -177,10 +189,11 @@ config AXP_DCDC3_VOLT On A80 boards dcdc3 is used for VDD-CPUA(cluster 0) and should be 0.9V. On A83T boards dcdc3 is used for VDD-CPUB(cluster 1) and should be 0.9V. On R40 boards dcdc3 is VDD-SYS and VDD-GPU and should be 1.1V. + On boards using the AXP313 it's often VDD-DRAM and should be 1.1V for LPDDR4. config AXP_DCDC4_VOLT int "axp pmic dcdc4 voltage" - depends on AXP152_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER || AXP305_POWER + depends on AXP152_POWER || AXP221_POWER || AXP809_POWER || AXP305_POWER default 1250 if AXP152_POWER default 1200 if MACH_SUN6I default 0 if MACH_SUN8I diff --git a/drivers/power/Makefile b/drivers/power/Makefile index ba64b2c5938..c7ee4595fc8 100644 --- a/drivers/power/Makefile +++ b/drivers/power/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_AXP152_POWER) += axp152.o obj-$(CONFIG_AXP209_POWER) += axp209.o obj-$(CONFIG_AXP221_POWER) += axp221.o obj-$(CONFIG_AXP305_POWER) += axp305.o +obj-$(CONFIG_AXP313_POWER) += axp313.o obj-$(CONFIG_AXP809_POWER) += axp809.o obj-$(CONFIG_AXP818_POWER) += axp818.o obj-$(CONFIG_EXYNOS_TMU) += exynos-tmu.o diff --git a/drivers/power/axp313.c b/drivers/power/axp313.c new file mode 100644 index 00000000000..bbc9e911115 --- /dev/null +++ b/drivers/power/axp313.c @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * AXP313(a) driver + * + * (C) Copyright 2023 Arm Ltd. + * + * Based on axp305.c + * (C) Copyright 2020 Jernej Skrabec <jernej.skrabec@siol.net> + * (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com> + * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> + */ + +#include <common.h> +#include <command.h> +#include <errno.h> +#include <asm/arch/pmic_bus.h> +#include <axp_pmic.h> + +enum axp313_reg { + AXP313_CHIP_VERSION = 0x03, + AXP313_OUTPUT_CTRL = 0x10, + AXP313_DCDC1_CTRL = 0x13, + AXP313_SHUTDOWN = 0x1a, +}; + +#define AXP313_CHIP_VERSION_MASK 0xcf +#define AXP313_CHIP_VERSION_AXP1530 0x48 +#define AXP313_CHIP_VERSION_AXP313A 0x4b +#define AXP313_CHIP_VERSION_AXP313B 0x4c + +#define AXP313_DCDC_SPLIT_OFFSET 71 +#define AXP313_DCDC_SPLIT_MVOLT 1200 + +#define AXP313_POWEROFF BIT(7) + +static u8 mvolt_to_cfg(int mvolt, int min, int max, int div) +{ + if (mvolt < min) + mvolt = min; + else if (mvolt > max) + mvolt = max; + + return (mvolt - min) / div; +} + +static int axp_set_dcdc(int dcdc_num, unsigned int mvolt) +{ + int ret; + u8 cfg, enable_mask = 1U << (dcdc_num - 1); + int volt_reg = AXP313_DCDC1_CTRL + dcdc_num - 1; + int max_mV; + + switch (dcdc_num) { + case 1: + case 2: + max_mV = 1540; + break; + case 3: + /* + * The manual defines a different split point, but tests + * show that it's the same 1200mV as for DCDC1/2. + */ + max_mV = 1840; + break; + default: + return -EINVAL; + } + + if (mvolt > AXP313_DCDC_SPLIT_MVOLT) + cfg = AXP313_DCDC_SPLIT_OFFSET + mvolt_to_cfg(mvolt, + AXP313_DCDC_SPLIT_MVOLT + 20, max_mV, 20); + else + cfg = mvolt_to_cfg(mvolt, 500, AXP313_DCDC_SPLIT_MVOLT, 10); + + if (mvolt == 0) + return pmic_bus_clrbits(AXP313_OUTPUT_CTRL, enable_mask); + + debug("DCDC%d: writing 0x%x to reg 0x%x\n", dcdc_num, cfg, volt_reg); + ret = pmic_bus_write(volt_reg, cfg); + if (ret) + return ret; + + return pmic_bus_setbits(AXP313_OUTPUT_CTRL, enable_mask); +} + +int axp_set_dcdc2(unsigned int mvolt) +{ + return axp_set_dcdc(2, mvolt); +} + +int axp_set_dcdc3(unsigned int mvolt) +{ + return axp_set_dcdc(3, mvolt); +} + +int axp_init(void) +{ + u8 axp_chip_id; + int ret; + + ret = pmic_bus_init(); + if (ret) + return ret; + + ret = pmic_bus_read(AXP313_CHIP_VERSION, &axp_chip_id); + if (ret) + return ret; + + axp_chip_id &= AXP313_CHIP_VERSION_MASK; + switch (axp_chip_id) { + case AXP313_CHIP_VERSION_AXP1530: + case AXP313_CHIP_VERSION_AXP313A: + case AXP313_CHIP_VERSION_AXP313B: + break; + default: + debug("unknown PMIC: 0x%x\n", axp_chip_id); + return -EINVAL; + } + + return ret; +} + +#if !CONFIG_IS_ENABLED(ARM_PSCI_FW) && !IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF) +int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + pmic_bus_write(AXP313_SHUTDOWN, AXP313_POWEROFF); + + /* infinite loop during shutdown */ + while (1) {} + + /* not reached */ + return 0; +} +#endif diff --git a/drivers/power/domain/ti-power-domain.c b/drivers/power/domain/ti-power-domain.c index 9e7151307c8..b34c982f4f5 100644 --- a/drivers/power/domain/ti-power-domain.c +++ b/drivers/power/domain/ti-power-domain.c @@ -2,7 +2,7 @@ /* * Texas Instruments power domain driver * - * Copyright (C) 2020-2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> */ diff --git a/drivers/power/domain/ti-sci-power-domain.c b/drivers/power/domain/ti-sci-power-domain.c index 0140e5e5217..8d6abe13dbc 100644 --- a/drivers/power/domain/ti-sci-power-domain.c +++ b/drivers/power/domain/ti-sci-power-domain.c @@ -2,7 +2,7 @@ /* * Texas Instruments System Control Interface (TI SCI) power domain driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Andreas Dannenberg <dannenberg@ti.com> * * Loosely based on Linux kernel ti_sci_pm_domains.c... diff --git a/drivers/power/pmic/axp.c b/drivers/power/pmic/axp.c index 025dac24f28..0e1e45fba74 100644 --- a/drivers/power/pmic/axp.c +++ b/drivers/power/pmic/axp.c @@ -87,6 +87,7 @@ static const struct udevice_id axp_pmic_ids[] = { { .compatible = "x-powers,axp209", .data = AXP209_ID }, { .compatible = "x-powers,axp221", .data = AXP221_ID }, { .compatible = "x-powers,axp223", .data = AXP223_ID }, + { .compatible = "x-powers,axp313a", .data = AXP313_ID }, { .compatible = "x-powers,axp803", .data = AXP803_ID }, { .compatible = "x-powers,axp806", .data = AXP806_ID }, { .compatible = "x-powers,axp809", .data = AXP809_ID }, diff --git a/drivers/power/pmic/pmic_tps62362.c b/drivers/power/pmic/pmic_tps62362.c index 59190d6f672..6426d1488a5 100644 --- a/drivers/power/pmic/pmic_tps62362.c +++ b/drivers/power/pmic/pmic_tps62362.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * (C) Copyright 2014 Texas Instruments Incorporated - http://www.ti.com + * (C) Copyright 2014 Texas Instruments Incorporated - https://www.ti.com * Author: Felipe Balbi <balbi@ti.com> */ diff --git a/drivers/power/regulator/axp_regulator.c b/drivers/power/regulator/axp_regulator.c index 02f320eac1e..d27e09538e0 100644 --- a/drivers/power/regulator/axp_regulator.c +++ b/drivers/power/regulator/axp_regulator.c @@ -173,6 +173,22 @@ static const struct axp_regulator_plat axp22x_regulators[] = { { } }; +/* + * The "dcdc1" regulator has another range, beyond 1.54V up to 3.4V, in + * steps of 100mV. We cannot model this easily, but also don't need that, + * since it's typically only used for ~1.1V anyway, so just ignore it. + * Also the DCDC3 regulator is described wrongly in the (available) manual, + * experiments show that the split point is at 1200mV, as for DCDC1/2. + */ +static const struct axp_regulator_plat axp313_regulators[] = { + { "dcdc1", 0x10, BIT(0), 0x13, 0x7f, 500, 1540, 10, 70 }, + { "dcdc2", 0x10, BIT(1), 0x14, 0x7f, 500, 1540, 10, 70 }, + { "dcdc3", 0x10, BIT(2), 0x15, 0x7f, 500, 1840, 10, 70 }, + { "aldo1", 0x10, BIT(3), 0x16, 0x1f, 500, 3500, 100, NA }, + { "dldo1", 0x10, BIT(4), 0x17, 0x1f, 500, 3500, 100, NA }, + { } +}; + static const struct axp_regulator_plat axp803_regulators[] = { { "dcdc1", 0x10, BIT(0), 0x20, 0x1f, 1600, 3400, 100, NA }, { "dcdc2", 0x10, BIT(1), 0x21, 0x7f, 500, 1300, 10, 70 }, @@ -274,6 +290,7 @@ static const struct axp_regulator_plat *const axp_regulators[] = { [AXP209_ID] = axp20x_regulators, [AXP221_ID] = axp22x_regulators, [AXP223_ID] = axp22x_regulators, + [AXP313_ID] = axp313_regulators, [AXP803_ID] = axp803_regulators, [AXP806_ID] = axp806_regulators, [AXP809_ID] = axp809_regulators, diff --git a/drivers/power/regulator/tps62360_regulator.c b/drivers/power/regulator/tps62360_regulator.c index b9f4504539e..7014b1982d0 100644 --- a/drivers/power/regulator/tps62360_regulator.c +++ b/drivers/power/regulator/tps62360_regulator.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Tero Kristo <t-kristo@ti.com> */ diff --git a/drivers/ram/k3-am654-ddrss.c b/drivers/ram/k3-am654-ddrss.c index 4a8a6a90bfc..cff8ffc8929 100644 --- a/drivers/ram/k3-am654-ddrss.c +++ b/drivers/ram/k3-am654-ddrss.c @@ -2,7 +2,7 @@ /* * Texas Instruments' AM654 DDRSS driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/drivers/ram/k3-am654-ddrss.h b/drivers/ram/k3-am654-ddrss.h index c87f186291e..9d03ae10750 100644 --- a/drivers/ram/k3-am654-ddrss.h +++ b/drivers/ram/k3-am654-ddrss.h @@ -2,7 +2,7 @@ /* * AM654: DDRSS Register definitions and structures. * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> * */ diff --git a/drivers/ram/k3-ddrss/Makefile b/drivers/ram/k3-ddrss/Makefile index ba5d9a2f4d3..823d1887178 100644 --- a/drivers/ram/k3-ddrss/Makefile +++ b/drivers/ram/k3-ddrss/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2019-2022 Texas Instruments Incorporated - http://www.ti.com/ +# Copyright (C) 2019-2022 Texas Instruments Incorporated - https://www.ti.com/ # obj-$(CONFIG_K3_DDRSS) += k3-ddrss.o diff --git a/drivers/ram/k3-ddrss/k3-ddrss.c b/drivers/ram/k3-ddrss/k3-ddrss.c index 5b6089e8526..a5c9b82cf1d 100644 --- a/drivers/ram/k3-ddrss/k3-ddrss.c +++ b/drivers/ram/k3-ddrss/k3-ddrss.c @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 DDRSS driver * - * Copyright (C) 2020-2021 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index 27e4a60ff5b..781de530aff 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ # # (C) Copyright 2015 -# Texas Instruments Incorporated - http://www.ti.com/ +# Texas Instruments Incorporated - https://www.ti.com/ # menu "Remote Processor drivers" diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile index fbe9c172bc0..e09ed1aa4d4 100644 --- a/drivers/remoteproc/Makefile +++ b/drivers/remoteproc/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ # # (C) Copyright 2015 -# Texas Instruments Incorporated - http://www.ti.com/ +# Texas Instruments Incorporated - https://www.ti.com/ # obj-$(CONFIG_$(SPL_)REMOTEPROC) += rproc-uclass.o rproc-elf-loader.o diff --git a/drivers/remoteproc/ipu_rproc.c b/drivers/remoteproc/ipu_rproc.c index b4a06bc955a..996e658e871 100644 --- a/drivers/remoteproc/ipu_rproc.c +++ b/drivers/remoteproc/ipu_rproc.c @@ -2,7 +2,7 @@ /* * IPU remoteproc driver for various SoCs * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Angela Stegmaier <angelabaker@ti.com> * Venkateswara Rao Mandela <venkat.mandela@ti.com> * Keerthy <j-keerthy@ti.com> diff --git a/drivers/remoteproc/k3_system_controller.c b/drivers/remoteproc/k3_system_controller.c index e2affe69c67..071de40fbd6 100644 --- a/drivers/remoteproc/k3_system_controller.c +++ b/drivers/remoteproc/k3_system_controller.c @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 System Controller Driver * - * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/drivers/remoteproc/pru_rproc.c b/drivers/remoteproc/pru_rproc.c index 924070a76b5..6ec55e27d9d 100644 --- a/drivers/remoteproc/pru_rproc.c +++ b/drivers/remoteproc/pru_rproc.c @@ -2,7 +2,7 @@ /* * PRU-RTU remoteproc driver for various SoCs * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Keerthy <j-keerthy@ti.com> */ diff --git a/drivers/remoteproc/rproc-uclass.c b/drivers/remoteproc/rproc-uclass.c index ece534c3c0e..28b362c887a 100644 --- a/drivers/remoteproc/rproc-uclass.c +++ b/drivers/remoteproc/rproc-uclass.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2015 - * Texas Instruments Incorporated - http://www.ti.com/ + * Texas Instruments Incorporated - https://www.ti.com/ */ #define LOG_CATEGORY UCLASS_REMOTEPROC diff --git a/drivers/remoteproc/sandbox_testproc.c b/drivers/remoteproc/sandbox_testproc.c index d360cf3169f..f76f68ebeb4 100644 --- a/drivers/remoteproc/sandbox_testproc.c +++ b/drivers/remoteproc/sandbox_testproc.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2015 - * Texas Instruments Incorporated - http://www.ti.com/ + * Texas Instruments Incorporated - https://www.ti.com/ */ #define pr_fmt(fmt) "%s: " fmt, __func__ #include <common.h> diff --git a/drivers/remoteproc/ti_k3_arm64_rproc.c b/drivers/remoteproc/ti_k3_arm64_rproc.c index 99f11000dfb..767493c1383 100644 --- a/drivers/remoteproc/ti_k3_arm64_rproc.c +++ b/drivers/remoteproc/ti_k3_arm64_rproc.c @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 ARM64 Remoteproc driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> * */ diff --git a/drivers/remoteproc/ti_k3_dsp_rproc.c b/drivers/remoteproc/ti_k3_dsp_rproc.c index 1a2e9dd1f58..576de4bb26e 100644 --- a/drivers/remoteproc/ti_k3_dsp_rproc.c +++ b/drivers/remoteproc/ti_k3_dsp_rproc.c @@ -2,7 +2,7 @@ /* * Texas Instruments' K3 DSP Remoteproc driver * - * Copyright (C) 2018-2020 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018-2020 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> * Suman Anna <s-anna@ti.com> */ diff --git a/drivers/remoteproc/ti_power_proc.c b/drivers/remoteproc/ti_power_proc.c index 6887a3c8541..f55df4a9119 100644 --- a/drivers/remoteproc/ti_power_proc.c +++ b/drivers/remoteproc/ti_power_proc.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2015-2016 - * Texas Instruments Incorporated - http://www.ti.com/ + * Texas Instruments Incorporated - https://www.ti.com/ */ #define pr_fmt(fmt) "%s: " fmt, __func__ #include <common.h> diff --git a/drivers/remoteproc/ti_sci_proc.h b/drivers/remoteproc/ti_sci_proc.h index 36351da63fc..167a7143e83 100644 --- a/drivers/remoteproc/ti_sci_proc.h +++ b/drivers/remoteproc/ti_sci_proc.h @@ -2,7 +2,7 @@ /* * Texas Instruments TI-SCI Processor Controller Helper Functions * - * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> * Suman Anna <s-anna@ti.com> */ diff --git a/drivers/reset/reset-dra7.c b/drivers/reset/reset-dra7.c index a9589d448dc..05101a94f9b 100644 --- a/drivers/reset/reset-dra7.c +++ b/drivers/reset/reset-dra7.c @@ -2,7 +2,7 @@ /* * Texas Instruments DRA7 reset driver * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ * Author: Keerthy <j-keerthy@ti.com> */ diff --git a/drivers/reset/reset-ti-sci.c b/drivers/reset/reset-ti-sci.c index f35332767b2..fd654a08f13 100644 --- a/drivers/reset/reset-ti-sci.c +++ b/drivers/reset/reset-ti-sci.c @@ -2,7 +2,7 @@ /* * Texas Instruments System Control Interface (TI SCI) reset driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Andreas Dannenberg <dannenberg@ti.com> * * Loosely based on Linux kernel reset-ti-sci.c... diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c index 363047d0f72..79ee400d12f 100644 --- a/drivers/scsi/scsi.c +++ b/drivers/scsi/scsi.c @@ -292,6 +292,7 @@ static int scsi_read_capacity(struct udevice *dev, struct scsi_cmd *pccb, pccb->cmd[0] = SCSI_RD_CAPAC10; pccb->cmd[1] = pccb->lun << 5; pccb->cmdlen = 10; + pccb->dma_dir = DMA_FROM_DEVICE; pccb->msgout[0] = SCSI_IDENTIFY; /* NOT USED */ pccb->datalen = 8; @@ -368,15 +369,12 @@ static void scsi_setup_test_unit_ready(struct scsi_cmd *pccb) */ static void scsi_init_dev_desc_priv(struct blk_desc *dev_desc) { + memset(dev_desc, 0, sizeof(struct blk_desc)); dev_desc->target = 0xff; dev_desc->lun = 0xff; dev_desc->log2blksz = LOG2_INVALID(typeof(dev_desc->log2blksz)); dev_desc->type = DEV_TYPE_UNKNOWN; - dev_desc->vendor[0] = 0; - dev_desc->product[0] = 0; - dev_desc->revision[0] = 0; - dev_desc->removable = false; #if IS_ENABLED(CONFIG_BOUNCE_BUFFER) dev_desc->bb = true; #endif /* CONFIG_BOUNCE_BUFFER */ @@ -440,6 +438,7 @@ static int scsi_detect_dev(struct udevice *dev, int target, int lun, for (count = 0; count < 3; count++) { pccb->datalen = 0; + pccb->dma_dir = DMA_NONE; scsi_setup_test_unit_ready(pccb); err = scsi_exec(dev, pccb); if (!err) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 9f0f84c9b42..6628a887de7 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -24,6 +24,21 @@ config BAUDRATE in the SPL stage (most drivers) or for choosing a default baudrate in the absence of an environment setting (serial_mxc.c). +config OF_SERIAL_BAUD + bool "Fetch serial baudrate from device tree" + depends on DM_SERIAL && SPL_ENV_SUPPORT + select DEFAULT_ENV_IS_RW + help + Select this to enable fetching and setting of the baudrate + configured in the DT. Replace the default baudrate with the DT + baudrate and also set it to the environment. + +config DEFAULT_ENV_IS_RW + bool "Make default environment as writable" + help + Select this to enable to make default environment writable. This + allows modifying the default environment. + config REQUIRE_SERIAL_CONSOLE bool "Require a serial port for console" # Running without a serial console is not supported by the diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index df6a387284a..e4fa3933bc8 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -155,12 +155,61 @@ static void serial_find_console_or_panic(void) } #endif /* CONFIG_SERIAL_PRESENT */ +/** + * check_valid_baudrate() - Check whether baudrate is valid or not + * + * @baud: baud rate to check + * Return: 0 if OK, -ve on error + */ +static int check_valid_baudrate(int baud) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(baudrate_table); ++i) { + if (baud == baudrate_table[i]) + return 0; + } + + return -EINVAL; +} + +int fetch_baud_from_dtb(void) +{ + int baud_value, ret; + + baud_value = ofnode_read_baud(); + ret = check_valid_baudrate(baud_value); + if (ret) + return ret; + + return baud_value; +} + /* Called prior to relocation */ int serial_init(void) { #if CONFIG_IS_ENABLED(SERIAL_PRESENT) serial_find_console_or_panic(); gd->flags |= GD_FLG_SERIAL_READY; + + if (IS_ENABLED(CONFIG_OF_SERIAL_BAUD)) { + int ret = 0; + char *ptr = (char*)&default_environment[0]; + + /* + * Fetch the baudrate from the dtb and update the value in the + * default environment. + */ + ret = fetch_baud_from_dtb(); + if (ret != -EINVAL && ret != -EFAULT) { + gd->baudrate = ret; + + while (*ptr != '\0' && *(ptr + 1) != '\0') + ptr++; + ptr += 2; + sprintf(ptr, "baudrate=%d", gd->baudrate); + } + } serial_setbrg(); #endif diff --git a/drivers/serial/serial_omap.c b/drivers/serial/serial_omap.c index 26310b0b746..49ced8f9fae 100644 --- a/drivers/serial/serial_omap.c +++ b/drivers/serial/serial_omap.c @@ -2,7 +2,7 @@ /* * Texas Instruments' OMAP serial driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla <lokeshvutla@ti.com> */ diff --git a/drivers/soc/soc-uclass.c b/drivers/soc/soc-uclass.c index dfad32d80db..8b3044fed8d 100644 --- a/drivers/soc/soc-uclass.c +++ b/drivers/soc/soc-uclass.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * (C) Copyright 2020 - Texas Instruments Incorporated - http://www.ti.com/ + * (C) Copyright 2020 - Texas Instruments Incorporated - https://www.ti.com/ * Dave Gerlach <d-gerlach@ti.com> */ diff --git a/drivers/soc/soc_sandbox.c b/drivers/soc/soc_sandbox.c index 5c82ad84fc2..15fdd9930cb 100644 --- a/drivers/soc/soc_sandbox.c +++ b/drivers/soc/soc_sandbox.c @@ -2,7 +2,7 @@ /* * Sandbox driver for the SOC uclass * - * (C) Copyright 2020 - Texas Instruments Incorporated - http://www.ti.com/ + * (C) Copyright 2020 - Texas Instruments Incorporated - https://www.ti.com/ * Dave Gerlach <d-gerlach@ti.com> */ diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c index b720131ae5d..355a5368dd4 100644 --- a/drivers/soc/soc_ti_k3.c +++ b/drivers/soc/soc_ti_k3.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ * Dave Gerlach <d-gerlach@ti.com> */ diff --git a/drivers/soc/ti/k3-navss-ringacc.c b/drivers/soc/ti/k3-navss-ringacc.c index e02889649b2..7a2fbb0db6e 100644 --- a/drivers/soc/ti/k3-navss-ringacc.c +++ b/drivers/soc/ti/k3-navss-ringacc.c @@ -2,7 +2,7 @@ /* * TI K3 AM65x NAVSS Ring accelerator Manager (RA) subsystem driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com */ #include <common.h> diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c index a7685a2f512..e02a3b3de37 100644 --- a/drivers/spi/cadence_ospi_versal.c +++ b/drivers/spi/cadence_ospi_versal.c @@ -44,8 +44,10 @@ int cadence_qspi_apb_dma_read(struct cadence_spi_priv *priv, priv->regbase + CQSPI_REG_INDIR_TRIG_ADDR_RANGE); writel(CQSPI_DFLT_DMA_PERIPH_CFG, priv->regbase + CQSPI_REG_DMA_PERIPH_CFG); - writel((unsigned long)rxbuf, priv->regbase + + writel(lower_32_bits((unsigned long)rxbuf), priv->regbase + CQSPI_DMA_DST_ADDR_REG); + writel(upper_32_bits((unsigned long)rxbuf), priv->regbase + + CQSPI_DMA_DST_ADDR_MSB_REG); writel(priv->trigger_address, priv->regbase + CQSPI_DMA_SRC_RD_ADDR_REG); writel(bytes_to_dma, priv->regbase + diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 9ebc4ed48f0..25f5e9fdebd 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/ * * Driver for SPI controller on DaVinci. Based on atmel_spi.c * by Atmel Corporation diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index ff7b55f8707..5cce6baa621 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -6,7 +6,7 @@ * Copyright (C) 2010 Dirk Behme <dirk.behme@googlemail.com> * * Driver for McSPI controller on OMAP3. Based on davinci_spi.c - * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/ * * Copyright (C) 2007 Atmel Corporation * diff --git a/drivers/spi/spi-mem-nodm.c b/drivers/spi/spi-mem-nodm.c index f9cadcc026d..6d9ab61769a 100644 --- a/drivers/spi/spi-mem-nodm.c +++ b/drivers/spi/spi-mem-nodm.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ #include <errno.h> diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index ec59ef58044..a323994fb2d 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -5,6 +5,8 @@ * Xilinx ZynqMP Generic Quad-SPI(QSPI) controller driver(master mode only) */ +#define LOG_CATEGORY UCLASS_SPI + #include <common.h> #include <cpu_func.h> #include <log.h> @@ -192,8 +194,6 @@ static int zynqmp_qspi_of_to_plat(struct udevice *bus) { struct zynqmp_qspi_plat *plat = dev_get_plat(bus); - debug("%s\n", __func__); - plat->regs = (struct zynqmp_qspi_regs *)(dev_read_addr(bus) + GQSPI_REG_OFFSET); plat->dma_regs = (struct zynqmp_qspi_dma_regs *) @@ -250,7 +250,7 @@ static u32 zynqmp_qspi_genfifo_mode(u8 buswidth) case 4: return GQSPI_SPI_MODE_QSPI; default: - debug("Unsupported bus width %u\n", buswidth); + log_warning("Unsupported bus width %u\n", buswidth); return GQSPI_SPI_MODE_SPI; } } @@ -262,6 +262,8 @@ static void zynqmp_qspi_fill_gen_fifo(struct zynqmp_qspi_priv *priv, u32 config_reg, ier; int ret = 0; + log_content("%s, GFIFO_CMD: 0x%X\n", __func__, gqspi_fifo_reg); + writel(gqspi_fifo_reg, ®s->genfifo); config_reg = readl(®s->confr); @@ -278,7 +280,7 @@ static void zynqmp_qspi_fill_gen_fifo(struct zynqmp_qspi_priv *priv, ret = wait_for_bit_le32(®s->isr, GQSPI_IXR_GFEMTY_MASK, 1, GQSPI_TIMEOUT, 1); if (ret) - printf("%s Timeout\n", __func__); + log_warning("%s, Timeout\n", __func__); } @@ -286,6 +288,8 @@ static void zynqmp_qspi_chipselect(struct zynqmp_qspi_priv *priv, int is_on) { u32 gqspi_fifo_reg = 0; + log_debug("%s, assert: %d\r\n", __func__, is_on); + if (is_on) { gqspi_fifo_reg = zynqmp_qspi_bus_select(priv); gqspi_fifo_reg |= GQSPI_SPI_MODE_SPI | @@ -295,8 +299,6 @@ static void zynqmp_qspi_chipselect(struct zynqmp_qspi_priv *priv, int is_on) gqspi_fifo_reg |= GQSPI_IMD_DATA_CS_DEASSERT; } - debug("GFIFO_CMD_CS: 0x%x\n", gqspi_fifo_reg); - zynqmp_qspi_fill_gen_fifo(priv, gqspi_fifo_reg); } @@ -311,8 +313,8 @@ static void zynqmp_qspi_set_tapdelay(struct udevice *bus, u32 baudrateval) clk_rate = plat->frequency; reqhz = (clk_rate / (GQSPI_BAUD_DIV_SHIFT << baudrateval)); - debug("%s, req_hz:%d, clk_rate:%d, baudrateval:%d\n", - __func__, reqhz, clk_rate, baudrateval); + log_debug("%s, clk_rate:%d, baudrateval:%d, bus_clk: %d\n", + __func__, clk_rate, baudrateval, reqhz); if (!(IS_ENABLED(CONFIG_ARCH_VERSAL) || IS_ENABLED(CONFIG_ARCH_VERSAL_NET))) { @@ -362,7 +364,8 @@ static int zynqmp_qspi_set_speed(struct udevice *bus, uint speed) u32 confr; u8 baud_rate_val = 0; - debug("%s\n", __func__); + log_debug("%s, Speed: %d, Max: %d\n", __func__, speed, plat->frequency); + if (speed > plat->frequency) speed = plat->frequency; @@ -383,9 +386,8 @@ static int zynqmp_qspi_set_speed(struct udevice *bus, uint speed) confr &= ~GQSPI_BAUD_DIV_MASK; confr |= (baud_rate_val << 3); writel(confr, ®s->confr); - zynqmp_qspi_set_tapdelay(bus, baud_rate_val); - debug("regs=%p, speed=%d\n", priv->regs, plat->speed_hz); + zynqmp_qspi_set_tapdelay(bus, baud_rate_val); } return 0; @@ -399,8 +401,6 @@ static int zynqmp_qspi_probe(struct udevice *bus) unsigned long clock; int ret; - debug("%s: bus:%p, priv:%p\n", __func__, bus, priv); - priv->regs = plat->regs; priv->dma_regs = plat->dma_regs; priv->io_mode = plat->io_mode; @@ -416,7 +416,6 @@ static int zynqmp_qspi_probe(struct udevice *bus) dev_err(bus, "failed to get rate\n"); return clock; } - debug("%s: CLK %ld\n", __func__, clock); ret = clk_enable(&clk); if (ret) { @@ -429,6 +428,8 @@ static int zynqmp_qspi_probe(struct udevice *bus) /* init the zynq spi hw */ zynqmp_qspi_init_hw(priv); + log_debug("%s, Rerence clock frequency: %ld\n", __func__, clock); + return 0; } @@ -438,7 +439,8 @@ static int zynqmp_qspi_set_mode(struct udevice *bus, uint mode) struct zynqmp_qspi_regs *regs = priv->regs; u32 confr; - debug("%s\n", __func__); + log_debug("%s, 0x%X\n", __func__, mode); + /* Set the SPI Clock phase and polarities */ confr = readl(®s->confr); confr &= ~(GQSPI_CONFIG_CPHA_MASK | GQSPI_CONFIG_CPOL_MASK); @@ -461,16 +463,11 @@ static int zynqmp_qspi_fill_tx_fifo(struct zynqmp_qspi_priv *priv, u32 size) u32 *buf = (u32 *)priv->tx_buf; u32 len = size; - debug("TxFIFO: 0x%x, size: 0x%x\n", readl(®s->isr), - size); - while (size) { ret = wait_for_bit_le32(®s->isr, GQSPI_IXR_TXNFULL_MASK, 1, GQSPI_TIMEOUT, 1); - if (ret) { - printf("%s: Timeout\n", __func__); - return ret; - } + if (ret) + return log_msg_ret("Timeout\n", ret); if (size >= 4) { writel(*buf, ®s->txd0r); @@ -501,10 +498,8 @@ static int zynqmp_qspi_fill_tx_fifo(struct zynqmp_qspi_priv *priv, u32 size) ret = wait_for_bit_le32(®s->isr, GQSPI_IXR_TXFIFOEMPTY_MASK, 1, GQSPI_TIMEOUT, 1); - if (ret) { - printf("%s: Timeout\n", __func__); - return ret; - } + if (ret) + return log_msg_ret("Timeout\n", ret); priv->tx_buf += len; return 0; @@ -516,6 +511,9 @@ static void zynqmp_qspi_genfifo_cmd(struct zynqmp_qspi_priv *priv) u32 gen_fifo_cmd; u8 i, dummy_cycles, addr; + log_debug("%s, opcode: 0x%0X, addr.nbytes: %d, dummy.mbytes: %d\r\n", + __func__, op->cmd.opcode, op->addr.nbytes, op->dummy.nbytes); + /* Send opcode */ gen_fifo_cmd = zynqmp_qspi_bus_select(priv); gen_fifo_cmd |= zynqmp_qspi_genfifo_mode(op->cmd.buswidth); @@ -532,8 +530,6 @@ static void zynqmp_qspi_genfifo_cmd(struct zynqmp_qspi_priv *priv) gen_fifo_cmd |= GQSPI_GFIFO_TX; gen_fifo_cmd |= addr; - debug("GFIFO_CMD_Cmd = 0x%x\n", gen_fifo_cmd); - zynqmp_qspi_fill_gen_fifo(priv, gen_fifo_cmd); } @@ -583,6 +579,8 @@ static int zynqmp_qspi_genfifo_fill_tx(struct zynqmp_qspi_priv *priv) u32 len; int ret = 0; + log_debug("%s, length: %d\r\n", __func__, priv->len); + gen_fifo_cmd = zynqmp_qspi_bus_select(priv); gen_fifo_cmd |= zynqmp_qspi_genfifo_mode(priv->op->data.buswidth); gen_fifo_cmd |= GQSPI_GFIFO_TX | GQSPI_GFIFO_DATA_XFR_MASK; @@ -591,8 +589,6 @@ static int zynqmp_qspi_genfifo_fill_tx(struct zynqmp_qspi_priv *priv) len = zynqmp_qspi_calc_exp(priv, &gen_fifo_cmd); zynqmp_qspi_fill_gen_fifo(priv, gen_fifo_cmd); - debug("GFIFO_CMD_TX:0x%x\n", gen_fifo_cmd); - if (gen_fifo_cmd & GQSPI_GFIFO_EXP_MASK) ret = zynqmp_qspi_fill_tx_fifo(priv, 1 << len); else @@ -608,7 +604,6 @@ static int zynqmp_qspi_start_io(struct zynqmp_qspi_priv *priv, u32 gen_fifo_cmd, u32 *buf) { u32 len; - u32 actuallen = priv->len; u32 config_reg, ier, isr; u32 timeout = GQSPI_TIMEOUT; struct zynqmp_qspi_regs *regs = priv->regs; @@ -623,7 +618,7 @@ static int zynqmp_qspi_start_io(struct zynqmp_qspi_priv *priv, else priv->bytes_to_receive = len; zynqmp_qspi_fill_gen_fifo(priv, gen_fifo_cmd); - debug("GFIFO_CMD_RX:0x%x\n", gen_fifo_cmd); + /* Manual start */ config_reg = readl(®s->confr); config_reg |= GQSPI_STRT_GEN_FIFO; @@ -652,13 +647,8 @@ static int zynqmp_qspi_start_io(struct zynqmp_qspi_priv *priv, } } - debug("buf:0x%lx, rxbuf:0x%lx, *buf:0x%x len: 0x%x\n", - (unsigned long)buf, (unsigned long)priv->rx_buf, - *buf, actuallen); - if (!timeout) { - printf("IO timeout: %d\n", readl(®s->isr)); - return -1; - } + if (!timeout) + return log_msg_retz("Timeout\n", timeout); } return 0; @@ -695,26 +685,18 @@ static int zynqmp_qspi_start_dma(struct zynqmp_qspi_priv *priv, while (priv->len) { zynqmp_qspi_calc_exp(priv, &gen_fifo_cmd); zynqmp_qspi_fill_gen_fifo(priv, gen_fifo_cmd); - - debug("GFIFO_CMD_RX:0x%x\n", gen_fifo_cmd); } ret = wait_for_bit_le32(&dma_regs->dmaisr, GQSPI_DMA_DST_I_STS_DONE, 1, GQSPI_TIMEOUT, 1); - if (ret) { - printf("DMA Timeout:0x%x\n", readl(&dma_regs->dmaisr)); - return -ETIMEDOUT; - } + if (ret) + return log_msg_ret("Timeout:\n", ret); invalidate_dcache_range(addr, addr + size); writel(GQSPI_DMA_DST_I_STS_DONE, &dma_regs->dmaisr); - debug("buf:0x%lx, rxbuf:0x%lx, *buf:0x%x len: 0x%x\n", - (unsigned long)buf, (unsigned long)priv->rx_buf, *buf, - actuallen); - if (buf != priv->rx_buf) memcpy(priv->rx_buf, buf, actuallen); @@ -731,6 +713,8 @@ static int zynqmp_qspi_genfifo_fill_rx(struct zynqmp_qspi_priv *priv) u32 *buf; u32 actuallen = priv->len; + log_debug("%s, length: %d\r\n", __func__, priv->len); + gen_fifo_cmd = zynqmp_qspi_bus_select(priv); gen_fifo_cmd |= zynqmp_qspi_genfifo_mode(priv->op->data.buswidth); gen_fifo_cmd |= GQSPI_GFIFO_RX | GQSPI_GFIFO_DATA_XFR_MASK; diff --git a/drivers/sysreset/sysreset-ti-sci.c b/drivers/sysreset/sysreset-ti-sci.c index 81bfd67ad99..5fc05c46cb0 100644 --- a/drivers/sysreset/sysreset-ti-sci.c +++ b/drivers/sysreset/sysreset-ti-sci.c @@ -2,7 +2,7 @@ /* * Texas Instruments System Control Interface (TI SCI) system reset driver * - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Andreas Dannenberg <dannenberg@ti.com> */ diff --git a/drivers/thermal/ti-bandgap.c b/drivers/thermal/ti-bandgap.c index 0b533d4c420..0ea17a909dd 100644 --- a/drivers/thermal/ti-bandgap.c +++ b/drivers/thermal/ti-bandgap.c @@ -1,7 +1,7 @@ /* * TI Bandgap temperature sensor driver * - * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/drivers/ufs/Makefile b/drivers/ufs/Makefile index 4f3344fd4e4..56a4b0776d3 100644 --- a/drivers/ufs/Makefile +++ b/drivers/ufs/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 # -# Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com +# Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com # obj-$(CONFIG_UFS) += ufs.o ufs-uclass.o diff --git a/drivers/ufs/cdns-platform.c b/drivers/ufs/cdns-platform.c index 8ebcb516340..d1f346937c5 100644 --- a/drivers/ufs/cdns-platform.c +++ b/drivers/ufs/cdns-platform.c @@ -2,7 +2,7 @@ /** * cdns-platform.c - Platform driver for Cadence UFSHCI device * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #include <clk.h> diff --git a/drivers/ufs/ti-j721e-ufs.c b/drivers/ufs/ti-j721e-ufs.c index d875269760c..1860e0dca29 100644 --- a/drivers/ufs/ti-j721e-ufs.c +++ b/drivers/ufs/ti-j721e-ufs.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ #include <asm/io.h> diff --git a/drivers/ufs/ufs-uclass.c b/drivers/ufs/ufs-uclass.c index ceea30c4a95..e6478a9209b 100644 --- a/drivers/ufs/ufs-uclass.c +++ b/drivers/ufs/ufs-uclass.c @@ -2,7 +2,7 @@ /** * ufs-uclass.c - Universal Flash Subsystem (UFS) Uclass driver * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #define LOG_CATEGORY UCLASS_UFS diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index 7c48d57f99d..346f0fd916f 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -5,7 +5,7 @@ * Taken from Linux Kernel v5.2 (drivers/scsi/ufs/ufshcd.c) and ported * to u-boot. * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #include <bouncebuf.h> diff --git a/drivers/usb/cdns3/cdns3-ti.c b/drivers/usb/cdns3/cdns3-ti.c index 8958f0166bd..92a7941ed15 100644 --- a/drivers/usb/cdns3/cdns3-ti.c +++ b/drivers/usb/cdns3/cdns3-ti.c @@ -2,7 +2,7 @@ /** * cdns_ti-ti.c - TI specific Glue layer for Cadence USB Controller * - * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com */ #include <common.h> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index f0c4aab6b9a..4b4fcd8a22e 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -2,7 +2,7 @@ /** * core.c - DesignWare USB3 DRD Controller Core file * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Authors: Felipe Balbi <balbi@ti.com>, * Sebastian Andrzej Siewior <bigeasy@linutronix.de> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 532746dd88d..4162a682298 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -2,7 +2,7 @@ /** * core.h - DesignWare USB3 DRD Core Header * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Authors: Felipe Balbi <balbi@ti.com>, * Sebastian Andrzej Siewior <bigeasy@linutronix.de> diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c index ff4ebfb4447..4fadb4a3e20 100644 --- a/drivers/usb/dwc3/dwc3-omap.c +++ b/drivers/usb/dwc3/dwc3-omap.c @@ -2,7 +2,7 @@ /** * dwc3-omap.c - OMAP Specific Glue layer * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Authors: Felipe Balbi <balbi@ti.com>, * Sebastian Andrzej Siewior <bigeasy@linutronix.de> diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c index 75ac993bc64..1133cf82b1a 100644 --- a/drivers/usb/dwc3/ep0.c +++ b/drivers/usb/dwc3/ep0.c @@ -2,7 +2,7 @@ /** * ep0.c - DesignWare USB3 DRD Controller Endpoint 0 Handling * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Authors: Felipe Balbi <balbi@ti.com>, * Sebastian Andrzej Siewior <bigeasy@linutronix.de> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 68cf32cd189..406d36ceafe 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2,7 +2,7 @@ /** * gadget.c - DesignWare USB3 DRD Controller Gadget Framework Link * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Authors: Felipe Balbi <balbi@ti.com>, * Sebastian Andrzej Siewior <bigeasy@linutronix.de> diff --git a/drivers/usb/dwc3/gadget.h b/drivers/usb/dwc3/gadget.h index 7806ce59a27..f28a9755dcb 100644 --- a/drivers/usb/dwc3/gadget.h +++ b/drivers/usb/dwc3/gadget.h @@ -2,7 +2,7 @@ /** * gadget.h - DesignWare USB3 DRD Gadget Header * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Authors: Felipe Balbi <balbi@ti.com>, * Sebastian Andrzej Siewior <bigeasy@linutronix.de> diff --git a/drivers/usb/dwc3/io.h b/drivers/usb/dwc3/io.h index 2407f826c16..04791d4c9be 100644 --- a/drivers/usb/dwc3/io.h +++ b/drivers/usb/dwc3/io.h @@ -2,7 +2,7 @@ /** * io.h - DesignWare USB3 DRD IO Header * - * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com * * Authors: Felipe Balbi <balbi@ti.com>, * Sebastian Andrzej Siewior <bigeasy@linutronix.de> diff --git a/drivers/usb/dwc3/linux-compat.h b/drivers/usb/dwc3/linux-compat.h index 3bb0bda5a6b..563f8727cdd 100644 --- a/drivers/usb/dwc3/linux-compat.h +++ b/drivers/usb/dwc3/linux-compat.h @@ -2,7 +2,7 @@ /** * linux-compat.h - DesignWare USB3 Linux Compatibiltiy Adapter Header * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Authors: Kishon Vijay Abraham I <kishon@ti.com> * diff --git a/drivers/usb/dwc3/ti_usb_phy.c b/drivers/usb/dwc3/ti_usb_phy.c index f476810763d..8ae130860f7 100644 --- a/drivers/usb/dwc3/ti_usb_phy.c +++ b/drivers/usb/dwc3/ti_usb_phy.c @@ -2,7 +2,7 @@ /** * ti_usb_phy.c - USB3 and USB3 PHY programming for dwc3 * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Author: Kishon Vijay Abraham I <kishon@ti.com> * diff --git a/drivers/usb/gadget/udc/udc-core.c b/drivers/usb/gadget/udc/udc-core.c index 7f73926cb3e..eb0b35969ce 100644 --- a/drivers/usb/gadget/udc/udc-core.c +++ b/drivers/usb/gadget/udc/udc-core.c @@ -2,7 +2,7 @@ /** * udc-core.c - Core UDC Framework * - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com * * Author: Felipe Balbi <balbi@ti.com> * diff --git a/drivers/usb/gadget/udc/udc-uclass.c b/drivers/usb/gadget/udc/udc-uclass.c index 3e433129ace..30ee1cab066 100644 --- a/drivers/usb/gadget/udc/udc-uclass.c +++ b/drivers/usb/gadget/udc/udc-uclass.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com * Written by Jean-Jacques Hiblot <jjhiblot@ti.com> */ diff --git a/drivers/usb/host/dwc3-of-simple.c b/drivers/usb/host/dwc3-of-simple.c index 66b3e96b007..f9df59d2e5d 100644 --- a/drivers/usb/host/dwc3-of-simple.c +++ b/drivers/usb/host/dwc3-of-simple.c @@ -2,7 +2,7 @@ /* * dwc3-of-simple.c - OF glue layer for simple integrations * - * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (c) 2015 Texas Instruments Incorporated - https://www.ti.com * * Author: Felipe Balbi <balbi@ti.com> * diff --git a/drivers/usb/ulpi/omap-ulpi-viewport.c b/drivers/usb/ulpi/omap-ulpi-viewport.c index 8d71db04a2d..1b01cd4c559 100644 --- a/drivers/usb/ulpi/omap-ulpi-viewport.c +++ b/drivers/usb/ulpi/omap-ulpi-viewport.c @@ -3,7 +3,7 @@ * OMAP ulpi viewport support * Based on drivers/usb/ulpi/ulpi-viewport.c * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com * Author: Govindraj R <govindraj.raja@ti.com> */ diff --git a/drivers/virtio/virtio_rng.c b/drivers/virtio/virtio_rng.c index b85545c2ee5..786359a6e36 100644 --- a/drivers/virtio/virtio_rng.c +++ b/drivers/virtio/virtio_rng.c @@ -20,7 +20,7 @@ struct virtio_rng_priv { static int virtio_rng_read(struct udevice *dev, void *data, size_t len) { int ret; - unsigned int rsize; + unsigned int rsize = 1; unsigned char buf[BUFFER_SIZE] __aligned(4); unsigned char *ptr = data; struct virtio_sg sg; @@ -29,7 +29,12 @@ static int virtio_rng_read(struct udevice *dev, void *data, size_t len) while (len) { sg.addr = buf; - sg.length = min(len, sizeof(buf)); + /* + * Work around implementations which always return 8 bytes + * less than requested, down to 0 bytes, which would + * cause an endless loop otherwise. + */ + sg.length = min(rsize ? len : len + 8, sizeof(buf)); sgs[0] = &sg; ret = virtqueue_add(priv->rng_vq, sgs, 0, 1); |