diff options
Diffstat (limited to 'include/configs/CPCI405AB.h')
| -rw-r--r-- | include/configs/CPCI405AB.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index de55e87694c..00adfd5998a 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -48,10 +48,10 @@ #if 0 #define CONFIG_PREBOOT \ - "crc32 f0207004 ffc 0;" \ - "if cmp 0 f0207000 1;" \ - "then;echo Old CRC is correct;crc32 f0207004 ff4 f0207000;" \ - "else;echo Old CRC is bad;fi" + "crc32 f0207004 ffc 0;" \ + "if cmp 0 f0207000 1;" \ + "then;echo Old CRC is correct;crc32 f0207004 ff4 f0207000;" \ + "else;echo Old CRC is bad;fi" #endif #undef CONFIG_BOOTARGS @@ -123,8 +123,8 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ + 57600, 115200, 230400, 460800, 921600 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ @@ -148,7 +148,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ @@ -239,7 +239,7 @@ #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ #define CFG_ENV_SIZE 0x400 /* 1024 bytes may be used for env vars*/ - /* total size of a CAT24WC08 is 1024 bytes */ + /* total size of a CAT24WC08 is 1024 bytes */ #endif #define CFG_NVRAM_BASE_ADDR 0xf0200000 /* NVRAM base address */ @@ -267,7 +267,7 @@ * Cache Configuration */ #define CFG_DCACHE_SIZE 16384 /* For IBM 405 CPUs, older 405 ppc's */ - /* have only 8kB, 16kB is save here */ + /* have only 8kB, 16kB is save here */ #define CFG_CACHELINE_SIZE 32 /* ... */ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ |