diff options
Diffstat (limited to 'include')
31 files changed, 293 insertions, 1133 deletions
diff --git a/include/bootm.h b/include/bootm.h index 9e0f8d60de0..6983375ff8b 100644 --- a/include/bootm.h +++ b/include/bootm.h @@ -273,21 +273,24 @@ int bootm_process_cmdline(char *buf, int maxlen, int flags); int bootm_process_cmdline_env(int flags); /** - * zboot_start() - Boot a zimage + * zboot_run() - Run through the various steps to boot a zimage * * Boot a zimage, given the component parts * * @addr: Address where the bzImage is moved before booting, either * BZIMAGE_LOAD_ADDR or ZIMAGE_LOAD_ADDR - * @base: Pointer to the boot parameters, typically at address - * DEFAULT_SETUP_BASE + * @size: Size of bzImage, or 0 to detect this * @initrd: Address of the initial ramdisk, or 0 if none * @initrd_size: Size of the initial ramdisk, or 0 if none - * @cmdline: Command line to use for booting + * @base_addr: If non-zero, this indicates that the boot parameters have already + * been loaded by the caller to this address, so the load_zimage() call + * in zboot_load() will be skipped when booting + * @cmdline: If non-NULL, the environment variable containing the command line + * to use for booting * Return: -EFAULT on error (normally it does not return) */ -int zboot_start(ulong addr, ulong size, ulong initrd, ulong initrd_size, - ulong base, char *cmdline); +int zboot_run(ulong addr, ulong size, ulong initrd, ulong initrd_size, + ulong base, char *cmdline); /* * zimage_get_kernel_version() - Get the version string from a kernel @@ -314,7 +317,7 @@ void zimage_dump(struct boot_params *base_ptr, bool show_cmdline); * bootm_boot_start() - Boot an image at the given address * * @addr: Image address - * @cmdline: Command line to set + * @cmdline: Command line to set, NULL for default */ int bootm_boot_start(ulong addr, const char *cmdline); diff --git a/include/configs/jethub.h b/include/configs/jethub.h index e22db4991de..2c44bfc853e 100644 --- a/include/configs/jethub.h +++ b/include/configs/jethub.h @@ -11,7 +11,7 @@ #if defined(CONFIG_MESON_AXG) #define BOOTENV_DEV_RESCUE(devtypeu, devtypel, instance) \ "bootcmd_rescue=" \ - "if gpio input 10; then " \ + "if gpio input periphs-banks10; then " \ "run bootcmd_mmc0; " \ "run bootcmd_usb0;" \ "fi;\0" diff --git a/include/configs/meson64.h b/include/configs/meson64.h index efab9a624dc..65fa5f3d6dd 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -120,6 +120,12 @@ #include <config_distro_bootcmd.h> +#ifdef CONFIG_OF_UPSTREAM +#define FDTFILE_NAME CONFIG_DEFAULT_DEVICE_TREE ".dtb" +#else +#define FDTFILE_NAME "amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb" +#endif + #ifndef CFG_EXTRA_ENV_SETTINGS #define CFG_EXTRA_ENV_SETTINGS \ "stdin=" STDIN_CFG "\0" \ @@ -133,7 +139,7 @@ "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ "fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \ "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \ - "fdtfile=amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "fdtfile=" FDTFILE_NAME "\0" \ "dfu_alt_info=fitimage ram " KERNEL_ADDR_R " 0x4000000 \0" \ BOOTENV #endif diff --git a/include/dt-bindings/gpio/meson-axg-gpio.h b/include/dt-bindings/gpio/meson-axg-gpio.h deleted file mode 100644 index 25bb1fffa97..00000000000 --- a/include/dt-bindings/gpio/meson-axg-gpio.h +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Copyright (c) 2017 Amlogic, Inc. All rights reserved. - * Author: Xingyu Chen <xingyu.chen@amlogic.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _DT_BINDINGS_MESON_AXG_GPIO_H -#define _DT_BINDINGS_MESON_AXG_GPIO_H - -/* First GPIO chip */ -#define GPIOAO_0 0 -#define GPIOAO_1 1 -#define GPIOAO_2 2 -#define GPIOAO_3 3 -#define GPIOAO_4 4 -#define GPIOAO_5 5 -#define GPIOAO_6 6 -#define GPIOAO_7 7 -#define GPIOAO_8 8 -#define GPIOAO_9 9 -#define GPIOAO_10 10 -#define GPIOAO_11 11 -#define GPIOAO_12 12 -#define GPIOAO_13 13 -#define GPIO_TEST_N 14 - -/* Second GPIO chip */ -#define GPIOZ_0 0 -#define GPIOZ_1 1 -#define GPIOZ_2 2 -#define GPIOZ_3 3 -#define GPIOZ_4 4 -#define GPIOZ_5 5 -#define GPIOZ_6 6 -#define GPIOZ_7 7 -#define GPIOZ_8 8 -#define GPIOZ_9 9 -#define GPIOZ_10 10 -#define BOOT_0 11 -#define BOOT_1 12 -#define BOOT_2 13 -#define BOOT_3 14 -#define BOOT_4 15 -#define BOOT_5 16 -#define BOOT_6 17 -#define BOOT_7 18 -#define BOOT_8 19 -#define BOOT_9 20 -#define BOOT_10 21 -#define BOOT_11 22 -#define BOOT_12 23 -#define BOOT_13 24 -#define BOOT_14 25 -#define GPIOA_0 26 -#define GPIOA_1 27 -#define GPIOA_2 28 -#define GPIOA_3 29 -#define GPIOA_4 30 -#define GPIOA_5 31 -#define GPIOA_6 32 -#define GPIOA_7 33 -#define GPIOA_8 34 -#define GPIOA_9 35 -#define GPIOA_10 36 -#define GPIOA_11 37 -#define GPIOA_12 38 -#define GPIOA_13 39 -#define GPIOA_14 40 -#define GPIOA_15 41 -#define GPIOA_16 42 -#define GPIOA_17 43 -#define GPIOA_18 44 -#define GPIOA_19 45 -#define GPIOA_20 46 -#define GPIOX_0 47 -#define GPIOX_1 48 -#define GPIOX_2 49 -#define GPIOX_3 50 -#define GPIOX_4 51 -#define GPIOX_5 52 -#define GPIOX_6 53 -#define GPIOX_7 54 -#define GPIOX_8 55 -#define GPIOX_9 56 -#define GPIOX_10 57 -#define GPIOX_11 58 -#define GPIOX_12 59 -#define GPIOX_13 60 -#define GPIOX_14 61 -#define GPIOX_15 62 -#define GPIOX_16 63 -#define GPIOX_17 64 -#define GPIOX_18 65 -#define GPIOX_19 66 -#define GPIOX_20 67 -#define GPIOX_21 68 -#define GPIOX_22 69 -#define GPIOY_0 70 -#define GPIOY_1 71 -#define GPIOY_2 72 -#define GPIOY_3 73 -#define GPIOY_4 74 -#define GPIOY_5 75 -#define GPIOY_6 76 -#define GPIOY_7 77 -#define GPIOY_8 78 -#define GPIOY_9 79 -#define GPIOY_10 80 -#define GPIOY_11 81 -#define GPIOY_12 82 -#define GPIOY_13 83 -#define GPIOY_14 84 -#define GPIOY_15 85 - -#endif /* _DT_BINDINGS_MESON_AXG_GPIO_H */ diff --git a/include/dt-bindings/gpio/meson-g12a-gpio.h b/include/dt-bindings/gpio/meson-g12a-gpio.h deleted file mode 100644 index f7bd69350d1..00000000000 --- a/include/dt-bindings/gpio/meson-g12a-gpio.h +++ /dev/null @@ -1,114 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ -/* - * Copyright (c) 2018 Amlogic, Inc. All rights reserved. - * Author: Xingyu Chen <xingyu.chen@amlogic.com> - */ - -#ifndef _DT_BINDINGS_MESON_G12A_GPIO_H -#define _DT_BINDINGS_MESON_G12A_GPIO_H - -/* First GPIO chip */ -#define GPIOAO_0 0 -#define GPIOAO_1 1 -#define GPIOAO_2 2 -#define GPIOAO_3 3 -#define GPIOAO_4 4 -#define GPIOAO_5 5 -#define GPIOAO_6 6 -#define GPIOAO_7 7 -#define GPIOAO_8 8 -#define GPIOAO_9 9 -#define GPIOAO_10 10 -#define GPIOAO_11 11 -#define GPIOE_0 12 -#define GPIOE_1 13 -#define GPIOE_2 14 - -/* Second GPIO chip */ -#define GPIOZ_0 0 -#define GPIOZ_1 1 -#define GPIOZ_2 2 -#define GPIOZ_3 3 -#define GPIOZ_4 4 -#define GPIOZ_5 5 -#define GPIOZ_6 6 -#define GPIOZ_7 7 -#define GPIOZ_8 8 -#define GPIOZ_9 9 -#define GPIOZ_10 10 -#define GPIOZ_11 11 -#define GPIOZ_12 12 -#define GPIOZ_13 13 -#define GPIOZ_14 14 -#define GPIOZ_15 15 -#define GPIOH_0 16 -#define GPIOH_1 17 -#define GPIOH_2 18 -#define GPIOH_3 19 -#define GPIOH_4 20 -#define GPIOH_5 21 -#define GPIOH_6 22 -#define GPIOH_7 23 -#define GPIOH_8 24 -#define BOOT_0 25 -#define BOOT_1 26 -#define BOOT_2 27 -#define BOOT_3 28 -#define BOOT_4 29 -#define BOOT_5 30 -#define BOOT_6 31 -#define BOOT_7 32 -#define BOOT_8 33 -#define BOOT_9 34 -#define BOOT_10 35 -#define BOOT_11 36 -#define BOOT_12 37 -#define BOOT_13 38 -#define BOOT_14 39 -#define BOOT_15 40 -#define GPIOC_0 41 -#define GPIOC_1 42 -#define GPIOC_2 43 -#define GPIOC_3 44 -#define GPIOC_4 45 -#define GPIOC_5 46 -#define GPIOC_6 47 -#define GPIOC_7 48 -#define GPIOA_0 49 -#define GPIOA_1 50 -#define GPIOA_2 51 -#define GPIOA_3 52 -#define GPIOA_4 53 -#define GPIOA_5 54 -#define GPIOA_6 55 -#define GPIOA_7 56 -#define GPIOA_8 57 -#define GPIOA_9 58 -#define GPIOA_10 59 -#define GPIOA_11 60 -#define GPIOA_12 61 -#define GPIOA_13 62 -#define GPIOA_14 63 -#define GPIOA_15 64 -#define GPIOX_0 65 -#define GPIOX_1 66 -#define GPIOX_2 67 -#define GPIOX_3 68 -#define GPIOX_4 69 -#define GPIOX_5 70 -#define GPIOX_6 71 -#define GPIOX_7 72 -#define GPIOX_8 73 -#define GPIOX_9 74 -#define GPIOX_10 75 -#define GPIOX_11 76 -#define GPIOX_12 77 -#define GPIOX_13 78 -#define GPIOX_14 79 -#define GPIOX_15 80 -#define GPIOX_16 81 -#define GPIOX_17 82 -#define GPIOX_18 83 -#define GPIOX_19 84 - -#endif /* _DT_BINDINGS_MESON_G12A_GPIO_H */ diff --git a/include/dt-bindings/gpio/meson-gxbb-gpio.h b/include/dt-bindings/gpio/meson-gxbb-gpio.h deleted file mode 100644 index 489c75b2764..00000000000 --- a/include/dt-bindings/gpio/meson-gxbb-gpio.h +++ /dev/null @@ -1,148 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * GPIO definitions for Amlogic Meson GXBB SoCs - * - * Copyright (C) 2016 Endless Mobile, Inc. - * Author: Carlo Caione <carlo@endlessm.com> - */ - -#ifndef _DT_BINDINGS_MESON_GXBB_GPIO_H -#define _DT_BINDINGS_MESON_GXBB_GPIO_H - -#define GPIOAO_0 0 -#define GPIOAO_1 1 -#define GPIOAO_2 2 -#define GPIOAO_3 3 -#define GPIOAO_4 4 -#define GPIOAO_5 5 -#define GPIOAO_6 6 -#define GPIOAO_7 7 -#define GPIOAO_8 8 -#define GPIOAO_9 9 -#define GPIOAO_10 10 -#define GPIOAO_11 11 -#define GPIOAO_12 12 -#define GPIOAO_13 13 -#define GPIO_TEST_N 14 - -#define GPIOZ_0 0 -#define GPIOZ_1 1 -#define GPIOZ_2 2 -#define GPIOZ_3 3 -#define GPIOZ_4 4 -#define GPIOZ_5 5 -#define GPIOZ_6 6 -#define GPIOZ_7 7 -#define GPIOZ_8 8 -#define GPIOZ_9 9 -#define GPIOZ_10 10 -#define GPIOZ_11 11 -#define GPIOZ_12 12 -#define GPIOZ_13 13 -#define GPIOZ_14 14 -#define GPIOZ_15 15 -#define GPIOH_0 16 -#define GPIOH_1 17 -#define GPIOH_2 18 -#define GPIOH_3 19 -#define BOOT_0 20 -#define BOOT_1 21 -#define BOOT_2 22 -#define BOOT_3 23 -#define BOOT_4 24 -#define BOOT_5 25 -#define BOOT_6 26 -#define BOOT_7 27 -#define BOOT_8 28 -#define BOOT_9 29 -#define BOOT_10 30 -#define BOOT_11 31 -#define BOOT_12 32 -#define BOOT_13 33 -#define BOOT_14 34 -#define BOOT_15 35 -#define BOOT_16 36 -#define BOOT_17 37 -#define CARD_0 38 -#define CARD_1 39 -#define CARD_2 40 -#define CARD_3 41 -#define CARD_4 42 -#define CARD_5 43 -#define CARD_6 44 -#define GPIODV_0 45 -#define GPIODV_1 46 -#define GPIODV_2 47 -#define GPIODV_3 48 -#define GPIODV_4 49 -#define GPIODV_5 50 -#define GPIODV_6 51 -#define GPIODV_7 52 -#define GPIODV_8 53 -#define GPIODV_9 54 -#define GPIODV_10 55 -#define GPIODV_11 56 -#define GPIODV_12 57 -#define GPIODV_13 58 -#define GPIODV_14 59 -#define GPIODV_15 60 -#define GPIODV_16 61 -#define GPIODV_17 62 -#define GPIODV_18 63 -#define GPIODV_19 64 -#define GPIODV_20 65 -#define GPIODV_21 66 -#define GPIODV_22 67 -#define GPIODV_23 68 -#define GPIODV_24 69 -#define GPIODV_25 70 -#define GPIODV_26 71 -#define GPIODV_27 72 -#define GPIODV_28 73 -#define GPIODV_29 74 -#define GPIOY_0 75 -#define GPIOY_1 76 -#define GPIOY_2 77 -#define GPIOY_3 78 -#define GPIOY_4 79 -#define GPIOY_5 80 -#define GPIOY_6 81 -#define GPIOY_7 82 -#define GPIOY_8 83 -#define GPIOY_9 84 -#define GPIOY_10 85 -#define GPIOY_11 86 -#define GPIOY_12 87 -#define GPIOY_13 88 -#define GPIOY_14 89 -#define GPIOY_15 90 -#define GPIOY_16 91 -#define GPIOX_0 92 -#define GPIOX_1 93 -#define GPIOX_2 94 -#define GPIOX_3 95 -#define GPIOX_4 96 -#define GPIOX_5 97 -#define GPIOX_6 98 -#define GPIOX_7 99 -#define GPIOX_8 100 -#define GPIOX_9 101 -#define GPIOX_10 102 -#define GPIOX_11 103 -#define GPIOX_12 104 -#define GPIOX_13 105 -#define GPIOX_14 106 -#define GPIOX_15 107 -#define GPIOX_16 108 -#define GPIOX_17 109 -#define GPIOX_18 110 -#define GPIOX_19 111 -#define GPIOX_20 112 -#define GPIOX_21 113 -#define GPIOX_22 114 -#define GPIOCLK_0 115 -#define GPIOCLK_1 116 -#define GPIOCLK_2 117 -#define GPIOCLK_3 118 - -#endif diff --git a/include/dt-bindings/gpio/meson-gxl-gpio.h b/include/dt-bindings/gpio/meson-gxl-gpio.h deleted file mode 100644 index 0a001ae4827..00000000000 --- a/include/dt-bindings/gpio/meson-gxl-gpio.h +++ /dev/null @@ -1,125 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * GPIO definitions for Amlogic Meson GXL SoCs - * - * Copyright (C) 2016 Endless Mobile, Inc. - * Author: Carlo Caione <carlo@endlessm.com> - */ - -#ifndef _DT_BINDINGS_MESON_GXL_GPIO_H -#define _DT_BINDINGS_MESON_GXL_GPIO_H - -#define GPIOAO_0 0 -#define GPIOAO_1 1 -#define GPIOAO_2 2 -#define GPIOAO_3 3 -#define GPIOAO_4 4 -#define GPIOAO_5 5 -#define GPIOAO_6 6 -#define GPIOAO_7 7 -#define GPIOAO_8 8 -#define GPIOAO_9 9 -#define GPIO_TEST_N 10 - -#define GPIOZ_0 0 -#define GPIOZ_1 1 -#define GPIOZ_2 2 -#define GPIOZ_3 3 -#define GPIOZ_4 4 -#define GPIOZ_5 5 -#define GPIOZ_6 6 -#define GPIOZ_7 7 -#define GPIOZ_8 8 -#define GPIOZ_9 9 -#define GPIOZ_10 10 -#define GPIOZ_11 11 -#define GPIOZ_12 12 -#define GPIOZ_13 13 -#define GPIOZ_14 14 -#define GPIOZ_15 15 -#define GPIOH_0 16 -#define GPIOH_1 17 -#define GPIOH_2 18 -#define GPIOH_3 19 -#define GPIOH_4 20 -#define GPIOH_5 21 -#define GPIOH_6 22 -#define GPIOH_7 23 -#define GPIOH_8 24 -#define GPIOH_9 25 -#define BOOT_0 26 -#define BOOT_1 27 -#define BOOT_2 28 -#define BOOT_3 29 -#define BOOT_4 30 -#define BOOT_5 31 -#define BOOT_6 32 -#define BOOT_7 33 -#define BOOT_8 34 -#define BOOT_9 35 -#define BOOT_10 36 -#define BOOT_11 37 -#define BOOT_12 38 -#define BOOT_13 39 -#define BOOT_14 40 -#define BOOT_15 41 -#define CARD_0 42 -#define CARD_1 43 -#define CARD_2 44 -#define CARD_3 45 -#define CARD_4 46 -#define CARD_5 47 -#define CARD_6 48 -#define GPIODV_0 49 -#define GPIODV_1 50 -#define GPIODV_2 51 -#define GPIODV_3 52 -#define GPIODV_4 53 -#define GPIODV_5 54 -#define GPIODV_6 55 -#define GPIODV_7 56 -#define GPIODV_8 57 -#define GPIODV_9 58 -#define GPIODV_10 59 -#define GPIODV_11 60 -#define GPIODV_12 61 -#define GPIODV_13 62 -#define GPIODV_14 63 -#define GPIODV_15 64 -#define GPIODV_16 65 -#define GPIODV_17 66 -#define GPIODV_18 67 -#define GPIODV_19 68 -#define GPIODV_20 69 -#define GPIODV_21 70 -#define GPIODV_22 71 -#define GPIODV_23 72 -#define GPIODV_24 73 -#define GPIODV_25 74 -#define GPIODV_26 75 -#define GPIODV_27 76 -#define GPIODV_28 77 -#define GPIODV_29 78 -#define GPIOX_0 79 -#define GPIOX_1 80 -#define GPIOX_2 81 -#define GPIOX_3 82 -#define GPIOX_4 83 -#define GPIOX_5 84 -#define GPIOX_6 85 -#define GPIOX_7 86 -#define GPIOX_8 87 -#define GPIOX_9 88 -#define GPIOX_10 89 -#define GPIOX_11 90 -#define GPIOX_12 91 -#define GPIOX_13 92 -#define GPIOX_14 93 -#define GPIOX_15 94 -#define GPIOX_16 95 -#define GPIOX_17 96 -#define GPIOX_18 97 -#define GPIOCLK_0 98 -#define GPIOCLK_1 99 - -#endif diff --git a/include/dt-bindings/power/meson-axg-power.h b/include/dt-bindings/power/meson-axg-power.h deleted file mode 100644 index e5243884b24..00000000000 --- a/include/dt-bindings/power/meson-axg-power.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ -/* - * Copyright (c) 2020 BayLibre, SAS - * Author: Neil Armstrong <narmstrong@baylibre.com> - */ - -#ifndef _DT_BINDINGS_MESON_AXG_POWER_H -#define _DT_BINDINGS_MESON_AXG_POWER_H - -#define PWRC_AXG_VPU_ID 0 -#define PWRC_AXG_ETHERNET_MEM_ID 1 -#define PWRC_AXG_AUDIO_ID 2 - -#endif diff --git a/include/dt-bindings/power/meson-g12a-power.h b/include/dt-bindings/power/meson-g12a-power.h deleted file mode 100644 index bb5e67a842d..00000000000 --- a/include/dt-bindings/power/meson-g12a-power.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ -/* - * Copyright (c) 2019 BayLibre, SAS - * Author: Neil Armstrong <narmstrong@baylibre.com> - */ - -#ifndef _DT_BINDINGS_MESON_G12A_POWER_H -#define _DT_BINDINGS_MESON_G12A_POWER_H - -#define PWRC_G12A_VPU_ID 0 -#define PWRC_G12A_ETH_ID 1 - -#endif diff --git a/include/dt-bindings/power/meson-gxbb-power.h b/include/dt-bindings/power/meson-gxbb-power.h deleted file mode 100644 index 1262dac696c..00000000000 --- a/include/dt-bindings/power/meson-gxbb-power.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ -/* - * Copyright (c) 2019 BayLibre, SAS - * Author: Neil Armstrong <narmstrong@baylibre.com> - */ - -#ifndef _DT_BINDINGS_MESON_GXBB_POWER_H -#define _DT_BINDINGS_MESON_GXBB_POWER_H - -#define PWRC_GXBB_VPU_ID 0 -#define PWRC_GXBB_ETHERNET_MEM_ID 1 - -#endif diff --git a/include/dt-bindings/power/meson-sm1-power.h b/include/dt-bindings/power/meson-sm1-power.h deleted file mode 100644 index a020ab00c13..00000000000 --- a/include/dt-bindings/power/meson-sm1-power.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ -/* - * Copyright (c) 2019 BayLibre, SAS - * Author: Neil Armstrong <narmstrong@baylibre.com> - */ - -#ifndef _DT_BINDINGS_MESON_SM1_POWER_H -#define _DT_BINDINGS_MESON_SM1_POWER_H - -#define PWRC_SM1_VPU_ID 0 -#define PWRC_SM1_NNA_ID 1 -#define PWRC_SM1_USB_ID 2 -#define PWRC_SM1_PCIE_ID 3 -#define PWRC_SM1_GE2D_ID 4 -#define PWRC_SM1_AUDIO_ID 5 -#define PWRC_SM1_ETH_ID 6 - -#endif diff --git a/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h b/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h deleted file mode 100644 index 1ef807856cb..00000000000 --- a/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0 OR MIT) - * - * Copyright (c) 2018 Baylibre SAS. - * Author: Jerome Brunet <jbrunet@baylibre.com> - */ - -#ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H -#define _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H - -#define AXG_ARB_TODDR_A 0 -#define AXG_ARB_TODDR_B 1 -#define AXG_ARB_TODDR_C 2 -#define AXG_ARB_FRDDR_A 3 -#define AXG_ARB_FRDDR_B 4 -#define AXG_ARB_FRDDR_C 5 -#define AXG_ARB_TODDR_D 6 -#define AXG_ARB_FRDDR_D 7 - -#endif /* _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H */ diff --git a/include/dt-bindings/reset/amlogic,meson-axg-reset.h b/include/dt-bindings/reset/amlogic,meson-axg-reset.h deleted file mode 100644 index 0f2e0fe45ca..00000000000 --- a/include/dt-bindings/reset/amlogic,meson-axg-reset.h +++ /dev/null @@ -1,123 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ -/* - * Copyright (c) 2016 BayLibre, SAS. - * Author: Neil Armstrong <narmstrong@baylibre.com> - * - * Copyright (c) 2017 Amlogic, inc. - * Author: Yixun Lan <yixun.lan@amlogic.com> - * - */ - -#ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H -#define _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H - -/* RESET0 */ -#define RESET_HIU 0 -#define RESET_PCIE_A 1 -#define RESET_PCIE_B 2 -#define RESET_DDR_TOP 3 -/* 4 */ -#define RESET_VIU 5 -#define RESET_PCIE_PHY 6 -#define RESET_PCIE_APB 7 -/* 8 */ -/* 9 */ -#define RESET_VENC 10 -#define RESET_ASSIST 11 -/* 12 */ -#define RESET_VCBUS 13 -/* 14 */ -/* 15 */ -#define RESET_GIC 16 -#define RESET_CAPB3_DECODE 17 -/* 18-21 */ -#define RESET_SYS_CPU_CAPB3 22 -#define RESET_CBUS_CAPB3 23 -#define RESET_AHB_CNTL 24 -#define RESET_AHB_DATA 25 -#define RESET_VCBUS_CLK81 26 -#define RESET_MMC 27 -/* 28-31 */ -/* RESET1 */ -/* 32 */ -/* 33 */ -#define RESET_USB_OTG 34 -#define RESET_DDR 35 -#define RESET_AO_RESET 36 -/* 37 */ -#define RESET_AHB_SRAM 38 -/* 39 */ -/* 40 */ -#define RESET_DMA 41 -#define RESET_ISA 42 -#define RESET_ETHERNET 43 -/* 44 */ -#define RESET_SD_EMMC_B 45 -#define RESET_SD_EMMC_C 46 -#define RESET_ROM_BOOT 47 -#define RESET_SYS_CPU_0 48 -#define RESET_SYS_CPU_1 49 -#define RESET_SYS_CPU_2 50 -#define RESET_SYS_CPU_3 51 -#define RESET_SYS_CPU_CORE_0 52 -#define RESET_SYS_CPU_CORE_1 53 -#define RESET_SYS_CPU_CORE_2 54 -#define RESET_SYS_CPU_CORE_3 55 -#define RESET_SYS_PLL_DIV 56 -#define RESET_SYS_CPU_AXI 57 -#define RESET_SYS_CPU_L2 58 -#define RESET_SYS_CPU_P 59 -#define RESET_SYS_CPU_MBIST 60 -/* 61-63 */ -/* RESET2 */ -/* 64 */ -/* 65 */ -#define RESET_AUDIO 66 -/* 67 */ -#define RESET_MIPI_HOST 68 -#define RESET_AUDIO_LOCKER 69 -#define RESET_GE2D 70 -/* 71-76 */ -#define RESET_AO_CPU_RESET 77 -/* 78-95 */ -/* RESET3 */ -#define RESET_RING_OSCILLATOR 96 -/* 97-127 */ -/* RESET4 */ -/* 128 */ -/* 129 */ -#define RESET_MIPI_PHY 130 -/* 131-140 */ -#define RESET_VENCL 141 -#define RESET_I2C_MASTER_2 142 -#define RESET_I2C_MASTER_1 143 -/* 144-159 */ -/* RESET5 */ -/* 160-191 */ -/* RESET6 */ -#define RESET_PERIPHS_GENERAL 192 -#define RESET_PERIPHS_SPICC 193 -/* 194 */ -/* 195 */ -#define RESET_PERIPHS_I2C_MASTER_0 196 -/* 197-200 */ -#define RESET_PERIPHS_UART_0 201 -#define RESET_PERIPHS_UART_1 202 -/* 203-204 */ -#define RESET_PERIPHS_SPI_0 205 -#define RESET_PERIPHS_I2C_MASTER_3 206 -/* 207-223 */ -/* RESET7 */ -#define RESET_USB_DDR_0 224 -#define RESET_USB_DDR_1 225 -#define RESET_USB_DDR_2 226 -#define RESET_USB_DDR_3 227 -/* 228 */ -#define RESET_DEVICE_MMC_ARB 229 -/* 230 */ -#define RESET_VID_LOCK 231 -#define RESET_A9_DMC_PIPEL 232 -#define RESET_DMC_VPU_PIPEL 233 -/* 234-255 */ - -#endif diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h deleted file mode 100644 index f805129ca7a..00000000000 --- a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h +++ /dev/null @@ -1,53 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 BayLibre, SAS. - * Author: Jerome Brunet <jbrunet@baylibre.com> - * - */ - -#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H -#define _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H - -#define AUD_RESET_PDM 0 -#define AUD_RESET_TDMIN_A 1 -#define AUD_RESET_TDMIN_B 2 -#define AUD_RESET_TDMIN_C 3 -#define AUD_RESET_TDMIN_LB 4 -#define AUD_RESET_LOOPBACK 5 -#define AUD_RESET_TODDR_A 6 -#define AUD_RESET_TODDR_B 7 -#define AUD_RESET_TODDR_C 8 -#define AUD_RESET_FRDDR_A 9 -#define AUD_RESET_FRDDR_B 10 -#define AUD_RESET_FRDDR_C 11 -#define AUD_RESET_TDMOUT_A 12 -#define AUD_RESET_TDMOUT_B 13 -#define AUD_RESET_TDMOUT_C 14 -#define AUD_RESET_SPDIFOUT 15 -#define AUD_RESET_SPDIFOUT_B 16 -#define AUD_RESET_SPDIFIN 17 -#define AUD_RESET_EQDRC 18 -#define AUD_RESET_RESAMPLE 19 -#define AUD_RESET_DDRARB 20 -#define AUD_RESET_POWDET 21 -#define AUD_RESET_TORAM 22 -#define AUD_RESET_TOACODEC 23 -#define AUD_RESET_TOHDMITX 24 -#define AUD_RESET_CLKTREE 25 - -/* SM1 added resets */ -#define AUD_RESET_RESAMPLE_B 26 -#define AUD_RESET_TOVAD 27 -#define AUD_RESET_LOCKER 28 -#define AUD_RESET_SPDIFIN_LB 29 -#define AUD_RESET_FRATV 30 -#define AUD_RESET_FRHDMIRX 31 -#define AUD_RESET_FRDDR_D 32 -#define AUD_RESET_TODDR_D 33 -#define AUD_RESET_LOOPBACK_B 34 -#define AUD_RESET_EARCTX 35 -#define AUD_RESET_EARCRX 36 -#define AUD_RESET_FRDDR_E 37 -#define AUD_RESET_TODDR_E 38 - -#endif diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-reset.h deleted file mode 100644 index 6d487c5eba2..00000000000 --- a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h +++ /dev/null @@ -1,137 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ -/* - * Copyright (c) 2019 BayLibre, SAS. - * Author: Jerome Brunet <jbrunet@baylibre.com> - * - */ - -#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_RESET_H -#define _DT_BINDINGS_AMLOGIC_MESON_G12A_RESET_H - -/* RESET0 */ -#define RESET_HIU 0 -/* 1 */ -#define RESET_DOS 2 -/* 3-4 */ -#define RESET_VIU 5 -#define RESET_AFIFO 6 -#define RESET_VID_PLL_DIV 7 -/* 8-9 */ -#define RESET_VENC 10 -#define RESET_ASSIST 11 -#define RESET_PCIE_CTRL_A 12 -#define RESET_VCBUS 13 -#define RESET_PCIE_PHY 14 -#define RESET_PCIE_APB 15 -#define RESET_GIC 16 -#define RESET_CAPB3_DECODE 17 -/* 18 */ -#define RESET_HDMITX_CAPB3 19 -#define RESET_DVALIN_CAPB3 20 -#define RESET_DOS_CAPB3 21 -/* 22 */ -#define RESET_CBUS_CAPB3 23 -#define RESET_AHB_CNTL 24 -#define RESET_AHB_DATA 25 -#define RESET_VCBUS_CLK81 26 -/* 27-31 */ -/* RESET1 */ -/* 32 */ -#define RESET_DEMUX 33 -#define RESET_USB 34 -#define RESET_DDR 35 -/* 36 */ -#define RESET_BT656 37 -#define RESET_AHB_SRAM 38 -/* 39 */ -#define RESET_PARSER 40 -/* 41 */ -#define RESET_ISA 42 -#define RESET_ETHERNET 43 -#define RESET_SD_EMMC_A 44 -#define RESET_SD_EMMC_B 45 -#define RESET_SD_EMMC_C 46 -/* 47 */ -#define RESET_USB_PHY20 48 -#define RESET_USB_PHY21 49 -/* 50-60 */ -#define RESET_AUDIO_CODEC 61 -/* 62-63 */ -/* RESET2 */ -/* 64 */ -#define RESET_AUDIO 65 -#define RESET_HDMITX_PHY 66 -/* 67 */ -#define RESET_MIPI_DSI_HOST 68 -#define RESET_ALOCKER 69 -#define RESET_GE2D 70 -#define RESET_PARSER_REG 71 -#define RESET_PARSER_FETCH 72 -#define RESET_CTL 73 -#define RESET_PARSER_TOP 74 -/* 75-77 */ -#define RESET_DVALIN 78 -#define RESET_HDMITX 79 -/* 80-95 */ -/* RESET3 */ -/* 96-95 */ -#define RESET_DEMUX_TOP 105 -#define RESET_DEMUX_DES_PL 106 -#define RESET_DEMUX_S2P_0 107 -#define RESET_DEMUX_S2P_1 108 -#define RESET_DEMUX_0 109 -#define RESET_DEMUX_1 110 -#define RESET_DEMUX_2 111 -/* 112-127 */ -/* RESET4 */ -/* 128-129 */ -#define RESET_MIPI_DSI_PHY 130 -/* 131-132 */ -#define RESET_RDMA 133 -#define RESET_VENCI 134 -#define RESET_VENCP 135 -/* 136 */ -#define RESET_VDAC 137 -/* 138-139 */ -#define RESET_VDI6 140 -#define RESET_VENCL 141 -#define RESET_I2C_M1 142 -#define RESET_I2C_M2 143 -/* 144-159 */ -/* RESET5 */ -/* 160-191 */ -/* RESET6 */ -#define RESET_GEN 192 -#define RESET_SPICC0 193 -#define RESET_SC 194 -#define RESET_SANA_3 195 -#define RESET_I2C_M0 196 -#define RESET_TS_PLL 197 -#define RESET_SPICC1 198 -#define RESET_STREAM 199 -#define RESET_TS_CPU 200 -#define RESET_UART0 201 -#define RESET_UART1_2 202 -#define RESET_ASYNC0 203 -#define RESET_ASYNC1 204 -#define RESET_SPIFC0 205 -#define RESET_I2C_M3 206 -/* 207-223 */ -/* RESET7 */ -#define RESET_USB_DDR_0 224 -#define RESET_USB_DDR_1 225 -#define RESET_USB_DDR_2 226 -#define RESET_USB_DDR_3 227 -#define RESET_TS_GPU 228 -#define RESET_DEVICE_MMC_ARB 229 -#define RESET_DVALIN_DMC_PIPL 230 -#define RESET_VID_LOCK 231 -#define RESET_NIC_DMC_PIPL 232 -#define RESET_DMC_VPU_PIPL 233 -#define RESET_GE2D_DMC_PIPL 234 -#define RESET_HCODEC_DMC_PIPL 235 -#define RESET_WAVE420_DMC_PIPL 236 -#define RESET_HEVCF_DMC_PIPL 237 -/* 238-255 */ - -#endif diff --git a/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h b/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h deleted file mode 100644 index 883bfd3bcba..00000000000 --- a/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h +++ /dev/null @@ -1,161 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -/* - * Copyright (c) 2016 BayLibre, SAS. - * Author: Neil Armstrong <narmstrong@baylibre.com> - */ -#ifndef _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H -#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H - -/* RESET0 */ -#define RESET_HIU 0 -/* 1 */ -#define RESET_DOS_RESET 2 -#define RESET_DDR_TOP 3 -#define RESET_DCU_RESET 4 -#define RESET_VIU 5 -#define RESET_AIU 6 -#define RESET_VID_PLL_DIV 7 -/* 8 */ -#define RESET_PMUX 9 -#define RESET_VENC 10 -#define RESET_ASSIST 11 -#define RESET_AFIFO2 12 -#define RESET_VCBUS 13 -/* 14 */ -/* 15 */ -#define RESET_GIC 16 -#define RESET_CAPB3_DECODE 17 -#define RESET_NAND_CAPB3 18 -#define RESET_HDMITX_CAPB3 19 -#define RESET_MALI_CAPB3 20 -#define RESET_DOS_CAPB3 21 -#define RESET_SYS_CPU_CAPB3 22 -#define RESET_CBUS_CAPB3 23 -#define RESET_AHB_CNTL 24 -#define RESET_AHB_DATA 25 -#define RESET_VCBUS_CLK81 26 -#define RESET_MMC 27 -#define RESET_MIPI_0 28 -#define RESET_MIPI_1 29 -#define RESET_MIPI_2 30 -#define RESET_MIPI_3 31 -/* RESET1 */ -#define RESET_CPPM 32 -#define RESET_DEMUX 33 -#define RESET_USB_OTG 34 -#define RESET_DDR 35 -#define RESET_AO_RESET 36 -#define RESET_BT656 37 -#define RESET_AHB_SRAM 38 -/* 39 */ -#define RESET_PARSER 40 -#define RESET_BLKMV 41 -#define RESET_ISA 42 -#define RESET_ETHERNET 43 -#define RESET_SD_EMMC_A 44 -#define RESET_SD_EMMC_B 45 -#define RESET_SD_EMMC_C 46 -#define RESET_ROM_BOOT 47 -#define RESET_SYS_CPU_0 48 -#define RESET_SYS_CPU_1 49 -#define RESET_SYS_CPU_2 50 -#define RESET_SYS_CPU_3 51 -#define RESET_SYS_CPU_CORE_0 52 -#define RESET_SYS_CPU_CORE_1 53 -#define RESET_SYS_CPU_CORE_2 54 -#define RESET_SYS_CPU_CORE_3 55 -#define RESET_SYS_PLL_DIV 56 -#define RESET_SYS_CPU_AXI 57 -#define RESET_SYS_CPU_L2 58 -#define RESET_SYS_CPU_P 59 -#define RESET_SYS_CPU_MBIST 60 -#define RESET_ACODEC 61 -/* 62 */ -/* 63 */ -/* RESET2 */ -#define RESET_VD_RMEM 64 -#define RESET_AUDIN 65 -#define RESET_HDMI_TX 66 -/* 67 */ -/* 68 */ -/* 69 */ -#define RESET_GE2D 70 -#define RESET_PARSER_REG 71 -#define RESET_PARSER_FETCH 72 -#define RESET_PARSER_CTL 73 -#define RESET_PARSER_TOP 74 -/* 75 */ -/* 76 */ -#define RESET_AO_CPU_RESET 77 -#define RESET_MALI 78 -#define RESET_HDMI_SYSTEM_RESET 79 -/* 80-95 */ -/* RESET3 */ -#define RESET_RING_OSCILLATOR 96 -#define RESET_SYS_CPU 97 -#define RESET_EFUSE 98 -#define RESET_SYS_CPU_BVCI 99 -#define RESET_AIFIFO 100 -#define RESET_TVFE 101 -#define RESET_AHB_BRIDGE_CNTL 102 -/* 103 */ -#define RESET_AUDIO_DAC 104 -#define RESET_DEMUX_TOP 105 -#define RESET_DEMUX_DES 106 -#define RESET_DEMUX_S2P_0 107 -#define RESET_DEMUX_S2P_1 108 -#define RESET_DEMUX_RESET_0 109 -#define RESET_DEMUX_RESET_1 110 -#define RESET_DEMUX_RESET_2 111 -/* 112-127 */ -/* RESET4 */ -/* 128 */ -/* 129 */ -/* 130 */ -/* 131 */ -#define RESET_DVIN_RESET 132 -#define RESET_RDMA 133 -#define RESET_VENCI 134 -#define RESET_VENCP 135 -/* 136 */ -#define RESET_VDAC 137 -#define RESET_RTC 138 -/* 139 */ -#define RESET_VDI6 140 -#define RESET_VENCL 141 -#define RESET_I2C_MASTER_2 142 -#define RESET_I2C_MASTER_1 143 -/* 144-159 */ -/* RESET5 */ -/* 160-191 */ -/* RESET6 */ -#define RESET_PERIPHS_GENERAL 192 -#define RESET_PERIPHS_SPICC 193 -#define RESET_PERIPHS_SMART_CARD 194 -#define RESET_PERIPHS_SAR_ADC 195 -#define RESET_PERIPHS_I2C_MASTER_0 196 -#define RESET_SANA 197 -/* 198 */ -#define RESET_PERIPHS_STREAM_INTERFACE 199 -#define RESET_PERIPHS_SDIO 200 -#define RESET_PERIPHS_UART_0 201 -#define RESET_PERIPHS_UART_1_2 202 -#define RESET_PERIPHS_ASYNC_0 203 -#define RESET_PERIPHS_ASYNC_1 204 -#define RESET_PERIPHS_SPI_0 205 -#define RESET_PERIPHS_SDHC 206 -#define RESET_UART_SLIP 207 -/* 208-223 */ -/* RESET7 */ -#define RESET_USB_DDR_0 224 -#define RESET_USB_DDR_1 225 -#define RESET_USB_DDR_2 226 -#define RESET_USB_DDR_3 227 -/* 228 */ -#define RESET_DEVICE_MMC_ARB 229 -/* 230 */ -#define RESET_VID_LOCK 231 -#define RESET_A9_DMC_PIPEL 232 -/* 233-255 */ - -#endif diff --git a/include/dt-bindings/sound/meson-aiu.h b/include/dt-bindings/sound/meson-aiu.h deleted file mode 100644 index 1051b8af298..00000000000 --- a/include/dt-bindings/sound/meson-aiu.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __DT_MESON_AIU_H -#define __DT_MESON_AIU_H - -#define AIU_CPU 0 -#define AIU_HDMI 1 -#define AIU_ACODEC 2 - -#define CPU_I2S_FIFO 0 -#define CPU_SPDIF_FIFO 1 -#define CPU_I2S_ENCODER 2 -#define CPU_SPDIF_ENCODER 3 - -#define CTRL_I2S 0 -#define CTRL_PCM 1 -#define CTRL_OUT 2 - -#endif /* __DT_MESON_AIU_H */ diff --git a/include/dt-bindings/sound/meson-g12a-toacodec.h b/include/dt-bindings/sound/meson-g12a-toacodec.h deleted file mode 100644 index 69d7a75592a..00000000000 --- a/include/dt-bindings/sound/meson-g12a-toacodec.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __DT_MESON_G12A_TOACODEC_H -#define __DT_MESON_G12A_TOACODEC_H - -#define TOACODEC_IN_A 0 -#define TOACODEC_IN_B 1 -#define TOACODEC_IN_C 2 -#define TOACODEC_OUT 3 - -#endif /* __DT_MESON_G12A_TOACODEC_H */ diff --git a/include/dt-bindings/sound/meson-g12a-tohdmitx.h b/include/dt-bindings/sound/meson-g12a-tohdmitx.h deleted file mode 100644 index c5e1f48d30d..00000000000 --- a/include/dt-bindings/sound/meson-g12a-tohdmitx.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __DT_MESON_G12A_TOHDMITX_H -#define __DT_MESON_G12A_TOHDMITX_H - -#define TOHDMITX_I2S_IN_A 0 -#define TOHDMITX_I2S_IN_B 1 -#define TOHDMITX_I2S_IN_C 2 -#define TOHDMITX_I2S_OUT 3 -#define TOHDMITX_SPDIF_IN_A 4 -#define TOHDMITX_SPDIF_IN_B 5 -#define TOHDMITX_SPDIF_OUT 6 - -#endif /* __DT_MESON_G12A_TOHDMITX_H */ diff --git a/include/dwc3-omap-uboot.h b/include/dwc3-omap-uboot.h index ed92bfc5a97..f220705ef7b 100644 --- a/include/dwc3-omap-uboot.h +++ b/include/dwc3-omap-uboot.h @@ -27,5 +27,4 @@ struct dwc3_omap_device { int dwc3_omap_uboot_init(struct dwc3_omap_device *dev); void dwc3_omap_uboot_exit(int index); -int dwc3_omap_uboot_interrupt_status(struct udevice *dev); #endif /* __DWC3_OMAP_UBOOT_H_ */ diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h index 35cfbb93b29..3689d60ae7f 100644 --- a/include/dwc3-uboot.h +++ b/include/dwc3-uboot.h @@ -44,7 +44,7 @@ struct dwc3_device { int dwc3_uboot_init(struct dwc3_device *dev); void dwc3_uboot_exit(int index); -void dwc3_uboot_handle_interrupt(struct udevice *dev); +int dwc3_uboot_interrupt_status(struct udevice *dev); struct phy; #if CONFIG_IS_ENABLED(PHY) && CONFIG_IS_ENABLED(DM_USB) diff --git a/include/efi.h b/include/efi.h index f0e5faa7549..c3c4b93f860 100644 --- a/include/efi.h +++ b/include/efi.h @@ -492,13 +492,14 @@ extern char _binary_u_boot_bin_start[], _binary_u_boot_bin_end[]; /* * Variable Attributes */ -#define EFI_VARIABLE_NON_VOLATILE 0x0000000000000001 -#define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x0000000000000002 -#define EFI_VARIABLE_RUNTIME_ACCESS 0x0000000000000004 -#define EFI_VARIABLE_HARDWARE_ERROR_RECORD 0x0000000000000008 -#define EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS 0x0000000000000010 -#define EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS 0x0000000000000020 -#define EFI_VARIABLE_APPEND_WRITE 0x0000000000000040 +#define EFI_VARIABLE_NON_VOLATILE 0x00000001 +#define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x00000002 +#define EFI_VARIABLE_RUNTIME_ACCESS 0x00000004 +#define EFI_VARIABLE_HARDWARE_ERROR_RECORD 0x00000008 +#define EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS 0x00000010 +#define EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS 0x00000020 +#define EFI_VARIABLE_APPEND_WRITE 0x00000040 +#define EFI_VARIABLE_ENHANCED_AUTHENTICATED_ACCESS 0x00000080 #define EFI_VARIABLE_MASK (EFI_VARIABLE_NON_VOLATILE | \ EFI_VARIABLE_BOOTSERVICE_ACCESS | \ @@ -506,7 +507,8 @@ extern char _binary_u_boot_bin_start[], _binary_u_boot_bin_end[]; EFI_VARIABLE_HARDWARE_ERROR_RECORD | \ EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS | \ EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS | \ - EFI_VARIABLE_APPEND_WRITE) + EFI_VARIABLE_APPEND_WRITE | \ + EFI_VARIABLE_ENHANCED_AUTHENTICATED_ACCESS) /** * efi_get_priv() - Get access to the EFI-private information diff --git a/include/efi_variable.h b/include/efi_variable.h index 805e6c5f1e0..42a2b7c52be 100644 --- a/include/efi_variable.h +++ b/include/efi_variable.h @@ -8,7 +8,7 @@ #include <linux/bitops.h> -#define EFI_VARIABLE_READ_ONLY BIT(31) +#define EFI_VARIABLE_READ_ONLY 0x80000000 enum efi_auth_var_type { EFI_AUTH_VAR_NONE = 0, diff --git a/include/fastboot-internal.h b/include/fastboot-internal.h index 610d4f91414..e59c187c05c 100644 --- a/include/fastboot-internal.h +++ b/include/fastboot-internal.h @@ -6,7 +6,7 @@ /** * fastboot_buf_addr - base address of the fastboot download buffer */ -extern void *fastboot_buf_addr; +extern ulong fastboot_buf_addr; /** * fastboot_buf_size - size of the fastboot download buffer diff --git a/include/fastboot.h b/include/fastboot.h index 1e7920eb913..c75184cc912 100644 --- a/include/fastboot.h +++ b/include/fastboot.h @@ -114,13 +114,13 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason); */ void fastboot_set_progress_callback(void (*progress)(const char *msg)); -/* +/** * fastboot_init() - initialise new fastboot protocol session * - * @buf_addr: Pointer to download buffer, or NULL for default + * @buf_addr: Address of download buffer, or 0 for default * @buf_size: Size of download buffer, or zero for default */ -void fastboot_init(void *buf_addr, u32 buf_size); +void fastboot_init(ulong buf_addr, u32 buf_size); /** * fastboot_boot() - Execute fastboot boot command diff --git a/include/host_arch.h b/include/host_arch.h index 169d4945136..261194bd7c6 100644 --- a/include/host_arch.h +++ b/include/host_arch.h @@ -16,6 +16,8 @@ export HOST_ARCH_X86=0x0386 export HOST_ARCH_X86_64=0x8664 #endif +#include <version.h> + #define HOST_ARCH_AARCH64 0xaa64 #define HOST_ARCH_ARM 0x00a7 #define HOST_ARCH_RISCV32 0x5032 diff --git a/include/image.h b/include/image.h index 21de70f0c9e..acffd17e0df 100644 --- a/include/image.h +++ b/include/image.h @@ -946,7 +946,7 @@ static inline void image_set_name(struct legacy_img_hdr *hdr, const char *name) int image_check_hcrc(const struct legacy_img_hdr *hdr); int image_check_dcrc(const struct legacy_img_hdr *hdr); #ifndef USE_HOSTCC -ulong env_get_bootm_low(void); +phys_addr_t env_get_bootm_low(void); phys_size_t env_get_bootm_size(void); phys_size_t env_get_bootm_mapsize(void); #endif diff --git a/include/imx_container.h b/include/imx_container.h index 54cd684e35d..691c764b3e5 100644 --- a/include/imx_container.h +++ b/include/imx_container.h @@ -50,10 +50,10 @@ struct signature_block_hdr { u8 length_lsb; u8 length_msb; u8 tag; - u16 srk_table_offset; u16 cert_offset; - u16 blob_offset; + u16 srk_table_offset; u16 signature_offset; + u16 blob_offset; u32 reserved; } __packed; diff --git a/include/turris-omnia-mcu-interface.h b/include/turris-omnia-mcu-interface.h new file mode 100644 index 00000000000..3c4638f7329 --- /dev/null +++ b/include/turris-omnia-mcu-interface.h @@ -0,0 +1,248 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * CZ.NIC's Turris Omnia MCU I2C interface commands definitions + * + * 2023 by Marek Behún <kabel@kernel.org> + */ + +#ifndef __TURRIS_OMNIA_MCU_INTERFACE_H +#define __TURRIS_OMNIA_MCU_INTERFACE_H + +#include <linux/bitops.h> + +enum omnia_commands_e { + CMD_GET_STATUS_WORD = 0x01, /* slave sends status word back */ + CMD_GENERAL_CONTROL = 0x02, + CMD_LED_MODE = 0x03, /* default/user */ + CMD_LED_STATE = 0x04, /* LED on/off */ + CMD_LED_COLOR = 0x05, /* LED number + RED + GREEN + BLUE */ + CMD_USER_VOLTAGE = 0x06, + CMD_SET_BRIGHTNESS = 0x07, + CMD_GET_BRIGHTNESS = 0x08, + CMD_GET_RESET = 0x09, + CMD_GET_FW_VERSION_APP = 0x0A, /* 20B git hash number */ + CMD_SET_WATCHDOG_STATE = 0x0B, /* 0 - disable + * 1 - enable / ping + * after boot watchdog is started + * with 2 minutes timeout + */ + + /* CMD_WATCHDOG_STATUS = 0x0C, not implemented anymore */ + + CMD_GET_WATCHDOG_STATE = 0x0D, + CMD_GET_FW_VERSION_BOOT = 0x0E, /* 20B git hash number */ + CMD_GET_FW_CHECKSUM = 0x0F, /* 4B length, 4B checksum */ + + /* available if FEATURES_SUPPORTED bit set in status word */ + CMD_GET_FEATURES = 0x10, + + /* available if EXT_CMD bit set in features */ + CMD_GET_EXT_STATUS_DWORD = 0x11, + CMD_EXT_CONTROL = 0x12, + CMD_GET_EXT_CONTROL_STATUS = 0x13, + + /* available if NEW_INT_API bit set in features */ + CMD_GET_INT_AND_CLEAR = 0x14, + CMD_GET_INT_MASK = 0x15, + CMD_SET_INT_MASK = 0x16, + + /* available if FLASHING bit set in features */ + CMD_FLASH = 0x19, + + /* available if WDT_PING bit set in features */ + CMD_SET_WDT_TIMEOUT = 0x20, + CMD_GET_WDT_TIMELEFT = 0x21, + + /* available if POWEROFF_WAKEUP bit set in features */ + CMD_SET_WAKEUP = 0x22, + CMD_GET_UPTIME_AND_WAKEUP = 0x23, + CMD_POWER_OFF = 0x24, + + /* available if USB_OVC_PROT_SETTING bit set in features */ + CMD_SET_USB_OVC_PROT = 0x25, + CMD_GET_USB_OVC_PROT = 0x26, + + /* available if TRNG bit set in features */ + CMD_TRNG_COLLECT_ENTROPY = 0x28, + + /* available if CRYPTO bit set in features */ + CMD_CRYPTO_GET_PUBLIC_KEY = 0x29, + CMD_CRYPTO_SIGN_MESSAGE = 0x2A, + CMD_CRYPTO_COLLECT_SIGNATURE = 0x2B, + + /* available if BOARD_INFO it set in features */ + CMD_BOARD_INFO_GET = 0x2C, + CMD_BOARD_INFO_BURN = 0x2D, + + /* available only at address 0x2b (led-controller) */ + /* available only if LED_GAMMA_CORRECTION bit set in features */ + CMD_SET_GAMMA_CORRECTION = 0x30, + CMD_GET_GAMMA_CORRECTION = 0x31, + + /* available only at address 0x2b (led-controller) */ + /* available only if PER_LED_CORRECTION bit set in features */ + /* available only if FROM_BIT_16_INVALID bit NOT set in features */ + CMD_SET_LED_CORRECTIONS = 0x32, + CMD_GET_LED_CORRECTIONS = 0x33, +}; + +enum omnia_flashing_commands_e { + FLASH_CMD_UNLOCK = 0x01, + FLASH_CMD_SIZE_AND_CSUM = 0x02, + FLASH_CMD_PROGRAM = 0x03, + FLASH_CMD_RESET = 0x04, +}; + +enum omnia_sts_word_e { + STS_MCU_TYPE_MASK = GENMASK(1, 0), + STS_MCU_TYPE_STM32 = 0 << 0, + STS_MCU_TYPE_GD32 = 1 << 0, + STS_MCU_TYPE_MKL = 2 << 0, + STS_FEATURES_SUPPORTED = BIT(2), + STS_USER_REGULATOR_NOT_SUPPORTED = BIT(3), + STS_CARD_DET = BIT(4), + STS_MSATA_IND = BIT(5), + STS_USB30_OVC = BIT(6), + STS_USB31_OVC = BIT(7), + STS_USB30_PWRON = BIT(8), + STS_USB31_PWRON = BIT(9), + STS_ENABLE_4V5 = BIT(10), + STS_BUTTON_MODE = BIT(11), + STS_BUTTON_PRESSED = BIT(12), + STS_BUTTON_COUNTER_MASK = GENMASK(15, 13) +}; + +enum omnia_ctl_byte_e { + CTL_LIGHT_RST = BIT(0), + CTL_HARD_RST = BIT(1), + /* BIT(2) is currently reserved */ + CTL_USB30_PWRON = BIT(3), + CTL_USB31_PWRON = BIT(4), + CTL_ENABLE_4V5 = BIT(5), + CTL_BUTTON_MODE = BIT(6), + CTL_BOOTLOADER = BIT(7) +}; + +enum omnia_features_e { + FEAT_PERIPH_MCU = BIT(0), + FEAT_EXT_CMDS = BIT(1), + FEAT_WDT_PING = BIT(2), + FEAT_LED_STATE_EXT_MASK = GENMASK(4, 3), + FEAT_LED_STATE_EXT = 1 << 3, + FEAT_LED_STATE_EXT_V32 = 2 << 3, + FEAT_LED_GAMMA_CORRECTION = BIT(5), + FEAT_NEW_INT_API = BIT(6), + FEAT_BOOTLOADER = BIT(7), + FEAT_FLASHING = BIT(8), + FEAT_NEW_MESSAGE_API = BIT(9), + FEAT_BRIGHTNESS_INT = BIT(10), + FEAT_POWEROFF_WAKEUP = BIT(11), + FEAT_CAN_OLD_MESSAGE_API = BIT(12), + FEAT_TRNG = BIT(13), + FEAT_CRYPTO = BIT(14), + FEAT_BOARD_INFO = BIT(15), + + /* + * Orginally the features command replied only 16 bits. If more were + * read, either the I2C transaction failed or 0xff bytes were sent. + * Therefore to consider bits 16 - 31 valid, one bit (20) was reserved + * to be zero. + */ + + /* Bits 16 - 19 correspond to bits 0 - 3 of status word */ + FEAT_MCU_TYPE_MASK = GENMASK(17, 16), + FEAT_MCU_TYPE_STM32 = 0 << 16, + FEAT_MCU_TYPE_GD32 = 1 << 16, + FEAT_MCU_TYPE_MKL = 2 << 16, + FEAT_FEATURES_SUPPORTED = BIT(18), + FEAT_USER_REGULATOR_NOT_SUPPORTED = BIT(19), + + /* must not be set */ + FEAT_FROM_BIT_16_INVALID = BIT(20), + + FEAT_PER_LED_CORRECTION = BIT(21), + FEAT_USB_OVC_PROT_SETTING = BIT(22), +}; + +enum omnia_ext_sts_dword_e { + EXT_STS_SFP_nDET = BIT(0), + EXT_STS_LED_STATES_MASK = GENMASK(31, 12), + EXT_STS_WLAN0_MSATA_LED = BIT(12), + EXT_STS_WLAN1_LED = BIT(13), + EXT_STS_WLAN2_LED = BIT(14), + EXT_STS_WPAN0_LED = BIT(15), + EXT_STS_WPAN1_LED = BIT(16), + EXT_STS_WPAN2_LED = BIT(17), + EXT_STS_WAN_LED0 = BIT(18), + EXT_STS_WAN_LED1 = BIT(19), + EXT_STS_LAN0_LED0 = BIT(20), + EXT_STS_LAN0_LED1 = BIT(21), + EXT_STS_LAN1_LED0 = BIT(22), + EXT_STS_LAN1_LED1 = BIT(23), + EXT_STS_LAN2_LED0 = BIT(24), + EXT_STS_LAN2_LED1 = BIT(25), + EXT_STS_LAN3_LED0 = BIT(26), + EXT_STS_LAN3_LED1 = BIT(27), + EXT_STS_LAN4_LED0 = BIT(28), + EXT_STS_LAN4_LED1 = BIT(29), + EXT_STS_LAN5_LED0 = BIT(30), + EXT_STS_LAN5_LED1 = BIT(31), +}; + +enum omnia_ext_ctl_e { + EXT_CTL_nRES_MMC = BIT(0), + EXT_CTL_nRES_LAN = BIT(1), + EXT_CTL_nRES_PHY = BIT(2), + EXT_CTL_nPERST0 = BIT(3), + EXT_CTL_nPERST1 = BIT(4), + EXT_CTL_nPERST2 = BIT(5), + EXT_CTL_PHY_SFP = BIT(6), + EXT_CTL_PHY_SFP_AUTO = BIT(7), + EXT_CTL_nVHV_CTRL = BIT(8), +}; + +enum omnia_int_e { + INT_CARD_DET = BIT(0), + INT_MSATA_IND = BIT(1), + INT_USB30_OVC = BIT(2), + INT_USB31_OVC = BIT(3), + INT_BUTTON_PRESSED = BIT(4), + INT_SFP_nDET = BIT(5), + INT_BRIGHTNESS_CHANGED = BIT(6), + INT_TRNG = BIT(7), + INT_MESSAGE_SIGNED = BIT(8), + + INT_LED_STATES_MASK = GENMASK(31, 12), + INT_WLAN0_MSATA_LED = BIT(12), + INT_WLAN1_LED = BIT(13), + INT_WLAN2_LED = BIT(14), + INT_WPAN0_LED = BIT(15), + INT_WPAN1_LED = BIT(16), + INT_WPAN2_LED = BIT(17), + INT_WAN_LED0 = BIT(18), + INT_WAN_LED1 = BIT(19), + INT_LAN0_LED0 = BIT(20), + INT_LAN0_LED1 = BIT(21), + INT_LAN1_LED0 = BIT(22), + INT_LAN1_LED1 = BIT(23), + INT_LAN2_LED0 = BIT(24), + INT_LAN2_LED1 = BIT(25), + INT_LAN3_LED0 = BIT(26), + INT_LAN3_LED1 = BIT(27), + INT_LAN4_LED0 = BIT(28), + INT_LAN4_LED1 = BIT(29), + INT_LAN5_LED0 = BIT(30), + INT_LAN5_LED1 = BIT(31), +}; + +enum omnia_cmd_poweroff_e { + CMD_POWER_OFF_POWERON_BUTTON = BIT(0), + CMD_POWER_OFF_MAGIC = 0xdead, +}; + +enum cmd_usb_ovc_prot_e { + CMD_xET_USB_OVC_PROT_PORT_MASK = GENMASK(3, 0), + CMD_xET_USB_OVC_PROT_ENABLE = BIT(4), +}; + +#endif /* __TURRIS_OMNIA_MCU_INTERFACE_H */ diff --git a/include/u-boot/zlib.h b/include/u-boot/zlib.h index a33cc8780d3..ee19f460958 100644 --- a/include/u-boot/zlib.h +++ b/include/u-boot/zlib.h @@ -49,9 +49,6 @@ extern "C" { #endif -#define ZLIB_VERSION "1.2.3" -#define ZLIB_VERNUM 0x1230 - /* #include "zconf.h" */ /* included directly here */ /* zconf.h -- configuration of the zlib compression library * Copyright (C) 1995-2005 Jean-loup Gailly. @@ -484,7 +481,6 @@ typedef gz_header FAR *gz_headerp; #define Z_DATA_ERROR (-3) #define Z_MEM_ERROR (-4) #define Z_BUF_ERROR (-5) -#define Z_VERSION_ERROR (-6) /* Return codes for the compression/decompression functions. Negative * values are errors, positive values are used for special but normal events. */ @@ -523,11 +519,11 @@ typedef gz_header FAR *gz_headerp; ZEXTERN int ZEXPORT deflate OF((z_streamp strm, int flush)); ZEXTERN int ZEXPORT deflateInit_ OF((z_streamp strm, int level, - const char *version, int stream_size)); + int stream_size)); ZEXTERN int ZEXPORT deflateEnd OF((z_streamp strm)); ZEXTERN int ZEXPORT deflateInit2_ OF((z_streamp strm, int level, int method, int windowBits, int memLevel, - int strategy, const char *version, + int strategy, int stream_size)); ZEXTERN int ZEXPORT deflateReset OF((z_streamp strm)); ZEXTERN int ZEXPORT deflateSetDictionary OF((z_streamp strm, @@ -553,7 +549,7 @@ ZEXTERN int ZEXPORT deflateCopy OF((z_streamp dest, ZEXTERN int ZEXPORT inflateInit_ OF((z_streamp strm, - const char *version, int stream_size)); + int stream_size)); ZEXTERN int ZEXPORT inflate OF((z_streamp strm, int flush)); /* inflate decompresses as much data as possible, and stops when the input @@ -743,11 +739,11 @@ ZEXTERN int ZEXPORT uncompress2 OF((Bytef *dest, uLongf *destLen, */ ZEXTERN int ZEXPORT inflateInit2_ OF((z_streamp strm, int windowBits, - const char *version, int stream_size)); + int stream_size)); #define inflateInit(strm) \ - inflateInit_((strm), ZLIB_VERSION, sizeof(z_stream)) + inflateInit_((strm), sizeof(z_stream)) #define inflateInit2(strm, windowBits) \ - inflateInit2_((strm), (windowBits), ZLIB_VERSION, sizeof(z_stream)) + inflateInit2_((strm), (windowBits), sizeof(z_stream)) #if !defined(ZUTIL_H) && !defined(NO_DUMMY_DECL) struct internal_state {int dummy;}; /* hack for buggy compilers */ diff --git a/include/usb_mass_storage.h b/include/usb_mass_storage.h index 83ab93b530d..6d83d93cad7 100644 --- a/include/usb_mass_storage.h +++ b/include/usb_mass_storage.h @@ -7,7 +7,6 @@ #ifndef __USB_MASS_STORAGE_H__ #define __USB_MASS_STORAGE_H__ -#define SECTOR_SIZE 0x200 #include <part.h> #include <linux/usb/composite.h> |