Age | Commit message (Collapse) | Author |
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Made NAND bank configuration setting a config variable.
Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Stefan Roese <sr@denx.de>
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This patch fixes a UIC external_interrupt hang if critical or non-critical
interrupt is set at the same time as a normal interrupt is set on UIC0.
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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Removed Magic numbers from Initialization preload registers
Tested with Kilauea, Glacier, Canyonlands and Katmai boards
About 5-7% improvement seen for LMBench memtests
Signed-off-by: Prodyut Hazarika <phazarika@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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MPC5121 rev 2 silicon has a new register for controlling how long
CS is asserted after deassertion of ALE in multiplexed mode.
The default is to assert CS together with ALE. The alternative
is to assert CS (ALEN+1)*LPC_CLK clocks after deassertion of ALE.
The default is wrong for the NOR flash and CPLD on the ADS5121.
This patch turns on the alternative for CS0 (NOR) and CS2 (CPLD)
it does so conditionally based on silicon rev 2.0 or greater.
Signed-off-by: Martha J Marx <mmarx@silicontkx.com>
Signed-off-by: John Rigby <jrigby@freescale.com>
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The existing I2C freqency dividers for FDR does not apply
to ColdFire platforms; thus, a seperate table is added
based on MCF5xxx Reference Manual
Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: Tabi Timur <timur@freescale.com>
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Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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Add FEC pin set and mii reset in __mii_init(). Change
legacy flash vendor from 2 to AMD LEGACY (0xFFF0),
change cfi_offset to 0, and change CFG_FLASH_CFI to
CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and
M54455EVB env settings in configuration file.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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The user manuals recommend 7.
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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M5249EVB, M5271EVB, M5272C3, M5275EVB and M5282EVB platforms
uart baudrate increase from 19200 to 115200 bps
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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Implicit declaration of nand_init() warning message
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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For some reason we duplicated the majority of code in lib_ppc/interrupts.c
not show how that happened, but there is no good reason for it.
Use the interrupt_init_cpu() and timer_interrupt_cpu() since its why
they exist.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The MPC8536 Adds SDHC and SATA controllers to the PQ3 family. We
also have SERDES init code for the 8536.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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All 85xx boards have been converted to the new code so we can
remove the old SPD DDR setup code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Provide a helper function that board code can call to map TLBs when
setting up DDR.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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dm9000 has code to detect and initialize external phy parts, but later
on in the code the part is forced to use the internal phy
unconditionally. Remove the unused/untested code.
change the GPIO initialization so that only the GPIO used as an
internal phy reset (hardwired in the chip) is set as an output. The
remaining GPIO need to be handled by board specific code to prevent
possible drive conflicts. Set as inputs for safety.
replace a few magic numbers with defines
Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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cmd_net.c command descriptions were updated to describe the optional
hostIPaddr argument. The dhcp command help message was also updated
to more closely reflect the other commands in cmd_net.c
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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The DHCP handler has 1 state that is not listed in this case, causing a
failure message when there is actually no failure.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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The option CONFIG_BOOTP_RANDOM_DELAY does not compile, because of a
missing extern inside the net/bootp.h header
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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