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2020-08-25arm: octeontx2: Add support for OcteonTX2 SoC platformsSuneel Garapati
This patch adds support for all OcteonTX2 96xx/95xx boards from Marvell. For 96xx boards, use octeontx_96xx_defconfig and for 95xx boards, use octeontx_95xx_defconfig. Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25arm: octeontx: Add support for OcteonTX SoC platformsSuneel Garapati
This patch adds support for all OcteonTX 81xx/83xx boards from Marvell. For 81xx boards, use octeontx_81xx_defconfig and for 83xx boards, use octeontx_83xx_defconfig. Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25watchdog: Add reset support for OcteonTX / TX2Suneel Garapati
Adds support for Core 0 watchdog poke on OcteonTX and OcteonTX2 platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25mmc: Add MMC controller driver for OcteonTX / TX2Suneel Garapati
Adds support for MMC controllers found on OcteonTX or OcteonTX2 SoC platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Peng Fan <peng.fan@nxp.com>
2020-08-25pci: Add PCI controller driver for OcteonTX / TX2Suneel Garapati
Adds support for PCI ECAM/PEM controllers found on OcteonTX or OcteonTX2 SoC platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25ata: ahci: Add BAR index quirk for Cavium PCI SATA deviceSuneel Garapati
For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0 instead of BAR5. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25arm: octeontx2: Add headers for OcteonTX2Suneel Garapati
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
2020-08-25arm: octeontx: Add headers for OcteonTXSuneel Garapati
Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25arm: include/asm/io.h: Add 64bit clrbits and setbits helpersSuneel Garapati
Add 64bit API for clrbits and setbits. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25pci: pci-uclass: Check validity of ofnodeSuneel Garapati
Add check if the referenced ofnode is valid. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add support for Alternate-RoutingID capabilitySuneel Garapati
If ARI capability is found on device, use it to update next function number in bus scan and also helps to skip unnecessary bdf scans. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add VF BAR map support for Enhanced AllocationSuneel Garapati
Makes dm_pci_map_bar API available to map BAR for Virtual function PCI devices which support Enhanced Allocation. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add support for Single-Root I/O VirtualizationSuneel Garapati
SR-IOV - Single Root I/O Virtualization PF - Physical Function VF - Virtual Function If SR-IOV capability is present, use it to initialize Virtual Function PCI device instances. pci_sriov_init function will read SR-IOV registers to create VF devices under the PF PCI device and also bind driver if available. This function needs to be invoked from Physical function device driver which expects VF device support, creating minimal impact on existing framework. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add support for Enhanced Allocation in BridgesSuneel Garapati
If Enhanced Allocation capability is present in bridges, use it to read the fixed sub-ordinate bus number. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add multi entry support for memory regionsSuneel Garapati
Enable PCI memory regions in ranges property to be of multiple entry. This helps to add support for SoC's like OcteonTX/TX2 where every peripheral is on PCI bus. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Make DT subnode parse optionalSuneel Garapati
Parse subnode DT properties only if parent node is valid. Otherwise, assert is triggered on ofnode_valid in ofnode_first_subnode from dev_for_each_subnode. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Fix incorrect argument in map_physmemSuneel Garapati
Fix argument ordering for map_physmem() called in dm_pci_map_ea_bar(). Additinally minor spelling correction. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Dynamically allocate the PCI regionsStefan Roese
Instead of using a fixed length pre-allocated array of regions, this patch moves to dynamically allocating the regions based on the number of available regions plus the necessary regions for DRAM banks. Since MAX_PCI_REGIONS is not needed any more, its removed completely with this patch. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-08-25ARM: renesas: Drop unnecessary function ft_board_setup()Stefan Roese
Marek explained on IRC, that ft_board_setup() is not used / necessary at all. So its best to just drop it completely, as it interferes with the cleanup of CONFIG_MAX_PCI_REGIONS (completely removed). Signed-off-by: Stefan Roese <sr@denx.de> Suggested-by: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always setStefan Roese
Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for all boards. Hence we can remove the conditional compilation and the code path that will never get compiled. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25dm: core: Add API to read PCI bus-range propertyStefan Roese
Add dev_read_pci_bus_range() to read bus-range property values Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25fdtdec: Add API to read pci bus-range propertySuneel Garapati
Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24Merge tag 'u-boot-clk-24Aug2020' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-clk - Add CCF clocks definitions for iMX6Q enet (ETH) - Several fixes for CCF framework - the most notable is the one, which adds get_rate helper to clk-mux.c - Improvements for clk command - better visibility and alignment.
2020-08-24clk: ccf: Add missing #include <dm/uclass.h> to clk-mux.cLukasz Majewski
After adding custom get_rate helper function it was necessary to include <dm/uclass.h> to avoid warnings about missing uclass_get_device_by_name. Signed-off-by: Lukasz Majewski <lukma@denx.de> Series-to: u-boot
2020-08-24cmd: clk: correctly handle depth for clk dumpPatrick Delaunay
Update depth only when clock uclass is found to have correct display of command "clk dump". Without this patch, the displayed depth is the binding depth for all the uclass and that can be strange as only clock uclass nodes are displayed. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24cmd: clk: cosmetic: correct code alignment in show_clksPatrick Delaunay
Correct code alignment in show_clks() function. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24clk: ccf: mux: change the get_rate helperDario Binacchi
The previous version of the get_rate helper does not work if the mux clock parent is changed after the probe. This error has not been detected because this condition has not been tested. The error occurs because the set_parent helper does not change the parent of the clock device but only the clock selection register. Since changing the parent of a probed device can be tricky, the new version of the get_rate helper provides the rate of the selected clock and not that of the parent. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24clk: ccf: mux: fix access to the sandbox registerDario Binacchi
The tests developed for the mux clock are run on the sandbox. They don't call the clk_mux_set_parent routine and therefore they do not detect this error. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24clk: ccf: mux: fix typoDario Binacchi
Close the opening bracket. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24clk: ccf: mux: change include orderDario Binacchi
Apply u-boot coding style on include files order. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24clk: fix the console output of clk_registerDario Binacchi
The parent->name variable can be used only in case the uclass_get_device_by_name routine returns successfully. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24clk: set flags in the ccf registration routinesDario Binacchi
The top-level framework flags are passed as parameter to the common clock framework (ccf) registration routines without being used. Checks of the flags setting added by the patch have been added in the ccf test. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24dm: test: clk: add the test for the ccf gated clockDario Binacchi
Unlike the other clock types, in the case of the gated clock, a new driver has been developed which does not use the registering routine provided by the common clock framework. The addition of the ecspi0 clock to sandbox therefore allows testing the ccf gate clock. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24clk: imx6: Add definition for IMX6QDL_CLK_ENET_REF clockLukasz Majewski
After commit 673f6597321d ("net: fec_mxc: support i.MX8M with CLK_CCF") all NXP boards, which are not IMX8 and in the same time are supporting CCF need to provide PTP clock. On the i.MX6Q this clock is provided with IMX6QDL_CLK_ENET_REF in the Linux kernel's CCF. Code in this change models the simplest case when enet reference clock is generated from 'osc' clock. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-08-24clk: imx: Add support for pllv3 enet clockLukasz Majewski
This code has been ported from Linux kernel v5.5.5 (tag) and has been adjusted to U-Boot's DM. It adds support for correct recognition of IMX_PLLV3_ENET flag in the clk-pllv3.c driver. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-08-24clk: imx6: Add definition for IMX6QDL_CLK_ENET clockLukasz Majewski
After commit 673f6597321d ("net: fec_mxc: support i.MX8M with CLK_CCF") all NXP boards, which are not IMX8 and in the same time are supporting CCF need to provide IMX6QDL_CLK_ENET. This change defines the missing clock in i.MX6Q's CCF. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-08-24clk: ICS8N3QV01 remove superfluous codeHeinrich Schuchardt
Do not calculate a unused value of n which is overwritten in both branches of the subsequent if statement. Identified by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-08-23Merge tag 'dm-pull-22aug20' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-dm replace devfdt_get_addr_ptr() with dev_read_addr_ptr() binman fixes for portage various minor fixes 'bind' command improvements
2020-08-23Merge branch '2020-08-21-stdio-cleanup'Tom Rini
- Clean up common/stdio.c and migrate some related options to Kconfig
2020-08-23stdio: Tidy up the coding styleSimon Glass
Bring the coding style in this file up to the current level. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23stdio: Drop brackets around &devs.listSimon Glass
These brackets are not needed. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23stdio: Update to use compiler for Kconfig checksSimon Glass
Drop use of the preprocessor where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23stdio: Drop #ifdefs in the header fileSimon Glass
These prevent the use of IS_ENABLED() and are unnecessary. Drop them and fix a few code-style nits nearby. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23stdio: Tidy up use of CONFIG_SYS_DEVICE_NULLDEVSimon Glass
Now that this is in Kconfig we can move the logic at the top of the file to Kconfig, and use if() instead of #if. Update the file with these changes. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23Convert CONFIG_SYS_DEVICE_NULLDEV to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_SYS_DEVICE_NULLDEV Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23Convert CONFIG_SPLASH_SCREEN et al to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_SPLASH_SCREEN CONFIG_SPLASH_SCREEN_ALIGN CONFIG_SPLASHIMAGE_GUARD CONFIG_SPLASH_SOURCE Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23moveconfig: Skip binary and ELF filesSimon Glass
Add a few more file extensions to the list of files that should not be processed. This avoids unicode errors, for example. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23Convert CONFIG_NETCONSOLE to KconfigTom Rini
This converts the following to Kconfig: CONFIG_NETCONSOLE Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-22sandbox: u-boot.lds: Remove bogus __bss_start symbolOvidiu Panait
The sections described in the sandbox linker script are inserted before data section via "INSERT BEFORE .data;". Running readelf -S on sandbox u-boot binary shows that the bss section is located after the data section: Section Headers: [Nr] Name Type Address Offset Size EntSize Flags Link Info Align ... [25] .u_boot_list PROGBITS 000000000041d1c8 0021d1c8 000000000000dd90 0000000000000000 WA 0 0 8 [26] _u_boot_sandbox_g PROGBITS 000000000042af58 0022af58 00000000000000a0 0000000000000000 WA 0 0 8 [27] .data PROGBITS 000000000042b000 0022b000 000000000000f708 0000000000000000 WA 0 0 32 [28] .bss NOBITS 000000000043a720 0023a708 0000000000018930 0000000000000000 WA 0 0 32 This means that the __bss_start assignment in the linker script is bogus, as the actual bss section start is located elsewhere. Remove this assignment, as the __bss_start symbol is not used on sandbox anyway. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-08-22board_f: Remove dead code from init_func_i2cOvidiu Panait
Since commit 69153988a6f4 ("i2c: Finish dropping use of CONFIG_I2C_HARD") init_func_i2c is wrapped only by "#if defined(CONFIG_SYS_I2C)". Because of this, the second ifdef within becomes pointless: #if defined(CONFIG_SYS_I2C) static int init_func_i2c(void) <snip> #ifdef CONFIG_SYS_I2C ... #else ... #endif <snip> } #endif Remove the dead #else preprocessor code. Fixes: 69153988a6f ("i2c: Finish dropping use of CONFIG_I2C_HARD") Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
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