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2021-08-14efi_loader: Uri() device path nodeHeinrich Schuchardt
iPXE used Uri() device path nodes. So we should support them in the device path to text protocol. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-14doc: stm32mp1: add page for device tree bindingsPatrick Delaunay
With device tree binding migration to yaml it is difficult to synchronize the binding from Linux kernel to U-Boot. Instead of maintaining the same dt bindings, this patch adds in the U-Boot documentation the path to the device tree bindings in Linux kernel for STMicroelectronics devices, when they are used without modification. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Add links for referenced text files. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-14doc: Add a note about why devicetree is usedSimon Glass
This question comes up every now and then with people coming from Linux. Add some notes about it so we can point to it in the mailing list. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-14doc: Update devicedocs including how to add tweaksSimon Glass
This file is about 10 years old and the updates have not covered everything that has changed, particularly in the last few years. Update the information and add mention of the u-boot.dtsi files. Signed-off-by: Simon Glass <sjg@chromium.org> Fix typos. Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-14doc: Move devicetree control doc to rSTSimon Glass
Move this to rST format, largely unchanged to start with. Add an index for this topic, as well as an empty intro. Note this patch does not include updates! Is it just a conversion to the new format. See the next patch. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchart <xypron.glpk@gmx.de>
2021-08-14doc: fix Latex marginsHeinrich Schuchardt
Adjust the Latex formatting to match Linux v5.13.1: * add Latex margins * reformat the code in doc/conf.py to match Linux Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-14doc: require Sphinx 2.4.4Heinrich Schuchardt
Require Sphinx 2.44 to build the documentation. Remove all code related to earlier versions. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-14doc: add pkg-config to the build dependenciesHeinrich Schuchardt
tools/Makefile uses pkg-config. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-13Merge https://source.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- Enable SeaBIOS support for Crown Bay - Update SeaBIOS build instructions in the x86 doc - Enable CONFIG_SPI_FLASH_SMART_HWCAPS for Crown Bay
2021-08-13x86: crownbay: Enable CONFIG_SPI_FLASH_SMART_HWCAPSBin Meng
Now that the spi-nor fix has been made in u-boot/master via: commit 87e7219f9c6a ("mtd: spi-nor: Respect flash's hwcaps in spi_nor_adjust_hwcaps()") enable CONFIG_SPI_FLASH_SMART_HWCAPS on Intel Crown Bay again. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-13doc: x86: Update SeaBIOS build instructionsBin Meng
Update SeaBIOS build instructions using exact command that involves "make olddefconfig", and mention SeaBIOS release 1.14.0 has been used for testing. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-13x86: crownbay: Enable SeaBIOS supportBin Meng
Enable SeaBIOS support for any kernel that requires legacy BIOS services. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-12Merge tag 'u-boot-rockchip-20210812' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-rockchip - Add Rockchip SFC driver support; - DTS sync from kernel; - emmc hs400 support for rk3399; - Fix for spinore bootdevice and MMC boot order;
2021-08-12rockchip: px30: Support configure SFCJon Lin
Make px30 SFC clock configurable Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12rockchip: px30: add support for SFC for Odroid Go AdvanceChris Morgan
The Odroid Go Advance uses a Rockchip Serial Flash Controller with an XT25F128B SPI NOR flash chip. This adds support for both. Note that while both the controller and chip support quad mode, only two lines are connected to the chip. Changing the pinctrl to bus2 and setting tx and rx lines to 2 for this reason. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12mtd: spi-nor-ids: Add XTX XT25F128BChris Morgan
Adds support for XT25F128B used on Odroid Go Advance. Unfortunately this chip uses a continuation code which I cannot seem to parse, so there are possibly going to be collisions with chips that use the same manufacturer/ID. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12rockchip: px30: add the serial flash controllerChris Morgan
Add the serial flash controller to the devicetree for the PX30. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12rockchip: px30: Add support for using SFCChris Morgan
This patch adds support for setting the correct pin configuration for the Rockchip Serial Flash Controller found on the PX30. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12spi: rockchip_sfc: add support for Rockchip SFCChris Morgan
This patch adds support for the Rockchip serial flash controller found on the PX30 SoC. It should work for versions 3-5 of the SFC IP, however I am only able to test it on v3. This is adapted from the WIP SPI-MEM driver for the SFC on mainline Linux. Note that the main difference between this and earlier versions of the driver is that this one does not support DMA. In testing the performance difference (performing a dual mode read on a 128Mb chip) is negligible. DMA, if used, must also be disabled in SPL mode when using A-TF anyway. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12rockchip: Fix u-boot-rockchip.bin buildJohan Gunnarsson
Currently there are a few arm32 rockchip board configs that don't generate u-boot-rockchip.bin when running make because CONFIG_BINMAN is not enabled. This patch changes CONFIG_ARCH_ROCKCHIP to also select CONFIG_BINMAN if CONFIG_SPL and !CONFIG_ARM64. Example builds that don't generate u-boot-rockchip.bin without this patch: export ARCH=arm export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- make kylin-rk3036_defconfig make export ARCH=arm export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- make rock_defconfig make export ARCH=arm export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- make tinker-rk3288_defconfig make Signed-off-by: Johan Gunnarsson <johan.gunnarsson@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12arm: dts: sync the Rockhip 3368 SoCs from LinuxPeter Robinson
Sync the rk3368 DTs and associated bits from 5.14-rc1. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12arm: dts: sync the Rockhip 3328 SoCs from LinuxPeter Robinson
Sync the rk3328 DTs and associated bits from 5.14-rc1. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12arm: dts: sync the Rockhip 3399 SoCs from LinuxPeter Robinson
Sync the rk3399 DTs and associated bits from 5.14-rc1. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> (Remove the conflict content for vmarc-som) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11Merge https://source.denx.de/u-boot/custodians/u-boot-cfi-flashTom Rini
- Some CFI flash related fixups (Kconfig & header) (Bin) - Enable CFI flash support on the QEMU RISC-V virt machine. (Bin)
2021-08-11Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- Convert GoFlex Home Ethernet and SATA to Driver Model (Tony) - mvebu: Automatically detect CONFIG_SYS_TCLK (Pavel) - mvebu: sata_mv: Fix HDD identication during cold start (Tony) - a37xx: pci: Fix handling PIO config error responses (Pavel) - Other minor misc changes and board maintainer updates
2021-08-11Merge tag 'u-boot-amlogic-20210810' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-amlogic - odroid-n2: fix fdtfile suffix for n2-plus - sei610 & meson64_android cleanups to prepare android 11 boot support - use Android BCB mechanism for reboot reason instead of HW reboot flag - Switch meson64_android boot flow to use abootimg for A/B, AVB and DTBO support
2021-08-11arm64: rk3399: r4s: Remove undesirable MAC address fetching methods for ethernetXiaobo Tian
Remove the recommended MAC address from the network card. NanoPi R4S has a EEPROM attached to the 2nd I2C bus (U92), which stores the MAC address. Signed-off-by: Xiaobo Tian <peterwillcn@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11arm64: rk3399: r4s: Inheritance uses the sdmmc definition in dtsiXiaobo Tian
The host-index-min property is invalid, so it inherits from the sdmmc definition in dtsi. Signed-off-by: Xiaobo Tian <peterwillcn@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11arm64: rk3399: r4s: correct the LEDS label nameXiaobo Tian
Correct the LEDS label name and remove the board type prefix, which is actually unnecessary here, removes the redefined system status LED pin. Signed-off-by: Xiaobo Tian <peterwillcn@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11rockchip: config: evb-rk3399: add hs400 and SDMA supportYifeng Zhao
This enable hs400 and SDMA support for emmc on evb-rk3399. Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11mmc: rockchip_sdhci: Add support for RK3568Yifeng Zhao
This patch adds support for the RK3568 platform to this driver. Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11mmc: rockchip_sdhci: add phy and clock config for rk3399Yifeng Zhao
Add clock, phy and other configuration, it is convenient to support new controller. Here a short summary of the changes: - Add mmc_of_parse to parse dts config. - Remove OF_PLATDATA related code. - Reorder header inclusion. - Add phy ops. - add ops set_ios_post to modify the parameters of phy when the clock changes. - Add execute tuning api for hs200 tuning. Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11ARM: dts: rockchip: update rk3188-radxarock.dtsJohan Jonker
In the Linux DT the file rk3xxx.dtsi is shared between rk3066 and rk3188. Both rk3xxx.dtsi and rk3188.dtsi have recently had some updates. For a future rk3066 support in U-boot this file must also update. Move U-boot specific things in a rk3188-radxarock-u-boot.dtsi file. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11ARM: dts: rockchip: update rk3188.dtsiJohan Jonker
In the Linux DT the file rk3xxx.dtsi is shared between rk3066 and rk3188. Both rk3xxx.dtsi and rk3188.dtsi have recently had some updates. For a future rk3066 support in U-boot this file must also update. Move U-boot specific things in a rk3188-u-boot.dtsi file. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11rockchip: rk3188-power: sync power domain dt-binding header from LinuxJohan Jonker
In order to update the DT for rk3188 sync the power domain dt-binding header. This is the state as of v5.12 in Linux. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11ARM: dts: rockchip: update rk3xxx.dtsiJohan Jonker
In the Linux DT the file rk3xxx.dtsi is shared between rk3066 and rk3188. This file has recently had some updates. For a future rk3066 support in U-boot this file must also update. Move U-boot specific things in a rk3xxx-u-boot.dtsi file. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11rockchip: rk3188-cru-common: sync clock dt-binding header from LinuxJohan Jonker
In order to update the DT for rk3066 and rk3188 sync the clock dt-binding header. This is the state as of v5.12 in Linux. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11rk3399: boot_devices fix spinor node nameArtem Lapkin
Problem: board_spl_was_booted_from return wrong boot_devices[3] value /spi@ff1d0000 and same-as-spl dont work properly for SPINOR flash because arch/arm/mach-rockchip/spl-boot-order.c spl_node_to_boot_device need parse SPINOR flash node as UCLASS_SPI_FLASH spl-boot-order: same-as-spl > *** BOOT_SOURCE_ID 3 (2:emmc 3:spi 5:sd ... /spi@ff1d0000 > board_boot_order: could not map node @618 to a boot-device /sdhci@fe330000 > /mmc@fe320000 Solution: just change it to /spi@ff1d0000/flash@0 spl-boot-order: same-as-spl > *** BOOT_SOURCE_ID 3 (2:emmc 3:spi 5:sd ... /spi@ff1d0000/flash@0 > /sdhci@fe330000 > /mmc@fe320000 Signed-off-by: Artem Lapkin <art@khadas.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11rockchip: Fix MMC boot orderAlex Bee
Basically all, i.e. rk3036.dtsi, rk3128.dtsi, rk3xxx.dtsi, rk322x.dtsi, rk3288.dtsi, rk3308-u-boot.dtsi, rk3328-u-boot.dtsi, rk3399-u-boot.dtsi and px30-u-boot.dtsi Rockchip SoC devicetrees which have mmc indexes are defining eMMC as mmc0 and sdmmc as mmc1. This means that the rule to try to boot from the SD card first is ignored, which as per comment is what we want and is important for distros, which rely on that. Fix this by setting the correct mmc index, i.e. first from mmc1 (SD card), second from mmc0 (eMMC). Signed-off-by: Alex Bee <knaerzche@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11riscv: qemu: Enable MTD NOR flash supportBin Meng
Enable support to the 2 NOR flashes on the QEMU RISC-V virt machine. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11flash.h: Remove CONFIG_SYS_FLASH_CFI from flash_info_tBin Meng
Those embers wrapped with CONFIG_SYS_FLASH_CFI in struct flash_info_t are unconditionally used in the cfi_flash.c driver. Drop the #ifdefs in the definition of flash_info_t. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11mtd: kconfig: Fix CFI_FLASH dependencyBin Meng
The DM version CFI flash driver is in driver/mtd/cfi_flash.c, which only gets built when FLASH_CFI_DRIVER is on. If CFI_FLASH is on but FLASH_CFI_DRIVER is not, nothing is enabled at all. Fix this dependency by selecting FLASH_CFI_DRIVER when CFI_FLASH is enabled. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: kirkwood: Goflex Home: Update board maintainerTony Dinh
Change maintainer to me. Suriyan no longer has this board and wishes to see someone maintaining it actively. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: kirkwood: Dockstar: Update board maintainerTony Dinh
Change maintainer to me. Eric no longer has this board and wishes to see someone maintaining it actively. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: mvebu: Hang if ddr3_init() failsPali Rohár
If ddr3_init() fails then DDR was not initialized and we cannot load and execute U-Boot. We cannot continue, we cannot do anything in this case, so hang. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: a37xx: pci: Fix handling PIO config error responsesPali Rohár
Returning fabricated CRS value (0xFFFF0001) by PCIe Root Complex to OS is allowed only for 4-byte PCI_VENDOR_ID config read request and only when CRSSVE bit in Root Port PCIe device is enabled. In all other error PCIe Root Complex must return all-ones. So implement this logic in pci-aardvark.c driver properly. aardvark HW does not have Root Port PCIe device and U-Boot does not implement emulation of this device. So expect that CRSSVE bit is set as U-Boot can already handle CRS value for PCI_VENDOR_ID config read request. More callers of pci_bus_read_config() function in U-Boot do not check for return value, but check readback value. Therefore always fill readback value in pcie_advk_read_config() function. On error fill all-ones of correct size as it is required for PCIe Root Complex. And also correctly propagates error from failed config write request to return value of pcie_advk_write_config() function. Most U-Boot callers ignores this return value, but it is a good idea to return correct value from function. These issues about return value of failed config read requests, including special handling of CRS were reported by Lorenzo and Bjorn for Linux kernel driver pci-aardvark together with quotes from PCIe r4.0 spec, see details: https://lore.kernel.org/linux-pci/20210624213345.3617-1-pali@kernel.org/t/#u Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: mvebu: sata_mv failed to identify HDDs during cold startTony Dinh
During cold start, with some HDDs, mv_sata_identify() does not populate the ID words on the 1st ATA ID command. In fact, the first ATA ID command will only power up the drive, and then the ATA ID command processing is lost in the process. Tests with: - Seagate ST9250320AS 250GB HDD and Seagate ST4000DM004-2CV104 4TB HDD. - Zyxel NSA310S (Kirkwood 88F6702), Marvell Dreamplug (Kirkwood 88F6281), Seagate GoFlex Home (Kirkwood 88F6281), Pogoplug V4 (Kirkwood 88F6192). Observation: - The Seagate ST9250320AS 250GB took about 3 seconds to spin up. - The Seagate ST4000DM004-2CV104 4TB took about 8 seconds to spin up. - mv_sata_identify() did not populate the ID words after the call to mv_ata_exec_ata_cmd_nondma(). - Attempt to insert a long delay of 30 seconds, ie. mdelay(30_000), after the call to ata_wait_register() inside mv_ata_exec_ata_cmd_nondma() did not help with the 4TB drive. The ID words were still empty after that 30s delay. Patch Description: - Added a second ATA ID command in mv_sata_identify(), which will be executed if the 1st ATA ID command did not return with valid ID words. - Use the HDD drive capacity in the ID words as a successful indicator of ATA ID command. - In the scenario where a box is rebooted, the 1st ATA ID command is always successful, so there is no extra time wasted. - In the scenario where a box is cold started, the 1st ATA command is the power up command. The 2nd ATA ID command alleviates the uncertainty of how long we have to wait for the ID words to be populated by the SATA controller. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2021-08-11arm: kirkwood: Do not overwrite CONFIG_SYS_TCLKPali Rohár
Config option CONFIG_SYS_TCLK is set by kw88f6281.h and kw88f6192.h files to correct SOC/platform value. So do not overwrite it in board config include files. Kirkwood 88F6180 and 88F6192 uses 166 MHz TCLK and Kirkwood 88F6281 uses 200 MHz TCLK. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: mvebu: axp: Set CONFIG_SYS_TCLK globallyPali Rohár
This mvebu axp platform always uses fixed 250 MHz TCLK. So specify this CONFIG_SYS_TCLK option in msys section of global file soc.h file instead of manual configuration in every board file. Now every #if-#else case of soc.h file defines CONFIG_SYS_TCLK, so remove useless default CONFIG_SYS_TCLK value from the end of soc.h file. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: mvebu: msys: Set CONFIG_SYS_TCLK globallyPali Rohár
This mvebu msys platform always uses fixed 200 MHz TCLK. So specify this CONFIG_SYS_TCLK option in msys section of global file soc.h file instead of manual configuration in every board file. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
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