Age | Commit message (Collapse) | Author |
|
Enable CONFIG_K3_QOS to set QoS registers in R5 boot stage.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
|
|
Enable Quality of Service (QoS) blocks for Display SubSystem (DSS), by
servicing the DSS - DDR traffic from the Real-Time (RT) queue. This is
done by setting the DSS DMA orderID to greater than 9.
Before setting up the QoS, the ORDERID needs to be mapped to VBUSM sources
using setup_navss_nb() function call that sets the threadmap for NBSS
registers. (Section 10.2.9.2.10 "Quality of Service" in TRM[0])
Section 3.2.1 "Quality of Service (QoS)" in the TRM[0] provide more
details.
[0]: https://www.ti.com/lit/zip/spruj52
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
|
|
Enable Quality of Service (QoS) blocks for Display SubSystem (DSS), by
servicing the DSS - DDR traffic from the Real-Time (RT) queue. This is
done by setting the DSS DMA orderID to greater than 9.
Before setting up the QoS, the ORDERID needs to be mapped to VBUSM sources
using setup_navss_nb() function call that sets the threadmap for NBSS
registers. (Section 10.2.9.2.10 "Quality of Service" in TRM[0])
Section 3.2.1 "Quality of Service (QoS)" in the TRM[0] provide more
details.
[0]: https://www.ti.com/lit/zip/spruj28
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
|
|
Enable Quality of Service (QoS) blocks for Display SubSystem (DSS), by
servicing the DSS - DDR traffic from the Real-Time (RT) queue. This is
done by setting the DSS DMA orderID to greater than 7.
Before setting up the QoS, the ORDERID needs to be mapped to VBUSM sources
using setup_navss_nb() function call that sets the threadmap for NBSS
registers. (Section 10.2.10.1.2 "NB Parameters" in TRM[0])
Section 3.3.2 "Quality of Service (QoS)" in the TRM[0] provide more
details.
[0]: https://www.ti.com/lit/zip/spruil1
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
|
|
For the QOS registers, instead of using the raw values for calculation
for each reg field, use a defined macro which takes in argument for all
the reg fields to get the desired value.
Do the similar simplification for QOS register and group registers and
make the corresponding changes for am62a_qos_uboot file.
Suggested-by: Andrew Davis <afd@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
|
|
QoS bit mapping are common across all K3 SoCs so move those defines
to common header file (k3_qos.h).
This ensures that we do not define these for each SoC.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
|
|
support + typos"
Quentin Schulz <foss+uboot@0leil.net> says:
bootflow menu currently crashes U-Boot with a NULL pointer dereference
because bootflow->dev is NULL for global bootmeths (such as EFI BOOTMGR).
Therefore, let's check if the bootflow is associated with a global
bootmeth before trying to make it part of the menu.
While this makes U-Boot not crash anymore, bootflow menu doesn't work
for me (I have never had a happy path with it, but I haven't actually
tried it before today :) ) and this was basically just implemented
following Simon's suggestion sent over IRC. No clue if this is enough or
just a quick band-aid patch.
This also fixes typos in multiple places.
|
|
Michal Simek <michal.simek@amd.com> says:
Hi,
currently only DT way is supported and it is added directly to lib/smbios.c
but I think DT and env is only one way how information can be found that's
why this series is improving handling with using sysinfo driver which can
be platform specific.
At the end of day DT should be taken from smbios.c and put to sysinfo DT
driver instead of implementing it directly in this generic file.
|
|
The global bootmeths don't set the dev in bootflow struct which means
the dev_get_parent(bflow->dev) triggers a NULL-pointer dereference and
crash U-Boot.
So before trying to handle a bootflow, check that the associated
bootmeth isn't global, otherwise skip it.
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Code is pretty much supports only DT properties and completely ignore
information coming from sysinfo driver.
Code is calling smbios_add_prop() which calls with
smbios_add_prop_si(SYSINFO_ID_NONE). But SYSINFO_ID_NONE can't
differentiate different entries from sysinfo driver.
That's why introduce separate SYSINFO macros which can be used in sysinfo
driver and passed to smbios structure.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
This fixes a few syntactic issues as well as typos and grammar.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
This fixes a handful of typos in various help texts in Kconfig configs.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
It's bootmeths and not bootmethds.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Currently code looks like that it sysinfo drivers are supported but
actually none checking that system is detected. That's why call
sysinfo_detect() to make sure that priv->detected in sysinfo uclass is
setup hence information from driver can be passed to smbios.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
It is good to be aware what information is shared via smbios interface
that's why enable it by default.
Signed-off-by: Michal Simek <michal.simek@amd.com>
|
|
Add the secondary cores nodes in the dts file
Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Rui Miguel Silva <rui.silva@linaro.org>
|
|
MD Danish Anwar <danishanwar@ti.com> says:
This series adds config changes and env changes to enable ICSSG Ethernet
Driver on AM64x.
|
|
When ICSSG driver is enabled (CONFIG_TI_ICSSG_PRUETH=y) set
storage_interface and fw_dev_part env variables.
These variables need be set appropriately in order to load different
ICSSG firmwares needed for ICSSG driver. By default the storage
interface is mmc and the partition is 1:2. User can modify this based on
their needs.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
|
|
Enable ICSSG driver, DP83869 phy driver, REMOTEPROC and PRU_REMOTEPROC
in am64x_evm_a53_defconfig. All these configs are needed for ICSSG
driver.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
|
|
Jayesh Choudhary <j-choudhary@ti.com> says:
Hello there,
This series add the U-Boot support for our new platform of K3-SOC
family - J722S-EVM which is a superset of AM62P. It shares the same
memory map and thus the nodes are being reused from AM62P includes
instead of duplicating the definitions.
Some highlights of J722S SoC (in addition to AM62P SoC features) are:
- Two Cortex-R5F for Functional Safety or general-purpose usage and
two C7x floating point vector DSP with Matrix Multiply Accelerator
for deep learning.
- Vision Processing Accelerator (VPAC) with image signal processor
and Depth and Motion Processing Accelerator (DMPAC).
- 7xUARTs, 3xSPI, 5xI2C, 2xUSB2, 2xCAN-FD, 3xMMC and SD, GPMC for
NAND/FPGA connection, OSPI memory controller, 5xMcASP for audio,
4xCSI-RX for Camera, 1 PCIe Gen3 controller, USB3.0 eCAP/eQEP,
ePWM, among other peripherals.
TRM: <https://www.ti.com/lit/zip/sprujb3>
Schematics: <https://www.ti.com/lit/zip/sprr495>
Boot test log:
<https://gist.github.com/Jayesh2000/0313e58fde377f877a9a8f1acc2579ef>
|
|
Introduce basic documentation for the J722S-EVM.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
|
|
Introduce the initial configs needed to support the J722S SoC family.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
|
|
Include the uboot device tree files needed to boot the board.
Co-developed-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
|
|
Include the static DMA channel data for using DMA at SPL stage
for J722S SoC family.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
|
|
Introduce the basic files needed to support the TI J722S family of SoCs.
Co-developed-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
|
|
Introduce the basic functions and definitions needed to properly
initialize TI J722S family of SoCs.
Co-developed-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
|
|
The J722S family of SoCs uses the same DDR controller as found on the
AM62A family. Enable this option when building for the J722S family.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
|
|
Include the clock and lpsc tree files needed for the wkup spl to
initialize the proper PLLs and power domains to boot the SoC.
Reviewed-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
|
|
Add the entries in alphabetical order.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
|
|
Add the power domain platform data entries in alphabetical order.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
|
|
Use IS_ENABLED macro for the platform clock-data list and add them
in alphabetical order.
Reviewed-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
|
|
Include the part number for TI's j722s family of SoC
to identify it during boot.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
|
|
Add JTAG_ID_PARTNO_* in alphabetical order.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
|
|
Sort CONFIG_SOC* and K3_SOC_ID alphabetically.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
|
|
Jonathan Humphreys <j-humphreys@ti.com> says:
Enable on disk capsule updates, which includes defining the firmware
components (tiboot3, spl, u-boot) and enabling processing of raw capsule
updates.
This is enabled for several TI SoC based platforms: AM64, AM62, AM62p,
AM69, BeaglePlay, J7, and BeagleboneAI. The configs to enable this are in a
single base config file. This will make it more scalable to add additional
EFI capsule features (like authentication) across all TI boards that have
capsules enabled.
This series also includes enabling serial flash DFU for AM62 and MMC DFU
for beagleplay.
|
|
Added OSPI NOR flash layout diagram, as well as example commands to flash
firmware to it. Added OSPI boot mode pin setting.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
|
|
Enable on disk, raw capsule update.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
|
|
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the AM69
SK.
TODO: possibly make the struct's sk specific.
TODO: add doc commit (and make sure doc is sk/NOR specific, and add OSIP
boot mode)
TODO: update doc to show sk defconfig when building
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
|
|
Enable serial flash DFU support for capsule update of firmware.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
|
|
Enable on disk, raw capsule update.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
|
|
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the
BeagleBoneAI64.
Note this involved creating BeagleBoneAI64's own beagleboneai64.h board
header file instead of reusing j721e_evm's.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
|
|
Added OSPI flash layout diagram, as well as example commands to flash
firmware to it.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
|
|
Enable on disk, raw capsule update.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
|
|
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the AM62px
SK.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
|
|
Added OSPI flash layout diagram, as well as example commands to flash
firmware to it.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
|
|
Enable on disk, raw capsule update.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
|
|
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the AM62x
SK.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
|
|
Enable on disk, raw capsule update.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
|
|
MMC DFU is required for capsule updates.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
|
|
Define the firmware components updatable via EFI capsule update, including
defining capsule GUIDs for the various firmware components for the
BeaglePlay.
Note this involved creating BeaglePlay's own beagleplay.h board header file
instead of reusing am62_evm's.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
|