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2017-08-04board: at91sam9261ek: Update to support DT and DMWenyou.Yang@microchip.com
Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04gpt: harden set_gpt_info() against non NULL-terminated stringsAlison Chaiken
Strings read from devices may sometimes fail to be NULL-terminated. The functions in lib/string.c are subject to failure in this case. Protect against observed failures in set_gpt_info() by switching to length-checking variants with a length limit of the maximum possible partition table length. At the same time, add a few checks for NULL string pointers. Here is an example as observed in sandbox under GDB: => gpt verify host 0 $partitions Program received signal SIGSEGV, Segmentation fault. 0x0000000000477747 in strlen (s=0x0) at lib/string.c:267 267 for (sc = s; *sc != '\0'; ++sc) (gdb) bt #0 0x0000000000477747 in strlen (s=0x0) at lib/string.c:267 #1 0x00000000004140b2 in set_gpt_info (str_part=<optimized out>, str_disk_guid=str_disk_guid@entry=0x7fffffffdbe8, partitions=partitions@entry=0x7fffffffdbd8, parts_count=parts_count@entry=0x7fffffffdbcf "", dev_desc=<optimized out>) at cmd/gpt.c:415 #2 0x00000000004145b9 in gpt_verify (str_part=<optimized out>, blk_dev_desc=0x7fffef09a9d0) at cmd/gpt.c:580 #3 do_gpt (cmdtp=<optimized out>, flag=<optimized out>, argc=<optimized out>, argv=0x7fffef09a8f0) at cmd/gpt.c:783 #4 0x00000000004295b0 in cmd_call (argv=0x7fffef09a8f0, argc=0x5, flag=<optimized out>, cmdtp=0x714e20 <_u_boot_list_2_cmd_2_gpt>) at common/command.c:500 #5 cmd_process (flag=<optimized out>, argc=0x5, argv=0x7fffef09a8f0, repeatable=repeatable@entry=0x726c04 <flag_repeat>, ticks=ticks@entry=0x0) at common/command.c:539 Suggested-by: Lothar Waßmann <LW@karo-electronics.de> Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04GPT: provide commands to selectively rename partitionsAlison Chaiken
This patch provides support in u-boot for renaming GPT partitions. The renaming is accomplished via new 'gpt swap' and 'gpt rename' commands. The 'swap' mode returns an error if no matching partition names are found, or if the number of partitions with one name does not equal the number with the second name. The 'rename' variant always succeeds as long as a partition with the provided number exists. Rewriting the partition table has the side-effect that all partitions end up with "msftdata" flag set. The reason is that partition type PARTITION_BASIC_DATA_GUID is hard-coded in the gpt_fill_pte() function. This does not appear to cause any harm. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04GPT: read partition table from device into a data structureAlison Chaiken
Make the partition table available for modification by reading it from the user-specified device into a linked list. Provide an accessor function for command-line testing. Signed-off-by: Alison Chaiken <alison@peloton-tech.com> [trini: Make this depend on CMD_GPT_RENAME, as it is the user of this code] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-04GPT: add accessor function for disk GUIDAlison Chaiken
In order to read the GPT, modify the partition name strings, and then write out a new GPT, the disk GUID is needed. While there is an existing accessor for the partition UUIDs, there is none yet for the disk GUID. Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04partitions: increase MAX_SEARCH_PARTITIONS and move to part.hAlison Chaiken
Move MAX_SEARCH_PARTITIONS to part.h so that functions in cmd directory can find it. At the same time, increase the value to 64 since some operating systems use many, and the resources consumed by a larger value are minimal. Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04cmd gpt: test in sandboxAlison Chaiken
Make minor changes to README.gpt and sandbox_defconfig to support testing of the gpt command's functionality in the sandbox. Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04GPT: fix error in partitions string docAlison Chaiken
The existing partitions-list parsing in cmd/gpt.c passes a value from gpt_default() to set_gpt_info() that README.gpt suggests should begin with 'partitions='. Partition-list strings should in fact begin with 'uuid_disk', as otherwise the call from set_gpt_info() to extract_val() to find 'uuid_disk' will fail. Change README.gpt accordingly. Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04disk_partition: introduce macros for description string lengthsAlison Chaiken
Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04EFI: replace number with UUID_STR_LEN macroAlison Chaiken
Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04Merge tag 'xilinx-for-v2017.09' of git://www.denx.de/git/u-boot-microblazeTom Rini
Xilinx changes for v2017.09 Zynq: - Add Z-Turn board support fpga: - Remove intermediate buffer from code Zynqmp: - dts cleanup - change psu_init handling - Add options to get silicon version - Fix time handling - Map OCM/TCM via MMU - Add new clock driver
2017-08-03PowerPC: mpc85xx: Update ft_verify_fdtTom Rini
With the changes to fdt_get_base_address() we need to modify the logic in ft_verify_fdt() for how we check the validity of the CCSR address. Tested-on: qemu-ppce500 -M mpc8544ds Fixes: 336a44877af8 ("fdt: Correct fdt_get_base_address()") Cc: York Sun <york.sun@nxp.com> Cc: Wolfgang Denk <wd@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-03qemu-ppce500: Update get_phys_ccsrbar_addr_early()Tom Rini
The logic of what fdt_get_base_address() will search for and return has changed. Rework get_phys_ccsrbar_addr_early() to perform the logic that fdt_get_base_address used to perform. Fixes: 336a44877af8 ("fdt: Correct fdt_get_base_address()") Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-03ahci-pci: Update call to ahci_probe_scsi_pci()Bin Meng
ahci_probe_scsi() now takes a 'base' argument, and there is an API that prepares base address for us: ahci_probe_scsi_pci(). Reported-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-02Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini
2017-08-03ARM: rmobile: Update defconfig of R-Car Gen3Nobuhiro Iwamatsu
This updates defconfig of R-Car Gen3 to keep with the latest Kconfig. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03net: ravb: Add clock handling supportMarek Vasut
Add support for enabling and disabling the clock using the clock framework based on the content of OF instead of doing it manually in the board file. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03net: ravb: Detect PHY correctlyMarek Vasut
The order of parameters passed to the phy_connect() was wrong. Moreover, only PHY address 0 was used. Replace this with code capable of detecting the PHY address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03net: ravb: Add OF probing supportMarek Vasut
Add support for probing the RAVB Ethernet block from device tree. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03serial: sh: Use the clock framework to obtain clock configMarek Vasut
Since we now have clock driver on the RCar Gen3 , obtain the clock configuration using the clock framework functions. In case this fails, fall back to the original code for pulling the clock config directly out of OF. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03serial: sh: Convert to KconfigMarek Vasut
Convert the SH Serial to Kconfig using tools/moveconfig.py tool and a bit of manual adjustment to cater for failed conversions. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03ARM: rmobile: Enable clock framework on ULCBMarek Vasut
Since there is now a clock driver for RCar Gen3, enable it on this board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03ARM: rmobile: Enable clock framework on Salvator-XMarek Vasut
Since there is now a clock driver for RCar Gen3, enable it on this board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03clk: rmobile: Add RCar Gen3 clock driverMarek Vasut
Add clock driver for the RCar Gen3 R8A7795 and R8A7796 SoCs . This driver allows reading out the clock configuration set by previous boot stages and enabling and disabling clock using the MSTP registers. Setting clock is not supported thus far. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03ARM: rmobile: Enable OF_CONTROL on RCar Gen3Marek Vasut
Since the DTs are now in place, enable OF control so that they get bundled into the U-Boot. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03ARM: dts: rmobile: Import DTS from Linux 4.12Marek Vasut
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.12-rc6, commit 6f7da290413ba713f0cdd9ff1a2a9bb129ef4f6c . This includes both M3 and H3 ULCB and Salvator-X boards. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03ARM: rmobile: Increase console buffer sizesMarek Vasut
Allow pasting extra long lines into the U-Boot console on RCar Gen3. This is OK since we have plenty of resources and it's convenient. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03ARM: rmobile: ulcb: Add ULCB board supportMarek Vasut
Add initial support for the R8A7795 and R8A7796 based ULCB board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03ARM: rmobile: Add PFC PUEN bank 5 addressMarek Vasut
Add the PFC5 PUEN address and SSI SDATA4 bit offset into the rcar-gen3-base.h . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-02Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/ls1046aqds.h include/configs/ls1046ardb.h
2017-08-02arm64: zynqmp: avoid out of buffer accessHeinrich Schuchardt
strncat(a, b, c) appends a maximum of c characters plus the 0 byte to a. In board_init we first write 4 characters plus 0 byte to version. So only ZYNQMP_VERSION_SIZE - 5 additional characters fit into version. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02arm64: zynqmp: Make chip_id routine to handle based on el.Siva Durga Prasad Paladugu
Modify chip_id() routine such that to handle based on the current el. Also make it available even if FPGA is not enabled in system such it can be used always. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02arm64: zynqmp: Make chip_id a global routine()Siva Durga Prasad Paladugu
This patch makes chip_id() as a global routine so that it can be used in other places as required. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02arm64: zynqmp: Modify chip_id routine to get either idcode or versionSiva Durga Prasad Paladugu
This patch modifies the chip_id routine to get either idcode or silicon version based on the argument received. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02arm64: zynqmp: Move dts zcu102 to zcu102-revAMichal Simek
Not using board revision is causing confusion about which board is supported and tested. Mark dts files exactly with board revision which was tested. When new board revision arives it can be symlink if SW view is the same. Also add -revX suffix to compatible string because user space tools are parsing this string and can change behavior depends of board revision. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-02arm64: zynqmp: Dont write to system timestamp generatorSiva Durga Prasad Paladugu
Remove incorrect code of writing to system timestamp counter registers. This register writes does nothing and can be removed. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02arm64: zynqmp: Do not setup time if already setupMichal Simek
Newer psu_init_gpl.c/h contain clock setup. Detect if reference clock is active. If yes, skip timer setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02arm64: zynqmp: Fix SVD mask for getting chip IDMichal Simek
Mask should start from the first bit - using 0xe is just wrong. 3bits are used that's why 0x7 mask is correct. This patch is fixing silicon ID code detection. Previous behavior was that bit0 was completely ignored. Issue was found on 2eg chip detection. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02arm64: zynqmp: Add Kconfig option for adding psu_init to binaryMichal Simek
There is a need to include psu_init also in mini u-boot configuration that's why handle psu_init via Kconfig property. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02arm64: zynqmp: Call psu_init from board_early_init_fMichal Simek
For some mini platforms there could be a need to include psu_init. That's why move it to board file instead of spl only file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02arm64: zynqmp: Remove ifdef around zynqmp mmio read and write rotuinesSiva Durga Prasad Paladugu
This patch removes ifdef around mmio read and write rotuines and make them a single routine by checking the current el. This patch helps to remove ifdef around invoke_smc as well. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02arm64: zynqmp: Define a way to intialize TCMSiva Durga Prasad Paladugu
TCM on ZynqMP needs to be intialized in a sequence and this patch provides a global routine to perform this as per requirement. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02arm64: zynqmp: Provide a Kconfig option to define OCM and TCM in MMUSiva Durga Prasad Paladugu
This patch provides an option to include OCM and TCM memory into MMU table with corresponding memory attributes. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02fpga: xilinx: Avoid using local intermediate bufferSiva Durga Prasad Paladugu
Dont use local temporary buffer for printing out the info instead use directly from memroy. This fixes the issue of stack corruprion due to local buffer overflow. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02clk: zynqmp: Remove unused macros/variablesMichal Simek
These macros and one variable is not used anywhere that's why they should be removed. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-02clk: zynqmp: Dont panic incase of mmio write/read failuresSiva Durga Prasad Paladugu
Dont panic incase of mmio write/read failures instead return error and let the peripheral driver take care of clock get and set failures. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-02clk: zynqmp: Add support for CCF driverSiva Durga Prasad Paladugu
Add support for CCF, this CCF reads the ref clocks from dt and checks all the required clock control registers for its source , divisors and calculates the clock from them. This supports clock and set functions. Panic when read/write fails. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-02common: board_f: Make reserve_mmu a weak functionSiva Durga Prasad Paladugu
Make reserve_mmu a weak so that it provides an option to customize this routine as per platform need Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-02zynq: Add Z-Turn boardAlexander Graf
The Z-Turn board is a low cost development board based on the Xilinx Zynq SoC. While it's powerful and quite versatile, it so far lacked upstream support. This patch adds basic support for the Z-Turn. It does however for now miss enablement for MIO51 reset which means that USB and ethernet don't work. For that either FSBL or SPL need to be adjusted. The SPL part will follow later. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02zynq: Enable distro bootAlexander Graf
Distro boot allows devices to boot using standardized boot methods by default. This can be very handy for distributions that want to run on different platforms. This patch moves the zynq platform to use its old, zynq specific boot method first and then fall back to distro boot. That way supporting Linux distributions like openSUSE is much easier. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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