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2023-04-26spi: cadence-quadspi: Fix check condition for DTR opsApurva Nandan
buswidth and dtr fields in spi_mem_op are only valid when the corresponding spi_mem_op phase has a non-zero length. For example, SPI NAND core doesn't set buswidth when using SPI_MEM_OP_NO_ADDR phase. Fix the dtr checks in set_protocol() to ignore empty spi_mem_op phases, as checking for dtr field in empty phase will result in false negatives. Signed-off-by: Apurva Nandan <a-nandan@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-26mtd: spi-nor-core: Add fixups for s25fs512sTakahiro Kuwano
This patch adds fixups for s25fs512s to address the following issues from reading SFDP: - Non-uniform sectors by factory default. The setting needs to be checked and assign erase hook as needed. - Page size is wrongly advertised in SFDP. - READ_1_1_2 (3Bh/3Ch), READ_1_1_4 (6Bh/6Ch), and PP_1_1_4 (32h/34h) are not supported. - Bank Address Register (BAR) is not supported. In addition, volatile version of Quad Enable is used for safety. Based on patch by Takahiro Kuwano with s25fs_s_post_bfpt_fixup() updated to use 4-byte address commands instead of extended address mode and the page_size is fixed to 256 For future use, manufacturer code should be moved out from framework code as same as in Linux. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-25spi: synquacer: Silence uninitialized variable warningsIlias Apalodimas
When building with clang, the compiler compains with drivers/spi/spi-synquacer.c:212:11: warning: variable 'bus_width' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized] else if (priv->mode & SPI_TX_OCTAL) ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/spi/spi-synquacer.c:276:11: note: uninitialized use occurs here val |= ((bus_width >> 1) << BUS_WIDTH); ^~~~~~~~~ drivers/spi/spi-synquacer.c:212:7: note: remove the 'if' if its condition is always true else if (priv->mode & SPI_TX_OCTAL) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/spi/spi-synquacer.c:189:25: note: initialize the variable 'bus_width' to silence this warning So initialize bus_width to 1 and add a warning if none of the configured modes matches Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Acked-by: Jassi Brar <jaswinder.singh@linaro.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-25mtd: spi-nor: missing fallthrough in set_4byte()Heinrich Schuchardt
Add a missing fallthrough macro to avoid a -Wimplicit-fallthrough warning. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-25spi: npcm-fiu: add regulator feature and remove set clockJim Liu
NPCM7xx/NPCM8xx default is boot from flash. removed set clock feature due to reliability and security. the clock will set by bootblock or tip. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-25spi: f-ospi: Add missing spi_mem_default_supports_op() helperKunihiko Hayashi
The .supports_op() callback function returns true by default after performing driver-specific checks. Therefore the driver cannot apply the buswidth in devicetree. Call spi_mem_default_supports_op() helper to handle the buswidth in devicetree. Fixes: 358f803ae21c ("spi: Add Socionext F_OSPI SPI flash controller driver") Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-25spi: spi-mem: perform odd len check only while writing dataDhruva Gole
in spi_mem_dtr_supports_op we have a check for allowing only even number of bytes to be r/w. Odd bytes writing can be a concern while writing data to a flash for example because 8 DTR mode doesn't support it. However, reading ODD Bytes even though may not be physically possible we can still allow for it because it will not have serious implications on any critical registers being overwritten since they are just reads. Cc: Vaishnav Achath <vaishnav.a@ti.com> Cc: Pratyush Yadav <pratyush@kernel.org> Cc: Vignesh Raghavendra <vigneshr@ti.com> Tested-by: Nikhil M Jain <n-jain1@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-25spi: spi-mem: s/dummy/data buswidth check in dtr_supports_op()Dhruva Gole
This should have been op->data.buswidth instead as we check for octal bus width for the data related ops Also add explanation for why there is checks for 8D even data bytes Cc: Pratyush Yadav <pratyush@kernel.org> Reviewed-by: Pratyush Yadav <ptyadav@amazon.de> Tested-by: Nikhil M Jain <n-jain1@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-25mtd: spi-nor: Add CHIP_ERASE optimizationMarek Vasut
Add support for CHIP_ERASE opcode 0xc7 . This is useful in case the entire SPI NOR is supposed to be erase at once, as is it considerably faster than 4k sector erase and even slightly faster than 64k block erase. The spi_nor_erase_chip() implementation is adapted from Linux 6.1.y as of commit 7d54cb2c26dad ("Linux 6.1.14") . The chip erase is only used in case the entire MTD device is being erased, and the chip does support this functionality. Timing figures from W25Q128JW: 16 MiB erase using 4kiB sector erase opcode 0x20 ... 107.5s 16 MiB erase using 64kiB block erase opcode 0xd8 ... 39.1s 16 MiB erase using chip erase opcode 0xc7 .......... 38.7s Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-24Merge branch '2023-04-24-TI-platform-updates'Tom Rini
- Merge in assorted K3 updates, and re-sync all of the device trees for TI platforms with v6.3-rc6
2023-04-24arm: mach-k3: am642: move do_dt_magic() after sysfw loadingChristian Gmeiner
Makes it possible to use e.g mcu_spi0 for custom board detection. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bryan Brattlof <bb@ti.com>
2023-04-24include: configs: j721e_evm: Fix name_fdt for J7200Neha Malcom Francis
Currently, name_fdt is not set for J7200, fix this so right DTB is picked during boot. Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-04-24arm: mach-k3: common: re-locate authentication for atf/opteeManorit Chawdhry
For setting up the master firewalls present in the K3 SoCs, the arm64 clusters need to be powered on. Re-locates the code for atf/optee authentication. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24remoteproc: ti_k3_arm64: Change the startup of arm64 coreManorit Chawdhry
Configuring master firewalls require the power of the cluster to be enabled before configuring them, change the load of rproc to configure the gtc clocks and start the cluster along with configuring the boot vector. The start of rproc will only start the core. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-am625-r5-sk: add a53 cluster powerManorit Chawdhry
adds a53 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-am62a7-r5-sk: add a53 cluster power domain nodeManorit Chawdhry
adds a53 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-am642-r5: add a53 cluster power domain nodeManorit Chawdhry
adds a53 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-am642-r5-sk: add a53 cluster power domain nodeManorit Chawdhry
adds a53 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-j7200-r5: add a72 cluster power domain nodeManorit Chawdhry
adds a72 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-j721e-r5: add a72 cluster power domain nodeManorit Chawdhry
adds a72 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-j721e-r5-sk: add a72 cluster power domain nodeManorit Chawdhry
adds a72 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-j721s2-r5: add a72 cluster power domain nodeManorit Chawdhry
adds a72 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: mach-k3: Remove empty sys_proto.h includeAndrew Davis
This header file is now empty, remove it. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-24arm: mach-k3: Move J721s2 SPL init functions to mach-k3Andrew Davis
This matches AM64 and J721e and removes the need to forward declare k3_spl_init(), k3_mem_init(), and check_rom_loaded_sysfw() in sys_proto.h. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-24arm: mach-k3: Move sdelay() and wait_on_value() declarationAndrew Davis
These probably should be in some system wide header given their use. Until then move them out of K3 sys_proto.h so we can finish cleaning that header out. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-24arm: mach-k3: Remove unused fdt_disable_node()Andrew Davis
This function is not used currently; remove it. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-24arm: mach-k3: Add weak do_board_detect() to common fileAndrew Davis
This matches how it was done for pre-K3 TI platforms and it allows us to move the forward declaration out of sys_proto.h. It also removes the need for K3_BOARD_DETECT as one is free to simply override the weak function in their board files as needed. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-24arm: mach-k3: Move sysfw-loader.h out of mach includesAndrew Davis
This header is only used locally by K3 init files, no need to have it up with the global mach includes. Move into local includes. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-24arm: mach-k3: Make release_resources_for_core_shutdown() commonAndrew Davis
This function is the same for each device when it needs to shutdown the R5 core. Move this to the common section and move the remaining device specific ID list to the device hardware include. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-24configs: j721s2_evm.h: Remove refrences to J7200 EVMAndrew Davis
The J7200 EVM will not include this file, this J7200 checks look to be a copy/paste errora from j721e_evm.h, which J7200 *can* include. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-24configs: j721x_evm: Remove unneeded check for SYS_K3_SPL_ATFAndrew Davis
The TARGET_x_R5_EVM check is already enough to limit these defines to only the correct builds. Remove the extra outer check. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-24soc: soc_ti_k3: Use hardware.h to remove definition duplicationAndrew Davis
The K3 JTAG and SoC ID information is already stored in the K3 arch hardware file, include that and use its definitions here. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-24arm: mach-k3: Move J721e SoC detection out of common sectionAndrew Davis
This belongs in the J721e specific file as it is the only place this is used. Any board level users should use the SOC driver. While here, move the J721e and J7200 SoC IDs out of sys_proto.h and into hardware.h. Use a macro borrowed from Rockchip and add the rest of the SoC IDs for completeness and later use. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-24arm: mach-k3: Move MSMC fixup to SoC levelAndrew Davis
The MSMC fixup is something we do based on SoC, not based on the board. So this fixup does not belong in the board files. Move this to the mach-k3 common file so that it does not have to be done in each board that uses these SoCs. We use ft_system_setup() here instead of ft_board_setup() since it is no longer board level. Enable OF_SYSTEM_SETUP in the configurations that use this to keep functionality the same. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-24Revert "arm: dts: dra7*/am57xx-idk-evm-u-boot: Add ipu early boot DT changes"Andrew Davis
This reverts commit 5717294230bc3578959960003be8984bbbb33642. This does not exist in upstream kernel.org and breaks boot on DRA7-EVMs. Drop the same. Signed-off-by: Andrew Davis <afd@ti.com>
2023-04-24arm: dts: keystone: Non-functional changes sync with v6.3-rc6Andrew Davis
This is a collection of all the whitespace, renames, comment, and other changes that should not change the DT functionality from Linux v6.3-rc6. Signed-off-by: Andrew Davis <afd@ti.com>
2023-04-24arm: dts: omap: Non-functional changes sync with v6.3-rc6Andrew Davis
This is a collection of all the whitespace, renames, comment, and other changes that should not change the DT functionality from Linux v6.3-rc6. Signed-off-by: Andrew Davis <afd@ti.com>
2023-04-24arm: dts: dm8x: Non-functional changes sync with v6.3-rc6Andrew Davis
This is a collection of all the whitespace, renames, comment, and other changes that should not change the DT functionality from Linux v6.3-rc6. Signed-off-by: Andrew Davis <afd@ti.com>
2023-04-24arm: dts: dra7x: Non-functional changes sync with v6.3-rc6Andrew Davis
This is a collection of all the whitespace, renames, comment, and other changes that should not change the DT functionality from Linux v6.3-rc6. Signed-off-by: Andrew Davis <afd@ti.com>
2023-04-24arm: dts: am3x: Non-functional changes sync with v6.3-rc6Andrew Davis
This is a collection of all the whitespace, renames, comment, and other changes that should not change the DT functionality from Linux v6.3-rc6. Signed-off-by: Andrew Davis <afd@ti.com>
2023-04-24arm: dts: am437x: Update to IOPAD to sync with v6.3-rc6Andrew Davis
Several DTS files have been updated in the Linux kernel with a new IOPAD macro. Sync for the same here. Signed-off-by: Andrew Davis <afd@ti.com>
2023-04-24arm: dts: am3x: Update IOPAD to PADCONF to sync with v6.3-rc6Andrew Davis
Several DTS files have been updated in the Linux kernel with a new PADCONF macro replacing the IOPAD version. Sync for the same here. Signed-off-by: Andrew Davis <afd@ti.com>
2023-04-24arm: dts: keystone: Update devicetree header comments to sync with v6.3-rc6Andrew Davis
Signed-off-by: Andrew Davis <afd@ti.com>
2023-04-24arm: dts: omap5x: Update devicetree header comments to sync with v6.3-rc6Andrew Davis
Signed-off-by: Andrew Davis <afd@ti.com>
2023-04-24arm: dts: omap4x: Update devicetree header comments to sync with v6.3-rc6Andrew Davis
Signed-off-by: Andrew Davis <afd@ti.com>
2023-04-24arm: dts: omap3x: Update devicetree header comments to sync with v6.3-rc6Andrew Davis
Signed-off-by: Andrew Davis <afd@ti.com>
2023-04-24arm: dts: dra7x: Update devicetree header comments to sync with v6.3-rc6Andrew Davis
Signed-off-by: Andrew Davis <afd@ti.com>
2023-04-24arm: dts: dm8x: Update devicetree header comments to sync with v6.3-rc6Andrew Davis
Signed-off-by: Andrew Davis <afd@ti.com>
2023-04-24arm: dts: am57x: Update devicetree header comments to sync with v6.3-rc6Andrew Davis
Signed-off-by: Andrew Davis <afd@ti.com>
2023-04-24arm: dts: am43x: Update devicetree header comments to sync with v6.3-rc6Andrew Davis
Signed-off-by: Andrew Davis <afd@ti.com>