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2023-03-13microblaze: drop remnants of manual relocOvidiu Panait
Runtime relocation has been made the default for microblaze, so do the following cleanups: - drop all manual reloc codepaths in start.S - drop all STATIC_RELA ifdefs, as it is now enabled unconditionally in Kconfig Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20230311173838.521804-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-13microblaze: drop CONFIG_NEEDS_MANUAL_RELOCOvidiu Panait
Microblaze and m68k are the only remaining architectures that still enable CONFIG_NEEDS_MANUAL_RELOC by default. Microblaze has had runtime relocation support using CONFIG_STATIC_RELA for quite some time, since commit d58c007498 ("microblaze: Add support for run time relocation"). Drop support for CONFIG_NEEDS_MANUAL_RELOC and make runtime relocation the default, as the rest of the architectures do. Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20230311173838.521804-4-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-13tools: relocate-rela: add support for handling 32-bit big endian filesOvidiu Panait
Currently, a microblaze build with CONFIG_SYS_BIG_ENDIAN=y and CONFIG_STATIC_RELA=y fails with: tools/relocate-rela: Not supported machine type ELF decoding failed make[2]: *** [u-boot/Makefile:1306: u-boot-nodtb.bin] Error 1 To fix this, convert the 32-bit codepath to use the previously added elf{16,32}_to_cpu() functions. The aarch64 codepath is left untouched. This commit ensures that CI doesn't fail for the next patches which enable runtime relocation by default for microblaze. Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20230311173838.521804-3-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-13tools: relocate-rela: introduce elf16_to_cpu() and elf32_to_cpu()Ovidiu Panait
Add elf16_to_cpu() and elf32_to_cpu() functions that allow to read data in both big-endian and little-endian formats. Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20230311173838.521804-2-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-13tools: relocate-rela: adjust le64_to_cpu -> le32_to_cpu in decode_elf32()Ovidiu Panait
The sh_addr/sh_offset/sh_size fields in Elf32_Shdr are 32-bits wide, so use le32_to_cpu() instead of the 64-bit variant. Fixes: 5e0e1a86d327 ("tools: relocate-rela: Fix ELF decoding on big-endian hosts") Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20230311173838.521804-1-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09spl: Add missing prototype for board_boot_orderAlgapally Santosh Sagar
Add missing prototype to fix the sparse warning, warning: no previous prototype for 'board_boot_order' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230301103334.1455-3-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09xilinx: zynqmp: Add missing prototype for zynqmp_mmio_writeAlgapally Santosh Sagar
Add missing prototype to fix the sparse warning, warning: no previous prototype for 'zynqmp_mmio_write' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230301103334.1455-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09arm64: dts: zynqmp: Enable nand-on-flash-bbt in DT by defaultAshok Reddy Soma
By default enable nand-on-flash-bbt DT flag, so that driver always refers to the bad block table(bbt) present on the flash device. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230224050709.30014-5-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09arm64: dts: zynqmp: Fix nand dt nodeAshok Reddy Soma
DC3 nand node is not correct, it is showing all partitions under controller node directly. Create two sub nand nodes with partitions for each. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230224050709.30014-4-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09mtd: nand: arasan: Set ofnode valueAshok Reddy Soma
Ofnode value is not set, so all the DT properties are not being read and due to this default values are being used. Find nand node and set chip->flash_node value. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230224050709.30014-3-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09mtd: nand: arasan: Remove hardcoded bbt optionAshok Reddy Soma
Bad block table option is hardcoded to read from flash with NAND_BBT_USE_FLASH option. This decision should be done based on DT property. Remove this hardcoding, to be able to use DT property. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230224050709.30014-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09spi: xilinx_spi: Fix spi resetJiajie Chen
It was incorrectly using an old priv->regs pointer, which was initialized to zero. SPI resets won't happen on first call. Signed-off-by: Jiajie Chen <c@jia.je> Link: https://lore.kernel.org/r/20230227150938.211820-1-c@jia.je Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09arm64: zynqmp: Remove comment about gem spec in kv260Michal Simek
The latest SOM specification doesn't enforce certain MIO lines allocated for ethernet or ethernet controller itself. That's why remove comment about it which is likely there from early version of specification. Also removed the same comment from pinctrl node. It is clear that it has to be defined for different carrier cards. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/9406377bf2c391ac0200670511bd6b0edb097c96.1676880543.git.michal.simek@amd.com
2023-03-09xilinx: Enable SMC command for arm64 targetsMichal Simek
SMC command is very useful for TF-A testing or issuing commands which are not covered by any driver. Strongly recommend to disable this command on any product unless it is required. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/23c77a2cbd083963ca17b84de4108dbb1f28597f.1676450712.git.michal.simek@amd.com
2023-03-09cmd: smccc: Print results in hex instead of decMichal Simek
Printing return value in HEX instead of DEC. Return values are 64 bit values which impossible to decode in DEC. For example getting CHIP ID in dec is quite long. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/9a0278a7da729cb69b7a4d46c5e7eb8c3217c635.1676450712.git.michal.simek@amd.com
2023-03-09arm64: zynqmp: Add an OP-TEE node to the device treeIlias Apalodimas
Since the zynqmp boards can run upstream OP-TEE, and having the DT node present doesn't cause any side effects add it in case someone tries to load OP-TEE. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Link: https://lore.kernel.org/r/20230216133921.866786-1-ilias.apalodimas@linaro.org Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09fpga: zynqmppl: fix fpga loads command for unencrypted use caseNeal Frager
When using the fpga loads command, the driver is passing the AES encryption key address is all cases. However, for the authenticated, but not encrypted use case, there is no AES encryption key, and this value is 0. When AES encryption is not used on the fpga bitstream, the pmufw assumes that the AES key address is a bitstream size value like what is used by the unsecure fpga load command. To fix the problem, this patch checks to see if the AES key address is zero. If the AES key address is zero, it means that AES is not being used on the bitstream and the bitstream size should be passed instead. Thus, matching the fpga load functionality. Signed-off-by: Neal Frager <neal.frager@amd.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230214131959.40298-1-neal.frager@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09ARM: zynq: Comment interrupt names IRQs for pl330Michal Simek
pl330 DT yaml description doesn't define interrupt-names property that's why comment it but keep it as comment. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/8e5a921c16efe09030fda036340186c11dd990bf.1672908030.git.michal.simek@amd.com
2023-03-09ARM: dts: zynq-7000: drop useless 'dma-channels/requests' propertiesKrzysztof Kozlowski
The pl330 DMA controller provides number of DMA channels and requests through its registers, so duplicating this information (with a chance of mistakes) in DTS is pointless. Additionally the DTS used always wrong property names which causes DT schema check failures - the bindings documented 'dma-channels' and 'dma-requests' properties without leading hash sign. Reported-by: Rob Herring <robh@kernel.org> Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20220430121902.59895-2-krzysztof.kozlowski@linaro.org
2023-03-09ARM: dts: xilinx: align gpio-key node names with dtschemaKrzysztof Kozlowski
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-31-krzysztof.kozlowski@linaro.org Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09ARM: zynq: Use recommended dma-controller name instead of dmacMichal Simek
Use standard name for dma controller. Issue is reported by dtbs_check as dmac@f8003000: $nodename:0: 'dmac@f8003000' does not match '^dma-controller(@.*)?$' Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/5637d7e3464fbc1b2b269a7df35e24edc2c8d4ac.1672908080.git.michal.simek@amd.com
2023-03-09arm64: zynqmp: Enable hs termination flag for USB dwc3 controllerMichael Grzeschik
Since we need to support legacy phys with the dwc3 controller, we enable this quirk on the zynqmp platforms. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Link: https://lore.kernel.org/r/20221023215649.221726-1-m.grzeschik@pengutronix.de Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09arm64: dts: xilinx: align LED node names with dtschemaKrzysztof Kozlowski
The node names should be generic and DT schema expects certain pattern: xilinx/zynqmp-zcu100-revC.dtb: leds: 'vbus-det' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221125144136.477171-1-krzysztof.kozlowski@linaro.org Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09xilinx: dts: Remove cdns,zynq-gemMichal Simek
cdns prefix was deprecated and replaced by xlnx one in upstream Linux. Also U-Boot driver has been updated to support new compatible string that's why it is time to remove it and deprecate it. Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09arm64: zynqmp: Add missing ZYNQMP_FIRMWARE dependenciesAlgapally Santosh Sagar
There are missing Kconfig dependencies in the code which is using firmware interface. The commit 71efd45a5fc7 ("arm64: zynqmp: Change firmware dependency") add option to also disable ZYNQMP_FIRMWARE. But not all Kconfig dependencies were properly described and also sdhci and gem drivers didn't protect the code properly. So, add the missing ZYNQMP_FIRMWARE dependencies. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230201095553.11219-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-07Merge tag 'next-20230307' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-video into next - video console refactoring and optimization - support for fonts wider than 1 byte - use named header for 8x16 font data - support multiple fonts configuration - move get_font_size() to truetype driver ops - support font size configuration at runtime - add 16x32 Terminus font from linux - add 12x22 Sun font from linux - add 12x22 console simple font test
2023-03-07Merge branch '2023-03-06-assorted-platform-updates' into nextTom Rini
- semihosting updates for arm and riscv, assorted arm64 core updates, assorted ast2600 updates, remove some more unused code, some TI K3 defconfig and DTS updates, uniphier DTS updates, mpc83xx Kconfig cleanup, re-add fttmr010 driver with an update to use DM.
2023-03-07video console: add 12x22 console simple font testDzmitry Sankouski
Tests fonts wider than a byte. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07video console: sandbox: add 12x22 font defconfigsDzmitry Sankouski
Add 12x22 font in order to write a test for it. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07video console: add 16x32 Terminus font from linuxDzmitry Sankouski
Modern mobile phones typically have high pixel density. Bootmenu is hardly readable on those with 8x16 font. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07video console: add 12x22 Sun font from linuxDzmitry Sankouski
Modern mobile phones typically have high pixel density. Bootmenu is hardly readable on those with 8x16 font. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07video console: allow font size configuration at runtimeDzmitry Sankouski
Allow font size configuration at runtime for console_simple.c driver. This needed for unit testing different fonts. Configuring is done by `font` command, also used for font selection in true type console. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07video console: move vidconsole_get_font_size() logic to driver opsDzmitry Sankouski
Since multiple vidconsole drivers exists, vidconsole_get_font_size() implementation cannot longer live in vidconsole_uclass.c file. Move current vidconsole_get_font_size logic to truetype driver ops. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07video console: implement multiple fonts configurationDzmitry Sankouski
This needed for unit testing different fonts. Configured fonts are placed in an array of fonts. First font is selected by default upon console probe. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> [agust: fixed build error when bmp logo disabled] Signed-off-by: Anatolij Gustschin <agust@denx.de>
2023-03-07video console: move 8x16 font data in named headerDzmitry Sankouski
Consistent font data header names needed to add new fonts. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07video console: add support for fonts wider than 1 byteDzmitry Sankouski
Devices with high ppi may benefit from wider fonts. Current width implementation is limited by 1 byte, i.e. 8 bits. New version iterates VIDEO_FONT_BYTE_WIDTH times, to process all width bytes, thus allowing fonts wider than 1 byte. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-07video console: refactoring and optimizationDzmitry Sankouski
- move common code to vidconsole_internal.h and console_core.c - unite probe functions - get rid of code duplications in switch across bpp values - extract common pixel fill logic in two functions one per horizontal and vertical filling - rearrange statements in put_xy* methods in unified way - replace types - uint*_t to u* Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-06riscv: semihosting: replace inline assembly with assembly fileAndre Przywara
So far we used inline assembly to inject the actual instruction that triggers the semihosting service. While this sounds elegant, as it's really only about a few instructions, it has some serious downsides: - We need some barriers in place to force the compiler to issue writes to a data structure before issuing the trap instruction. - We need to convince the compiler to actually fill the structures that we use pointers to. - We need a memory clobber to avoid the compiler caching the data in those structures, when semihosting writes data back. - We need register arguments to make sure the function ID and the pointer land in the right registers. This is all doable, but fragile and somewhat cumbersome. Since we now have a separate function in an extra file anyway, we can do away with all the magic and just write that in an actual assembler. This is much more readable and robust. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2023-03-06arm: semihosting: replace inline assembly with assembly fileAndre Przywara
So far we used inline assembly to inject the actual instruction that triggers the semihosting service. While this sounds elegant, as it's really only about one instruction, it has some serious downsides: - We need some barriers in place to force the compiler to issue writes to a data structure before issuing the trap instruction. - We need to convince the compiler to actually fill the structures that we use pointers to. - We need a memory clobber to avoid the compiler caching the data in those structures, when semihosting writes data back. - We need register arguments to make sure the function ID and the pointer land in the right registers. This is all doable, but fragile and somewhat cumbersome. Since we now have a separate function in an extra file anyway, we can do away with all the magic and just write that in an actual assembly file. This is much more readable and robust. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2023-03-06am62a7: dts: Enable full 4GB LPDDR4Devarsh Thakkar
AM62A7-SK board has 4GB LPDDR4 Micron MT53E2G32D4DE-046 AUT:B part but only 2GB was enabled early. Enable full 4GB memory by updating the latter 2GB memory region which gets mapped to 0x0880000000 i.e. DDR16SS0_SDRAM as referred in Table 2-1. AM62A Common SoC Memory of AM62Ax TRM [1]. [1] : https://www.ti.com/lit/zip/spruj16 Logs: https://gist.github.com/devarsht/e85b6af89c01ddadb3a62f3e5f196af8 Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
2023-03-06ARM: dts: uniphier: Sync DT with Linux v6.2Kunihiko Hayashi
Synchronize devicetree sources with Linux v6.2. - Use GIC interrupt definitions - Add reg properties in USB-glue and SoC-glue node - Fix node names to follow the generic names list in DT specification - Add L2 cache and AHCI nodes - Update nand and pcie nodes - And some trivial fixes Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Marek Vasut <marex@denx.de>
2023-03-06ARM: dts: uniphier: Switch USB node to the originalKunihiko Hayashi
UniPhier DT applies its own USB node for U-Boot due to the USB driver constrains. After solving this issue, u-boot allows the original USB node. After switching USB node, synchronization of USB node with Linux becomes possible. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Marek Vasut <marex@denx.de>
2023-03-06powerpc, mpc83xx: Remove CONFIG_ELBC_BRx_ORxChristophe Leroy
Commit fe7d654d04 ("mpc83xx: Migrate CONFIG_SYS_{BR, OR}*_PRELIM to Kconfig") converted CONFIG_SYS_{BRx/ORx}_PRELIM to Kconfig by implementing a fine-grained selection of every bit in Kconfig. But commit c7fad78ec0 ("Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig") reworked it so that you now just have to provide the raw value of each register in Kconfig. However, all fine-grained Kconfig items remained allthough they are not used anymore. Remove them all. Fixes: c7fad78ec0 ("Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig") Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-03-06configs: j7200: Merge HS and non-HS defconfigsManorit Chawdhry
K3 devices have runtime type board detection. Make the default defconfig include the secure configuration. Then remove the HS specific config. Non-HS devices will continue to boot due to runtime device type detection. If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS devices these can be ignored. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Acked-by: Andrew Davis <afd@ti.com>
2023-03-06configs: j721s2: merge HS and non-HS defconfigsManorit Chawdhry
K3 devices have runtime type board detection. Make the default defconfig include the secure configuration. Then remove the HS specific config. Non-HS devices will continue to boot due to runtime device type detection. If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS devices these can be ignored. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Acked-by: Andrew Davis <afd@ti.com>
2023-03-06mmc: remove SDHCI SPEARPatrick Delaunay
As the file spear_sdhci.c file is already removed, delete the associated configuration CONFIG_MMC_SDHCI_SPEAR. Fixes: c942fc925e7dab ("mmc: spear: remove the entire spear_sdhci.c file") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-03-06ARM: remove SPEAR entry in makefilePatrick Delaunay
As the lastest spear directories are removed, delete the associated entry in Makefile. Fixes: 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr support") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-03-06clk: ast2600: Keep PLL power onDylan Hung
According to the PLL vendor, we should keep the PLL power on, so we shouldn't toggle the power-down bit during PLL initialization. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au>
2023-03-06ram: ast2600: Keep MPLL power onDylan Hung
According to the PLL vendor, we should keep the PLL power on, so we shouldn't toggle the power-down bit during PLL initialization. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au>
2023-03-06arm64: Reduce PT size estimation complexityMarc Zyngier
count_required_pts()'s complexity is high if mappings are not using the largest possible block size (due to some other requirement such as tracking dirty pages, for example). Let's switch to a method that follows the pattern established with the add_map() helper, and make it almost instantaneous instead of taking a large amount of time if 2MB mappings are in use instead of 1GB. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Pierre-Clément Tosi <ptosi@google.com> [ Paul: pick from the Android tree. Fixup Pierre's commit. Rebase to the upstream ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Tom Rini <trini@konsulko.com> Link: https://android.googlesource.com/platform/external/u-boot/+/5d756d147e31a1cdaaa261a50e526404ca5968f5 Link: https://android.googlesource.com/platform/external/u-boot/+/6be9330601d81545c7c941e3609f35bf68a09059
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