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2013-10-09mtd: driver _read() returns max_bitflips; mtd_read() returns -EUCLEANPaul Burton
Linux modified the MTD driver interface in commit edbc4540 (with the same name as this commit). The effect is that calls to mtd_read will not return -EUCLEAN if the number of ECC-corrected bit errors is below a certain threshold, which defaults to the strength of the ECC. This allows -EUCLEAN to stop indicating "some bits were corrected" and begin indicating "a large number of bits were corrected, the data held in this region of flash may be lost soon". UBI makes use of this and when -EUCLEAN is returned from mtd_read it will move data to another block of flash. Without adopting this interface change UBI on U-boot attempts to move data between blocks every time a single bit is corrected using the ECC, which is a very common occurance on some devices. For some devices where bit errors are common enough, UBI can get stuck constantly moving data around because each block it attempts to use has a single bit error. This condition is hit when wear_leveling_worker attempts to move data from one PEB to another in response to an -EUCLEAN/UBI_IO_BITFLIPS error. When this happens ubi_eba_copy_leb is called to perform the data copy, and after the data is written it is read back to check its validity. If that read returns UBI_IO_BITFLIPS (in response to an MTD -EUCLEAN) then ubi_eba_copy_leb returns 1 to wear_leveling worker, which then proceeds to schedule the destination PEB for erasure. This leads to erase_worker running on the PEB, and following a successful erase wear_leveling_worker is called which begins this whole cycle all over again. The end result is that (without UBI debug output enabled) the boot appears to simply hang whilst in reality U-boot busily works away at destroying a block of the NAND flash. Debug output from this situation: UBI DBG: ensure_wear_leveling: schedule scrubbing UBI DBG: wear_leveling_worker: scrub PEB 1027 to PEB 4083 UBI DBG: ubi_io_read_vid_hdr: read VID header from PEB 1027 UBI DBG: ubi_io_read: read 4096 bytes from PEB 1027:4096 UBI DBG: ubi_eba_copy_leb: copy LEB 0:0, PEB 1027 to PEB 4083 UBI DBG: ubi_eba_copy_leb: read 1040384 bytes of data UBI DBG: ubi_io_read: read 1040384 bytes from PEB 1027:8192 UBI: fixable bit-flip detected at PEB 1027 UBI DBG: ubi_io_write_vid_hdr: write VID header to PEB 4083 UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:4096 UBI DBG: ubi_io_read_vid_hdr: read VID header from PEB 4083 UBI DBG: ubi_io_read: read 4096 bytes from PEB 4083:4096 UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:8192 UBI DBG: ubi_io_read: read 4096 bytes from PEB 4083:8192 UBI: fixable bit-flip detected at PEB 4083 UBI DBG: schedule_erase: schedule erasure of PEB 4083, EC 55, torture 0 UBI DBG: erase_worker: erase PEB 4083 EC 55 UBI DBG: sync_erase: erase PEB 4083, old EC 55 UBI DBG: do_sync_erase: erase PEB 4083 UBI DBG: sync_erase: erased PEB 4083, new EC 56 UBI DBG: ubi_io_write_ec_hdr: write EC header to PEB 4083 UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:0 UBI DBG: ensure_wear_leveling: schedule scrubbing UBI DBG: wear_leveling_worker: scrub PEB 1027 to PEB 4083 ... This patch adopts the interface change as in Linux commit edbc4540 in order to avoid such situations. Given that none of the drivers under drivers/mtd return -EUCLEAN, this should only affect those using software ECC. I have tested that it works on a board which is currently out of tree, but which I hope to be able to begin upstreaming soon. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Stefan Roese <sr@denx.de>
2013-10-09km/scripts: fix ramfsAndreas Huber
'actual_bank' is not used anymore, instead boot_bank is used. Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
2013-10-09powerpc/km: drop unused CONFIG_SYS_DTT_LOW_TEMPHolger Brunck
This define is not used in u-boot code, we can drop this define safely. Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-10-09km/common: switch on CMD_GREPENVHolger Brunck
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-10-09powerpc/83xx: remove staticness for qe_iop_conf_tabHolger Brunck
commit a5510058 powerpc/83xx/km: make local functions and structs static removed the staticness also from this struct. But this struct is needed in arch/powerpc/cpu/mpc83xx/cpu_init.c and declared as extern. Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-10-09Merge branch 'next' of git://git.denx.de/u-boot-mpc83xxTom Rini
2013-10-08da850evm.h: Always set CONFIG_CMD_SF, move to by CONFIG_SPI_FLASHTom Rini
When we have CONFIG_SPI_FLASH set we now require CONFIG_CMD_SF. Signed-off-by: Tom Rini <trini@ti.com>
2013-10-08Revert "am335x_evm.h: If mmcdev and bootpart switch to mmcdev 1, so should ↵Tom Rini
mmcroot." Upon further inspection and review and chatting with kernel folks, what happens here is that what mmcblk# a device gets is based on probe order. So a system with an SD card inserted with place eMMC on mmcblk1, but without an SD card, it will be on mmcblk0. So U-boot can only provide a best guess. In this case, if no SD card is present, we would want to pass mmcblk0p2 still. If an SD card is present, it woudl be able to provide a uEnv.txt that would be loaded (even if the kernel is NOT there) which can still update mmcroot variable. This reverts commit 827512fb1154c05c6eb1e2259e936df55c98a535. Cc: Robert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: Tom Rini <trini@ti.com>
2013-10-08Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini
2013-10-08Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini
2013-10-08spi: exynos: Support word transfersRajeshwari Shinde
Since SPI register access is so expensive, it is worth transferring data a word at a time if we can. This complicates the driver unfortunately. Use the byte-swapping feature to avoid having to convert to/from big endian in software. This change increases speed from about 2MB/s to about 4.5MB/s. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-08spi: exynos: Minimise access to SPI FIFO levelRajeshwari Shinde
Accessing SPI registers is slow, but access to the FIFO level register in particular seems to be extraordinarily expensive (I measure up to 600ns). Perhaps it is required to synchronise with the SPI byte output logic which might run at 1/8th of the 40MHz SPI speed (just a guess). Reduce access to this register by filling up and emptying FIFOs more completely, rather than just one word each time around the inner loop. Since the rxfifo value will now likely be much greater that what we read before we fill the txfifo, we only fill the txfifo halfway. This is because if the txfifo is empty, but the rxfifo has data in it, then writing too much data to the txfifo may overflow the rxfifo as data arrives. This speeds up SPI flash reading from about 1MB/s to about 2MB/s on snow. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-08spi: exynos: Support a delay after deactivateRajeshwari Shinde
For devices that need some time to react after a spi transaction finishes, add the ability to set a delay. Implement this as a delay on the first/next transaction to avoid any delay in the fairly common case where a SPI transaction is followed by other processing. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-08exynos: Export timer_get_us() to get microsecond timerRajeshwari Shinde
This function, if implemented by the board, provides a microsecond timer. The granularity may be larger than 1us if hardware does not support this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07Fix number base handling of "load" commandWolfgang Denk
As documented, almost all U-Boot commands expect numbers to be entered in hexadecimal input format. (Exception: for historical reasons, the "sleep" command takes its argument in decimal input format.) This rule was broken for the "load" command; for details please see especially commits 045fa1e "fs: add filesystem switch libary, implement ls and fsload commands" and 3f83c87 "fs: fix number base behaviour change in fatload/ext*load". In the result, the load command would always require an explicit "0x" prefix for regular (i. e. base 16 formatted) input. Change this to use the standard notation of base 16 input format. While strictly speaking this is a change of the user interface, we hope that it will not cause trouble. Stephen Warren comments (see [1]): I suppose you can change the behaviour if you want; anyone writing "0x..." for their values presumably won't be affected, and if people really do assume all values in U-Boot are in hex, presumably nobody currently relies upon using non-prefixed values with the generic load command, since it doesn't work like that right now. [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/171172 Acked-by: Tom Rini <trini@ti.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-10-07socfpga: Adding pin mux handoff filesChin Liang See
Adding the generated pin mux configuration by Preloader Generator tool Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2013-10-07socfpga: Adding System Manager driverChin Liang See
Adding System Manager driver which will configure the pin mux for real hardware Cyclone V development kit (not Virtual Platform) Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2013-10-07omap1510inn: arm925t: remove supportAlbert ARIBAUD
omap1510inn is orphan and has been for years now. Reove it and, as it was the only arm925t target, also remove arm925t support. Update doc/README.scrapyard accordingly. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-10-07doc: SPI: Update SPI status trackJagannadha Sutradharudu Teki
Updated SPI/status.txt, with memory_map and TODO. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: ramtron: Remove page_size printJagannadha Sutradharudu Teki
There is no page_size for ramtron flashes, so just print the detected flash and it's size. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: Minor cleanupsJagannadha Sutradharudu Teki
- Add spaces, tabs - Commenting. - Rearrange code. - Add static qualifier for missing func. - Remove memory_map from ramtron.c - Ramtron: spi_flash_internal.h -> sf_internal.h Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07README: qspi usecase and testing documentation.Poddar, Sourav
Contains documentation and testing details for qspi flash interface. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07dra7xx_evm: add SPL API, QSPI, and serial flash supportMatt Porter
Enables support for SPI SPL, QSPI and Spansion serial flash device on the EVM. Configures pin muxes for QSPI mode. Signed-off-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07spi: add TI QSPI driverMatt Porter
Adds a SPI master driver for the TI QSPI peripheral. - Added quad read support. - Added memory mapped support. Signed-off-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: Add memory mapped read supportPoddar, Sourav
Qspi controller can have a memory mapped port which can be used for data read. Added support to enable memory mapped port read. This patch enables the following: - It enables exchange of memory map address between mtd and qspi through the introduction of "memory_map" flag. - Add support to communicate to the driver that memory mapped transfer is to be started through introduction of new flags like "SPI_XFER_MEM_MAP" and "SPI_XFER_MEM_MAP_END". This will enable the spi controller to do memory mapped configurations if required. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07armv7: hw_data: change clock divider setting.Poddar, Sourav
Clock requirement for qspi clk is 192 Mhz. According to the below formulae, f dpll = f ref * 2 * m /(n + 1) clockoutx2_Hmn = f dpll / (hmn+ 1) fref = 20 Mhz, m = 96, n = 4 gives f dpll = 768 Mhz For clockoutx2_Hmn to be 768, hmn + 1 should be 4. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07omap5: add qspi supportMatt Porter
Add QSPI definitions and clock configuration support. Signed-off-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07sf: probe: Add support for EN25S64Priyanka Jain
Add support for EON EN25S64 SPI flash. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07doc: SPI: Add status.txt for tracking SPI subsys statusJagannadha Sutradharudu Teki
doc/SPI/status.txt added to track the u-boot SPI subsystem status. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: Rename spi_flash filesJagannadha Sutradharudu Teki
Renamed: spi_flash.c -> sf.c spi_flash_internal.h -> sf_internal.h spi_flash_ops.c -> sf_ops.c spi_flash_probe.c -> sf_probe.c Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07spi: spi cleanupsJagannadha Sutradharudu Teki
- Rearranged multi-line comment style. - Add tabs. - Add spaces. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: spi_flash cleanupsJagannadha Sutradharudu Teki
More cleanups on spi_flash side: - Removed unneeded comments. - Rearranged macros in proper location. - Rearranged func declerations - Renamed few function names. - Added License headers. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: Remove spi_flash_do_alloc referencesJagannadha Sutradharudu Teki
Added a support for common probe, hence removed removed spi_flash_do_alloc reference. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: probe: Add support for MX25L51235FJagannadha Sutradharudu Teki
Add support for Macronix MX25L51235F SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: probe: Add support for MX25L25635FJagannadha Sutradharudu Teki
Add support for Macronix MX25L25635F SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: ops: Add static qualifier to spi_flash_cmd_bankaddr_writeJagannadha Sutradharudu Teki
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: probe: Print erase_size while printing flash detailsJagannadha Sutradharudu Teki
Included erase_size while printing probed flash details. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: probe: Use print_size arg as page_sizeJagannadha Sutradharudu Teki
Use flash->page_size arg in print_size() instead of flash->sector_size while printing detected flas part details. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: probe: Add support for S25FL512S_256KJagannadha Sutradharudu Teki
Add support for Spansion S25FL512S_256K SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: probe: Add support for S25FL256S_256KJagannadha Sutradharudu Teki
Add support for Spansion S25FL256S_256K SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: probe: Add support for EN25Q64Jagannadha Sutradharudu Teki
Add support for EON EN25Q64 SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: Remove unneeded flash drivers filesJagannadha Sutradharudu Teki
Now the common probing is handled in spi_flash_probe.c hence removed the unneeded flash drivers. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: ramtron: Add support for separate flash driverJagannadha Sutradharudu Teki
Compared to other spi flashes, ramtron has a different probing and implementation on flash ops, hence moved ramtron probe code into ramtron driver. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: Add proper comment style on spi_flash structureJagannadha Sutradharudu Teki
Added proper comment style on spi_flash structure to make more readable. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: probe: Simply the BAR configuration logicJagannadha Sutradharudu Teki
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: probe: Add support for flag status pollingJagannadha Sutradharudu Teki
From Micron, 512MB onwards, flash requires to poll flag status instead of read status- hence added E_FSR flag on spectific flash parts. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: probe: Add support for erase sector selection flagJagannadha Sutradharudu Teki
SECT_4K, SECT_32K and SECT_64K opeartions are performed to to specific flash by adding a SECT* flag on respective spi_flash_params.flag param. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: probe: Add support to clear flash BP# bitsJagannadha Sutradharudu Teki
Few of the flashes(Atmel, Macronix and SST) require to clear BP# bits in flash power ups. So clear these BP# bits at probe time, so-that the flash is ready for user operations. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: probe: Add support for SST_WPJagannadha Sutradharudu Teki
Most of the SST flashes needs to write up using SST_WP, AAI Word Program, so added a flag param on spi_flash_params table. SST flashes, which supports SST_WP need to use a WP write sst_write_wp instead of common flash write. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07sf: probe: Give proper spacing on flash table paramsJagannadha Sutradharudu Teki
Given proper spacing between flash table params. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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