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2022-04-20Merge branch '2022-04-20-assorted-improvements'Tom Rini
- Two TI K3 updates, update SYS_MALLOC_F_LEN default to be 0x2000 and move TI am33xx to use that as well, fix DT relocation with multiple DRAM banks, and add a gpio read sub-command.
2022-04-20cmd: gpio: Add `gpio read` subcommandDiego Rondini
As explained in commit 4af2a33ee5b9 ("cmd: gpio: Make `gpio input` return pin value again") the `gpio input` is used in scripts to obtain the value of a pin, despite the fact that CMD_RET_FAILURE is indistinguishable from a valid pin value. To be able to detect failures and properly use the value of a GPIO in scripts we introduce the `gpio read` command that sets the variable `name` to the value of the pin. Return code of the `gpio read` command can be used to check for CMD_RET_SUCCESS or CMD_RET_FAILURE. CONFIG_CMD_GPIO_READ is used to enable the `gpio read` command. Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
2022-04-20ram: k3-ddrss: Allow use of dt provided initial frequencyDave Gerlach
Allow device tree to provide ti,ddr-freq0 to be used as the initial DDR frequency that is set for lpddr4 before initialization of the controller. Make this optional and continue to use PLL bypass frequency as is done currently if ti,ddr-freq0 is not provided. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-20image: fdt: Fix DT relocation handling with multiple DRAM banks with gapMarek Vasut
The current implementation of boot_relocate_fdt() places DT at the highest usable DRAM address, which is calculated as: env_get_bootm_low() + env_get_bootm_mapsize() which by default becomes gd->ram_base + gd->ram_size. Systems like i.MX53 can have multiple DRAM banks with gap between them, e.g. have DRAM at 0x70000000-0x8fffffff and 0xb0000000-0xcfffffff , so for them the calculated highest DRAM address is 0xafffffff, which is exactly in the gap and thus not usable. Fix this by iterating over all DRAM banks and tracking the remaining amount of the total mapping size obtained from env_get_bootm_mapsize(). Limit the maximum LMB area size to each bank, to avoid using nonexistent DRAM. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
2022-04-20am33xx: Update SYS_MALLOC_F_LEN to use 0x2000 as the defaultTom Rini
A number of platforms here had already been increasing the size a bit, so lets moving all of them up. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-20Kconfig: Change SYS_MALLOC_F_LEN default to 0x2000Tom Rini
The most commonly used value today is 0x2000 and not 0x400. Rework the Kconfig logic to use this more frequently used value as the default. Cc: Andrew F. Davis <afd@ti.com> Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> Cc: Alexey Brodkin <abrodkin@synopsys.com> Cc: Alison Wang <alison.wang@nxp.com> Cc: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Cc: Andes <uboot@andestech.com> Cc: Andre Przywara <andre.przywara@arm.com> Cc: Bharat Gooty <bharat.gooty@broadcom.com> Cc: David Lechner <david@lechnology.com> Cc: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Enric Balletbo i Serra <eballetbo@gmail.com> Cc: Eugeniy Paltsev <paltsev@synopsys.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Gerald Kerma <dreagle@doukki.net> Cc: Gregory CLEMENT <gregory.clement@bootlin.com> Cc: Holger Brunck <holger.brunck@hitachienergy.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Jassi Brar <jaswinder.singh@linaro.org> Cc: Kristian Amlie <kristian.amlie@northern.tech> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Liviu Dudau <liviu.dudau@foss.arm.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Lukasz Majewski <lukma@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Masami Hiramatsu <masami.hiramatsu@linaro.org> Cc: Matthias Brugger <mbrugger@suse.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: Michael Walle <michael@walle.cc> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Cc: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Paul Burton <paul.burton@mips.com> Cc: Paul Kocialkowski <contact@paulk.fr> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Cc: Sergey Temerkhanov <s.temerkhanov@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Bosch <stefan_b@posteo.net> Cc: Stephan Gerhold <stephan@gerhold.net> Cc: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Thomas Weber <weber@corscience.de> Cc: Tony Dinh <mibodhi@gmail.com> Cc: Trevor Woerner <twoerner@gmail.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: liuhao <liuhao@phytium.com.cn> Cc: lixinde <lixinde@phytium.com.cn> Cc: shuyiqi <shuyiqi@phytium.com.cn> Cc: weichangzheng <weichangzheng@phytium.com.cn> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org> Reviewed-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Kristian Amlie <kristian.amlie@northern.tech>
2022-04-20ram: k3-ddrss: Fix register name and explain its usageDominic Rath
The k3-ddrss driver wants to configure the DDRSS_V2A_CTL_REG to reflect the maximum possible SDRAM of 2 GB for AM64x (instead of the register's default that says 8 GB, which the AM64x DDR controller wouldn't support). The offset 0x20 was correct, but the register name DDRSS_V2A_R1_MAT_REG was that of the next register at offset 0x24. Signed-off-by: Dominic Rath <rath@ibv-augsburg.net>
2022-04-19Merge branch '2022-04-19-assorted-updates'Tom Rini
- Migrate CONFIG_SYS_MEM_TOP_HIDE to Kconfig, IOMUX bugfix, 2 BTRFS bugfixes, update .gitignore and .mailmap files, aspeed GPIO bugfix, image-fit and squashfs code cleanups, enable EXT4 and ISO partitions on DeveloperBox. - populate u-boot,bootconf under /chosen, see https://github.com/devicetree-org/dt-schema/pull/71 for corresponding change
2022-04-19fs: Allow to compile FS_BTRFS when SPL is enabledPali Rohár
Currently there is no btrfs support in SPL. But macro CONFIG_FS_BTRFS is defined also when building SPL. When both FS_BTRFS and SPL are enabled then build process throw compile error. Fix check for btrfs code in fstypes[] to allow compiling FS_BTRFS only in proper U-Boot. Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-19btrfs: Fix compilation on big endian systemsPali Rohár
Fix following two compile errors on big endian systems: CC fs/btrfs/btrfs.o In file included from include/linux/byteorder/big_endian.h:107, from ./arch/powerpc/include/asm/byteorder.h:82, from ./arch/powerpc/include/asm/bitops.h:8, from include/linux/bitops.h:152, from include/uuid.h:9, from fs/btrfs/btrfs.c:10: fs/btrfs/conv-funcs.h: In function ‘btrfs_key_to_disk’: include/linux/byteorder/generic.h:90:21: error: ‘__cpu_to_le16’ undeclared (first use in this function); did you mean ‘__cpu_to_le16p’? #define cpu_to_le16 __cpu_to_le16 ^~~~~~~~~~~~~ fs/btrfs/conv-funcs.h:79:10: note: in expansion of macro ‘cpu_to_le16’ __u16: cpu_to_le16, \ ^~~~~~~~~~~ CC fs/btrfs/compression.o In file included from ./arch/powerpc/include/asm/unaligned.h:9, from fs/btrfs/compression.c:16: include/linux/unaligned/access_ok.h:6:19: error: redefinition of ‘get_unaligned_le16’ static inline u16 get_unaligned_le16(const void *p) ^~~~~~~~~~~~~~~~~~ In file included from fs/btrfs/ctree.h:16, from fs/btrfs/btrfs.h:12, from fs/btrfs/compression.c:8: include/linux/unaligned/le_byteshift.h:40:19: note: previous definition of ‘get_unaligned_le16’ was here static inline u16 get_unaligned_le16(const void *p) ^~~~~~~~~~~~~~~~~~ Include file asm/unaligned.h contains arch specific macros and functions for unaligned access as opposite to linux/unaligned le_byteshift.h which contains macros and functions specific to little endian systems only. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Qu Wenruo <wqu@suse.com>
2022-04-19IOMUX: Fix access past end of console_devicesSean Anderson
We should only access console_devices[file][i] once we have checked that i < cd_count[file]. Otherwise, we will access uninitialized memory at the end of the loop. console_devices[file][i] should not be NULL, but putting the assignment in the loop condition allows us to ensure that i is checked beforehand. This isn't a bug, but it does make valgrind stop complaining. Fixes: 400797cad3 ("IOMUX: Split out for_each_console_dev() helper macro") Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Andrew Scull <ascull@google.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-04-19Convert CONFIG_SYS_MEM_TOP_HIDE to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_MEM_TOP_HIDE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-19tools: add boot/ to .gitignoreDu Huanpeng
/tools/boot/ is a build product. Add it to .gitignore Signed-off-by: Du Huanpeng <dhu@hodcarrier.org>
2022-04-19fs/squashfs: simplify sqfs_read()Heinrich Schuchardt
* Don't check argument of free(). Free does this itself. * Reduce scope of data_buffer. Remove duplicate free(). * Avoid superfluous NULL assignment. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-04-19image-fit: don't check free() argumentHeinrich Schuchardt
* free() checks if its argument is NULL. Remove duplicate checks. * Remove duplicate free(ovcopy). Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-19gpio: aspeed: Fix incorrect offset of read back register.Billy Tsai
The offset of the current read back register is the value of the gpio pin, not the value written for the gpio output. This patch fix it to avoid the other gpio output value controlled by the same register being set incorrectly. Fixes: 7ad889b0f37a ("gpio: Add Aspeed GPIO driver") Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
2022-04-19configs: Enable EXT4 and ISO partitions for the DeveloperBoxIlias Apalodimas
Since this box is SystemReady compliant enable ISO_PARTITION which is needed to start some installers (e.g Fedora). While at it enable EXT4 as well which is a common filesystem for targets Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Acked-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2022-04-19.mailmap: Start to use new amd.com email addressMichal Simek
Xilinx has been acquired by AMD that's why emails should be also updated. The patch is updating .mailmap file and also MAINTAINERS files as was done by commit 5cd1ecb99490 ("ppc: qemu: Update MAINTAINERS for correct email address"). The rest of my emails are not going to change. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-04-19image-fdt: save name of FIT configuration in '/chosen' nodeDaniel Golle
It can be useful for the OS (Linux) to know which configuration has been chosen by U-Boot when launching a FIT image. Store the name of the FIT configuration node used in a new string property called 'u-boot,bootconf' in the '/chosen' node in device tree. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-04-19Merge tag 'u-boot-rockchip-20220418' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-rockchip - Add rk3066 SoC support; - Add rk3066 MK808 board support; - dts sync from kernel for rk322x, rk3288; - some other board level config update;
2022-04-19Merge branch '2022-04-18-dm-reducing-spl-memory-usage'Tom Rini
- Assorted DM cleanups from Simon. This results in some noticeable binary size savings in SPL.
2022-04-18dm: core: Deal with a wrinkle with linker listsSimon Glass
When every member of a linker list is aligned by the compiler, we can no longer rely on the sizeof of the struct to determine the number of entries. For example, if the struct size is 0x90 but every entry is aligned to 0xa0 by the compiler, the linker list entries takes more space in memory and the calculation of the number of entries is incorrect. For example, we may see 0x12 entries when there are only 0x11. This is a real problem. There may be a general solution, although I cannot currently think of one. So far it only bites with OF_PLATDATA_RT which creates a pointer to each entry of the 'struct udevice' linker_list. This does not happen without that option, so it only affects SPL. Work around it by manually calculating the aligned size of struct udevice, then using that for the n_ent calculation. Note: the alignment fix to linker list was here: 0b2fa98aa5e linker_lists: Fix alignment issue Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18dm: core: Allow devres to be disabled in SPLSimon Glass
At present if devres is enabled in U-Boot proper it is enabled in SPL. We don't normally want it there, so disable it. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Angus Ainslie <angus@akkea.ca>
2022-04-18sandbox: Align linker lists to a 32-byte boundarySimon Glass
Use this larger boundary to ensure that linker lists at least start on the maximum possible alignment boundary. See also the CONFIG_LINKER_LIST_ALIGN setting, but that is host-arch-specific, so it seems better to use the largest value for every host architecture. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18sandbox: Allow link flags to be givenSimon Glass
At present the link flags are not used for sandbox. Update the command line to use them. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18Makefile: Avoid resetting link flags in config.mkSimon Glass
This makes it impossible to change them elsewhere. The default value is 'empty' anyway, so just drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18Makefile: Drop a stale comment about linkingSimon Glass
The bug mentioned here is fixed, so drop the comment. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18sandbox: Correct loss of early output in SPLSimon Glass
At present fputc() is used before the console is available, then write() is used. These are not compatible. Since fputc() buffers internally it is better to use the write(), so that a partial line is immediately displayed. This has a slight effect on performance, but we are already using write() for the vast majority of the output with no obvious impacts. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18rockchip: video: mipi: add more compatible strings for rk3288/rk3399Johan Jonker
The rk3288/RK3399 DT synced from Linux contains some different compatible strings in the mipi node then origanal used in U-boot. Allow both options to be backwards compatible and to be able to handle recent rk3288.dtsi and rk3399.dtsi files. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18rockchip: video: rk_edp: add more rk3288 edp node optionsJohan Jonker
The rk3288 DT synced from Linux contains some different properties in the edp node then origanal used in U-boot. Allow both options to be backwards compatible and to be able to handle recent rk3288.dtsi files. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18board: rk3288: add more DT files to MAINTAINERSJohan Jonker
A number of rk3229/rk3288 DT files are synced from Linux. Add a maintainer to look after them and to help with review and testing. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18board: google: veyron: add more DT files to MAINTAINERSJohan Jonker
The Google Veyron rk3288 DT files are synced from Linux. Add a maintainer to look after them and to help with review and testing. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18rockchip: fix boot_devices constantsJohan Jonker
The DT node name pattern in mmc-controller.yaml for mmc is "^mmc(@.*)?$". The Rockchip mmc nodes have been synced with Linux, so update the boot_devices constants as well. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18arm: dts: rockchip: move all rk3288 u-boot specific properties in separate ↵Johan Jonker
dtsi files In order to sync rk3288.dtsi from Linux it needed to move all u-boot specific properties in separate dtsi files. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18rockchip: rk3288-cru: sync the clock dt-binding header from LinuxJohan Jonker
In order to update the DT for rk3288 sync the clock dt-binding header. This is the state as of v5.17 in Linux. Keep SCLK_MAC_PLL in use for rk3288 clock driver. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18rockchip: rk3288-power: sync power domain dt-binding header from LinuxJohan Jonker
In order to update the DT for rk3288 sync the power domain dt-binding header. This is the state as of v5.17 in Linux. Change location to be more in line with other SoCs. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18arm: dts: rockchip: sync rk3229-evb.dts from LinuxJohan Jonker
Sync rk3229-evb.dts from Linux version 5.17. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18arm: dts: rockchip: sync rk322x.dtsi from LinuxJohan Jonker
Sync rk322x.dtsi from Linux version 5.17. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18arm: dts: rockchip: move all rk322x u-boot specific properties in separate ↵Johan Jonker
dtsi files In order to sync rk322x.dtsi from Linux, move all U-boot specific properties in separate dtsi files. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18rockchip: rk3228-cru: sync the clock dt-binding header from LinuxJohan Jonker
In order to update the DT for rk3228 sync the clock dt-binding header. This is the state as of v5.17 in Linux. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18rockchip: rk3228-power: sync power domain dt-binding header from LinuxJohan Jonker
In order to update the DT for rk3228 sync the power domain dt-binding header. This is the state as of v5.17 in Linux. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18doc: rockchip: add rk3066 Rikomagic MK808Johan Jonker
Add rk3066 Rikomagic MK808 to the list of mainline supported Rockchip boards. Include instructions for creating and programming images to NAND and SD card. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18doc: rockchip: add px30/rk3326 boards and examplesJohan Jonker
There are several PX30/RK3326 boards in use without mentioning in rockchip.rst. Add boards and examples. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18doc: rockchip: restyle rockchip.rstJohan Jonker
With more text coming to the rockchip.rst document, give it a restyle first. Changed: sort build examples alphabetically add git clone example fix bash examples fix phrases (grammer) fix typos Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18rockchip: rk3066: add mk808_defconfigJohan Jonker
This commit adds the default configuration file and relevant description for a MK808 board. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18rockchip: rk3066: add Rikomagic MK808 boardJohan Jonker
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port, HDMI and a micro-SD card slot. It also includes on-board NAND and 1GB of SDRAM. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18rockchip: rk3066: add core supportJohan Jonker
Add the core architecture code for the rk3066. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18rockchip: tools: add rk3066 support to rkcommon.cJohan Jonker
Add rk3066 support to rkcommon.c Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18arm: dts: rockchip: add rk3066a-mk808.dtsJohan Jonker
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port, HDMI and a micro-SD card slot. It also includes on-board NAND and 1GB of SDRAM. Add rk3066a-mk808.dts. Move U-boot specific things in a rk3066a-mk808-u-boot.dtsi file. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18arm: dts: rockchip: add rk3066a.dtsiJohan Jonker
In the Linux DT the file rk3xxx.dtsi is shared between rk3066 and rk3188. Add rk3066a.dtsi. Move U-boot specific things in a rk3066a-u-boot.dtsi file. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>