u-boot.git - U-Boot bootloader

Age	Commit message (Collapse)	Author
2023-08-17	arm: dts: k3-am64: Sync DT with Linux v6.5-rc1	Roger Quadros
	Sync all am642-evm/am642-sk related DT files with Linux v6.5-rc1. - drop timer1 in favor of main_timer0 in am64-main.dtsi. Need to delete clock & power domain properties of main_timer1 in -r5.dts else won't boot. This is because timer_init is done during rproc_start to start System Firmware, but we can't do any clock/power-domain operations before System Firmware starts. - same constraint applies to main_uart0 - drop cpsw3g custom DT property 'mac_efuse' and custom DT node cpsw-phy-sel as driver picks these from standard property/node. - include board dts file in -r5 dts file to avoid duplication of nodes. Include -u-boot.dtsi on top. - drop duplicate nodes in -r5 dts and -u-boot.dtsi Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Nishanth Menon <nm@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
2023-02-06	arm: dts: k3-am64: sync with Linux DT files	Roger Quadros
	Sync AM64 DT files with Linux v6.2-rc4 Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-02	arm: dts: ti: k3-am64-mcu: Add pinctrl	Christian Gmeiner
	Add the definition of the pinctrl for the MCU domain. Same as kernel commit 500e6dfbb465531150ac6e2ff0856dd357ddc8a4 Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Nishanth Menon <nm@ti.com>
2021-10-03	arm: ti: k3: Resync dts files and bindings with Linux Kernel v5.14	Tom Rini
	This resyncs the dts files for all of the currently in-tree K3 platforms, along with relevant bindings, with the v5.14 Linux Kernel release. Of note are that the main-navss/mcu-navss nodes were renamed to main_navss / mcu_navss and so the u-boot.dtsi files needed to be updated to match. Tested on j721e_evm and am65x_evm. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-05-12	arm: dts: ti: Add Support for AM642 SoC	Dave Gerlach
	The AM642 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration to enable applications such as Motor Drives, PLC, Remote IO and IoT Gateways. Some highlights of this SoC are: * Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F MCUs, and a single Cortex-M4F. * Two Gigabit Industrial Communication Subsystems (ICSSG). * Integrated Ethernet switch supporting up to a total of two external ports. * PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other peripherals. * Centralized System Controller for Security, Power, and Resource Management (DMSC). See AM64X Technical Reference Manual (SPRUIM2, Nov 2020) for further details: https://www.ti.com/lit/pdf/spruim2 Introduce basic support for the AM642 SoC to enable SD/MMC boot. Introduce a limited set of MAIN domain peripherals under cbass_main and a set of MCU domain peripherals under cbass_mcu. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>