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path: root/arch/arm/dts/zynqmp.dtsi
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2017-01-10ARM64: zynqmp: Fix i2c node's compatible stringMoritz Fischer
The Zynq Ultrascale MP uses version 1.4 of the Cadence IP core which fixes some silicon bugs that needed software workarounds in Version 1.0 that was used on Zynq systems. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-10ARM64: zynqmp: Add idle state for ZynqMPStefan Krsmanovic
Added the idle-states node to describe zynqmp idle states. Only cpu-sleep-0 idle state is added in this patch. References to the idle-states node are added in all CPU nodes. Time values: entry/exit latencies and min-residency, needs to be tuned. arm,psci-suspend-param is selected to comply with PSCIv1.0 and Extended StateID format. Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com> Acked-by: Will Wong <willw@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-12-20ARM64: zynqmp: Add one empty line between license and nodesMichal Simek
Sync with Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: Adding prefetchable memory space to pcieBharat Kumar Gogada
Adding prefetchable memory space to pcie device tree node. Shifting configuration space to 64-bit address space. Removing pcie device tree node from amba as it requires size-cells=<2> in order to access 64-bit address space. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: Add clocks for LPDDMAKedareswara rao Appana
Zynqmp DMA driver expects two clocks (main clock and apb clock) For LPDDMA channels the two clocks are missing in the Dma node resulting probe failure. xilinx-zynqmp-dma ffa80000.dma: main clock not found. xilinx-zynqmp-dma ffa80000.dma: Probing channel failed xilinx-zynqmp-dma: probe of ffa80000.dma failed with error -2 This patch fixes this issue. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: Add description for LPDDMA channel usageKedareswara rao Appana
LPDDMA default allows only secured access. inorder to enable these dma channels, one should ensure that it allows non secure access. This patch updates the same. Reported-by: Sai Pavan Boddu <saipava@xilinx.com> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: Use 64bit size cell format for main amba busMichal Simek
Use 64bit size cell for main amba bus instead of 32bit because PCIe node requires it Change 64bit sizes also for all others IPs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: Add ocm node in dtsiNaga Sureshkumar Relli
This patch adds ocm controller node in zynqmp.dtsi. needed for OCM edac support. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: Add device tree properties for ZynqMP GT coreAnurag Kumar Vulisha
This patch adds the ZynqMP GT core device-tree properties for zynqmp.dtsi file. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Tested-by: Hyun Kwon <hyunk@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15Revert "ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodes"Michal Simek
This reverts commit bd750e7a6c515c081b72d4ef108a2bfa691a3fd1 Implemented the new workaround for auto tuning based on zynqmp compatible string, so removed the 'broken-tuning' property. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: change sdhci compatible string.Sai Krishna Potthuri
This patch changes the compatible string for sdhci node, adds "xlnx,device_id" and "xlnx,mio_bank" property to sdhci node. Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: List all SMMU idsMichal Simek
Add SMMU description for all tested IPs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: Add support for zynqmp fpga managerNava kishore Manne
Add support for zynqmp fpga manager. Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: Add cortexa53 edac nodeNaga Sureshkumar Relli
This patch adds edac node for arm cortexa53 to report errors on L1 and L2 caches. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15Revert "ARM64: zynqmp: Add serdes address space dp driver"Michal Simek
This reverts commit 786db82bd5bf09cc8f78c8b14445e843d7566b1c. Since we are using serdes driver , no need of mapping serdes register space into DP driver. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Tested-by: Hyun Kwon <hyunk@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: drm: Add DMA indexHyun Kwon
Each plane can be associated with multiple DMA channels. So add index for each DMA channel. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: Sync gpio node propertiesMichal Simek
Keep dtsi in sync with mainline kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: Remove xlnx,id propertyMichal Simek
Remove unused xlnx,id property because it is not the part of DT binding. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: pci: Updating device tree as per upstreamBharat Kumar Gogada
Updating required device tree changes as per mainlined driver from 4.6 kernel. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: Support for multiple PM IDs assigned to a PM domainFilip Drazic
Previously, it was assumed that there is a 1:1 mapping between PM ID defined in the platform firmware and a PM domain. However, there can be a situation where multiple PM IDs belong to a single PM domain (e.g. PM IDs for GPU and two pixel processors correspond to a single PM domain). This patch adds support for assigning more than one PM ID to a single PM domain. Updated documentation accordingly. Assigned pixel processors PM IDs to GPU PM domain. Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: DT: Add PM domains for GPU and PCIEFilip Drazic
Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: DT: Remove unused PM domains for PLLFilip Drazic
Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: DT: Remove unused DDR PM domainFilip Drazic
DDR power states are handled by the PM firmware, so this domain is redundant. Also, since there is no device using this PM domain, it will be powered off during boot, which is wrong. Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: Add dcc port to dtsiMichal Simek
Add dcc to dtsi for supporting system without serial port. DCC is enabled by default on ZynqMP. Adding dcc to zcu100 and zcu102 which were tested. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: Remove DTC 1.4.2 warningsMichal Simek
DTC 1.4.2 reports these warnings: Warning (unit_address_vs_reg): Node /amba_apu has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /amba has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /amba/usb@fe200000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /amba/usb@fe300000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /amba/dma@fd4c0000/dma-video0channel@fd4c0000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /amba/dma@fd4c0000/dma-video1channel@fd4c0000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /amba/dma@fd4c0000/dma-video2channel@fd4c0000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /amba/dma@fd4c0000/dma-graphicschannel@fd4c0000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /amba/dma@fd4c0000/dma-audio0channel@fd4c0000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /amba/dma@fd4c0000/dma-audio1channel@fd4c0000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name This patch is fixing them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-05-24ARM64: zynqmp: Add missing u-boot,dm-pre-reloc to DTSIMichal Simek
Add missing u-boot,dm-pre-reloc to get IPs initialized. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-05-24ARM64: zynqmp: Align gic ranges for 64k in device treeAlexander Graf
The GIC ranges in the zynqmp device tree are only 4kb aligned. Since commit 12e14066f we automatically deal with aliases GIC regions though, so we can map them transparently into guests even on 64kb page size systems. This patch makes use of that features and sets GICC and GICV to 64kb aligned and sized regions. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Use 64bit size cell format for memory nodeMichal Simek
Enable option to support more then 4GB memories in single size block. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Fix DWC3 binding with the kernelMichal Simek
Use the same binding as is used in mainline Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Add serdes address space dp driverMichal Simek
For run time serdes adjustment. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Align register descriptionMichal Simek
Separate register space and put it on more lines. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: dp: Add default properties to zynqmp.dtsiHyun Kwon
Add some default properties to zynqmp.dtsi. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Use correct addresses in node namesHyun Kwon
Reflect actual silicon addresses in DT node names. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Align node address with parent node for dpdmaMichal Simek
Use right addresses for channel names Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Add backward compatible string for uartMichal Simek
Mainline kernel has no r1p12 compatible string that's why console stops to work with the latest DTS files. Append generic compatible string. Keep in your mind that using this generic compatible string not all uart features will be available. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Fix coding style for pcieMichal Simek
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Extend pcie node to support legacy interruptsBharat Kumar Gogada
Modifying device tree node to support legacy interrupts. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Add interrupt-controller property to gpio nodesMichal Simek
GPIO driver supports an input interrupt that's why gpio node itself can be labeled as interrupt controller. Reported-by: John Linn <linnj@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Add ddrc node in dtsNaga Sureshkumar Relli
This patch adds ddrc memory controller node in dts. size mentioned in dts is 0x30000, because we need to access DDR_QOS INTR registers located at fd090208 from this driver. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Added clocks to DTVNSL Durga
ZynqMP DMA's main clock and apb clock are added in zynqmp DT. Signed-off-by: VNSL Durga <vnsldurg@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
2016-04-13ARM64: zynqmp: Add CCI-400 nodeMichal Simek
Add CCI-400 node to DTSI. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Add missing interrupt-parent to PMU nodeMichal Simek
ZynqMP is not using global interrupt-parent setting that's why it has to be listed in every node separately. PMU node missed it and this patch is adding it. Reported-by: John Linn <John.Linn@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: DT: Add power domainsSoren Brinkmann
Add power-domains to the DT and attach devices to them. The power-domains are all logical domains as understood by firmware. Each PD is identified by a unique identifier that the platform firmware understands. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodesP L Sai Krishna
This patch adds broken-tuning property to SD and eMMC nodes. Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Sync GEM nodes with LinuxMichal Simek
Remove jumbo properties which are handled in the driver directly and use mainline compatible string which is already handled by the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Hook up the GEMs to the SMMUEdgar E. Iglesias
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13ARM64: zynqmp: Correct IRQ nr for the SMMUEdgar E. Iglesias
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM64: zynqmp: DT: Fix UART compatible stringSoren Brinkmann
ZynqMP has r1p12 not r1p8. r1p12 contains break detection support. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM64: zynqmp: Correct the watchdog timer interrupt numberPunnaiah Choudary Kalluri
Corrected the watchdog timer interrupt number. Origin value was for CSUPMU watchdog. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04ARM: zynqmp: Add DTS for ep108 boardMichal Simek
Add DTS for ep108 board. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Series-to: u-boot
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