aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/mach-rockchip
AgeCommit message (Collapse)Author
2020-07-09drivers: rename drivers to match compatible stringWalter Lozano
When using OF_PLATDATA, the bind process between devices and drivers is performed trying to match compatible string with driver names. However driver names are not strictly defined, and also there are different names used when declaring a driver with U_BOOT_DRIVER, the name of the symbol used in the linker list and the used in the struct driver_info. In order to make things a bit more clear, rename the drivers names. This will also help for further OF_PLATDATA improvements, such as checking for valid driver names. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour: Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-07rockchip: rk3399: allow deselecting SPL_ATF_NO_PLATFORM_PARAMHugh Cole-Baker
SPL_ATF_NO_PLATFORM_PARAM is selected by default for RK3399 configs, to guard against issues when used with TF-A versions that perform insufficient validation on the platform parameter. However, since commit 8109f738ffa7 "rockchip: increase FDT buffer size" in TF-A, passing a device tree as platform parameter no longer causes problems for upstream TF-A for RK3399. Since SPL_ATF_NO_PLATFORM_PARAM doesn't need to be selected when using upstream TF-A, change the Kconfig option from select to imply. It'll still default to being selected but can be deselected by a user if they know they will be using a compatible version of TF-A. Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Walter Lozano <walter.lozano@collabora.com>
2020-06-27rockchip: rk3188: Fix back to BROM bootAlexander Kochetkov
Move the setting for noc remap out of SPL code. Changing noc remap inside SPL results in breaking back to BROM boot. Fixes commit c14fe2a8e192 ("rockchip: rk3188: Move SoC one time setting into arch_cpu_init()"). Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31rockchip: spl: do full dram_init instead of only probingHeiko Stuebner
Parts of later SPL may need RAM information as well, so do full dram_init() call, which includes the existing dram probing but also initializes the ram information in gd. dram_init() from sdram.c does the following steps: - uclass_get_device(UCLASS_RAM, ...) like the current code - ret = ram_get_info(dev, &ram); - gd->ram_size = ram.size; CONFIG_SPL_RAM already makes sure that sdram.c gets compiled and thus no other variant of dram_init() can exist. So it's the same functionality as before and only adds that the SPL now aquires knowledge about the amount of available ram, which it didn't know about before. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31rockchip: Add initial support for the Pinebook Pro laptop from Pine64.Peter Robinson
Specification: - Rockchip RK3399 - 4GB Dual-Channel LPDDR4 - eMMC socket - mSD card slot - 128Mbit (16Mb) SPI Flash - AP6256 for 11AC WiFi + BT5 - 14 inch 1920*1080 eDP MiPi display - Camera - USB 3.0, 2.0 ports - Type-C port with alt-mode display (DP 1.2) and 15W charge - DC 5V/3A - optional PCIe slot for NVMe SSD drive Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Tested-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29arm: mach-rockchip: bind sub-nodes for rk3399_sysconFrank Wang
There are some sub-nodes under the grf DT, so add bind callback function in rk3399 syscon driver to scan them recursively. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29rockchip: Fix spl mmc boot device ofpathJagan Teki
Linux v5.7-rc1 dts(i) sync has changed the sdmmc node from dwmmc@fe320000 to mmc@fe320000 and this ofpath is being used in rockchip spl bootdevice code. So, update the ofpath with a new node name and prefix "same-as-spl" to missing u-boot,spl-boot-order. Bug log: U-Boot SPL 2020.07-rc2-00256-g9c5fef5774 (May 24 2020 - 20:20:43 +0530) Trying to boot from MMC2 mmc_load_image_raw_sector: mmc block read error Trying to boot from MMC1 mmc_load_image_raw_sector: mmc block read error SPL: failed to boot from all boot devices Fixes: 167efc2c7a46 ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux" Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-22rockchip: spl-boot-order: do not attempt to access fdt if OF_PLATDATAUrja Rannikko
gd->fdt_blob is null if using OF_PLATDATA in SPL, which causes a hang after f0921f5098 ("fdt: Sync up to the latest libfdt"). We use the same test that is used in spl_common_init on whether to call fdtdec_setup to unconditionally avoid linking in the fdt-using code when not necessary and thus reduce SPL size. Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-22rockchip: spl: veyron speedy boots from SPIUrja Rannikko
Apparently speedy was forgotten from this list of veyron devices. Fixes: 49105fb7ed ("rockchip: add common spl board file") Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-18common: Drop linux/bitops.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop linux/delay.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop log.h from common headerSimon Glass
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18command: Remove the cmd_tbl_t typedefSimon Glass
We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop init.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop image.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop net.h from common headerSimon Glass
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18arm: Don't include common.h in header filesSimon Glass
It is bad practice to include common.h in other header files since it can bring in any number of superfluous definitions. It implies that some C files don't include it and thus may be missing CONFIG options that are set up by that file. The C files should include these themselves. Update some header files in arch/arm to drop this. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-22spl: mmc: Rename spl_boot_mode() to spl_mmc_boot_mode()Harald Seiler
The function's name is misleading as one might think it is used generally to select the boot-mode when in reality it is only used by the MMC driver to find out in what way it should try reading U-Boot Proper from a device (either using a filesystem, a raw sector/partition, or an eMMC boot partition). Rename it to spl_mmc_boot_mode() to make it more obvious what this function is about. Link: https://lists.denx.de/pipermail/u-boot/2020-April/405979.html Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-02rockchip: Enable pre console for rk3399Jagan Teki
Enable pre console buffer for rk3399 platform. This would help to capture the console messages prior to the console being initialised. Enabling this would help to capture all the console messages on video output source like HDMI. So we can find the full console messages of U-Boot proper on HDMI display when enabled it for RK3399 platform boards. Buffer address used for pre console is 0x0f200000 which is ram base plus 240MiB. right now the Allwinner SoC is using similar computation. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2020-02-20arch: arm: rockchip: order the rk3399 entries alphabeticallyPeter Robinson
Put the target entries for rk3399 devices in alphabetical order. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19board: roc-pc-rk3399: Add support for onboard LED's and push button to ↵Suniel Mahesh
indicate power mode Added support for onboard LED's and push button. When powered board will be in low power mode(yellow LED), on button press, board enters full power mode (red LED) and boots u-boot. Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19rockchip: rk3399: split roc-pc-rk3399 out of evb_rk3399Suniel Mahesh
roc-pc-rk3399 board has one user button & three user LED's. Currently we don't have any code support for these devices. Since button and LED's are specific to roc-pc-rk3399 board, split it into its own board file and add code support here. Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19rockchip: boot_mode: find the saradc device nameHugh Cole-Baker
adc_channel_single_shot() requires the full device name e.g. "saradc@ff100000", which differs between Rockchip SoC's, but they all share the prefix "saradc"; find the ADC device with this name prefix and use its full name. Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19rockchip: rk3288: Enable pre console bufferJagan Teki
Enable pre console buffer for rk3288 platform. This would help to capture the console messages prior to the console being initialised. Enabling this would help to capture all the console messages on video output source like HDMI. So we can find the full console messages of U-Boot proper on HDMI display when enabled it for RK3288 platform boards. Buffer address used for pre console is 0x0f000000 which is ram base plus 240MiB. right now the Allwinner SoC is using similar computation. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19rockchip: make the global board_fit_config_name_match __weakHeiko Stuebner
The core Rockchip spl code contains a default board_fit_config_name_match implementation doing nothing. Individual boards may want to handle this differently, so add a __weak atribute to make it possible to override this function in other places. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19rockchip: make_fit_atf: use correct fdt_x references in config nodesHeiko Stuebner
The script iterates over the given devicetrees and creates both fdt_x node as well as a conf-node for each passed dt. But there is a slight bug in that it always references fdt_1 in each conf node instead of the matching fdt_x as expected. So fix that by referencing the number of the current dt similar to how the fdt_x nodes gets created. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: core: Require users of devres to include the headerSimon Glass
At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-01-30rockchip: rk3399: Add bootcount supportJagan Teki
Add bootcount support for Rockchip rk3399. The bootcount value is preserved in PMU_SYS_REG0 register, this would help to support redundent boot. Once the redundant boot triggers, the altboot command will look for extlinux-rollback.conf on particular bootable partition which supposed to be a recovery partition where redundant boot required. Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-30rockchip: Add common reset causeJagan Teki
Add cpu reset cause in common cpu-info file. This would help to print the reset cause for various resets. Right now it support rk3288, rk3399. rest of rockchip platforms doesn't have reset cause support ye but this code is more feasible to extend the same. Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-30arm: rockchip: Add common cru.hJagan Teki
Few of the rockchip family SoC atleast rk3288, rk3399 are sharing some cru register bits so adding common code between these SoC families would require to include both cru include files that indeed resulting function declarations error. So, create a common cru include as cru.h then include the rk3399 arch cru include file and move the common cru register bit definitions into it. The rest of rockchip cru files will add it in future. Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-30rockchip: Add cpu-infoJagan Teki
Add cpu information for rockchip soc. This would help to print the SoC family number, with associated temparature, clock and reason for reset etc. Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-17common: Move hang() to the same header as panic()Simon Glass
At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-27rockchip: add description for TPL_ROCKCHIP_COMMON_BOARDThomas Hebb
SPL_ROCKCHIP_COMMON_BOARD, an almost identical option, has a title but this one doesn't for some reason. Add a description to make the menu easier to read. Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-27rockchip: make_fit_atf: explicitly use python3Jack Mitchell
On a distribution with no python2 installed and no python->python3 symlink the script will fail to execute. Specify python3 explicitly as it's already a requirement to build u-boot. Signed-off-by: Jack Mitchell <ml@embed.me.uk> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-26rockchip: fit_spl_optee: get text and optee base from buildKever Yang
Instead of hardcode the base address, we can get them from the build output, eg. get the SYS_TEXT_BASE from .config and get optee base from DRAM_BASE. We can use this script for SoCs with DRAM base not from 0x60000000(rk3229 and many other 32bit Rockchip SoCs), eg. rk3288 DRAM base is 0. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06arm: rockchip: rk3308: Initialize the iomux configurationDavid Wu
When we want to use plus pinctrl feature, we need to enable them at spl. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: misc: protect serial# from getting overwrittenHeiko Stuebner
serial# is one of the vendor properties and thus protected from being overwritten if already set. If env_set is called anyway this result in some nasty warnings, so check for presence before trying that. In the same direction check for the presence of cpuid# and compare it to the actual hardware and emit a warning if they don't match. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: misc: don't fail if eth_addr already setHeiko Stuebner
rockchip_setup_macaddr() runs from an initcall, so returning an error code will make that initcall fail thus breaking the boot process. And if an ethernet address is already set this is definitly not a cause for that, so just return success in that case. Fixes: 04825384999f ("rockchip: rk3399: derive ethaddr from cpuid"); Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: px30: Add support for using UART3 as debug UARTPaul Kocialkowski
Some generic PX30 SoMs found in the wild use UART3 as their debug output instead of UART2 (used for MMC) and UART5. Make it possible to use UART3 as early debug output, with the associated clock and pinmux configuration. Two sets of output pins are supported (M0/M1). Future users should also note that the pinmux default in the dts is to use the M1 pins while the Kconfig option takes M0 as a default. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
2019-12-05rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNELPaul Kocialkowski
UART3 also has two sets of pins that can be selected. Rename the config option to a common name, to allow it to be used for both UART2 and UART3. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-03cosmetic: Fix spelling and whitespace errorsThomas Hebb
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2019-12-02common: Move some board functions out of common.hSimon Glass
A number of board function belong in init.h with the others. Move them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move board_get_usable_ram_top() out of common.hSimon Glass
Move this function into init.h which seems to be designed for this sort of thing. Also update the header to declare struct global_data so that it can be included without global_data.h being needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass
These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02crc32: Use the crc.h header for crc functionsSimon Glass
Drop inclusion of crc.h in common.h and use the correct header directly instead. With this we can drop the conflicting definition in fw_env.h and rely on the crc.h header, which is already included. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-23rockchip: Setup dwc3_device (for non-dm gadgets)Jagan Teki
Setup dwc3_device structure for non-dm gadgets, which is used in rk3399 platforms. dwc3_device would have basic regbase, dr_mode, high speed and 16-bit UTMI+ etc. Cc: Marek Vasut <marex@denx.de> Tested-by: Levin Du <djw@t-chip.com.cn> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Fix to use CONFIG_USB_DWC3_GADGET instead of CONFIG_USB_DWC3) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-23rockchip: Convert to use FIT generator for opteeKever Yang
Use generator script so that we can use environment for TEE source. $TEE for tee.bin, and if file not exist, the script can report a warning, and meke the build success without a error. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: allow DRAM init in SPLThomas Hebb
The common SPL removed SoC-specific code for RK3399's SPL and in the process caused the previously-unconditional DRAM initialization in board_init_f() to only happen when compiling a configuration that does not support TPL, meaning DRAM never gets initialized if TPL is supported but disabled. Fix this by omitting the DRAM init in SPL only when we are configured to also build a TPL. This fixes custom configurations that have disabled TPL, and it should also unbreak the "ficus-rk3399", "rock960-rk3399", and "chromebook_bob" defconfigs, although since I don't have any of those devices I can't confirm they're broken now. Fixes: b7abef2ecbcc ("rockchip: rk3399: Migrate to use common spl board file") Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: SPL: fix ordering of DRAM initThomas Hebb
The common SPL code reordered the DRAM initialization before rockchip_stimer_init(), which as far as I can tell causes the RK3399 to lock up completely. Fix this issue in the common code by putting the DRAM init back after timer init. I have only tested this on the RK3399, but it wouldn't make any sense for the timer init to require DRAM be set up on any system. Fixes: b7abef2ecbcc ("rockchip: rk3399: Migrate to use common spl board file") Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>