aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/mach-rockchip
AgeCommit message (Collapse)Author
2024-02-05rockchip: rk35xx: Enable eMMC HS200 mode by defaultJonas Karlman
Testing has shown that writing to eMMC using a slower mode then HS200 typically generate an ERROR on first attempt on RK3588. # Rescan using MMC legacy mode => mmc rescan 0 # Write a single block to sector 0x4000 fails with ERROR => mmc write 20000000 4000 1 # Write a single block to sector 0x4000 now works => mmc write 20000000 4000 1 With the MMC_SPEED_MODE_SET Kconfig option enabled. Writing to eMMC using HS200 mode work more reliably than slower modes on RK35xx boards. Enable MMC_HS200_SUPPORT Kconfig option by default to prefer use of HS200 mode on RK356x and RK3588. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-02-04rockchip: rk3588: Sync device tree with linux v6.7Jonas Karlman
Sync rk3588 device tree from linux v6.7. Also drop the rockchip,rk3568-dwc3 compatible now that dwc3-generic driver support the rockchip,rk3588-dwc3 compatible. Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2024-02-04arch: arm: mach-rockchip: Kconfig: Enable BOOTSTD_FULL for RK3399 and RK3588Shantur Rathore
Rockchip RK3399 and RK3588 SoCs can support wide range of bootflows. Without full bootflow commands, it can be difficult to figure out issues if any, hence enable by default. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Shantur Rathore <i@shantur.com>
2024-02-04rockchip: rv1126: select SPL_OPTEE_IMAGETim Lunn
rv1126 requires OPTEE as it provides pcsi support. Mainline Linux kernel will fail to boot without this. Select SPL_OPTEE_IMAGE when building FIT image. TEE must be provided when building. Signed-off-by: Tim Lunn <tim@feathertop.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-02-04board: rockchip: Add Sonoff iHost boardTim Lunn
Sonoff iHost is gateway device designed to provide a Smart Home Hub, it is based on Rockchip RV1126. There is also a version with 2GB RAM based off the RV1109 dual core SoC however this works with the same config as the RV1126 for uboot purposes. Features: - Rockchip RV1126 - 4GB DDR4 - 8GB eMMC - microSD slot - RMII Ethernet PHY - 1x USB 2.0 Host - 1x USB 2.0 OTG - Realtek RTL8723DS WiFi/BT - EFR32MG21 Silabs Zigbee radio - Speaker/Microphone Signed-off-by: Tim Lunn <tim@feathertop.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-02-04rockchip: sdram: fix LPDDR5 bank info for sys_reg version 3YouMin Chen
This patch add support for additional bank info used by LPDDR5. Series-version: 2 Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2024-01-29treewide: Remove clk_freeSean Anderson
This function is a no-op. Remove it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
2024-01-19rockchip: rk3128: remove noop fileQuentin Schulz
arch_cpu_init is already returning 0 in its weak definition in common/board_f.c so let's just remove the file entirely since nothing else is done in it. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-01-19rockchip: remove unused global data ptrQuentin Schulz
Remove leftover import and global data ptr from files since they aren't used anymore. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-01-19rockchip: find U-boot proper boot device by inverting the logic that sets itQuentin Schulz
BOOT_DEVICE_* is set by spl_node_to_boot_device() depending on the block device number associated with the MMC device the SPL used to load U-Boot proper from. It is NOT related to the mmc alias in the Device Tree. For SPI flashes, all SPI flashes will return BOOT_DEVICE_SPI so there's currently no way to know from which one the SPL loaded U-Boot proper from. Therefore, let's just find the first valid candidate in /chosen/u-boot,spl-boot-order that is a SPI flash and return that path. This is a best effort. While the original implementation may have worked, using the exact same mechanism but in inverted fashion makes it less likely to have surprising corner-cases or side-effects. A nice side-effect is that all existing and future Rockchip SoCs now automatically have their /chosen/u-boot,spl-boot-device set. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-01-19rockchip: factor out spl_perform_fixups into common spl-boot-orderQuentin Schulz
All SoCs are susceptible to wanting to know which storage medium was used to load U-Boot SPL. So instead of reimplementing the same functions in SoCs over and over again (here just rk3399 and px30 but rk3588 is coming), let's just put all this in common into spl-boot-order.c allowing to support a new SoC just by defining the spl_boot_devices array in the appropriate SoC file. Note that spl_perform_fixups() now calls spl_image_fdt_addr() to get the address of the fdt instead of directly reading the spl_image_info->fdt_addr member, because that member is not guaranteed to be present (guarded with compile flags). This is essential because we move the logic away from px30 and rk3399 which had those compile flags enabled to code run for all Rockchip SoCs. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-01-19rockchip: px30: simplify logic for getting SPL boot medium DT nodeQuentin Schulz
In preparation of moving spl_perform_fixups to spl-boot-order.c, let's simplify the logic around mapping the BOOT_DEVICE_x enum index to a DT node by using an instantiated array of chars instead of creating a new data structure on the fly. This will make it easier to factor out the code handling the SPL boot medium detection by having spl_decode_boot_device common to all SoCs. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-01-19rockchip: rk3399: simplify logic for getting SPL boot medium DT nodeQuentin Schulz
In preparation of moving spl_perform_fixups to spl-boot-order.c, let's simplify the logic around mapping the BOOT_DEVICE_x enum index to a DT node by using an instantiated array of chars instead of creating a new data structure on the fly. This will make it easier to factor out the code handling the SPL boot medium detection by having spl_decode_boot_device common to all SoCs. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-01-19rockchip: board: Add board_rng_seed() for all Rockchip devicesChris Morgan
Allow all rockchip devices to use the hardware RNG to seed Linux RNG. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-01-19rockchip: rk3328: Set efuse auto mode and timing controlJonas Karlman
Reading from efuse return zero when mainline TF-A is used. => dump_efuse 00000000: 00 00 00 00 .... 00000004: 00 00 00 00 .... 00000008: 00 00 00 00 .... 0000000c: 00 00 00 00 .... 00000010: 00 00 00 00 .... 00000014: 00 00 00 00 .... 00000018: 00 00 00 00 .... 0000001c: 00 00 00 00 .... However, when vendor TF-A blobs is used reading from efuse works. Change to use auto mode, enable finish and auto access err interrupts and set timing control using same values that vendor TF-A blob use to fix this. With this efuse can be read when either of mainline TF-A or vendor blob is used. => dump_efuse 00000000: 52 4b 33 82 RK3. 00000004: 00 fe 21 55 ..!U 00000008: 52 4b 57 34 RKW4 0000000c: 35 30 32 39 5029 00000010: 00 00 00 00 .... 00000014: 08 25 0c 0f .%.. 00000018: 02 0d 08 00 .... 0000001c: 00 00 f0 00 .... Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-01-19board: rockchip: Add the Turing RK1 SoMJoshua Riek
The Turing RK1 is a Rockchip RK3588 based SoM from Turing Machines. Specifications: Rockchip RK3588 SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 8/16/32GB memory LPDDR4x Mali G610MC4 GPU 32GB eMMC HS400 2x USB 2.0, 2x USB 3.0 2x MIPI CSI 4x lanes 1x MIPI-DSI DPHY 2x lanes PCIe 2.0 x1, PCIe 3.0 x4 1x HDMI 2.1 output, 1x DP 1.4 output Gigabit Ethernet Size: 69.6mm x 45mm (260-pin SO-DIMM connector) Kernel commit: 2806a69f3fef ("arm64: dts: rockchip: Add Turing RK1 SoM support") Signed-off-by: Joshua Riek <jjriek@verizon.net> Tested-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-01-19rockchip: rk3588: Fix boot from SPI flashJonas Karlman
The commit fd6e425be243 ("rockchip: rk3588-rock-5b: Enable boot from SPI NOR flash") added a new BROM_BOOTSOURCE_SPINOR_RK3588 with value 6. At the time the reason for this new bootsource id value 6 was unknown. We now know that the BootRom on RK3588 use different bootsource id values depending on the iomux used by the flash spi controller, and not by the type of spi nor or spi nand flash used. Add the following enum values and use them for RK3588 boot_devices. - BROM_BOOTSOURCE_FSPI_M0 = 3 - BROM_BOOTSOURCE_FSPI_M1 = 4 - BROM_BOOTSOURCE_FSPI_M2 = 6 Fixes: fd6e425be243 ("rockchip: rk3588-rock-5b: Enable boot from SPI NOR flash") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Tested-by: Slawomir Stepien <sst@poczta.fm> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-01-19arm: dts: rockchip: rk3288: move to 64 bit reg sizeJohan Jonker
To make automatic Rockchip DT syncing possible from Linux to U-boot prepare rk3288.dtsi by moving to 64 bit reg size. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-01-19rockchip: board: Remove dwc3 usb init and gadget handler functionsJonas Karlman
Remove board_usb_init() and dm_usb_gadget_handle_interrupts() functions related to dwc3, they use e.g. a hard-coded reg address for RK3399 and are obsolete with use of DM_USB_GADGET. Use of DM_USB_GADGET, USB_DWC3_GENERIC and USB_DWC3_GADGET have replaced same feature provided by the removed functions on RK3399 boards. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-12-21global: Restrict use of '#include <linux/kconfig.h>'Tom Rini
In general terms, we -include include/linux/kconfig.h and so normal U-Boot code does not need to also #include it. However, for code which is shared with userspace we may need to add it so that either our full config is available or so that macros such as CONFIG_IS_ENABLED() can be evaluated. In this case make sure that we guard these includes with a test for USE_HOSTCC so that it clear as to why we're doing this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2023-11-10rockchip: include: asm: fix entering download mode rk3066Johan Jonker
Keep track of the re-entries with help of the lr register. This binary can be re-used and called from various BROM functions. Only when it's called from the part that handles SPI, NAND or EMMC hardware it needs to early return to BROM ones. In download mode when it handles data on USB OTG and UART0 this section must be skipped. Unlike newer Rockchip SoC models the rk3066 BROM code does not have built-in support to enter download mode on return to BROM. This binary must check the boot mode register for the BOOT_BROM_DOWNLOAD flag and reset if it's set. It then returns to BROM to the end of the function that reads boot blocks. From there the BROM code goes into a download mode and waits for data on USB OTG and UART0. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-11-10rockchip: rv1126: Read cpuid from otp and set ethaddrTim Lunn
Provide configuration to read cpuid and generate a persistent MAC address in ethaddr Signed-off-by: Tim Lunn <tim@feathertop.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-11-09board: rockchip: add Pine64 QuartzPro64 RK3588 boardTom Fitzhenry
QuartzPro64 is a Rockchip RK3588 based SBC by Pine64. UART and boot over SD/eMMC/RJ45 are tested to work. Linux commits from next-20231013: 8152d3d070a9 ("arm64: dts: rockchip: Add QuartzPro64 SBC device tree") Signed-off-by: Tom Fitzhenry <tom@tom-fitzhenry.me.uk> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Cc: Eugen Hristev <eugen.hristev@collabora.com> Cc: Jonas Karlman <jonas@kwiboo.se> Cc: Ondrej Jirman <megi@xff.cz>
2023-10-30Kconfig: Remove all default n/no optionsMichal Simek
Similar change was done by commit b4c2c151b14b ("Kconfig: Remove all default n/no options") and again sync is required. default n/no doesn't need to be specified. It is default option anyway. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # tegra Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Angelo Dureghello <angelo@kernel-space.org>
2023-10-23board: rockchip: add FriendlyElec NanoPC-T6 rk3588 boardJohn Clark
The NanoPC-T6 is a Rockchip RK3588 based SBC by FriendlyElec. There are four variants depending on the DRAM size: 4G/32GB eMMC, 8G/64GB eMMC, 16G/16MB SPI NOR, and 16G/256GB eMMC/16MB SPI NOR Specifications: CPU: Rockchip RK3588, 4x Cortex-A76 (up to 2.4GHz) + 4x Cortex-A55 (up to 1.8GHz) GPU: Mali-G610 MP4 VPU: 8K@60fps H.265 and VP9 decoder, 8K@30fps H.264 decoder, 4K@60fps AV1 decoder, 8K@30fps H.264 and H.265 encoder NPU: 6TOPs, supports INT4/INT8/INT16/FP16 RAM: 64-bit 4GB/8GB/16GB LPDDR4X at 2133MHz eMMC: 0GB/32GB/64GB/256GB HS400 MicroSD Slot: MicroSD SDR104 PCIe 3.0: M.2 M-Key x1, PCIe 3.0 x4 for NVMe SSDs up to 2,500 MB/s Ethernet: PCIe 2.5G 2x Ethernet (RTL8125BG) PCIe 2.1: M.2 E-Key x1, PCIe 2.1 x1 and USB2.0 Host, supports M.2 WiFi and Bluetooth 4G Module: MiniPCIe x1, MicroSIM Card Slot x1 Audio Out: 3.5mm jack for stereo headphone output Audio In: 2.0mm PH-2A connector for analog microphone input Video Input: standard HDMI input port, up to 4Kp60 2x 4-lane MIPI-CSI, compatible with MIPI V1.2 Video Output: 2x standard HDMI output ports compatible with HDMI2.1, HDMI2.0, and HDMI1.4 2x 4-lane MIPI-DSI, compatible with MIPI DPHY 2.0 or CPHY 1.1 USB-A: USB 3.0, Type A USB-C: Full function USB Type‑C port, DP display up to 4Kp60, USB 3.0 40-pin 2.54mm header connector: up to 2x SPIs, 6x UARTs, 1x I2Cs, 8x PWMs, 2x I2Ss, 28x GPIOs Debug UART: 3 Pin 2.54mm header, 3V level, 1500000bps Onboard IR receiver: 38KHz carrier frequency RTC Battery: 2 Pin 1.27/1.25mm RTC battery connector for low power RTC IC HYM8563TS 5V Fan connector Working Temperature: 0C to 70C Power: 5.5*2.1mm DC Jack, 12VDC input Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case) Kernel commits: 893c17716d0c ("arm64: dts: rockchip: Add NanoPC T6") a721e28dfad2 ("arm64: dts: rockchip: Add NanoPC T6 PCIe Ethernet support") ac76b786cc37 ("arm64: dts: rockchip: Add NanoPC T6 PCIe e-key support") Signed-off-by: John Clark <inindev@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-08Merge tag 'u-boot-rockchip-20231007' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-rockchip - Add Board: rk3568 Bananapi R2Pro; - Update pcie bifurcation support; - dwc_eth_qos controller support for rk3568 and rk3588; - Compressed binary support for U-Boot on rockchip platform; - dts and config updates for different board and soc; [ trini: Fix conflict on include/spl.h ] Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-07rockchip: Kconfig: Enable external TPL binary for rk3308Massimo Pegorer
There is no support to initialize DRAM on rk3308 SoC using U-Boot TPL or SPL, and therefore an external TPL binary must be used to package a bootable u-boot-rockchip.bin image. Default ROCKCHIP_EXTERNAL_TPL to yes if ROCKCHIP_RK3308. Remove useless TPL_SERIAL. Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com> Tested-by: FUKAUMI Naoki <naoki@radxa.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-06tpl: Enable CONFIG_TPL_SYS_MALLOC_F where neededSimon Glass
Enable CONFIG_TPL_SYS_MALLOC_F for boards which have a non-zero value for CONFIG_TPL_SYS_MALLOC_F_LEN Note that the default is yes in most cases, so no changes are needed to board defconfig options. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-09-24common: Drop linux/printk.h from common headerSimon Glass
This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-09-15board: usb: Replace legacy usb_gadget_handle_interrupts()Marek Vasut
The usb_gadget_handle_interrupts() is no longer used anywhere, replace the remaining uses with dm_usb_gadget_handle_interrupts() which takes udevice as a parameter. Some of the UDC drivers currently ignore the index parameter altogether, those also ignore the udevice and have to be reworked. Other like the dwc3_uboot_handle_interrupt() had to be switched from index to udevice look up to avoid breakage. Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # on khadas vim3 Signed-off-by: Marek Vasut <marex@denx.de>
2023-08-21Merge tag 'v2023.10-rc3' into nextTom Rini
Prepare v2023.10-rc3 Signed-off-by: Tom Rini <trini@konsulko.com>
2023-08-15common: return type board_get_usable_ram_topHeinrich Schuchardt
board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-12rockchip: spl: Drop out of scope debug message related to uart initMassimo Pegorer
Debug uart is no more inited in board_init_f function: remove this debug message from board_init_f. If an earliest-as-possible message after debug uart initialization is needed, enable DEBUG_UART_ANNOUNCE Kconfig option, instead. Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12rockchip: spl: Drop useless call to debug_uart_initMassimo Pegorer
Since commit 0dba45864b2a ("arm: Init the debug UART") function debug_uart_init is called in crt files _main before calling board_init_f. Therefore, there is no need to call it again inside board_init_f implementation in arm/mach-rockchip/spl.c. Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12rockchip: rv1126: Enable fdtoverlay supportJagan Teki
Add fdtoverlay_addr_r and enable OF_LIBFDT_OVERLAY for the use of DT overlay in RV1126. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12rockchip: rk3399: remove duplicate call to regulators_enable_boot_onQuentin Schulz
An earlier commit makes the common SPL code call regulators_enable_boot_on and regulators_enable_boot_off before iterating over possible boot media for U-Boot proper. There is therefore no need to do this in the rk3399-specific code, so let's remove it. Cc: Quentin Schulz <foss+uboot@0leil.net> Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-08-09Kconfigs: Correct default of "0" on hex type entriesTom Rini
It is not a parse error to have a default value of "0" for a "hex" type entry, instead of "0x0". However, "0" and "0x0" are not treated the same even by the tools themselves. Correct this by changing the default value from "0" to "0x0" for all hex type questions that had the incorrect default. Fix one instance (in two configs) of a default of "0" being used on a hex question to be "0x0". Remove the cases where a defconfig had set a value of "0x0" to be used as the default had been "0". Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-31board: rockchip: add Radxa ROCK5A Rk3588 boardEugen Hristev
ROCK 5A is a Rockchip RK3588S based SBC (Single Board Computer) by Radxa. There are tree variants depending on the DRAM size : 4G, 8G and 16G. Specifications: Rockchip Rk3588S SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 4/8/16GB memory LPDDR4x Mali G610MC4 GPU MIPI CSI 2 multiple lanes connector 4-lane MIPI DSI connector Audio – 3.5mm earphone jack eMMC module connector uSD slot (up to 128GB) 2x USB 2.0, 2x USB 3.0 2x micro HDMI 2.1 ports, one up to 8Kp60, the other up to 4Kp60 Gigabit Ethernet RJ45 with optional PoE support 40-pin IO header including UART, SPI, I2C and 5V DC power in USB PD over USB Type-C Size: 85mm x 56mm (Raspberry Pi 4 form factor) Kernel commits: d1824cf95799 ("arm64: dts: rockchip: Add rock-5a board") 991f136c9f8d ("arm64: dts: rockchip: Update sdhci alias for rock-5a") 304c8a759953 ("arm64: dts: rockchip: Remove empty line from rock-5a") cda0c2ea65a0 ("arm64: dts: rockchip: Fix RX delay for ethernet phy on rk3588s-rock5a") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31board: rockchip: Add Pine64 Quartz64-A BoardJonas Karlman
The Pine64 Quartz64 Model A is a single-board computer based on the Rockchip RK3566 SoC. The board features USB3, SATA, PCIe, HDMI, USB2.0, CSI, DSI, eDP, eMMC, SD, and an e-paper parallel port, as well as a 20 pin GPIO header. Features tested on a Quartz64-A 8GB v2.0 2021-04-27: - SD-card boot - eMMC boot - PCIe/NVMe/AHCI - USB host Device tree is imported from linux v6.4. Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: veyron: Enable building SPI ROM imagesAlper Nebi Yasak
Commit 9b312e26fc77 ("rockchip: Enable building a SPI ROM image on jerry") produces a u-boot.rom file for chromebook_jerry, intended to be written to SPI flash. Build this file for other veyron boards as well, especially because they are already configured only to boot from SPI. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk3308: no DEBUG_UART_BOARD_INIT for ROCK Pi SPegorer Massimo
Call to board_debug_uart_init() is useless, as mainline U-Boot can not build TPL for rk3308, and proprietary ddr.bin to be used as TPL is responsible to init debug uart. Moreover current implementation of board_debug_uart_init() is not compatible with ROCK Pi S, as it sets pins for UART2 channel 1 breaking access to sdmmc due to pinmux conflict. Debug uart for ROCK Pi S is UART0. Thus, avoid ROCKCHIP_RK3308 to select DEBUG_UART_BOARD_INIT and allow to deselct it in rock-pi-s-rk3308_defconfig. The DEBUG_UART_BOARD_INIT is already implied by ARCH_ROCKCHIP, therefore other boards based on rk3308 chip are not affected by change. Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31rockchip: rk3308: fix board_debug_uart_initPegorer Massimo
Definition of function board_debug_uart_init() must be under CONFIG_DEBUG_UART_BOARD_INIT and not under CONFIG_DEBUG_UART, as it was: see debug_uart.h. In this way the debug uart can be used but its board-specific initialization skipped by configuration, if useless. Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28board: rockchip: Add Hardkernel ODROID-M1Jonas Karlman
Hardkernel ODROID-M1 is a single board computer with a RK3568B2 SoC, a slightly modified version of the RK3568 SoC. Features tested on a ODROID-M1 8GB v1.0 2022-06-13: - SD-card boot - eMMC boot - SPI Flash boot - PCIe/NVMe/AHCI - SATA port - USB host Device tree is imported from linux v6.4. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Stefan Agner <stefan@agner.ch> Tested-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28rockchip: RK322x: Select SPL_OPTEE_IMAGEAlex Bee
For RK322x series ARM SoCs the OP-TEE is non-optional, as besides the TEE it also provides the PSCI implementation, which is expected to be available by upstream linux. Select CONFIG_SPL_OPTEE_IMAGE if an FIT image is built. Signed-off-by: Alex Bee <knaerzche@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28rockchip: rk3568: Fix alloc space exhausted in SPLJonas Karlman
Current SYS_MALLOC_F_LEN of 0x2000 (8 KB) used in SPL is too small for some RK3568 boards. SPL will print following during boot: alloc space exhausted Increase the default SYS_MALLOC_F_LEN to 0x20000 (128 KB) to mitigate. Fixes: 2a950e3ba506 ("rockchip: Add rk3568 architecture core") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28rockchip: rk3399: pass platform parameter to TF-A by default for new RK3399 ↵Quentin Schulz
boards Long are gone the times TF-A couldn't handle the FDT passed by U-Boot. Specifically, since commit e7b586987c0a ("rockchip: don't crash if we get an FDT we can't parse") in TF-A, failure to parse the FDT will use the fallback mechanism. This patch was merged in TF-A v2.4-rc0 from two years ago. New boards should likely have this option disabled or explicitly enable it in their respective defconfig. Because existing boards might depend on a TF-A version that predates v2.4, let's just enable this option in all RK3399 defconfigs. Maintainers of each board can decide for themselves if they would prefer to disable this option and allow U-Boot to pass the DT to TF-A. Cc: Quentin Schulz <foss+uboot@0leil.net> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28board: rockchip: Add Edgeble Neural Compute Module 6BJagan Teki
Neural Compute Module 6B(Neu6B) is a 96boards SoM-CB compute module based on Rockchip RK3588J from Edgeble AI. Add support for this SoM and IO board. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28arch: rockchip: rk3588: Fix missing suffix 'A' for Edgeble Neu6AJagan Teki
Add missing suffix 'A' for Edgeble Neu6A SoM and IO boards. Fixes: <15b2d1fb727> ("board: rockchip: Add Edgeble Neural Compute Module 6") Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-05Merge tag 'v2023.07-rc6' into nextTom Rini
Prepare v2023.07-rc6
2023-06-29board: rockchip: rock5b-rk3588: fix descriptionEugen Hristev
Update description with correct specifications Fixes: 3bf8e4080763 ("board: rockchip: add Radxa ROCK5B Rk3588 board") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-11 10:10:14 +0000