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2022-06-29arm: dts: rockchip: rk3288: bulk convert gpios to their constant counterpartsJohan Jonker
Bulk convert rk3288 DT gpios to their constant counterparts. Partial Linux sync for the rk3288.dtsi file. ARM: dts: rockchip: bulk convert gpios to their constant counterparts https://lore.kernel.org/all/20190402121852.14442-1-heiko@sntech.de/ sed -i -f script.sed rk3288.dtsi ================================ /rockchip,pins *=/bcheck b # to end of script :append-next-line N :check /^[^;]*$/bappend-next-line s/<RK_GPIO\([0-9]\) /<\1 /g s/<\([^ ][^ ]* *\)0 /<\1RK_PA0 /g s/<\([^ ][^ ]* *\)1 /<\1RK_PA1 /g s/<\([^ ][^ ]* *\)2 /<\1RK_PA2 /g s/<\([^ ][^ ]* *\)3 /<\1RK_PA3 /g s/<\([^ ][^ ]* *\)4 /<\1RK_PA4 /g s/<\([^ ][^ ]* *\)5 /<\1RK_PA5 /g s/<\([^ ][^ ]* *\)6 /<\1RK_PA6 /g s/<\([^ ][^ ]* *\)7 /<\1RK_PA7 /g s/<\([^ ][^ ]* *\)8 /<\1RK_PB0 /g s/<\([^ ][^ ]* *\)9 /<\1RK_PB1 /g s/<\([^ ][^ ]* *\)10 /<\1RK_PB2 /g s/<\([^ ][^ ]* *\)11 /<\1RK_PB3 /g s/<\([^ ][^ ]* *\)12 /<\1RK_PB4 /g s/<\([^ ][^ ]* *\)13 /<\1RK_PB5 /g s/<\([^ ][^ ]* *\)14 /<\1RK_PB6 /g s/<\([^ ][^ ]* *\)15 /<\1RK_PB7 /g s/<\([^ ][^ ]* *\)16 /<\1RK_PC0 /g s/<\([^ ][^ ]* *\)17 /<\1RK_PC1 /g s/<\([^ ][^ ]* *\)18 /<\1RK_PC2 /g s/<\([^ ][^ ]* *\)19 /<\1RK_PC3 /g s/<\([^ ][^ ]* *\)20 /<\1RK_PC4 /g s/<\([^ ][^ ]* *\)21 /<\1RK_PC5 /g s/<\([^ ][^ ]* *\)22 /<\1RK_PC6 /g s/<\([^ ][^ ]* *\)23 /<\1RK_PC7 /g s/<\([^ ][^ ]* *\)24 /<\1RK_PD0 /g s/<\([^ ][^ ]* *\)25 /<\1RK_PD1 /g s/<\([^ ][^ ]* *\)26 /<\1RK_PD2 /g s/<\([^ ][^ ]* *\)27 /<\1RK_PD3 /g s/<\([^ ][^ ]* *\)28 /<\1RK_PD4 /g s/<\([^ ][^ ]* *\)29 /<\1RK_PD5 /g s/<\([^ ][^ ]* *\)30 /<\1RK_PD6 /g s/<\([^ ][^ ]* *\)31 /<\1RK_PD7 /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)0 /<\1RK_FUNC_GPIO /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)RK_FUNC_\([1-9]\) /<\1\2 /g Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29arm: dts: rockchip: remove usb-phy fallback string for rk3188Johan Jonker
With the conversion of rockchip-usb-phy.yaml a long time used fallback string for rk3066a/rk3188 was added. The linux driver doesn't do much with the GRF phy address range, however the u-boot driver rockchip_usb2_phy.c does. The bits in GRF_UOC0_CON2 for rk3066a/rk3188 and rk3288 for example don't match. Remove the usb-phy fallback string for rk3188 to prevent possible strange side effects. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-29rockchip: board: change condition board_usb_init() in functionJohan Jonker
Change define condition in board_usb_init() function to allow rk3066/rk3188 to use the USB PHY driver. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-06-28kontron-sl-mx8mm: Add CAAM supportFabio Estevam
Add CAAM support, which is required when enabling HAB secure boot. Select CONFIG_SPL_DRIVERS_MISC so that CONFIG_IMX_HAB could build successfully, if selected. Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-06-28mx6: ddr: Fix disabling on-die terminationFrancesco Dolcini
In case rtt_nom is set to 0 keep ODT disabled (MMDC MPODTCTRL = 0). No changes required for DDR MR1 Rtt_Nom impedance register, 0 value is already handled correctly. No board is currently affected by this change (rtt_nom != 0 on all i.MX6 ddr3 boards), this will be used by a follow-up change. Fixes: fe0f7f7842e1 ("mx6: add mmdc configuration for MX6Q/MX6DL") Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Fabio Estevam <festevam@denx.de> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-06-28imx8m: fixup thermal tripsAndrejs Cainikovs
Fixup thermal trips in Linux device tree according to SoC thermal grade. Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Tested-by: Adam Ford <aford173@gmail.com>
2022-06-26sunxi: psci: Fix sunxi_power_switch on sun8i-r40 platformqianfan Zhao
linux system will die if we offline one of the cpu on R40 based board: eg: echo 0 > /sys/devices/system/cpu/cpu3/online The reason is that the R40 version of sunxi_cpu_set_power always passes 0 for the CPU number, so we turn off CPU0, regardless of what CPU the CPU_OFF request came for. Fix this by passing the proper CPU number, as there are proper power clamp registers for every of the four cores. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-06-26ARM: dts: sun4i: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the A10 SoC and all existing boards verbatim from the Linux v5.18-rc1 tag. The previous version of this change was only partially applied. Fixes: 4746694cba74 ("ARM: dts: sun4i: Sync from Linux v5.18-rc1") Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-06-23imx: kontron-sl-mx8mm: Remove deprecated phy-mode propertyFrieder Schrempf
This was previously needed, but U-Boot is now capable of parsing the new "phy-connection-type" property that is already used in the main devicetree. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-23imx: kontron-sl-mx8mm: Sync dts files and fix ethernetFrieder Schrempf
This syncs the devicetree files with the latest Linux kernel (5.19-rc2). This also fixes the currently broken ethernet support: Before: Net: Could not get PHY for FEC0: addr 0 After: Net: eth0: ethernet@30be0000 Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-23arm: apple: Increase RTKit timeoutsJanne Grunau
Timeouts are not expected to happen and are handled as fatal errors. Increase all timeouts to 1 second as defensive measure to avoid relying on the timing behaviour of certain firmware versions or configurations. Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Tested-by: Mark Kettenis <kettenis@openbsd.org>
2022-06-23arm: apple: nvme: Add SART support and RTKit buffer managementJanne Grunau
The NVMe firmware in the macOS 13 beta blocks or crashes with u-boot's current minimal RTKit implementation. It does not provide buffers for the firmware's buffer requests. The ANS2 firmware included in macOS 11 and 12 tolerates this. The firmware included in the first macOS 13 beta requires buffers for the crashlog and ioreport endpoints to function. In the case of the NVMe the buffers are physical memory. Access to physical memory is guarded by what Apple calls SART. Import m1n1's SART driver (exclusively used for the NVMe controller). Implement buffer management helpers for RTKit. These are generic since other devices (none in u-boot so far) require different handling. Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Tested-by: Mark Kettenis <kettenis@openbsd.org>
2022-06-17Merge tag 'u-boot-stm32-20220617' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm - Fix the stm32prog command for stm32mp platform - Add stm32mp15x DHCOR based DRC Compact board
2022-06-17Merge commit '32e0379143b433e29d76404f5f4c279067e48853' of ↵Tom Rini
https://github.com/tienfong/uboot_mainline
2022-06-17arm: dts: socfpga: stratix10: Add freeze controller nodeDinesh Maniyam
The freeze controller is required for FPGA partial reconfig. This node is disable on default. Enable this node via u-boot fdt command when needed. Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com> Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-17arm: dts: socfpga: agilex: Add freeze controller nodeDinesh Maniyam
The freeze controller is required for FPGA partial reconfig. This node is disable on default. Enable this node via u-boot fdt command when needed. Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com> Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-17arch: arm: socfpga: timer_s10: Override udelay for secure sectionDinesh Maniyam
Override __udelay() as 'always inlined' function so that PSCI code run in '__secure' section can call this delay function as well. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-17ARM: dts: stm32: Add DHCOR based DRC Compact boardMarek Vasut
Add DT for DH DRC Compact unit, which is a universal controller device. The system has two ethernet ports, one CAN, RS485 and RS232, USB, uSD card slot, eMMC and SDIO Wi-Fi. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17ARM: dts: stm32: Add alternate pinmux for SPI2 pinsMarek Vasut
Add another mux option for SPI2 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17ARM: dts: stm32: Add alternate pinmux for CAN1 pinsMarek Vasut
Add another mux option for CAN1 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17ARM: dts: stm32: Add alternate pinmux for UART5 pinsMarek Vasut
Add another mux option for UART5 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17ARM: dts: stm32: Add alternate pinmux for UART4 pinsMarek Vasut
Add another mux option for UART4 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17ARM: dts: stm32: Add alternate pinmux for UART3 pinsMarek Vasut
Add another mux option for UART3 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17stm32mp: stm32prog: fix the last character of dfu_alt_add third parameterPatrick Delaunay
The third parameter of dfu_alt_add(), the string description of alternate, is build in stm32prog_alt_add() with a unnecessary character ';' at the end of the string. This separator was required in the first implementation of dfu_alt_add() but is no more needed in the current implementation; this separator is managed only in dfu_config_interfaces() which call dfu_alt_add() for this parameter without this separator. And since the commit 53b406369e9d ("DFU: Check the number of arguments and argument string strictly"), this added character cause an error when the stm32prog command is executed because the third parameter of dfu_alt_add() must be a string with a numerical value; 's' must be NULL in the result of call in dfu_fill_entity_mmc(): third_arg = simple_strtoul(argv[2], &s, 0); Fixes: 53b406369e9d ("DFU: Check the number of arguments and argument string strictly") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-16armv8: always use current exception level for TCR_ELx accessAndre Przywara
Currently get_tcr() takes an "el" parameter, to select the proper version of the TCR_ELx system register. This is problematic in case of the Apple M1, since it runs with HCR_EL2.E2H fixed to 1, so TCR_EL2 is actually using the TCR_EL1 layout, and we get the wrong version. For U-Boot's purposes the only sensible choice here is the current exception level, and indeed most callers treat it like that, so let's remove that parameter and read the current EL inside the function. This allows us to check for the E2H bit, and pretend it's EL1 in this case. There are two callers which don't care about the EL, and they pass 0, which looks wrong, but is irrelevant in these two cases, since we don't use the return value there. So the change cannot affect those two. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Tested-by: Mark Kettenis <kettenis@openbsd.org>
2022-06-16arm64: dts: imx8mq-kontron-pitx-imx8m-u-boot.dtsi: disable assigned clocksHeiko Thiery
With the move to use DM_CLK the boards uart stops working. The used properties are not supported by the imx8mq clock driver. Thus the correct baudrate cannot be selected. Remove this properties here and the board can start with working uart. Keep it in the main dts because linux handles these porperties fine. Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
2022-06-16arch: arm: mach-k3: am642_init: bring back MCU_PADCFG_MMR1 unlockChristian Gmeiner
Without this register unlock it is not possible to configure the pinmux used for mcu spi0. Fixes: 92e46092f2 ("arch: arm: mach-k3: am642_init: Probe ESM nodes") Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Nishanth Menon <nm@ti.com>
2022-06-16arm: dts: socfpga: stratix10: Update MMC smplsel valueYau Wai Gan
This new MMC sample select value is obtained from running tests on multiple Stratix 10 boards and proven working. Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-14ARM: dts: imx6qdl-sr-som: add support for alternate phy addressesJosua Mayer
The Cubox has an unstable phy address - which can appear at either address 0 (intended) or 4 (unintended). SoM revision 1.9 has replaced the ar8035 phy with an adin1300, which will always appear at address 1. Change the reg property of the phy node to the magic value 0xffffffff, which indicates to the generic phy driver that all addresses should be probed. That allows the same node (which is pinned by phy-handle) to match either the AR8035 PHY at both possible addresses, as well as the new one at address 1. Also add the new adi,phy-output-clock property for enabling the 125MHz clock used by the fec ethernet controller, as submitted to Linux [1]. Linux solves this problem differently: For the ar8035 phy it will probe both phy nodes in device-tree in order, and use the one that succeeds. For the new adin1300 it expects U-Boot to patch the status field in the DTB before booting While at it also sync the reset-delay with the upstream Linux dtb. [1] https://patchwork.kernel.org/project/netdevbpf/patch/20220428082848.12191-4-josua@solid-run.com/ Signed-off-by: Josua Mayer <josua@solid-run.com>
2022-06-14imx8mn_evk: Add the missing spl.bin entryFabio Estevam
The generated flash.bin does not boot the imx8mn evk LPDDR4 variant as it misses the spl.bin description in binman. Add its entry to fix the boot on the imx8mn evk LPDDR4 variant. Signed-off-by: Fabio Estevam <festevam@denx.de> Tested-by: Arti Zirk <art@zirk.me> Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-13ARM: tegra: XUSB padctl: Add new lines for errorsPeter Robinson
Add new lines for error messages to make them easier to read. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2022-06-03imx: imx8mq: default select CLK_IMX8MQPeng Fan
Since the power domain driver default select CONFIG_CLK, so we will meet lots failures without CLK_IMX8MQ, so default select it. Fixes: commit 4eb82c2e56a7c ("imx: power-domain: Get rid of SMCCC dependency") Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-03armv8: Fix TCR 64-bit writesAndre Przywara
The AArch64 TCR_ELx register is a 64-bit register, and many newer architecture features use bits in the upper half. So far U-Boot was igorant of those bits, trying to leave them alone. However, in an effort to set bit 31 to 1, it failed doing so, because the compiler sign-extended "1 << 31", so that all bits[63:31] got set. Older ARMv8.0 cores don't define anything dangerous up there, but newer architecture revisions do, and setting all those bits will end badly: ================= $ qemu-system-aarch64 -cpu max .... U-Boot 2022.07-rc1 (May 09 2022 - 15:21:00 +0100) DRAM: 1.5 GiB ================= (hangs here) Defining TCR_ELx_RSVD to "1U << 31" avoids the sign-extension, so all upper bits stay at a safe 0 value. This means no more surprises when U-Boot runs on a more capable CPU core. Reported-by: Balaji Anandapadmanaban <Balaji.Anandapadmanaban@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Tested-by: Peter Collingbourne <pcc@google.com> Reviewed-by: Peter Collingbourne <pcc@google.com>
2022-05-26arm: dts: k3-am642-*: Mark the memory node with u-boot, dm-splGeorgi Vlaev
Since commit dffdb1f8eb ("board: ti: am64x: Use fdt functions for ram and bank init") ddr_init() and dram_bank_init() have switched to fdtdec for getting the memory configuration from the am64xx dts files instead of using hardcoded values. This requires an accessible memory node in SPL as we already have in k3-am642-r5-evm.dts. Make the memory node accessible in A53 SPL for both am642-sk and am642-evm and in am642-sk R5 SPL. Signed-off-by: Georgi Vlaev <g-vlaev@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-25Merge tag 'xilinx-for-v2022.07-rc4' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2022.07-rc4 zynqmp: - Fix DP PLL configuration for zcu102/zcu106 and SOM - Fix split mode for starting R5s - DT fixes - Remove firmware node for mini configurations - Wire TEE for multi DTB fit image xilinx: - Handle board_get_usable_ram_top(0) properly phy: - Extend psgtr timeout mmc: - Fix mini configuration which misses zynqmp_pm_is_function_supported()
2022-05-24Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
The bulk of it is (finally!) some DT sync from the kernel. We refrained from syncing one incompatible change, as this would spoil booting Linux kernels before v5.13 with U-Boot's DT (via UEFI, for instance). I test booted Linux v5.18 and v5.4 with that new DT on some boards, and the headless peripherals (MMC, USB, Ethernet) seemed to work. The rest are fixes: - silencing missing clock warnings due to the new pinctrl driver - fixing "UART0 on PortF", allowing UART access through the SD card pins - add an F1C100s clock driver, to enable MMC support (SPI comes later) - some cleanups for CONS_INDEX_n in Kconfig Tested on BananaPi-M1, Pine64-LTS, Pine-H64, X96-Mate (H616) and OrangePi-Zero.
2022-05-24xilinx: zynqmp: Wire tee for Multi DTB use casesMichal Simek
Fix TEE wiring when MULTI_DTB is selected. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c8523a89d910ae6b8a9971b4e7b3bda89be3dc27.1652874088.git.michal.simek@amd.com
2022-05-24sunxi: Remove obsolete Kconfig selectionsSamuel Holland
ARCH_SUNXI selects DM_SERIAL, so the condition can never be satisfied. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-24sunxi: board: Fix UART PortF pinmux setupAndre Przywara
When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins (usually used for the SD card) as UART0. Some SoCs use the mux value of 3 for this, while others use 4. The combination of Kconfig symbols we currently use was not quite right: we mis-configure the A31, A64, H6 and H616. Going through the list in the pinctrl driver, there are only a few older SoCs that use a value of 4, so revert the #ifdef clause, and name those explicitly, instead of the other way around. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org>
2022-05-23arm: socfpga: Add the terasic de10-standard boardHumberto Naves
Use the de10-nano files as templates for the de10-standard board. The files in qts directory are generated by quartus from the GHRD design. Signed-off-by: Humberto Naves <hsnaves@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
2022-05-23arm: gic_v2: Skip gic_init_secure when cpu is not in el3Sai Pavan Boddu
This would prevent configuring non-secure regs in case gic security extensions are not emulated in Qemu. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-05-23Merge tag 'u-boot-imx-20220523' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20220523 ------------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12087 Additionally to u-boot-imx20200520: - DH MX8MP - i.MX GPIO: reading GPIO when direction is output - Menlo i.MX53: switch to DM And from u-boot-imx20200520: - fix Verdin hang - add pca9450 regulator - conversion to DM_SERIAL - NAND block handling - fix crypto - enable cache on some boards - add ACC board (MX6)
2022-05-23ARM: dts: imx: Add support for DH electronics i.MX8M Plus DHCOM and PDK2Marek Vasut
Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK2 carrier board. Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD, SPI NOR and USB 3.0 host. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2022-05-23sunxi: F1C100s: update DT files from LinuxAndre Przywara
The initial U-Boot F1C100s port was based on the mainline kernel DT files, which were quite basic and were missing the essential MMC and SPI peripherals. While we could work around this in the SPL by hardcoding the required information, this left U-Boot proper without SD card or SPI flash support, so actual loading would require FEL boot. Now the missing DT bits have been submitted and accepted in the kernel tree, so lets sync back those files into U-Boot to enable MMC and SPI, plus benefit from some fixes. This is a verbatim copy of the .dts and .dtsi file from linux-sunxi/dt-for-5.19[1], which have been part of linux-next for a while as well. [1] https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/log/?h=sunxi/dt-for-5.19 Link: https://lore.kernel.org/linux-arm-kernel/20220317162349.739636-1-andre.przywara@arm.com/ Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-23ARM: dts: sun50i: H6: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the H6 SoC and all existing boards from the Linux v5.18-rc1 tag. To maintain ABI compatibility with existing LTS kernels, one change moving some IP blocks to the r_intc interrupt controller is excluded. This effectively reverts Linux commits 189bef235dd3 and 73088dfee635. This commit also adds the following new board devicetrees: - sun50i-h6-pine-h64-model-b.dts - sun50i-h6-tanix-tx6-mini.dts This update should not impact any existing U-Boot functionality. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23ARM: dts: sun50i: A64: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the A64 SoC and all existing boards from the Linux v5.18-rc1 tag. To maintain ABI compatibility with existing LTS kernels, one change moving some IP blocks to the r_intc interrupt controller is excluded. This effectively reverts Linux commits 189bef235dd3 and 73088dfee635. This update should not impact any existing U-Boot functionality. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23ARM: dts: sun8i: R40/T3: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree for the R40/T3 SoC verbatim from the Linux v5.18-rc1 tag. None of the existing boards had any devicetree updates. This commit adds the following new board devicetrees: - sun8i-r40-oka40i-c.dts - sun8i-t3-cqa3t-bv3.dts Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23ARM: dts: sun8i: V3/V3s/S3: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the V3(s)/S3 SoCs and all existing boards verbatim from the Linux v5.18-rc1 tag. This commit also adds the following new board devicetrees: - sun8i-s3-elimo-initium.dts - sun8i-v3-sl631-imx179.dts This update should not impact any existing U-Boot functionality. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23ARM: dts: sunxi: H2+/H3/H5: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the H2+/H3/H5 SoCs and all existing boards from the Linux v5.18-rc1 tag. To maintain ABI compatibility with existing LTS kernels, one change moving some IP blocks to the r_intc interrupt controller is excluded. This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2. This commit also adds the following new board devicetree: - sun8i-h3-nanopi-r1.dts This update should not impact any existing U-Boot functionality. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23ARM: dts: sun8i: A83T: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the A83T SoC and all existing boards from the Linux v5.18-rc1 tag. To maintain ABI compatibility with existing LTS kernels, one change moving some IP blocks to the r_intc interrupt controller is excluded. This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2. As with the other SoCs, updates of note include adding detection GPIO properties in the USB PHY nodes. Signed-off-by: Samuel Holland <samuel@sholland.org>
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