Age | Commit message (Collapse) | Author |
|
This adds a simple Northstar "BRCMNS" board to be used with
the BCM4708x and BCM5301x chips.
The main intention is to use this with the D-Link DIR-890L
and DIR-885L routers for loading the kernel into RAM from
NAND memory using the BCH-1 ECC and using the separately
submitted SEAMA load command, so we are currently not adding
support for things such as networking.
The DTS file is a multiplatform NorthStar board, designed to
be usable with several NorthStar designs by avoiding any
particulars not related to the operation of U-Boot.
If other board need other ECC for example, they need to
create a separate DTS file and augment the code, but I don't
know if any other users will turn up.
Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
The original Northstar is an ARM SoC series that comprise
BCM4709x and BCM5301x and uses a dual-core Cortex A9, the
global timer and a few other things.
This series should not be confused with North Star Plus
(NSP) which is partly supported by U-Boot already.
The SoC is well supported by the Linux kernel and OpenWrt
as it is used in many routers.
Since we currently don't need any chip-specific quirks
and can get the system up from just the device tree, a
mach-* directory doesn't even need to be added, just
some small Kconfig fragments.
Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
This brings in the main SoC device tree used by the
Broadcom Northstar chipset, i.e. BCM4709x and BCM5301x.
This is taken from the v6.3 Linux kernel.
Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
It doesn't seem appropriate for arch/SOC to use a board-level
functionality (CONFIG_OF_BOARD_FIXUP), because this prevents boards
that need to do FDT fixup from using that feature.
Also, this code is completely dead and useless (from comments by
Rasmus Villemoes on the mailing list):
- No in-tree imx8m-based board seems to set CONFIG_OF_BOARD_FIXUP
- The nodes which that function wants to disable don't even exist in
the U-Boot copy of imx8mp.dtsi.
This code was introduced in commit 35bb60787b88. It seems to be some
random import of code from downstream NXP U-Boot, with a commit
message that makes no sense in upstream context.
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
|
|
commit 787f04bb6a0a ("imx: add USB2_BOOT type") broke get_boot_device()
for IMX8 which affects booting from SDP due to boot_instance being
non-zero.
Fix this by only using boot_instance for imx8ulp and imx9.
Fixes: 787f04bb6a0a ("imx: add USB2_BOOT type")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
|
|
Add debug messages to print the real pixel clock rate, which may not be
the requested one.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
|
Add the get_lcd_clk() function to get the LCD pixel clock rate.
The patch has been tested on imx6ul platform.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
|
During some tests to check the pixel clock rate in the transition from
U-Boot to the Linux kernel, I noticed that with the same configuration
of the registers the debug messages reported different rates.
The same Linux kernel calculations are now used to get the PLL video
rate.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
|
|
Add i.MX8QM DMSSE20 a1 board support
U-Boot 2023.04-00030-g7be2f547b2 (Apr 21 2023 - 11:11:43 +0200)
Model: Advantech iMX8QM DMSSE20
Board: DMS-SE20A1 8GB
Build: SCFW 549b1e18, SECO-FW c9de51c0, ATF 5782363
Boot: USB
DRAM: 8 GiB
Core: 100 devices, 19 uclasses, devicetree: separate
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In: serial@5a060000
Out: serial@5a060000
Err: serial@5a060000
Net: eth0: ethernet@5b040000
Warning: ethernet@5b050000 (eth1) using random MAC address - 32:05:0c:f9:5e:10
, eth1: ethernet@5b050000
Hit any key to stop autoboot: 0
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
|
|
Avoid a buffer overflow if assigned-clock-rates has less than two elements.
Fixes: 98bcdf16356c ("imx8mn: Add low drive mode support for DDR4/LPDDR4 EVK")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
|
|
The MNT Reform 2 is a modular DIY laptop. In its initial version it
is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been
lifted from BoundaryDevices official U-Boot downstream project.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Stefano Babic <sbabic@denx.de>
|
|
Now that this functionality is modeled using the device tree and
regulator uclass, the named GPIO is not referenced anywhere. Remove it.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
|
On sunxi boards, SPL looks for U-Boot at a 32 KiB offset, unless SPL is
larger than 32 KiB, in which case U-Boot immediately follows SPL. See
the logic in spl_mmc_get_uboot_raw_sector() and spl_spi_load_image().
In two cases, the existing binman description mismatches the SPL code.
For 64-bit boards, binman would place U-Boot immediately following SPL,
even if SPL is smaller than 32 KiB. This can happen when SPL MMC support
is disabled (i.e. when booting from SPI flash).
In contrast, for 32-bit boards, binman would place U-Boot at 32 KiB,
even if SPL is larger than that. This happens because the 'offset'
property does not consider the size of previous entries.
Fix both issues by setting a minimum size for the SPL entry, which
exactly matches the logic in the SPL code. Unfortunately, this size must
be provided as a magic number, since none of the relevant config symbols
(SPL_PAD_TO, SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, and SYS_SPI_U_BOOT_OFFS)
are guaranteed to be defined in all cases.
Fixes: cfa3db602caf ("sunxi: Convert 64-bit boards to use binman")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
|
add QSPI flash device node for block storage access
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
|
Drop the distro-boot scripts and use standard boot instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Jonas Karlman <jonas@kwiboo.se>
|
|
Since commit de39dc71625d ("arm: armv7-a: Compile and tune for armv7-a
instead of armv5") is used -march=armv7-a option for Omap3 platforms.
With directive ".arch_extension sec" it is possible for -march=armv7-a to
directly use ARM SMC instruction.
So enable ".arch_extension sec" in Omap3 lowlevel_init.S and replace hand
assembled ".word 0xe1600071" by "SMC #1".
Since commit 51d063865064 ("arm: omap-common: add secure smc entry") same
pattern is already used in arch/arm/cpu/armv7/omap-common/lowlevel_init.S.
Signed-off-by: Pali Rohár <pali@kernel.org>
|
|
XEN config can be enabled by other platforms (even it doesn't need to make
sense) that's why fix dependencies. XEN (xenbus.c) requires sscanf (also
pvblock needs it). And PVBLOCK is inside drivers/xen folder which requires
XEN to be enabled.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
|
Toolchains which do not directly support using "isb" and "dsb" directly
are no longer functionally supported in U-Boot. Furthermore, clang has
for a long time warned about using the alternate form that we were.
Update the code.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
When building for ARM64, we need to pass -ffixed-x18 and otherwise pass
-ffixed-r9. Rather than having this logic in two places, we can do this
once in arch/arm/config.mk. Further, while gcc will ignore being passed
both -ffixed-r9 and -ffixed-x18 and simply use -ffixed-x18, clang will
note that -ffixed-r9 is not used. Remove this duplication to also remove
the warning.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Today, only gcc has __builtin_aarch64_crc32b (clang-16 does not, for
example). Make this option depend on CC_IS_GCC.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Default synchronous exceptions handler prints only esr and register
dump. Sometimes it requiers to see an address which caused exceptions
to understand what's going on
ARM ARM in section D13.2.41 states that FAR_EL2 will contain meanfull
value in case of ESR.EC holds 0x20, 0x21, 0x24, 0x25, 0x22, 0x34 or
0x35. Same applies for EL1.
This patch adds function whivh determine current EL, gets correct FAR
register and prints it on panic.
Signed-off-by: Pavel Skripkin <paskripkin@gmail.com>
|
|
Some firewalls enabled by ROM are still left on. So some
address space is inaccessible to the bootloader. For example,
in OSPI boot mode we get an exception and the system hangs.
Therefore, disable all the firewalls left on by the ROM.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
|
|
u-boot could be run at EL1/EL2/EL3. so we set it as same as EL1 does.
otherwise it will hang when enable mmu, that is what we encounter
in our SOC.
Signed-off-by: meitao <meitaogao@asrmicro.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: https://android.googlesource.com/platform/external/u-boot/+/3bf38943aeab4700c2319bff2a1477d99c6afd2f
|
|
In order to make invalidation by VA more efficient, set the largest
block mapping to 2MB, mapping it onto level-2. This has no material
impact on u-boot's runtime performance, and allows a huge speedup
when cleaning the cache.
Signed-off-by: Marc Zyngier <maz@kernel.org>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: https://android.googlesource.com/platform/external/u-boot/+/417a73581a72ff6d6ee4b0938117b8a23e32f7e8
|
|
Some recent arm64 cores have a facility that allows the page
table walker to track the dirty state of a page. This makes it
really efficient to perform CMOs by VA as we only need to look
at dirty pages.
Signed-off-by: Marc Zyngier <maz@kernel.org>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: https://android.googlesource.com/platform/external/u-boot/+/3c433724e6f830a6b2edd5ec3d4a504794887263
|
|
Makes it possible to use e.g mcu_spi0 for custom board detection.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
|
|
For setting up the master firewalls present in the K3 SoCs, the arm64
clusters need to be powered on.
Re-locates the code for atf/optee authentication.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
|
|
adds a53 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
|
|
adds a53 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
|
|
adds a53 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
|
|
adds a53 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
|
|
adds a72 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
|
|
adds a72 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
|
|
adds a72 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
|
|
adds a72 cluster to control from the rproc driver
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
|
|
This header file is now empty, remove it.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
|
|
This matches AM64 and J721e and removes the need to forward
declare k3_spl_init(), k3_mem_init(), and check_rom_loaded_sysfw()
in sys_proto.h.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
|
|
These probably should be in some system wide header given their use.
Until then move them out of K3 sys_proto.h so we can finish cleaning
that header out.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
|
|
This function is not used currently; remove it.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
|
|
This matches how it was done for pre-K3 TI platforms and it allows
us to move the forward declaration out of sys_proto.h.
It also removes the need for K3_BOARD_DETECT as one is free to simply
override the weak function in their board files as needed.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
|
|
This header is only used locally by K3 init files, no need to have it
up with the global mach includes. Move into local includes.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
|
|
This function is the same for each device when it needs to shutdown
the R5 core. Move this to the common section and move the remaining
device specific ID list to the device hardware include.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
|
|
This belongs in the J721e specific file as it is the only place
this is used. Any board level users should use the SOC driver.
While here, move the J721e and J7200 SoC IDs out of sys_proto.h
and into hardware.h. Use a macro borrowed from Rockchip and add
the rest of the SoC IDs for completeness and later use.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
|
|
The MSMC fixup is something we do based on SoC, not based on the board.
So this fixup does not belong in the board files. Move this to the
mach-k3 common file so that it does not have to be done in each board
that uses these SoCs.
We use ft_system_setup() here instead of ft_board_setup() since it is no
longer board level. Enable OF_SYSTEM_SETUP in the configurations that use
this to keep functionality the same.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
|
|
This reverts commit 5717294230bc3578959960003be8984bbbb33642. This
does not exist in upstream kernel.org and breaks boot on DRA7-EVMs.
Drop the same.
Signed-off-by: Andrew Davis <afd@ti.com>
|
|
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
|
|
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
|
|
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
|
|
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
|
|
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
|