aboutsummaryrefslogtreecommitdiff
path: root/arch/arm
AgeCommit message (Collapse)Author
2023-10-16imx: hab: Use size parameterMarek Vasut
The current code works by sheer coincidence, because (see HABv4 API documentation, section 3.4) the RVT authenticate_image call updates the size that is passed in with the actual size ROM code pulls from IVT/CSF . So if the input size is larger, that is "fine" . Pass in size instead to make this really correct. Signed-off-by: Marek Vasut <marex@denx.de>
2023-10-16arm: dts: imx93: add a per clock for LPUART1Alice Guo
When CLK is enabled, get_lpuart_clk_rate() needs to get a per clock of lpuart, so that add a per clock for lpuart1. Signed-off-by: Alice Guo <alice.guo@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2023-10-16ARM: dts: imx: Switch USB1 port control to GPIO on Data Modul i.MX8M Plus ↵Marek Vasut
eDM SBC The USB_PWR signal operation is not reliable on this DWC3 controller instance in case the signal is active high. Switch to GPIO control, which always behaves correctly. Perform the change in u-boot extras until this hits Linux upstream. Signed-off-by: Marek Vasut <marex@denx.de>
2023-10-16arm: mach-imx: Makefile: Extend u-boot-nand.imx paddingHiago De Franco
Extend the padding process of u-boot-nand.imx target by adding 10k bytes of zeros to the end of the binary using the 'dd' command. The existing padding method did not generate a functional binary, as discussed in more detail in this thread [1]. Instead, we adopt the end-padding calculation method documented in 'board/doc/colibri_imx7.rst' as a reference, which is relevant for iMX7 with NAND storage. Adding 10k bytes of zeros provides an approximate value that makes the proper padding for these NAND devices. [1] https://lore.kernel.org/all/CAC4tdFUqffQzRQFv5AGe_xtbFy1agr2SEpn_FzEdexhwjdryyw@mail.gmail.com/ Signed-off-by: Hiago De Franco <hiago.franco@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-10-16imx: spl_imx_romapi.c: remove dead codeRasmus Villemoes
These IS_ENABLED(CONFIG_SPL_LOAD_FIT) cases can no longer be reached, and thus get_fit_image_size() is also redundant. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-10-16imx: spl_imx_romapi: avoid tricky use of spl_load_simple_fit() to get full ↵Rasmus Villemoes
FIT size Currently, spl_imx_romapi uses a somewhat tricky workaround for the fact that a FIT image with external data doesn't directly allow one to know the full size of the file: It does a dummy spl_load_simple_fit(), having the ->read callback remember the largest offset requested, and then does a last call to rom_api_download_image() to fetch the remaining part of the full FIT image. We can avoid that by just keeping track of how much we have downloaded already, and if the ->read() requests something outside the current valid buffer, fetch up to the end of the current request. The current method also suffers from not working when CONFIG_IMX_HAB is enabled: While in that case u-boot.itb is not built with external data, so the fdt header does contain the full size of the dtb structure. However, it does not account for the extra CONFIG_CSF_SIZE added by board_spl_fit_size_align(). And also, the data it hands out during the first dummy spl_load_simple_fit() is of course garbage, and wouldn't pass the verification. So we really need to call spl_load_simple_fit() only once, let that figure out just how big the FIT image is (including whatever data, CSF or "ordinary" external data, has been tacked on beyond the fdt structure), and always provide valid data from the ->read callback. This only affects the CONFIG_SPL_LOAD_FIT case - I don't have any hardware or experience with the CONFIG_SPL_LOAD_IMX_CONTAINER case, so I leave that alone for now. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-10-16imx8mp: binman: rename spl and u-boot nodesRasmus Villemoes
The hab signing script doc/imx/habv4/csf_examples/mx8m/csf.sh does fdtget -t x u-boot.dtb /binman/imx-boot/uboot offset to figure out the offset of u-boot.itb inside flash.bin. That works fine for imx8mm, imx8mn, imx8mq, but fails for imx8mp because in that case 'uboot' is merely a label and not actually the node name. Homogenize these cases and make imx8mp the same as the other imx8m* variants. The binman type is explicitly given and no longer derived from the node name, and the csf.sh script will work for all four SOCs. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-10-16arm: imx: imx8m: add optee configuration to ft_system_setupTim Harvey
If optee is detected configure it in the Linux device-tree: - add /firmware/optee node - add /reserved-memory nodes for optee_core and optee_shm Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-10-16arm: dts: imx8m: move CAAM nodes into common u-boot.dtsiTim Harvey
Move the crypto and sec_jr* nodes from board-specific u-boot.dtsi files into the common files. Additionally protect the nodes with ifdef CONFIG_FSL_CAAM as they don't serve any purpose if that is not enabled. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2023-10-16arm: dts: imx8mn: protect the firmware/optee node with ifdefTim Harvey
There is no need to include the firmware/optee node if the optee driver is not enabled. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-10-16arm: dts: imx8mp: move firmware/optee node to common imx8mp-u-boot.dtsiTim Harvey
Move the firmware/optee node to the common imx8mp-u-boot.dtsi and protect it with an ifdef CONFIG_OPTEE as it is a meaningless node without the optee driver enabled. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-10-16arm: dts: imx8mm: move firmware/optee node to common imx8mm-u-boot.dtsiTim Harvey
Move the firmware/optee node to the common imx8mm-u-boot.dtsi and protect it with an ifdef CONFIG_OPTEE as it is a meaningless node without the optee driver enabled. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2023-10-16board: toradex: verdin-imx8mm: enable usb sdp spl recovery supportMarcel Ziswiler
Enable USB SDP SPL aka serial downloader recovery mode support. While at it also enable fastboot support which may be used to subsequently load further stages like a Toradex Easy Installer FIT image. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-10-16board: gateworks: venice: updates for imx8mp-venice-gw74xx revB PCBTim Harvey
Update the imx8mp-venice-gw74xx for revB: - add CAN1 - add TIS-TPM on SPI2 - add FAN controller - fix PMIC I2C bus (revA PMIC I2C was non-functional so no need for backward compatible option) - M2 socket GPIO's moved Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-10-16board: gateworks: venice: add imx8mm-gw7905-0x supportTim Harvey
The Gateworks imx8mm-venice-gw7905-0x consists of a SOM + baseboard. The GW700x SOM contains the following: - i.MX8M Mini SoC - LPDDR4 memory - eMMC Boot device - Gateworks System Controller (GSC) with integrated EEPROM, button controller, and ADC's - RGMII PHY - PMIC - SOM connector providing: - FEC GbE MII - 1x SPI - 2x I2C - 4x UART - 2x USB 2.0 - 1x PCI - 1x SDIO (4-bit 3.3V) - 1x SDIO (4-bit 3.3V/1.8V) - GPIO The GW7905 Baseboard contains the following: - GPS - microSD - off-board I/O connector with I2C, SPI, GPIO - EERPOM - PCIe clock generator - 1x full-length miniPCIe socket with PCI/USB3 (via mux) and USB2.0 - 1x half-length miniPCIe socket with USB2.0 and USB3.0 - USB 3.0 HUB - USB Type-C with USB PD Sink capability and peripheral support - USB Type-C with USB 3.0 host support Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-10-16board: gateworks: venice: add imx8mp-gw73xx-2x supportTim Harvey
The Gateworks imx8mp-venice-gw73xx-2x consists of a SOM + baseboard. The GW702x SOM contains the following: - i.MX8M Plus SoC - LPDDR4 memory - eMMC Boot device - Gateworks System Controller (GSC) with integrated EEPROM, button controller, and ADC's - PMIC - SOM connector providing: - eQoS GbE MII - 1x SPI - 2x I2C - 4x UART - 2x USB 3.0 - 1x PCI - 1x SDIO (4-bit 3.3V) - 1x SDIO (4-bit 3.3V/1.8V) - GPIO The GW73xx Baseboard contains the following: - 1x RJ45 GbE (eQoS from SOM) - 1x RJ45 GbE (PCI) - off-board I/O connector with MIPI-CSI (3-lane), MIPI-DSI (4-lane), - off-board I/O connector with RS232/RS485 - off-board I/O connector with SPI - off-board I/O connector with I2C, UART, and GPIO I2C, I2S and GPIO - microSD (1.8V/3.3V) - GPS - Accelerometer - EERPOM - USB 3.0 Hub - Front Panel bi-color LED - re-chargeable battery (for RTC) - PCIe clock generator - PCIe switch - on-board 802.11abgnac 1x1 WiFi and Bluetooth 5.2 - 1x USB Type-A host socket with USB 3.0 support - 1x USB OTG with USB 2.0 support - 2x MiniPCIe socket with PCI and USB 2.0 - 1x MiniPCIe socket with SIM, PCI/USB 3.0 (mux), and USB 2.0 - Wide range DC input supply Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-10-16board: gateworks: venice: add imx8mp-gw72xx-2x supportTim Harvey
The Gateworks imx8mp-venice-gw72xx-2x consists of a SOM + baseboard. The GW702x SOM contains the following: - i.MX8M Plus SoC - LPDDR4 memory - eMMC Boot device - Gateworks System Controller (GSC) with integrated EEPROM, button controller, and ADC's - PMIC - SOM connector providing: - eQoS GbE MII - 1x SPI - 2x I2C - 4x UART - 2x USB 3.0 - 1x PCI - 1x SDIO (4-bit 3.3V) - 1x SDIO (4-bit 3.3V/1.8V) - GPIO The GW72xx Baseboard contains the following: - 1x RJ45 GbE (eQoS from SOM) - 1x RJ45 GbE (PCI) - off-board I/O connector with MIPI-CSI (3-lane), MIPI-DSI (4-lane), - off-board I/O connector with RS232/RS485 - off-board I/O connector with SPI - off-board I/O connector with I2C, UART, and GPIO I2C, I2S and GPIO - microSD (1.8V/3.3V) - GPS - Accelerometer - EERPOM - USB 3.0 Hub - Front Panel bi-color LED - re-chargeable battery (for RTC) - PCIe clock generator - PCIe switch - 1x USB Type-A host socket with USB 3.0 support - 1x USB OTG with USB 2.0 support - 1x MiniPCIe socket with PCI and USB 2.0 - 1x MiniPCIe socket with SIM, PCI/USB 3.0 (mux), and USB 2.0 - Wide range DC input supply Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-10-16board: gateworks: venice: add imx8mp-gw71xx-2x supportTim Harvey
The Gateworks imx8mp-venice-gw71xx-2x consists of a SOM + baseboard. The GW702x SOM contains the following: - i.MX8M Plus SoC - LPDDR4 memory - eMMC Boot device - Gateworks System Controller (GSC) with integrated EEPROM, button controller, and ADC's - PMIC - SOM connector providing: - eQoS GbE MII - 1x SPI - 2x I2C - 4x UART - 2x USB 3.0 - 1x PCI - 1x SDIO (4-bit 3.3V) - 1x SDIO (4-bit 3.3V/1.8V) - GPIO The GW71xx Baseboard contains the following: - 1x RJ45 GbE (eQoS from SOM) - off-board I/O connector with I2C, SPI, UART, and GPIO - Front Panel bi-color LED - re-chargeable battery (for RTC) - PCIe clock generator - 1x USB Type-C connector supporting USB 2.0 host mode with VBUS - 1x MiniPCIe socket with SIM, PCI/USB 3.0 (mux), and USB 2.0 - GPS - Accelerometer - EERPOM - Wide range DC input supply Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-10-16arm: dts: imx6ull-14x14-evk-u-boot: add rngbRicardo Salveti
Linux microPlatform uses an rngb device in optee-os in boot scheme SPL -> OPTEE -> U-Boot. To make rngb available for optee-os, enable it in SPL. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2023-10-16imx: syscounter: allow timer_init for SPL buildMichael Scott
With enabled SKIP_LOWLEVEL_INIT, the weak function timer_init() is used in the SPL build. For iMX6 SoC, this leads MMC to fail once u-boot proper is booted due to a timing issue. Always use iMX-specific timer_init() in SPL to fix timing issues. Fixes: be277c3a89 ("imx: mx7: avoid some initialization if low level is skipped") Signed-off-by: Michael Scott <mike@foundries.io> Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-10-13treewide: use dev_read_addr_*_ptr() where appropriateMatthias Schiffer
A follow-up to commit 842fb5de424e ("drivers: use devfdt_get_addr_size_index_ptr when cast to pointer") and commit 320a1938b6f7 ("drivers: use devfdt_get_addr_index_ptr when cast to pointer"). In addition to using the *_ptr variants of these functions where the address is cast to a pointer, this also changes devfdt_get_addr_*() to dev_read_addr_*() in a few places. Some variable and field types are changed from fdt_addr_t or phys_addr_t to void* where the cast was happening later. This patch fixes a number of compile warnings when building a 32bit U-Boot with CONFIG_PHYS_64BIT=y. In some places, it also fixes error handling where the return value of dev_read_addr() etc. was checked for NULL instead of FDT_ADDR_T_NONE. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-13Merge tag 'xilinx-for-v2024.01-rc1-v3' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2024.01-rc1 v3 clk: - remove additional compatible strings for Versal NET net: - zynq_gem: Fix clock calculation for MDC for higher frequencies pinctrl: - core: Extend pinmux status buffere size - zynqmp driver: Show also tristate configuration test: - add test case for pxe get Xilinx: - describe SelectMAP boot mode Zynq: - Fix nand description in DT ZynqMP: - DTS sync patches with kernel and also W=1 related fixes - Add support for KD240, zcu670, e-a2197 with x-prc cards, SC revB/C with i2c description for other SC based boards - k24 psu_init cleanup
2023-10-12arm: mach-k3: j721s2_init: Enable memory with CONFIG_K3_J721E_DDRSSDominik Haller
Make that condition more generic by checking if the memory controller driver is enabled instead of using the EVM's config. Signed-off-by: Dominik Haller <d.haller@phytec.de>
2023-10-12arm: dts: k3-am68: Sync from Linux tag v6.6-rc1Manorit Chawdhry
The following commit syncs the device tree from Linux tag v6.6-rc1 to U-boot and fixes the following to be compatible with the future syncs - - Include k3-am68-sk-base-board.dts file Remove the duplicated pinmuxes from r5 and -u-boot.dtsi files and include k3-am68-sk-base-board.dts for Linux fixes to propagate to U-boot. - Fixing the mcu_timer0 Remove timer0 and use the mcu_timer0 defined in mcu-wakeup.dtsi - Fixing secure proxy nodes Linux DT now have these nodes defined so remove them and rename to use the Linux DT ones. - Remove cpsw node The compatible is now fixed and the node is not required in -u-boot specifically - Remove aliases and chosen node Use these from Linux and don't override when not required. - Remove /delete-property/ from sdhci nodes We have the necessary clock and dev data so remove these. - Remove dummy_clocks and fs_loader0 These weren't being used anywhere so remove it. - Remove mcu_ringacc override All these have been put in a single commit to not break the bisectability. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-10-12arm: dts: k3-j721s2: Sync from Linux tag v6.6-rc1Manorit Chawdhry
The following commit syncs the device tree from Linux tag v6.6-rc1 to U-boot and fixes the following to be compatible with the future syncs - - Include k3-j721s2-common-proc-board.dts file Remove the duplicated pinmuxes from r5 and -u-boot.dtsi files and include k3-j721s2-common-proc-board.dts for Linux fixes to propagate to U-boot. - Fixing the mcu_timer0 Remove timer0 and use the mcu_timer0 defined in mcu-wakeup.dtsi - Fixing secure proxy nodes Linux DT now have these nodes defined so remove them and rename to use the Linux DT ones. - Remove cpsw node The compatible is now fixed and the node is not required in -u-boot specifically - Remove aliases and chosen node Use these from Linux and don't override when not required. - Remove /delete-property/ from sdhci nodes We have the necessary clock and dev data so remove these. - Remove dummy_clocks and fs_loader0 These weren't being used anywhere so remove it. - Remove mcu_ringacc override All these have been put in a single commit to not break the bisectability. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-10-12arm: mach-k3: j721s2: Add mcu_timer0 id to the dev listManorit Chawdhry
mcu_timer0 is used by u-boot as the tick-timer. Add it to the soc devices lsit so it an be enabled via the k3 power controller. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-10-12Revert "arm: dts: k3-j7*: ddr: Update to 0.10 version of DDR config tool"Manorit Chawdhry
The update causes instability in am68-sk boards so revert the patch in the meantime till fix is available. This reverts commit f1edf4bb6aa19732574ac23ca90cb9a0ba395ec1. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-12arm: dts: j7200: dts sync with Linux 6.6-rc1Reid Tonking
Sync j7200 dts with Linux 6.6-rc1 - k3-j7200-r5-common-proc-board.dts now inherits from k3-j7200-common-proc-board.dts instead of k3-j7200-som-p0.dtsi. This allows us to trim down the r5 file considerably by using existing properties - remove pimux nodes from r5 file - remove duplicate nodes & node properties from r5/u-boot files - mcu_timer0 now used instead of timer1 mcu_timer0 device id added to dev-data.c file in order to work - remove cpsw node This node is no longer required since the compatible is now fixed - remove dummy_clock_19_2_mhz This node wasn't being used anyhere, so it was removed - remove dummy_clock_200mhz main_sdhci0 & main_sdhci1 no longer need dummy clock for eMMC/SD - fix secure proxy node mcu_secproxy changed to used secure_prxy_mcu which is already defined in k3-j7200-mcu-wakeup.dtsi - removed &mcu_ringacc property override since they're present in v6.6-rc1 Signed-off-by: Reid Tonking <reidt@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-12arm: mach-k3: j7200: Add mcu_timer0 id to the dev listReid Tonking
mcu_timer0 is now used as the tick timer in u-boot, so this adds the timer to the soc device list so it can be enabled via the k3 power controller. Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Reid Tonking <reidt@ti.com>
2023-10-11configs: Make TI_SECURE_DEVICE default for K3Andrew Davis
All K3 boards now are secure by default, instead of setting this in each defconfig, make it implied by the ARCH config. The only exception is IOT2050, which I do not believe will have any problems with being a TI_SECURE_DEVICE, but for now turn it off to keep its config the same. Signed-off-by: Andrew Davis <afd@ti.com> Tested-by: Tom Rini <trini@konsulko.com>
2023-10-11ARM: psci: move GIC address override to KconfigAndre Przywara
As the code to switch an ARM core from secure to the non-secure state needs to know the base address of the Generic Interrupt Controller (GIC), we read an Arm Cortex defined system register that is supposed to hold that base address. However there are SoCs out there that get this wrong, and this CBAR register either reads as 0 or points to the wrong address. To accommodate those systems, so far we use a macro defined in some platform specific header files, for affected boards. To simplify future extensions, replace that macro with a Kconfig variable that holds this override address, and define a default value for SoCs that need it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Sam Edwards <CFSworks@gmail.com>
2023-10-11arm64: zynqmp: rename overlay sources to .dtsoRasmus Villemoes
Distinguish more clearly between source files meant for producing .dtb from those meant for producing .dtbo. No functional change, as we currently have rules for producing a foo.dtbo from either foo.dts or foo.dtso. Note that in the linux tree, all device tree overlay sources have been renamed to .dtso, and the .dts->.dtbo rule is gone since v6.5 (commit 81d362732bac). So this is also a step towards staying closer to linux with respect to both Kbuild and device tree sources. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-10-11iot2050: rename overlay sources to .dtsoRasmus Villemoes
Distinguish more clearly between source files meant for producing .dtb from those meant for producing .dtbo. No functional change, as we currently have rules for producing a foo.dtbo from either foo.dts or foo.dtso. Note that in the linux tree, all device tree overlay sources have been renamed to .dtso, and the .dts->.dtbo rule is gone since v6.5 (commit 81d362732bac). So this is also a step towards staying closer to linux with respect to both Kbuild and device tree sources. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-10-11arm: dts: imx8mm-cl-iot-gate: rename overlay sources to .dtsoRasmus Villemoes
Distinguish more clearly between source files meant for producing .dtb from those meant for producing .dtbo. No functional change, as we currently have rules for producing a foo.dtbo from either foo.dts or foo.dtso. Note that in the linux tree, all device tree overlay sources have been renamed to .dtso, and the .dts->.dtbo rule is gone since v6.5 (commit 81d362732bac). So this is also a step towards staying closer to linux with respect to both Kbuild and device tree sources. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-10-11arm: apple: Add initial Apple M2 Ultra supportJanne Grunau
Apple's M2 Ultra SoC are somewhat similar to the M1 Ultra but needs a tweaked memory map as the M2 Pro/Max SoCs. USB, NVMe, UART, WDT and PCIe are working with the existing drivers. Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2023-10-11driver: rng: Add DM_RNG interface for ARMv8.5 RNDR registersAndre Przywara
The ARMv8.5 architecture extension defines architectural RNDR/RNDRRS system registers, that provide 64 bits worth of randomness on every read. Since it's an extension, and implementing it is optional, there is a field in the ID_AA64ISAR0_EL1 ID register to query the availability of those registers. Add a UCLASS_RNG driver that returns entropy via repeated reads from those system registers, if the extension is implemented. The driver always binds, but checks the availability in the probe() routine. This helps systems which suffer from low boot entropy, since U-Boot can provide entropy via the generic UEFI entropy gathering protocol to the OS, at an early stage. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-11arm: dts: k3-am625-verdin: fix bootMarcel Ziswiler
A53 U-Boot proper got broken because nodes marked as 'bootph-pre-ram' are no longer available in U-Boot proper before relocation. Fix this by marking all nodes in u-boot.dtsi as 'bootph-all'. Fixes: 9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation") Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2023-10-11arm: dts: k3-j721e-sk/common-proc-board: Fix bootNishanth Menon
Since commit 9e644284ab81 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation") A53 u-boot proper is broken. This is because nodes marked as 'bootph-pre-ram' are not available at u-boot proper before relocation. To fix this we mark all nodes in u-boot.dtsi as 'bootph-all'. Fixes: 69b19ca67bcb ("arm: dts: k3-j721e: Sync with v6.6-rc1") Cc: Neha Francis <n-francis@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Tom Rini <trini@konsulko.com> # J721E-EVM GP Tested-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org>
2023-10-11arm: mach-k3: Remove secure device makefileAndrew Davis
This is now done using binman but this file was leftover and is now unused, remove it. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2023-10-11arm: dts: k3-am65-iot2050: Fix bootJan Kiszka
Since commit 9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation") A53 u-boot proper is broken. This is because nodes marked as 'bootph-pre-ram' are not available at u-boot proper before relocation. To fix this we mark all nodes in u-boot.dtsi as 'bootph-all'. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-11Merge tag 'fsl-qoirq-2023-10-10' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq Drop legacy PPA secure FW support support for MC reserved memory reset the FLSHxCR1 registers for nxp_fspi
2023-10-10armv8: fsl-layerscape: make some functions staticLaurentiu Tudor
Some functions are not used outside this file, so make them static. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-10-10fsl-layerscape: drop obsolete PPA secure firmware supportLaurentiu Tudor
PPA was a secure firmware developed in-house which is no longer supported and replaced by TF-A quite some years ago. Drop support for it. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-10-09arm: mach-k3: common: fix compile warnings with PHYS_64BIT on 32bitMatthias Schiffer
Use uintptr_t instead of phys_addr_t where appropriate, so passing the addresses to writel() doesn't result in compile warnings when PHYS_64BIT is set for 32bit builds (which is actually a useful configuration, as the K3 SoC family boots from an R5 SPL, which may pass bank information based on gd->bd->bi_dram to fdt_fixup_memory_banks() etc., so PHYS_64BIT is needed for fixing up the upper bank). Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2023-10-09exynos: Cleanup exynos_initTom Rini
- None of the callers perform error checking and based on the non-empty versions of this function, there's no checking to be done, so make this a void. - Add a default weak version of the function. - Remove the empty versions of exynos_init now that we have a weak version. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-09arm64: versal: Add SelectMAP boot mode identificationPolak, Leszek
The SelectMAP configuration interface provides an 8-bit, 16-bit or 32-bit bidirectional data bus interface to the Versal FPGA configuration logic that can be used for both configuration and readback. A connected microcontoller to the SelectMAP interface can load boot image with bitstream, TF-A (ARM Trusted Firmware) and U-Boot. This commit adds the missing identification of the SelectMAP mode. Signed-off-by: Polak, Leszek <LPolak@arri.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Michal Simek <michal.simek@amd.com> Cc: Stefan Roese <sr@denx.de> Link: https://lore.kernel.org/r/DU0PR07MB8419F7765892CDBCE7D559C5C8CFA@DU0PR07MB8419.eurprd07.prod.outlook.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-10-09arm64: xilinx: Do not use '_' in si5335 DT node namesMichal Simek
Character '_' not recommended in node name. Use '-' instead. Pretty much run sed below for node names. s/si5335_/si5335-/ Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ac752b1e27f02efb32608188992bb7ae50e4b1b0.1695809130.git.michal.simek@amd.com
2023-10-09arm64: zynqmp: Do not use '_' in DT node namesMichal Simek
Using '_' is not recommended for node names. Use '-' instead. Pretty much run seds below for node names. s/heartbeat_led/heartbeat-led/ s/gtr_sel/gtr-sel/ s/zynqmp_ipi/zynqmp-ipi/ s/nvmem_firmware/nvmem-firmware/ s/soc_revision/soc-revision/ Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/dd33d6cb0595ffedab117d477f4a3c9d9eb11715.1695808665.git.michal.simek@amd.com
2023-10-09arm: dts: xilinx: Remove undocumented is-dual propertyMichal Simek
Xilinx was using in past is-dual property for QSPIs to reflect their configurations. But handling for them never reached upstream code that's why better to remove them. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/15980560b98672959a889ff9970cbe9540b4ed69.1695808563.git.michal.simek@amd.com
2023-10-09arm64: zynqmp: Add support for zcu670-revBMichal Simek
RevB has different SD level shifter compare to revA. There are couple of changes between revisions but none of them requires SW alignment. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/0f2bb29f88615ce75f887c006060543b4aeafd48.1695808407.git.michal.simek@amd.com
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-16 00:19:01 +0000