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2017-06-08sandbox: Fix comparison of unsigned enum expression warningTom Rini
In os_dirent_get_typename() we are checking that type falls within the known values of the enum os_dirent_t. With clang-3.8 testing this value as being >= 0 results in a warning as it will always be true. This assumes of course that we are only given valid data. Given that we want to sanity check the input, we change this to check that it falls within the range of the first to the last entry in the given enum. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: video: rk3399: add HDMI TX support on the RK3399Philipp Tomsich
This commit enables the RK3399 HDMI TX, which is very similar to the one found on the RK3288. As requested by Simon, this splits the HDMI driver into a SOC-specific portion (rk3399_hdmi.c, rk3288_hdmi.c) and a common portion (rk_hdmi.c). Note that the I2C communication for reading the EDID works well with the default settings, but does not with the alternate settings used on the RK3288... this configuration aspect is reflected by the driverdata for the RK3399 driver. Having some sort of DTS-based configuration for the regulator dependencies would be nice for the future, but for now we simply use lists of regulator names (also via driverdata) that we probe. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: video: rk3399: enable HDMI output (from the rk_vop) for the RK3399Philipp Tomsich
This commit adds a driver for the RK3399 VOPs capable and all the necessary plumbing to feed the HDMI encoder. For the VOP-big, this correctly tracks the ability to feed 10bit RGB data to the encoder. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: video: refactor rk_vop and split RK3288-specific code offPhilipp Tomsich
To prepare for adding the RK3399 VOP driver (which shares most of its registers and config logic with the RK3228 VOP), this change refactors the driver and splits the RK3288-specific driver off. The changes in detail are: - introduces a data-structure for chip-specific drivers to register features/callbacks with the common driver: at this time, this is limited to a callback for setting the pin polarities (between the VOP and the encoder modules) and a flag to signal 10bit RGB capability - refactors the probing of regulators into a helper function that can take a list of regulator names to probe and autoset - moves the priv data-structure into a (common) header file to be used by the chip-specific drivers to provide base addresses to the common driver - uses a callback into the chip-specific driver to set pin polarities (replacing the direct register accesses previously used) - splits enabling the output (towards an encoder) into a separate help function withint the common driver Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: rk3288: grf: Fix shift for RK3288_TXCLK_DLY_ENA_GMAC_ENABLERomain Perier
RK3288_TXCLK_DLY_ENA_GMAC_ENABLE, in GRF_SOC_CON3, is supposed to be bit 0xe and not 0xf. Otherwise, it is RGMII RX clock delayline enable and introduces random delays and data lose. This commit fixes the issue by replacing RK3288_TXCLK_DLY_ENA_GMAC_ENABLE with the right shift. Signed-off-by: Romain Perier <romain.perier@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3399-puma: add DTS for the DDR3-1866 timingPhilipp Tomsich
This adds the DDR3-1866 timing via its own DTS and wires it up. This (currently) is not the default timing for the RK3399-Q7 and should be selected explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3399-puma: add DTS for the DDR3-1333 timingPhilipp Tomsich
This adds the DDR3-1333 timing via its own DTS and wires it up. This is not the default timing for the RK3399-Q7 and should be selected explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3399-puma: refactor and rename (default) DDR3-1600 DTSPhilipp Tomsich
To better support different RAM timings (DDR3-1333 and DDR3-1866 are assembly options for the RK3399-Q7), this refactors the DTS support and renames the default DTS variant from rk3399-puma to rk3399-puma-ddr1600: - changes the rk3399-puma DTS into a board-specific DTSI by removing the inclusion of the DRAM timings - adds a new rk3399-puma-ddr1600.dts, which includes the (new) common board DTSI and the DDR3-1600 timing DTSI - wires this up from arch/arm/dts/Makefile and configs/puma-rk3399_defconfig Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3399-puma: sync DTS with Linux treePhilipp Tomsich
The Linux DTS for the RK3399-Q7 has moved with the times... resync against it to ensure a consistent configuration. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3399: enable HDMI output in the DTSPhilipp Tomsich
This commit enables HDMI output in the DTS by adding the necessary nodes to vopl/vopb and by adding the HDMI node. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: Add basic support for evb-rv1108 boardAndy Yan
Add basic support for rv1108 evb, whith this patch we can boot into u-boot console. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: Add core Soc start-up code for rv1108Andy Yan
RV1108 is embedded with an ARM Cortex-A7 single core and a DSP core from Rockchip. It is designed for varies application scenario such as car DVR, sports DV, secure camera and UAV camera. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: clk: Add rv1108 clock driverAndy Yan
Add clock driver support for Rockchip rv1108 soc Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: pinctrl: Add rv1108 pinctrl driverAndy Yan
Add pinctrl support for Rockchip rv1108 soc Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3399-puma: set spl-payload-offsetKlaus Goger
defines the spl-payload to 256k (0x40000) Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3399-puma: release reset of on-module USB3 hub via vbus-gpioPhilipp Tomsich
On the RK3399-Q7, the on-module USB3 hub is held in reset at boot-up to save power and needs to be woken up using GPIO4A3. Note that this is not a negated reset-signal (due to a level shifter being needed for this signal anyway), but a negated enable-signal: to enable, we need to output LOW (i.e. 0)... so we mark this as an ACTIVE_LOW signal. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3399-puma: make the debug serial dm-pre-relocPhilipp Tomsich
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3399-puma: Add DDR3-1866 timingsPhilipp Tomsich
With the validation done for DDR3-1866 (i.e. 933 MHz bus clock), we can now add the timings (rk3399-sdram-ddr3-1866.dtsi) for boards built with the DDR3-1866 option. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: arm64: rk3399: support DDR3-1866 (i.e. 933MHz clock)Philipp Tomsich
The RK3399 is capable of driving DDR3 at 933MHz (i.e. DDR3-1866), if the PCB layout permits and appropriate memory timings are used. This changes the sanity checks to allow a DTS to request DDR3-1866 operation. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2017-06-07rockchip: arm64: rk3399: revise timeout-handling for DRAM PHY lockPhilipp Tomsich
Revise the loop watching for a timeout on obtaining a DRAM PHY lock to clearly state a timeout in milliseconds and use get_timer (based on the ARMv8 architected timer) to detect a timeout. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3328: support and enable xhciMeng Dongyang
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3328: add ehci and ohci node and enable host0 portMeng Dongyang
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: pinctrl: rk3328: do not set io routingKever Yang
In rk3328, some function pin may have more than one choice, and muxed with more than one IO, for example, the UART2 controller IO, TX and RX, have 3 choice(setting in com_iomux): - M0 which mux with GPIO1A0/GPIO1A1 - M1 which mux with GPIO2A0/GPIO2A1 - usb2phy which mux with USB2.0 DP/DM pin. We should not decide which group to use in pinctrl driver, for it may be different in different board, it should goes to board file, and the pinctrl file should setting correct iomux depends on the com_iomux value. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: pinctrl: move rk3328 grf reg definition in header fileKever Yang
Move GRF register bit definition into GRF header file, remove 'GRF_' prefix and add 'GPIOmXn_' as prefix for bit meaning. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: rk3036: clean mask definition for grf regKever Yang
U-Boot prefer to use MASKs with SHIFT embeded, clean the Macro definition in grf header file and pinctrl driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: clock: rk3036: some fix according TRMKever Yang
- hclk/pclk_div range　should use '<=' instead of '<' - use GPLL for pd_bus clock source - pd_bus HCLK/PCLK clock rate should not bigger than ACLK Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: rk3036: clean mask definition for cru regKever Yang
Embeded the shift in mask MACRO definition in cru header file and clock driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: rk3368: Add PX5 Evaluation boardAndy Yan
PX5 EVB is designed by Rockchip for automotive field with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS HDMI video input/output interface, audio codec ES8396, WIFI / BT (on RTL8723BS), Gsensor BMA250E and light&proximity sensor STK3410. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: rk3368: Add initial support for RK3368 based GeekBoxAndreas Färber
The GeekBox is a TV box from GeekBuying, based on an MXM3 module. The module can be used with base boards such as the GeekBox Landingship. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: rk3368: add Sheep boardAndy Yan
Sheep board is designed by Rockchip as a EVB for rk3368. Currently it is able to boot a linux kernel and system to console with the miniloader run as fist level loader. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2017-06-07rockchip: rk3368: Add core start-up code for RK3368Andreas Färber
The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: rk3368: Add pinctrl driverAndy Yan
Add driver to support iomux setup for the most commonly used peripherals on rk3368. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: rk3368: Add clock driverAndy Yan
Add driver to setup the various PLLs and peripheral clocks on the RK3368. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip; rk3399: disable SRAM security regionKever Yang
Some host like SD and eMMC may use DMA to transter data to SRAM, set memory to non-secure to make sure the address can be accessed. The security of SRAM in OS suppose to initialized in ATF bl31, and the SPL is before the bl31. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-06-05armv7m: Fix larger buildsPhil Edworthy
The branch instruction only has an 11-bit relative target address, which is sometimes not enough. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
2017-06-05arm: Add Kconfig symbols used for Linux asm compatibilityPhil Edworthy
Rather than change asm files that come from Linux, add the symbols to Kconfig. Since one of the symbols is for thumb2 builds, make CPU_V7M always select them. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
2017-06-05arm64: Add NOLOAD attribute NOLOAD to .bss sectionsMichal Simek
Mark explicitly bss sections to not be loaded at run time. The similar patch was done in past by: "Fix linker scripts: add NOLOAD atribute to .bss/.sbss sections" (sha1: 64134f011254123618798ff77c42ba196b2ec485) The problem is related to latest toolchain added to Xilinx v2017.1 design tools where jtag loader is trying to access ununitialized memory. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-05ARMv8: Add support for poweroff via PSCIMichal Simek
Add support for calling poweroff in case of psci is wired. Based on the same solution as is used for reset. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Move all logic in to fwcall.c as other ARMs implement poweroff via PMIC] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05arm: Always keep the dtb section on objcopyPantelis Antoniou
The dtb blob section must always be present in the resulting image. Either if OF_EMBEDED is used or if unit tests include dtb blobs. Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05bootstage: Require timer_get_boot_us() to be definedSimon Glass
At present we provide a default version of this function for use by bootstage. However it uses the system timer and therefore likely requires driver model. This makes it impossible to time driver-model init. Drop the function and require boards to provide their own. Add a sandbox version also. There is a default implememtation in lib/time.c for boards which use CONFIG_SYS_TIMER_COUNTER. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05common: arm: freescale: layerscape: Move header files out of common.hSimon Glass
We should not have an arch-specific header file in common.h. Adjust the board files a little so it is not needed, and drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05common: arm: davinci: Move header file out of commonSimon Glass
We should not have an arch-specific header file in common.h. Instead, use the asm/hardware.h header to provide the required declarations, and drop the common.h changes. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-06-05common: ep93xx: Move arch-specific declarations out of commonSimon Glass
These declarations should not be in common. Remove those that are not needed and move the others to an arch-specific location. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05common: freescale: Move arch-specific imx code to arch-imxSimon Glass
These declarations should not be in common.h. Move them to an arch-specific header. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05common: freescale: Move arch-specific declarationsSimon Glass
The declarations should not be in common.h. Move them to the arch-specific headers. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05common: powerpc: Move arch-specific headersSimon Glass
Set up a new asm/ppc.h header file to hold this arch-specific stuff. It should not be in common.h. It probably should be refactored to use asm/arch instead, but that is a job for the maintainer. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05common: Move PPC4xx_SYS_INFO() et al to arch-specific headerSimon Glass
These definitions should not be in common.h. Move them to an arch-specific header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05arm: Include asm/setup.h explictlySimon Glass
Include this header where needed so we do not need to rely on common.h. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05arm: Add declarations to avoid needing to include headersSimon Glass
At present common.h includes various ARM-specific headers. In preparation for dropping this, add a few explicit declarations. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05arm: Add explicit include of <asm/mach-types.h>Simon Glass
Rather than relying on common.h to provide this include, which is going away at some point, include it explicitly in each file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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