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2021-02-02common: Drop asm/global_data.h from common headerSimon Glass
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-01arm: Remove #include <version.h> from armv8/fwcall.cPali Rohár
No version information is used in armv8/fwcall.c therefore do not include version.h header file. This change prevents recompiling fwcall.o when SOURCE_DATE_EPOCH changes. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-01x86: tpl: Show next stage being bootedSimon Glass
Enhance the debugging to show the next stage being booted as well as a dump of the start of the image. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01x86: spl: Clear BSS unconditionallySimon Glass
This should be done even if not using TPL, since BSS may be in use or boards that only use SPL. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01x86: zimage: Improve command-line debug handlingSimon Glass
At present if the command line is very long it is truncated by the printf() statement, which works within a limited buffer. Use puts() instead. Also show better debugging with the command-line setup fails. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01x86: zimage: Allow dumping the image from outside the moduleSimon Glass
At present it is possible to dump an image within the zimage command, but it is also useful to be able to dump it from elsewhere, for example in a loader that has special handling for the different zimage stages. Export this feature as a new function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01x86: Update Chromium OS GNVS namesSimon Glass
The Global Non-Volatile Storage struct has some fields with particular meanings. Rename these to make things easier to follow. Also add a few more boot flags. GNVS should not be confused with GNVQ (Going Nowhere Very Quickly). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01x86: spl: Make moving BSS conditionalSimon Glass
At present BSS is always placed in SDRAM. If a separate BSS is not in use this means that BSS doesn't work as expected. Make the setting conditional on the SEPARATE_BSS option. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01x86: Make sure the SPL image ends on a suitable boundarySimon Glass
The part of U-Boot that actually ends up in u-boot-nodtb.bin is not built with any particular alignment. It ends at the start of the BSS section. The BSS section selects its own alignment, which may larger. This means that there can be a gap of a few bytes between the image ending and BSS starting. Since u-boot.bin is build by joining u-boot-nodtb.bin and u-boot.dtb (with perhaps some padding for BSS), the expected result is not obtained. U-Boot uses the end of BSS to find the devicetree, so this means that it cannot be found. Add 32-byte alignment of BSS so that the image size is correct and appending the devicetree will place it at the end of BSS. Example SPL output without this patch: Sections: Idx Name Size VMA LMA File off Algn 0 .text 000142a1 fef40000 fef40000 00001000 2**4 CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE 1 .u_boot_list 000014a4 fef542a8 fef542a8 000152a8 2**3 CONTENTS, ALLOC, LOAD, RELOC, DATA 2 .rodata 0000599c fef55760 fef55760 00016760 2**5 CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA 3 .data 00000970 fef5b100 fef5b100 0001c100 2**5 CONTENTS, ALLOC, LOAD, RELOC, DATA 4 .binman_sym_table 00000020 fef5ba70 fef5ba70 0001ca70 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .bss 00000060 fef5baa0 fef5baa0 00000000 2**5 ALLOC You can see that .bss is aligned to 2**5 (32 bytes). This is because of the mallinfo struct in dlmalloc.c: 17 .bss.current_mallinfo 00000028 00000000 00000000 000004c0 2**5 ALLOC In this case the size of u-boot-spl-nodtb.bin is 0x1ba90. This matches up with the _image_binary_end symbol: fef5ba90 g .binman_sym_table 00000000 _image_binary_end But BSS starts 16 bytes later, at 0xfef5baa0, due to the 32-byte alignment. So we must align _image_binary_end to a 32-byte boundary. This forces the binary size to be 0x1baa0, i.e. ending at the start of bss, as expected. Note that gcc reports __BIGGEST_ALIGNMENT__ of 16 on this build, even though it generates an object file with a member that requests 32-byte alignment. The current_mallinfo struct is 40 bytes in size. Increasing the struct to 68 bytes (i.e. just above a 64-byte boundary) does not cause the alignment to go above 32 bytes. So it seems that 32 bytes is the maximum alignment at present. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: add more details in the commit message to help people understand] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01x86: apl: Enhance debugging in the SPL loaderSimon Glass
Move to log_debug() and make use of the new SPL function to find the text base. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01x86: acpi_gpe: Update driver name to match devicetreeSimon Glass
Use a driver name in line with the compatible string so that of-platdata can use this driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01x86: coral: Add a devicetree node for eMMCSimon Glass
Add a node for this so we can indicate that it is does not require any ACPI code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-01-31Merge https://gitlab.denx.de/u-boot/custodians/u-boot-shTom Rini
- Sync r8a774a1 DT files, tmio sdhi DMA fix
2021-01-31Merge tag 'dm-pull-30jan21' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-dm tpm fixes for coral binman fixes support for symbols in sub-sections support for additional cros_ec commands various minor fixes / tweaks
2021-01-31arm: dts: rmobile: r8a774a1: Synchronize DTs with Linux 5.10Biju Das
DTS files apart from r8a774a1-hihope-rzg2m-u-boot.dts and r8a774a1-u-boot.dtsi have been imported from linux 5.10 commit 2c85ebc57b3e1817 ("Linux 5.10"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-01-30sandbox: keep time offset when resettingHeinrich Schuchardt
The UEFI Self Certification Test (SCT) checks the SetTime() service with the following steps: * set date * reset * check date matches To be compliant the sandbox should keep the offset to the host RTC during resets. The implementation uses the environment variable UBOOT_SB_TIME_OFFSET to persist the offset. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-30dm: core: Update ofnode_read_fmap_entry() to read hashesSimon Glass
At present this function uses the old format for reading hashes. Add support for the current format. Add a test while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30sandbox: Disable I2C emulators in SPLSimon Glass
These cannot work with of-platdata since they currently need the devicetree at runtime. Disable the emulators and the sandbox I2C driver that needs them. We can enable these later, if needed for testing. Switch the of_plat_parent test over to use a simple bus instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-30x86: coral: Support TPM and RTC in SPLSimon Glass
Update the devicetree so that the TPM and RTC can be used in SPL. Also enable the pins used for getting the memory configuration settings while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30cros_ec: Add support for switchesSimon Glass
On x86 platforms the EC provides a way to read 'switches', which are on/off values determined by the EC. Add a new driver method for this and implement it for LPC. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30cros_ec: Add a function for the hello messageSimon Glass
This is used several times in this file. Put it in a function to avoid code duplication. Also add a test for this function. There are no cros_ec tests at present, so it is time to update the code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30sandbox: fix sandbox_cmdline_cb_test_fdt()Heinrich Schuchardt
fmt does not foresee any parameter. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-30x86: typo segementHeinrich Schuchardt
%s/segement/segment/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-01-30x86: coral: Update an unused pin to reduce powerSimon Glass
GPIO_25 is not used on coral, so set it up in deep sleep. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-29efi_loader: add Linux magic to aarch64 crt0Heinrich Schuchardt
Add the Linux magic to the EFI file header to allow running our test programs with GRUB's linux command. Now we can dump the fixed-up device tree with our dtbdump.efi tool. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-29arm: dts: enable MTK SPI NOR controller driverSkyLake.Huang
1. Enable MTK SPI NOR controller driver on mt7622 & mt7629. 2. Enable quad mode for read and single mode for write. Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
2021-01-27Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- Espressobin: Disable slot when emmc is not present (Pali) - DS414; config header cleanup (Phil) - PCI: auto-config enhancement (Phil) - pci_mvebu: Also map IO region (Phil) - serial: a3720: Implement pending method for output direction (Pali) - turris_mox: Enable a few commands (Marek) - helios4 & ClearFog changes (Dennis) - Plus some minor misc changes
2021-01-27board: presidio-asic: Add CAxxxx Ethernet supportAlex Nemirovsky
Add CAxxxx Ethernet support for the Cortina Access Presidio Engineering Board Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Tom Rini <trini@konsulko.com>
2021-01-27ARM: mvebu: helios4 dts changes to enable SPIDennis Gilmore
Move all aliases defintions into the main dts file Add u-boot definiton to i2c0 based on clearfog set spi1 status to okay Signed-off-by: Dennis Gilmore <dennis@ausil.us>
2021-01-27ARM: mvebu: helios4 adjust env sizes to enable SPI to workDennis Gilmore
mirror the clearfog setup to enable SPI to work Signed-off-by: Dennis Gilmore <dennis@ausil.us>
2021-01-25Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
- New Allwinner H616 SoC support (sans Ethernet & USB) - H6 DT update - Tanix TX6 TV box support - OrangePi 3 support - OrangePi Zero2 (H616) support
2021-01-25sunxi: Add support for OrangePi Zero2Jernej Skrabec
OrangePi Zero2 is SBC based on Allwinner H616 with 1 GiB of RAM, SD card support, gigabit ethernet, micro HDMI, WIFI, Bluetooth and 1 USB 2.0 port. It also has two GPIO headers which allows further peripherals to be used. The devicetree file is taken from v3 of the OrangePi Zero2 Linux submission [1], which it's not yet merged. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2021-January/632084.html Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25arm: sunxi: add initial H616 DTSI and headersJernej Skrabec
This commit introduces H616 DTSI file and dt-bindings headers needed for device tree files. Files are taken from v3 Linux H616 support submission[1], as the H616 .dtsi file is not merged upstream yet. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2021-January/632082.html Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25sunxi: Add H616 FEL supportJernej Skrabec
H616 uses different address for reset. Add it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25sunxi: Add support for H616 SoCJernej Skrabec
H616 is very similar to H6 so most of the infrastructure can be reused. However, two big differences are that it doesn't have functional SRAM A2 which is usually used for TF-A and it doesn't have ARISC co-processor. It also needs bigger SPL size - 48 KiB. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25sunxi: Add H616 DRAM supportJernej Skrabec
Allwinner H616 supports many types of DRAM. Most notably it supports LPDDR4. However, all commercially available boards at this time use only DDR3, so this commit adds only DDR3 support. Controller and MBUS are very similar to H6 but PHY is completely unknown. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25sunxi: add support for R_I2C on H616Jernej Skrabec
This port is needed for communication with PMIC. SPL uses it to set DRAM voltage on H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25sunxi: add support for H616 uart0Jernej Skrabec
This port is used for debug terminal on all known H616 boards. Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25sunxi: introduce support for H616 clocksJernej Skrabec
H616 has mostly the same clocks as H6 with some small differences. Just reuse H6 clocks for H616 and handle differences with macros. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25sunxi: support loading with SPL > 32KBAndre Przywara
H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM driver and need for PMIC configuration, which pulls several drivers which are not needed otherwise. spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with that, reported in SPL header. If size in header is bigger, it will use that value instead. In the process of function rework, also add missing function argument. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org>
2021-01-25sunxi: Add support for I2C on H6 like SoCsJernej Skrabec
I2C support, especially R_I2C port, will be needed in future. Upcoming support for H616 will need R_I2C to adjust DRAM voltage. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25sunxi: prcm: Add memory map for H6 like SoCsJernej Skrabec
There was no need to have prcm definitions for H6 and similar SoCs till now. However, support R_I2C will be needed soon in SPL. Move old definitions to prcm_sun6i.h and add new ones in prcm_sun50i.h. One of those files will be selected in common prcm.h based on defined macros. This commit doesn't do any functional change. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25mmc: sunxi: Replace H6 ifdefs with H6 gen macroJernej Skrabec
It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25sunxi: Introduce common symbol for H6 like SoCsJernej Skrabec
It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25sunxi: Add support for AXP305 PMICJernej Skrabec
This PMIC can be found on H616 boards and it's very similar to AXP805 and AXP806. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25sunxi: Add support for Orange Pi 3Andre Heider
dts file is taken from Linux 5.11-rc1 tag. The Bluetooth controller of this device ships with a default address, use the new CONFIG_FIXUP_BDADDR option to fix it up. Signed-off-by: Andre Heider <a.heider@gmail.com> Acked-by: Maxime Ripard <mripard@kernel.org> [Updated OrangePi 3 DT, rebase and config update] Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25sunxi: Add support for Tanix TX6Jernej Skrabec
This commit adds support for Tanix TX6 TV box, based on H6. It's low end H6 board, with 3 GiB of RAM, eMMC, fast ethernet, USB, IR and other peripherals. DT file is taken from Linux 5.11-rc1 release. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25ARM: dts: sunxi: h6: Update DT filesJernej Skrabec
Updated H6 DT files are based on Linux 5.11-rc1 release. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25Merge tag 'mips-pull-2021-01-24' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-mips - MIPS: add support for Mediatek MT7620 SoCs
2021-01-25Merge tag 'u-boot-imx-20210125' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx Changes for 2020.04 ------------------- - new board: Phytec phyCORE-i.MX8MP i.MX8MN Beacon EmbeddedWorks devkit - Fixes: several nanbcb fixes fix for imx8mm_beacon - further switch to distro boot commands - DM: DM Ether for MX6UL CI: https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6013
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