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2023-10-01ARM: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs on ↵Marek Vasut
Salvator-X boards Add compatible values to Ethernet PHY subnodes representing Micrel KSZ9031 PHYs on R-Car Gen3 Salvator-X boards. This allows software to identify the PHY model at any time, regardless of the state of the PHY reset line. This is a fix for missed addition of these properties on Salvator-X boards. Ported from Linux kernel commit 722d55f3a9bd810f3a1a31916cc74e2915a994ce . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-24Merge tag 'dm-next-23sep23' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-dm into next buildman file-keeping and build-progress improvements dm tree enhancement adjust meaning of bootph-pre-ram/sram
2023-09-24common: Drop linux/printk.h from common headerSimon Glass
This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-09-23kontron_sl28: Use u-boot-update.bin instead of u-boot.updateSimon Glass
A '.update' extension does not get preserved by buildman, so change it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Michael Walle <michael@walle.cc>
2023-09-22x86: coreboot: Record the position of the SMBIOS tablesSimon Glass
Make a note of where coreboot installed the SMBIOS tables so that we can pass this on to EFI. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22Record the position of the SMBIOS tablesSimon Glass
Remember where these end up so that we can pass this information on to the EFI layer. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: coreboot: Enable VIDEO_COPYSimon Glass
At least on modern machines the write-back mechanism for the frame buffer is quite slow when scrolling, since it must read the entire frame buffer and write it back. Enable the VIDEO_COPY feature to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: coreboot: Drop USB init on startupSimon Glass
This is very annoying as it is quite slow on many machines. Also, U-Boot has an existing 'preboot' mechanism to enable this feature if desired. Drop this code so that it is possible to choose whether to init USB or not. Use the existing USE_PREBOOT mechanism instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: Set the CPU vendor in SPLSimon Glass
We don't read this information in 64-bit mode, since we don't have the macros for doing it. Set it to Intel by default. This allows the TSC timer to work correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: coreboot: Rearrange arch_cpu_init()Simon Glass
Init errors in SPL are currently ignored by this function. Change the code to init the CPU, reporting an error if something is wrong. After that, look for the coreboot table. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: coreboot: Document cbmem console structSimon Glass
Coreboot changed a few years ago to include an overflow flag. Update the structure to match this. This comes from coreboot commit: 6f5ead14b4 ("mb/google/nissa/var/joxer: Update eMMC DLL settings") Note: There are several implementations of this in coreboot. I have chosen to follow the one in src/lib/cbmem_console.c Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: dm: Mark driver model as dead when disabling CARSimon Glass
When turning off CAR, set the flag to make sure that nothing tries to use driver model in SPL before jumping to U-Bot proper, since its tables are in CAR. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: broadwell: Set up MTRRsSimon Glass
The current condition does not handle the samus_tpl case where it sets up the RAM in SPL but needs to commit the MTRRs in U-Boot proper. Add another case to handle this and update the comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: broadwell: Avoid initing the CPU twiceSimon Glass
When TPL has already set up the CPU, don't do it again. This existing code actually has this backwards, so fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: spl: Change the condition for copying U-Boot to RAMSimon Glass
Make this depend on whether the address matches the offset, rather than a particular board build. For samus_tpl we don't need to copy, for example. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: Add some log categoriesSimon Glass
Add some missing log categories to a few files. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: broadwell: Show the memory delaySimon Glass
Samus only takes 7 seconds but it is long enough to think it has hung. Add a message about what it is doing, similar to the approach on coral. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: Prevent from missing the FADT chainingAndy Shevchenko
Recent approach with FADT writer shows that there is a room for subtle errors. Prevent this from happening again by introducing acpi_add_fadt() helper. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22Reland "x86: Move FACP table into separate functions""Simon Glass
Each board has its own way of creating this table. Rather than calling the acpi_create_fadt() function for each one from a common acpi_write_fadt() function, just move the writer into the board-specific code. Co-developed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-09-22x86: cpu: i386: cpu: only set pci_ram_top if CONFIG_IS_ENABLED(PCI)Troy Kisky
This avoids an error when ifdef CONFIG_PCI is changed to if CONFIG_IS_ENABLED(PCI) Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com> [Rebased on top of u-boot/master] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-21Merge tag 'xilinx-for-v2024.01-rc1-v2' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2024.01-rc1 clk: - Dont return error when assigned-clocks is empty or missing dm: - Support reading a single indexed u64 value - Add support for reading bootscript address/flash address from DT cmd: - Fix flash_is_unlocked API fpga: - Define fpga_load() for debug build global: - U-Boot project name cleanup (next2) net: - zynq_gem: Use generic_phy_valid() helper - axienet: Convert to ofnode functions - gmii2rgmii: Read bridge address from DT pytest: - skip tpm2_startup when env__tpm_device_test_skip=True spi-nor: - Add mx25u25635f support - zynqmp_qspi: Tune cache behavior trace: - Fix flyrecord alignment issue xilinx: - Move scriptaddr to DT as bootscr-address - Pick script_offset_f/script_size_f from DT as bootscr-flash-offset/size - Do not generate distro boot variables if disabled versal: - Extend memory ranges to cover HBM - Enable TPM, sha1sum and KASLRSEED - Fix distroboot prioritization in connection to available devices - Clean mini targets bootcommand - Fix clock driver versal-net: - Enable TPM, sha1sum and KASLRSEED - Fix distroboot prioritization in connection to available devices zynqmp; - Allow AES to run from SPL - Enable CMD_KASLRSEED - Add proper dependencies for USB and remove ZYNQMP_USB - Fix user si570 default frequency for zcu* boards - Cover SOM rev2 revision - Various DT changes - Add firmware and pinctrl support for tristate configuration (high impedance/output enable) - Add output-enable pins to SOMs - Fix distroboot prioritization in connection to available devices - Read bootscript address/flash address from DT - Fix pcap_prog address
2023-09-21zynqmp: config: Add proper dependencies for USBVenkatesh Yadav Abbarapu
When CONFIG_CMD_USB and CONFIG_USB are disabled, still some compilation errors are seen as below. In file included from include/configs/xilinx_zynqmp.h:173, from include/config.h:3, from include/common.h:16, from env/common.c:10: include/config_distro_bootcmd.h:302:9: error: expected '}' before 'BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB' 302 | BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ include/config_distro_bootcmd.h:302:9: note: in definition of macro 'BOOTENV_DEV_NAME_USB' 302 | BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ include/configs/xilinx_zynqmp.h:77:41: note: in expansion of macro 'BOOTENV_DEV_NAME' 77 | # define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) func(USB, usb, 1) | ^~~~ include/configs/xilinx_zynqmp.h:168:9: note: in expansion of macro 'BOOT_TARGET_DEVICES_USB' 168 | BOOT_TARGET_DEVICES_USB(func) \ | ^~~~~~~~~~~~~~~~~~~~~~~ include/config_distro_bootcmd.h:454:25: note: in expansion of macro 'BOOT_TARGET_DEVICES' 454 | "boot_targets=" BOOT_TARGET_DEVICES(BOOTENV_DEV_NAME) "\0" | ^~~~~~~~~~~~~~~~~~~ include/config_distro_bootcmd.h:474:9: note: in expansion of macro 'BOOTENV_BOOT_TARGETS' 474 | BOOTENV_BOOT_TARGETS \ | ^~~~~~~~~~~~~~~~~~~~ include/configs/xilinx_zynqmp.h:179:9: note: in expansion of macro 'BOOTENV' 179 | BOOTENV | ^~~~~~~ include/env_default.h:120:9: note: in expansion of macro 'CFG_EXTRA_ENV_SETTINGS' 120 | CFG_EXTRA_ENV_SETTINGS | ^~~~~~~~~~~~~~~~~~~~~~ In file included from env/common.c:32: include/env_default.h:27:36: note: to match this '{' 27 | const char default_environment[] = { | ^ scripts/Makefile.build:256: recipe for target 'env/common.o' failed make[1]: *** [env/common.o] Error 1 Makefile:1853: recipe for target 'env' failed make: *** [env] Error 2 make: *** Waiting for unfinished jobs.... Add CONFIG_USB_STORAGE as dependency for USB related macro's such as BOOT_TARGET_DEVICES_USB() and DFU_DEFAULT_POLL_TIMEOUT and CONFIG_THOR_RESET_OFF. Remove CONFIG_ZYNQMP_USB from Kconfig and also from defconfig since it is not used anywhere else. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20230904031528.11817-3-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21arm64: zynqmp: Update ECAM size to discover up to 256 busesThippeswamy Havalige
Update ECAM size to discover up to 256 buses Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Acked-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/087391c3e1f60b0a765fca081d47ce632fda8f06.1694441445.git.michal.simek@amd.com
2023-09-21arm64: zynqmp: Add resets property for CAN nodesSrinivas Neeli
Added resets property for CAN nodes. Signed-off-by: Srinivas Neeli <srinivas.neeli@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c4efb7ac361eec591a2f775e161ec446c4dc04c1.1694441445.git.michal.simek@amd.com
2023-09-21arm64: zynqmp: Fix i2c address for si570_user1 clockSaeed Nowshadi
Correct the i2c address for si570 oscillator that generates the si570_user1 clock. i2c address was changed by commit b6a8c603d680 ("arm64: zynqmp: Fix i2c addresses for vck190 SC") because address in node name wasn't aligned with reg property. But actual 0x5f address is correct which is quite rare because all other si570s are at 0x5d. Signed-off-by: Saeed Nowshadi <saeed.nowshadi@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/6f31881b0e2dd657f0d4ff0869c009c2e1224f22.1694441445.git.michal.simek@amd.com
2023-09-21arm64: versal: Add no-wp DT property in OSPI flash nodeAmit Kumar Mahapatra
Added no-wp DT property in OSPI flash node for all board dts & dtsi files on which the WP# signal of the OSPI flash device is not connected. If this property is set, then the software will avoid setting the status register write disable (SRWD) bit in status register during status register write operation. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/7e88dd7b9306bdf0738b2248bf9017e1997d25dc.1694441445.git.michal.simek@amd.com
2023-09-21arm64: zynqmp: Rename xlnx, mio_bank to xlnx, mio-bank for DLC21Michal Simek
xlnx,mio_bank was used in past but it was renamed to xlnx,mio-bank because '_' in property shoudln't be used. There is no impact on the platform because if the properly is not defined bank 0 is default. Bank 0 and 1 have the same configuration that's why there shouldn't be any issue. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ace68d4b7701d1606a85cb18242409fce941b363.1694441445.git.michal.simek@amd.com
2023-09-21arm64: zynqmp: Corrected pcap_prog register addressLukas Funke
Currently the pcap_prog struct variable is pointing to 0x3004 which is incorrect according to [1]. The variable should point to 0x3000. [1] https://www.xilinx.com/htmldocs/registers/ug1087/ug1087-zynq-ultrascale-registers.html#csu___pcap_prog.html Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com> Link: https://lore.kernel.org/r/20230915093901.1062825-1-lukas.funke-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21dm: core: ofnode: Add ofnode_read_bootscript_flash()Michal Simek
ofnode_read_bootscript_flash() reads bootscript address from /options/u-boot DT node. bootscr-flash-offset and bootscr-flash-size properties are read and values are filled. When bootscr-flash-size is not defined, bootscr-flash-offset property is unusable that's why cleaned. Both of these properties should be defined to function properly. Also add test to cover this new function. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/08a3e6c09cce13287c69ad370e409e7f1766b406.1693465465.git.michal.simek@amd.com
2023-09-21arm64: zynqmp: Add output-enable pins to SOMsNeal Frager
Now that the zynqmp pinctrl driver supports the tri-state registers, make sure that the pins requiring output-enable are configured appropriately for SOMs. Without it, all tristate setting for MIOs, which are not related to SOM itself, are using default configuration which is not correct setting. It means SDs, USBs, ethernet, etc. are not working properly. In past it was fixed through calling tristate configuration via bootcmd: usb_init=mw 0xFF180208 2020 kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio@ff0a000038 && \ gpio toggle gpio@ff0a000038 Signed-off-by: Neal Frager <neal.frager@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/7ecd98b2a302c5c6628e0234482f23c38e721fd6.1693492064.git.michal.simek@amd.com
2023-09-21dm: core: ofnode: Add ofnode_read_bootscript_address()Michal Simek
ofnode_read_bootscript_address() reads bootscript address from /options/u-boot DT node. bootscr-address or bootscr-ram-offset properties are read and values are filled. bootscr-address has higher priority than bootscr-ram-offset and the only one should be described in DT. Also add test to cover this new function. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/23be3838502efef61803c90ef6e8b32bbd6ede41.1693465140.git.michal.simek@amd.com
2023-09-21clk: Dont return error when assigned-clocks is empty or missingAshok Reddy Soma
There is a chance that assigned-clock-rates is given and assigned-clocks could be empty. Dont return error in that case, because the probe of the corresponding driver will not be called at all if this fails. Better to continue to look for it and return 0. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/a9a9d853e0ac396cd9b3577cce26279a75765711.1693384296.git.michal.simek@amd.com
2023-09-21dm: core: support reading a single indexed u64 valueMichal Simek
Add helper function to allow reading a single indexed u64 value from a device-tree property containing multiple u64 values, that is an array of u64's. Co-developed-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/08043c8d204d0068f04c27de86afe78c75c50b69.1692956263.git.michal.simek@amd.com
2023-09-21arm64: zynqmp: Add support for K26 rev2 boardsMichal Simek
Revision 2 is SW compatible with revision 1 but it is necessary to reflect it in model and compatible properties which are parsed by user space. Rev 2 has improved a power on boot reset and MIO34 shutdown glich improvement done via an additional filter in the GreenPak chip. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/6b9e68ebfb436da391daeb147f2a9985ac984c0c.1692951005.git.michal.simek@amd.com
2023-09-21arm64: zynqmp: Setup default si570 frequency to 156.25MHzMichal Simek
All si570 mgt chips have factory default 156.25MHz but DT changed it to 148.5MHz. After tracking it is pretty much c&p fault taken from Zynq zc702/zc706 boards where 148.5MHz was setup as default because it was requirement for AD7511 chip available on these boards. ZynqMP board don't contain this chip that's why factory default frequency can be used. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c052ddf39e392e97f87f1c57ea06f3508733c672.1692947486.git.michal.simek@amd.com
2023-09-21xilinx: Remove scriptaddr from config files and move it to DTMichal Simek
Define bootscript address in RAM via DT property and remove it from config file. Adding default value to common DTSI. Platform DT description can remove this property or rewrite it. In Zynq case scriptaddr property was defined twice for no reason. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d36ffeb00ed8f0ca4bb67d4983d1852d01ade637.1691067102.git.michal.simek@amd.com
2023-09-21xilinx: zynqmp: Extract aes operation into new fileChristian Taedcke
This moves the aes operation that is performed by the pmu into a separate file. This way it can be called not just from the shell command, but also e.g. from board initialization code. Signed-off-by: Christian Taedcke <christian.taedcke@weidmueller.com> Link: https://lore.kernel.org/r/20230725072658.16341-1-christian.taedcke-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-20riscv: dts: starfive: generate u-boot-spl.bin.normal.outHeinrich Schuchardt
The StarFive VisionFive 2 board cannot load spl/u-boot-spl.bin but needs a prefixed header. We have referring to a vendor tool (spl_tool) for this task. 'mkimage -T sfspl' can generate the prefixed file. Use binman to invoke mkimage for the generation of file spl/u-boot-spl.bin.normal.out. Update the documentation. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Tested-by: Milan P. Stanić <mps@arvanta.net>
2023-09-20riscv: set fdtfile on VisionFive 2Heinrich Schuchardt
Multiple revisions of the StarFive VisionFive 2 board exist. They can be identified by reading their EEPROM. Linux uses two differently named device-tree files. To load the correct device-tree we need to set $fdtfile to the device-tree file name that matches the board revision. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-09-19arm: dts: k3-am642: Sync with kernel v6.6-rc1Nishanth Menon
Sync device tree with v6.6-rc1 Signed-off-by: Nishanth Menon <nm@ti.com>
2023-09-19arm: dts: k3*: Use local header for SERDES MUX idle-state valuesNishanth Menon
The DTS uses constants for SERDES MUX idle state values which were earlier provided as bindings header. But they are unsuitable for bindings. So move these constants in a header next to DTS. NOTE: sync with v6.6-rc1 will bring in this change naturally. Signed-off-by: Nishanth Menon <nm@ti.com>
2023-09-19arm: dts: Introduce k3-serdes.h from v6.6-rc1Nishanth Menon
Introduce the new serdes header from kernel v6.6-rc1 The DTS uses constants for SERDES MUX idle state values which were earlier provided as bindings header. But they are unsuitable for bindings. So move these constants in a header next to DTS. Signed-off-by: Nishanth Menon <nm@ti.com>
2023-09-19arm: dts: k3-am625: Sync with kernel v6.6-rc1Nishanth Menon
Sync device tree with v6.6-rc1 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-09-19arm: dts: k3-pinctrl: Sync with kernel v6.6-rc1Nishanth Menon
Sync pinctrl header with v6.6-rc1 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-09-18am33xx: ignore return value from usb_ether_init()Trevor Woerner
In 2cb43ef1c223 ("usb: ether: Fix error handling in usb_ether_init") the error handling of usb_ether_init() was changed. Not a single other call site of this function checks its return value, therefore follow suit in the am33xx code. Do not cause the boot to halt if the usb gadget ethernet initialization fails: initcall sequence 9ffdbd84 failed at call 808024b9 (err=-19) ### ERROR ### Please RESET the board ### Signed-off-by: Trevor Woerner <twoerner@gmail.com> Reviewed-by: Michal Suchánek <msuchanek@suse.de>
2023-09-15board: usb: Replace legacy usb_gadget_handle_interrupts()Marek Vasut
The usb_gadget_handle_interrupts() is no longer used anywhere, replace the remaining uses with dm_usb_gadget_handle_interrupts() which takes udevice as a parameter. Some of the UDC drivers currently ignore the index parameter altogether, those also ignore the udevice and have to be reworked. Other like the dwc3_uboot_handle_interrupt() had to be switched from index to udevice look up to avoid breakage. Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # on khadas vim3 Signed-off-by: Marek Vasut <marex@denx.de>
2023-09-13phy: Set phy->dev to NULL when generic_phy_get_by_index_nodev() failsJonas Karlman
Generic phy helpers typically use generic_phy_valid() to determine if the helper should perform its function on a passed struct phy. generic_phy_valid() treat any struct phy having phy->dev set as valid. With generic_phy_get_by_index_nodev() setting phy->dev to a valid struct udevice early, there can be situations where the struct phy is returned as valid when initialization in fact failed and returned an error. Fix this by setting phy->dev back to NULL when any of the calls to of_xlate ops, device_get_supply_regulator or phy_alloc_counts fail. Also extend the dm_test_phy_base test with a test where of_xlate ops fail. Fixes: 72e5016f878d ("drivers: phy: add generic PHY framework") Fixes: b9688df3cbf4 ("drivers: phy: Set phy->dev to NULL when generic_phy_get_by_index() fails") Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-09-08Watchdog: Support WDIOF_CARDRESET on TI AM65x platformLi Hua Qian
To have the WDIOF_CARDRESET support for the TI AM65x platform watchdog, this patch reserves some memories, which indicate if the current boot due to a watchdog reset. Signed-off-by: Li Hua Qian <huaqian.li@siemens.com>
2023-09-08arm: dts: k3-j7*: ddr: Update to 0.10 version of DDR config toolNeha Malcom Francis
Update the DDR settings to those generated using 0.10 version of Jacinto 7 DDRSS Register Configuration tool. Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com>
2023-09-08arm: dts: Add k3-am625-beagleplayRobert Nelson
BeagleBoard.org BeaglePlay is an easy to use, affordable open source hardware single board computer based on the Texas Instruments AM625 SoC that allows you to create connected devices that work even at long distances using IEEE 802.15.4g LR-WPAN and IEEE 802.3cg 10Base-T1L. Expansion is provided over open standards based mikroBUS, Grove and QWIIC headers among other interfaces. This board family can be identified by the 24c32 eeprom: [aa 55 33 ee 01 37 00 10 2e 00 42 45 41 47 4c 45 |.U3..7....BEAGLE|] [50 4c 41 59 2d 41 30 2d 00 00 30 32 30 30 37 38 |PLAY-A0-..020078|] https://beagleplay.org/ https://git.beagleboard.org/beagleplay/beagleplay baseline of base device tree is v6.5-rc1. Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Signed-off-by: Robert Nelson <robertcnelson@gmail.com> Co-developed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-14 23:03:58 +0000