aboutsummaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)Author
2020-04-01ARM: dts: stm32: Repair ethernet operation on AV96Marek Vasut
The AV96 RGMII uses different pinmux for ETH_RGMII_TXD0, ETH_RGMII_RXD2 and ETH_RGMII_TX_CTL. Use the correct pinmux to make ethernet operational. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2020-04-01ARM: dts: stm32: Add alternate pinmux for ethernet RGMIIMarek Vasut
Add another mux option for DWMAC RGMII, this is used on AV96 board. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2020-04-01ARM: dts: stm32: Add configuration EEPROM on AV96Marek Vasut
The board has an EEPROM on the same I2C bus as PMIC, at address 0x53. The EEPROM contains the board MAC address. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Change-Id: I340a0675c11e4599968b2e3ef0515fb8da8d7b42
2020-04-01ARM: dts: stm32: Use DT alias for the configuration EEPROMMarek Vasut
Use DT /aliases node to establish a stable phandle to the configuration EEPROM. This permits the configuration EEPROM to be moved e.g. to a different address or a different bus. Adjust the board code to handle new phandle lookup. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2020-04-01ARM: dts: stm32: Add QSPI NOR on AV96Marek Vasut
The DH Electronics DHCOR SOM has QSPI NOR on the SoM itself, add it into the DT. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Change-Id: Ia7c454c496f50e3fc4851ec1154f3641c416e98e
2020-04-01ARM: dts: stm32: Repair SDMMC2 operationMarek Vasut
The eMMC uses different pinmux for the top four data lines, use such a pinmux, otherwise it takes a very long time until the test for 8bit operation times out. And this is the correct pinmux per schematic too. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2020-04-01ARM: dts: stm32: Add alternate pinmux for SDMMC2 pins 4-7Marek Vasut
Add another mux option for SDMMC2 pins 4..7, this is used on AV96 board. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2020-04-01ARM: dts: stm32: Repair SDMMC1 operation on AV96Marek Vasut
The SD uses different pinmux for the D123DIRline, use such a pinmux, otherwise there is a pinmux collision on the AV96. Add missing SD voltage regulator switch and enable SDR104 operation. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2020-04-01ARM: dts: stm32: Add alternate pinmux for SDMMC1 direction pinsMarek Vasut
Add another mux option for SDMMC1 direction pins, in particular SDMMC1_D123DIR, this is used on AV96 board. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2020-04-01ARM: dts: stm32: Repair SD1 pre-reloc pinmux DT node on AV96Marek Vasut
The sdmmc1_dir_pins_a: sdmmc1-dir-0 layout changed in commit 35a54d41d9d4 ("ARM: dts: stm32mp1: sync device tree with v5.2-rc4") such that pins{}; became pins1{};pins2{};, however the SPL extras were not updated to reflect that change. Fix this. This fixes booting from SD1 X9 slot on the AV96 board. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Fixes: 35a54d41d9d4 ("ARM: dts: stm32mp1: sync device tree with v5.2-rc4") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2020-03-18Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
- Revert "sunxi: psci: avoid error address-of-packed-member"
2020-03-18Revert "sunxi: psci: avoid error address-of-packed-member"Tomasz Duszynski
Using memcpy() for some MMIO access is generally frowned upon and might break things on some platforms. Allwinner H3, which fails to boot, being an example here. Moreover, fields being accessed are naturally aligned and warnings produced by GCC have been quiesced for some time already by: 53dc8ae ("gcc-9: silence 'address-of-packed-member' warning") That said, it should be okay to revert this commit. This reverts commit 9bd34a69a453d409792e08c00953ce8862145e65. Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Tomasz Duszynski <tduszyns@gmail.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-03-17riscv: Implement new SBI v0.2 extensionsBin Meng
Few v0.1 SBI calls are being replaced by new SBI calls that follows v0.2 calling convention. Implement the replacement extensions and few additional new SBI function calls that makes way for a better SBI interface in future. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-03-17riscv: Introduce a new config for SBI v0.1Bin Meng
We now have SBI v0.2 which is more scalable and extendable to handle future needs for RISC-V supervisor interfaces. Introduce a new config and move all SBI v0.1 code under that config. This allows to implement the new replacement SBI extensions cleanly and remove v0.1 extensions easily in future. Currently, the config is enabled by default. Once all M-mode software, with v0.1, is no longer in use, this config option and all relevant code can be easily removed. This commit is inspired from Linux kernel patch: https://patchwork.kernel.org/patch/11407361/ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-03-17riscv: Add SBI v0.2 extension definitionsBin Meng
Few v0.1 SBI calls are being replaced by new SBI calls that follows v0.2 calling convention. This patch just defines these new extensions. This commit is inspired from Linux kernel patch: https://patchwork.kernel.org/patch/11407359/ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-03-17riscv: Add basic support for SBI v0.2Bin Meng
The SBI v0.2 introduces a base extension which is backward compatible with v0.1. Implement all helper functions and minimum required SBI calls from v0.2 for now. All other base extension function will be added later as per need. As v0.2 calling convention is backward compatible with v0.1, remove the v0.1 helper functions and just use v0.2 calling convention. Add a new Kconfig options CONFIG_SBI for the new SBI v0.2 codes, and let CONFIG_SBI_IPI depend on it. This commit is inspired from Linux kernel patch: https://patchwork.kernel.org/patch/11407363/ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-03-17riscv: Mark existing SBI as v0.1 SBIBin Meng
As per the new SBI specification, current SBI implementation version is defined as 0.1 and will be removed/replaced in future. Each of the function call in 0.1 is defined as a separate extension which makes easier to replace them one at a time. Rename existing implementation to reflect that. This patch is just a preparatory patch for SBI v0.2 and doesn't introduce any functional changes. This commit is inspired from Linux kernel patch: https://patchwork.kernel.org/patch/11407355/ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-03-17riscv: Avoid calling sbi_clear_ipi()Bin Meng
There is no need for S-mode U-Boot to call sbi_clear_ipi() as it can be cleared directly from S-mode. This saves some cycles. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas@auer.io>
2020-03-17riscv: Fix sbi_remote_sfence_vma{,_asid}Bin Meng
Currently sbi_remote_sfence_vma{,_asid} does not pass their arguments to SBI at all, which is semantically incorrect. This keeps in sync with Linux kernel commit: a21344dfc6ad: fix sbi_remote_sfence_vma{,_asid} Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas@auer.io>
2020-03-12Merge tag 'u-boot-stm32-20200310' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - stm32mp: fix dependency for CONFIG_STM32_ETZPC
2020-03-10Merge tag 'mmc-2020-3-9' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini
- DM support for CAxxxx SoCs - eMMC board for presidio-asic - Add defer probe for mmc sdhci - TI SoCs mmc misc update
2020-03-10arm: mediatek: remove unused binman configSam Shih
The binman-option BINMAN_FDT is introduced by this commit: commit 3c10dc95bdd0 ("binman: Add a library to access binman entries") BINMAN_FDT being selected when BINMAN=y that resulting in mt7623 and mt7622 are unable to boot. The root cause of this issue is commit: commit cbd2fba1eca1 ("arm: MediaTek: add basic support for MT7629 boards") select BINMAN=y in all mediatek SoCs, and others mediatek SoCs not expect to use BINMAN_FDT. This patch remove BINMAN=y option when ARCH_MEDIATEK=y and move this to the specify SoCs part config. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-03-10stm32mp: update dependency for STM32_ETZPCPatrick Delaunay
Correct the dependency for STM32 ETZPC protection, linked to SOC STM32MP identified by CONFIG_STM32MP15x and not linked to CONFIG_TARGET_STM32MP1 (no more existing). This patch fix an issue introduced by commit 846254888e2e ("stm32mp1: split board and SOC support for STM32MP15x family"). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-10arm: dts: imx8mq-evk: add phy-reset-gpios for fec1Alifer Moraes
Instead of resetting the ethernet phy through functions in imx8mq_evk.c, let the driver reset the phy via dts description adding a reset duration of 10 ms following atheros 8031's datasheet recommendation. Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
2020-03-09ARM: dts: imx8mm-verdin: drop rgmii_rxc_dly/txc_dlyMax Krummenacher
The FEC in the i.MX8MM doesn't support this feature. So don't pretend one can use it. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-03-09ARM: dts: imx8mm-verdin: dm-spl for pinctrl_usdhc1 nodeIgor Opaniuk
Let pinctrl configuration for eMMC node (usdhc1) also be accessible in SPL. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-03-09imx8mm/mn: Add missing root clock entry for ARM core clockFrieder Schrempf
The current implementation in arch/arm/mach-imx/cpu.c uses non-DM code to retrieve the core clock frequency. As the root clock is not listed we currently get: CPU: Freescale i.MX8MMQ rev1.0 at 0 MHz Fix this by adding the missing entry, which results in: CPU: Freescale i.MX8MMQ rev1.0 at 1200 MHz Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-03-09imx: Makefile: added missing ahab.oOliver Graute
added missing ahab.o in Makefile Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-03-09imx: mx6ul_14x14_evk: configure for 24bpp displayAnatolij Gustschin
Before DM_VIDEO conversion this board used 24bpp display configuration, so use it again. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-03-09ARM: dts: imx6sx-sdb: Sync with kernel 5.4.16Fabio Estevam
Sync the imx6sx-sdb dts files with kernel 5.4.16. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-03-09ARM: dts: imx6sx: Sync with kernel 5.4.16Fabio Estevam
Sync the imx6sx dts files with kernel 5.4.16. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-03-09imx: remove woodburn boardStefano Babic
Board is not longer used, remove it. Signed-off-by: Stefano Babic <sbabic@denx.de>
2020-03-09arm: dts: k3-j721e-r5-common-proc-board: Use unique names for dummy clocksFaiz Abbas
Update the dummy clock names to use unique identifiers. Otherwise the previous node just gets overwitten by the next one with the same name. This fixes eMMC boot not working on J721e-evm. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-03-09arm: K3: sysfw-loader: Add a config_pm_pre_callback()Faiz Abbas
System firmware does not guarantee that clocks going out of the device will be stable during power management configuration. There are some DCRC errors when SPL tries to get the next stage during eMMC boot after sysfw pm configuration. Therefore add a config_pm_pre_callback() to switch off the eMMC clock before power management and restart it after it is done. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09spl: mmc: Fix spl_mmc_get_uboot_raw_sector() implementationFaiz Abbas
The call to spl_mmc_get_uboot_raw_sector() completely ignores and overwrites the raw_sect value passed from the caller of spl_mmc_load(). Fix this by passing raw_sect to the function and returning the same value in the default case. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09mmc: am654_sdhci: Update output tap delay writesFaiz Abbas
With the latest RIOT, there is a different otap delay value for each speed mode. Add a new binding with every supported speed mode. Also disable a given speed mode in the host caps if its corresponding otap-del-sel is not present. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-05x86: apl: Use cpu_x86_get_count() for cpu_ops.get_countWolfgang Wallner
Use cpu_x86_get_count() to read the number of cores. cpu_x86_get_count() reads the number of CPUs from the device tree. Using this function we can support multiple Apollo Lake variants, e.g.: E3940 (4 cores) and E3930 (2 cores). This was tested on the E3940 and E3930 Apollo Lake variants. Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05x86: cpu_x86: Make cpu_x86_get_count() non-staticWolfgang Wallner
The function cpu_x86_get_count() is also useful for other modules. Make it non-static and add a prototype + description. Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05x86: p2sb: Drop 'apl' prefixWolfgang Wallner
Drop the Apollo Lake prefix 'apl' from the functions, types and variables in the P2SB driver. The P2SB is not Apollo Lake specific, and as such it was moved in commit 2999846c1127 ("x86: Move P2SB from Apollo Lake to a more generic location") from the Apollo Lake folder to the intel_common folder. Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05Revert "x86: use invd instead of wbinvd in real mode start code"Andy Shevchenko
This reverts commit 0d67fac29f3187e67f4fd3ef15f73e91be2fad12. As real hardware testing (*) shows the above mentioned commit breaks U-Boot on it. Revert for the upcoming release. We may get more information in the future and optimize the code accordingly. (*) on Intel Edison board. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fix a typo in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05x86: Correct error return value in mrccache_get_region()Simon Glass
This function doesn't use uclass_find_first_device() correctly. Add a check that the device is found so we don't try to read properties from a NULL device. The fixes booting on minnoxmax. Fixes: 87f1084a630 ("x86: Adjust mrccache_get_region() to use livetree") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-04Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- ABB SECU board - Assorted minor fixes
2020-03-03ARM: socfpga: Add initial support for the ABB SECU boardHolger Brunck
Add initial support for the ABB SECU board, which is an ArriaV-based SoCFPGA system with ethernet and booting from Denali NAND. Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-02-29Merge tag 'uniphier-v2020.04-3' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier UniPhier SoC updates for v2020.04 (3rd) - Enable ADMA and HS400 for the eMMC driver on 64-bit SoCs - Add some convenient environment variables to handle SD card - Sanitize the NAND controller reset sequence and its WP handling - Sync DT with Linux
2020-02-29ARM: dts: uniphier: remove U-Boot own EEPROM compatible and propertyMasahiro Yamada
The compatible string "i2c-eeprom" is U-Boot own compatible, which has never been approved by the DT community. "u-boot,i2c-offset-len" is also a U-Boot own hack. Linux adds "atmel,*" as generic compatibles, and U-Boot also followed it by commit d7e28918aa3f ("i2c_eeprom: Add reading support"). The U-Boot own hack is no longer needed. Just sync with Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-29ARM: dts: uniphier: add reset-names to NAND controller nodeMasahiro Yamada
Import Linux commits: 37f3e0096f71 ("ARM: dts: uniphier: add reset-names to NAND controller node") e98d5023fe1f ("arm64: dts: uniphier: add reset-names to NAND controller node") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-29ARM: dts: uniphier: rename DT nodes to follow json-schemaMasahiro Yamada
Import the nodename changes I made in Linux for avoiding dt-schama warnings. This follows the $nodename patterns in the dt-schema. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-28watchdog: mpc8xx: Revert the 8xx watchdog back to CONFIG_HW_WATCHDOGChristophe Leroy
Commit f3729ba6e7b2 ("watchdog: mpc8xx_wdt: Watchdog driver and macros cleanup") switched the watchdog to CONFIG_WATCHDOG. But this is not compatible with the 8xx because it starts the watchdog HW timer at reset and must be serviced from the very beginning including while U-boot is executed in the firmware before relocation in RAM. Select CONFIG_HW_WATCHDOG and make hw_watchdog_reset() visible. Meanwhile, finalise the cleanup of arch/powerpc/cpu/mpc8xx/Kconfig by removing the lines put in comment in that commit, and also remove again the selection of CONFIG_MPC8xx_WATCHDOG which was removed by that commit and brought back by mistake by commit b3134ffbd944 ("watchdog: Kconfig: Sort entry alphabetically") Note that there was an 'imply WATCHDOG' in the original commit but it disappeared in the Kconfig alphabetical sorting, so no need to remove it here. Fixes: f3729ba6e7b2 ("watchdog: mpc8xx_wdt: Watchdog driver and macros cleanup") Fixes: b3134ffbd944 ("watchdog: Kconfig: Sort entry alphabetically") Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Cc: Stefan Roese <sr@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Stefan Roese <sr@denx.de>
2020-02-28ARM: uniphier: detect the base of micro support card at run-timeMasahiro Yamada
The base address 0x43f00000 is no longer true for the future SoC. Extract the base address from the device tree. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-28ARM: uniphier: remove workaround for the NAND write protectMasahiro Yamada
This workaround was previously needed for LD4, Pro4, sLD8, Pro5 SoCs. The boot ROM does not touch this register for PXs2/LD6b or later. Now that the reset signal of the Denali NAND controller is always asserted in board_init() then deasserted in the driver, the WRITE_PROTECT register gets back to the default value, which means the write protect is deasserted. This workaround can go away entirely. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-11 13:25:33 +0000