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2019-08-12powerpc/km: remove unmaintained target KMVECT1Holger Brunck
Signed-off-by: Valentin Longchamp <valentin.longchamp@ch.abb.com> Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-08-12km/uart: port UART interface of KM Kirkwood boards to driver modelPascal Linder
Activate the driver model for the serial interface in the KM Kirkwood Kconfig file. The associated preprocessor definitions could be removed from the header file. However, the clock of 200 MHz needs to be declared in the device tree. Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch> Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-08-10Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- R8A77980 V3H support
2019-08-09Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- Enable SD slot on Intel Edison - Populate CSRT ACPI table for shared DMA controller on Intel Tangier - Convert Intel ICH-SPI driver to use new spi-mem ops - Enable config_distro_bootcmd for QEMU x86 - Support U-Boot as a payload for Intel Slim Bootloader - Avoid writing temporary asl files into the source tree which fixes the parallel build issue occasionally seen
2019-08-09ARM: renesas: Add R8A77980 V3H Condor board codeMarek Vasut
Add board code for the R8A77980 V3H Condor board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09ARM: renesas: Add R8A77980 V3H platform codeMarek Vasut
Add a few bits of platform code to support R8A77980 V3H SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09ARM: dts: renesas: Add R8A77980 V3H DTs and headersMarek Vasut
Import R8A77980 V3H DTs and headers from Linux 5.2.7 , commit 5697a9d3d55f. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09apalis-tk1: support v1.2 hardware revisionMarcel Ziswiler
Support the V1.2 hardware revision with the following pin muxing changes: Ddc_scl_pv4 and ddc_sda_pv5 previously used as Apalis GPIO3 and GPIO4 are now used as DDC pins. Gen2_i2c_scl_pt5 and gen2_i2c_sda_pt6 previously used as DDC pins are now used as USB power enable signals. Usb_vbus_en0_pn4 and usb_vbus_en1_pn5 previously used as USB power enable signals are now used as GPIO3 and GPIO4. Additionally a new device tree file tegra124-apalis-v1.2-eval.dtb is loaded on V1.2 and later modules and resp. USB power enable signals activated. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09apalis-tk1: remove non-essential power rails on bootDominik Sliwa
When mainline kernels reboot TK1 they use SW_RESET, that reset mode does not reset PMIC. Some rails need to be off for RAM Re-repair to work correctly. Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09apalis-tk1/t30: colibri_t30: display reset reasonDominik Sliwa
Display proper reset reason after the SoC info. Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09x86: Skip setting up MTRRs in slimbootloaderPark, Aiden
The setting up MTRRs have already been done in previous Slim Bootloader stages. Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09x86: slimbootloader: Add a slimbootloader device treePark, Aiden
Add a new device tree which has very minimum nodes - x86 reset - x86 tsc_timer - x86 pci - Slim Bootloader serial Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09x86: slimbootloader: Set TSC information for tsc_timerPark, Aiden
Slim Bootloader already calibrated TSC and provides it to U-Boot. Therefore, U-Boot does not have to re-calibrate TSC. Configuring tsc_base and clock_rate makes x86 tsc_timer driver bypass TSC calibration and use the provided TSC frequency. - Get TSC frequency from performance info hob - Set tsc_base and clock_rate for tsc_timer driver Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09x86: slimbootloader: Add serial driverPark, Aiden
Slim Bootloader provides serial port info thru its HOB list pointer. All these HOBs are eligible for Slim Bootloader based board only. - Get serial port information from the serial port info HOB - Leverage ns16550 driver with slimbootloader specific platform data Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09x86: slimbootloader: Add memory configurationPark, Aiden
Slim Bootloader provides memory map info thru its HOB list pointer. Configure memory size and relocation memory from the HOB data, and provide e820 entries as well. - Get memory size from the memory map info HOB - Set available top memory lower than 4GB for U-Boot relocation - Provide e820 entries from the memory map info HOB Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09x86: Add a common HOB libraryPark, Aiden
FSP (CONFIG_HAVE_FSP) and Slim Bootloader (CONFIG_SYS_SLIMBOOTLOADER) consume HOB (CONFIG_USE_HOB) data from the each HOB list pointer. Add a common HOB library in lib/hob.c and include/asm/hob.h. Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09x86: lib: fsp: Use EFI_GUID and efi_guid_tPark, Aiden
Use existing EFI_GUID and efi_guid_t instead of struct efi_guid. This is pre-work before making a common HOB library. - Change 'struct efi_guid' to efi_guit_t - Remove 'struct efi_guid' - Define GUIDs with EFI_GUID() macro - Use guidcmp() instead of compare_guid() - Remove compare_guid() Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested on MinnowMax Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09x86: Add new slimbootloader CPU typePark, Aiden
This slimbootloader CPU type is to enable U-Boot as a payload which runs on top of Slim Bootloader (https://github.com/slimbootloader). The Slim Bootloader is designed with multi-stage architecture for the execution from reset vector to OS booting, and supports QEMU, Apollolake, Whiskeylake and Coffeelake platforms consuming Intel FSP (https://github.com/IntelFsp) for silicon initialization including CAR and memory initialization. The Slim Bootloader generates new HOB (Hand Off Block) which are serial port info, memory map info, performance data info and so on, and passes it to a Payload. U-Boot as a payload will use these HOB information for basic initialization such as serial console. As an initial commit, - Add CONFIG_SYS_SLIMBOOTLOADER to enable slimbootloader CPU type - Add new arch/x86/cpu/slimbootloader directory with minimum codes - Get hob_list pointer from Slim Bootloader Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09x86: tangier: Populate CSRT for shared DMA controllerAndy Shevchenko
Intel Tangier has a shared DMA controller that, according to Microsoft spec, has to be presented in CSRT table. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09x86: acpi: Enable ACPI companion for Intel iDMA 32-bitAndy Shevchenko
ACPI has a capability to specify DMA parameters for DMA channel consumers. To enable this for Intel Edison, describe GP DMA device in ACPI table in order to get an ACPI handle to it in OS. This works in conjunction with CSRT, which must be in align with DSDT. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09x86: acpi: Introduce a stub to generate CSRTAndy Shevchenko
Here is a stub function that generates an empty CSRT. If the target platform provides acpi_fill_csrt() function, it will be used to populate the table. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09x86: acpi: Add CSRT descriptionAndy Shevchenko
Add CSRT [1] description as it provided in Linux kernel. [1]: http://www.uefi.org/sites/default/files/resources/CSRT%20v2.pdf Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09x86: edison: Enable SD slotAndy Shevchenko
Enable SD slot on Intel Edison platform. By default firmware doesn't put device on active state. Thus, we have to do this explicitly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09Merge tag 'u-boot-rockchip-20190809' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Add rk3399 boards Khadas Edge/-V/-Captain - Add fully souce code support for rk3328 including TPL/DRAM init - Enable boot from eMMC for rk3399 rock960/ficus boards - turn on the IO supply for dw_mmc
2019-08-08Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- Remove unused bcm2835 watchdog driver (still non-DM) - Cosmetic fixup of mtk_wdt.c
2019-08-07ARM: dts: add hifsys reset for MediaTek SoCsRyder Lee
This adds missing hifsys reset parts in header files. Tested-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
2019-08-07arm: dts: change MT7629 to use spi-mem rather than qspiWeijie Gao
The original mtk_qspi driver has been removed. We change MT7629 to use newly added mtk-spimem driver. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-08-05rockchip: Kconfig: enable TPL support for rk3328Kever Yang
Enable TPL support and some related option in Kconfig. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> [cherry picked from commit https://github.com/rockchip-linux/u-boot/commit/430b01462bf3f24aaf7920ae2587a6943c39ab5d with minor modifications] Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-05rockchip: dts: rk3328: update dmc node for driverKever Yang
Update dmc node for full feature driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> [cherry picked from commit https://github.com/rockchip-linux/u-boot/commit/1e1495636574c78ea9d3af3e0aae95d5204612d6 with minor modifications] Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-05rockchip: ram: add full feature rk3328 DRAM driverKever Yang
This driver supports DDR3/LPDDR3/DDR4 SDRAM initialization. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> [cherry picked from commit https://github.com/rockchip-linux/u-boot/commit/9fb0777ec3cc6a89af9d2e0969c3bfe58306a88d with minor modifications] Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-05rockchip: dts: rk3328: Add rk3328-evb-u-boot.dtsiMatwey V. Kornilov
Split u-boot specific dts configuration to separate rk3328-evb-u-boot.dtsi Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-05arm: dts: ficus: Enable booting from eMMC when using SPLManivannan Sadhasivam
This commits enables booting from eMMC when using SPL on 96Boards Ficus board by adding SDHCI to boot order. Since the SDHCI driver already has the reloc flag, this works straightaway. While we are at it, let's also include the common u-boot dtsi for rk3399. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-05arm: dts: rock960: Enable booting from eMMC when using SPLManivannan Sadhasivam
This commits enables booting from eMMC when using SPL on 96Boards Rock960 board by adding SDHCI to boot order. Since the SDHCI driver already has the reloc flag, this works straightaway. While we are at it, let's also include the common u-boot dtsi for rk3399. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-05arm64: dts: rockchip: Add support for Khadas Edge-CaptainNick Xie
Add devicetree support for Khadas Edge-Captain. Khadas Captain is the carrier board for Khadas Edge. Specification - Rockchip RK3399 - Dual-Channel 2GB/4GB LPDDR4 - SD card slot - Onboard 16GB/32GB/128GB eMMC - RTL8211FD 1Gbps - AP6356S/AP6398S WiFI/BT - HDMI Out, DP, MIPI DSI/CSI, eDP - USB 3.0, 2.0 - USB Type C power and data - GPIO expansion ports - Full 4 Lane M.2 Socket - 16MB SPI Flash - IR - Programmable MCU Commit details of rk3399-khadas-edge-*.dts sync from Linux 5.3-rc2: "arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards" (sha1: c2aacceedc86af87428d998e23a1aca24fd8aa2e) Signed-off-by: Nick Xie <nick@khadas.com> Tested-by: Chris Webb <chris@arachsys.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-05arm64: dts: rockchip: Add support for Khadas Edge-VNick Xie
Add devicetree support for Khadas Edge-V. Khadas Edge-V is a Khadas VIM form factor Rockchip RK3399 board. Specification - Rockchip RK3399 - Dual-Channel 2GB/4GB LPDDR4 - SD card slot - Onboard 16GB/32GB/128GB eMMC - RTL8211FD 1Gbps - AP6356S/AP6398S WiFI/BT - HDMI Out, DP, MIPI DSI/CSI, eDP - USB 3.0, 2.0 - USB Type C power and data - GPIO expansion ports - Full 4 Lane M.2 Socket - 16MB SPI Flash - IR - Programmable MCU Commit details of rk3399-khadas-edge-*.dts sync from Linux 5.3-rc2: "arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards" (sha1: c2aacceedc86af87428d998e23a1aca24fd8aa2e) Signed-off-by: Nick Xie <nick@khadas.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-05arm64: dts: rockchip: Add support for Khadas EdgeNick Xie
Add devicetree support for Khadas Edge. Khadas Edge is an expandable Rockchip RK3399 board with goldfinger. Specification - Rockchip RK3399 - Dual-Channel 2GB/4GB LPDDR4 - Onboard 16GB/32GB/128GB eMMC - RTL8211FD 1Gbps - AP6356S/AP6398S WiFI/BT - HDMI Out, DP - USB 3.0, 2.0 - USB Type C power and data - 16MB SPI Flash - Programmable MCU Commit details of rk3399-khadas-edge-*.dts sync from Linux 5.3-rc2: "arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards" (sha1: c2aacceedc86af87428d998e23a1aca24fd8aa2e) Signed-off-by: Nick Xie <nick@khadas.com> Tested-by: Chris Webb <chris@arachsys.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-05rockchip: rk3328: enable DMA for MMCs at Rock64Matwey V. Kornilov
DMA for MMCs can be enabled, since the previous patch fixes the following issue in SPL: Trying to boot from MMC1 spl: mmc init failed with error: -110 SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-05rockchip: rk3328: set DDR as non-secure in SPLKever Yang
Set DDR as non-secure so that MMC DMA can access. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> [cherry picked from https://github.com/rockchip-linux/u-boot/commit/bfe741ab9eb4f97371a4e6c24185419d57a3a75f and https://github.com/rockchip-linux/u-boot/commit/73d952acc8cc1ddad6652ba71895d9fe928c1e4b with minor modifications] Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-05watchdog: bcm2835_wdt: Remove unused BCM283x watchdog driver and its referencesStefan Roese
The BCM2835/2836 watchdog is not used in mainline U-Boot at all. This patch removes the driver and its references (CONFIG_BCM2835_WDT) completely. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Paolo Pisati <p.pisati@gmail.com>
2019-07-31Merge tag 'u-boot-amlogic-20190731' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - sync Amlogic G12A DT with linux 5.3-rc1 - add support for 4GiB DRAM memory - add support for Amlogic G12B based Odroid-N2 - small duplicate logic fix for gxbb clock driver
2019-07-31ARM: dts: da850-evm: Fix MDIO pinmuxAdam Ford
In attempts to speed up SPL and reduce size, the MDIO pin muxing was inadvertently affected. Since the ethernet driver will setup the pin muxing when ethernet is loaded, this patch will also pinmux the MDIO pins at the same time. Once an DM compatible MDIO driver is available, this can be removed. Fixes: 877ab2423bc2 ("ARM: davinci: da850: Manual pinmux only when PINCTRL not available") Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-31arm: dts: k3-am654-base-board: Fix cpsw_nuss power-domains propertySuman Anna
The commit 355be915ed08 ("arm: dts: k3-am654: Update power-domains property for each node") has updated the power-domain cells value and updated power-domains property in various existing dts nodes but missed updating the cpsw_nuss node. This results in the following build warning, fix this. arch/arm/dts/k3-am654-base-board.dtb: Warning (power_domains_property): /interconnect@100000/interconnect@28380000/cpsw_nuss@046000000:power-domains: property size (8) too small for cell size 2 arch/arm/dts/k3-am654-r5-base-board.dtb: Warning (power_domains_property): /interconnect@100000/interconnect@28380000/cpsw_nuss@046000000:power-domains: property size (8) too small for cell size 2 Fixes: 355be915ed08 ("arm: dts: k3-am654: Update power-domains property for each node") Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-31omap: Correct the fastboot product varSam Protsenko
"fastboot flashall" expects "fastboot getvar product" value to be one of values provided in android-info.txt file (in AOSP), from "require board=" list. Before this patch, "am57xx" is returned for all AM57xx based boards, as it's set in $board env var from SYS_BOARD in board/ti/am57xx/Kconfig file, which is used for default implementation of "fastboot getvar product". In order to fix that inconsistency, let's do next: 1. In U-Boot: override fastboot.product, reusing the value from $board_name 2. In AOSP: provide values for all AM57xx boards we can use to device/ti/beagle_x15/board-info.txt file This way requirements check in "fastboot flashall" will work as expected, verifying that user tries to flash images to the board which those images were built for. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Acked-by: Andrew F. Davis <afd@ti.com>
2019-07-31ARM: meson-g12a: Handle 4GiB DRAM sizeNeil Armstrong
When configured with 4GiB DRAM size, only 3.8GiB is available, the I/O beeing mapped in the last 256MiB of the first 4GiB physical memory/ First fixup the mm_region to handle the first 3.8GiB as memory and the last 256MiB as I/O. Then limit the real memory reported by the firmware to the available physical space, 3.8GiB aligned with the mm_region memory zone size. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Mark Kettenis <kettenis@openbsd.org>
2019-07-31ARM: dts: add support for Odroid-N2Neil Armstrong
Import HardKernel Odroid-N2 DT from Linux 5.3-rc1, commit 5f9e832c1370 ("Linus 5.3-rc1") based on an Amlogic G12B S922X SoC. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Mark Kettenis <kettenis@openbsd.org>
2019-07-31ARM: dts: Sync Amlogic G12A with Linux 5.3-rc1Neil Armstrong
Sync the Amlogic Meson G12A DT and Bindings file with the Linux 5.3-rc1 from the commit 5f9e832c1370 ("Linus 5.3-rc1"). Also remove the meson-g12a-u-boot.dtsi and meson-g12a-u200-u-boot.dtsi, now conflicting with the main DT content. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Mark Kettenis <kettenis@openbsd.org>
2019-07-30Merge tag 'xilinx-for-v2019.10' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx/FPGA changes for v2019.10 fpga: - Xilinx virtex2 cleanup - Altera cyclon2 cleanup zynq: - Minor Kconfig cleanup - Add psu_init configuration for Z-turn board zynqmp: - Add support for pmufw config passing to PMU - script for psu_init conversion - zcu1275 renaming xilinx: - Add support for UltraZed-EV SoM
2019-07-30Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
2019-07-30arm64: zynqmp: add support for Avnet UltraZed-EV Starter KitLuca Ceresoli
Avnet UltraZed-EV Starter Kit is composed by the UltraZed-EV SoM and the only publicly-available compatible carrier card. The SoM is based on the EV version of the Xilinx ZynqMP SoC+FPGA. The psu_init_gpl.c file has been generated from the board definition files at [0] using Vivado 2018.3 and then minimized by tools/zynqmp_psu_init_minimize.sh. Manually removed serdes init code since it is not mentioned in device tree and fixed a checkpatch error. [0] https://github.com/Avnet/bdf/tree/3686c9ff7d2f0467fb4fcf39f861b8d6ff183b12/ultrazed_7ev_cc/1.1 Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30arm64: zynqmp: spl: install a PMU firmware config object at runtimeLuca Ceresoli
Optionally allow U-Boot to load a configuration object into the Power Management Unit (PMU) firmware on Xilinx ZynqMP. The configuration object is required by the PMU FW to enable most SoC peripherals. So far the only way to boot using U-Boot SPL was to hard-code the configuration object in the PMU firmware. Allow a different boot process, where the PMU FW is equal for any ZynqMP chip and its configuration is passed at runtime by U-Boot SPL. All the code for Inter-processor communication with the PMU is isolated in a new file (pmu_ipc.c). The code is inspired by the same feature as implemented in the Xilinx First Stage Bootloader (FSBL) and Arm Trusted Firmware: * https://github.com/Xilinx/embeddedsw/blob/fb647e6b4c00f5154eba52a88b948195b6f1dc2b/lib/sw_apps/zynqmp_fsbl/src/xfsbl_misc_drivers.c#L295 * https://github.com/ARM-software/arm-trusted-firmware/blob/c48d02bade88b07fa7f43aa44e5217f68e5d047f/plat/xilinx/zynqmp/pm_service/pm_api_sys.c#L357 SPL logs on the console before loading the configuration object: U-Boot SPL 2019.07-rc1-00511-gaec224515c87 (May 15 2019 - 08:43:41 +0200) Loading PMUFW cfg obj (2008 bytes) EL Level: EL3 ... Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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