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2024-04-18ARM: dts: renesas: Stop using the -u-boot DTs for buildMarek Vasut
The U-Boot build system can automatically paste -u-boot.dtsi at the end of matching .dts during build. Stop emulating this behavior and rename the -u-boot.dts files to -u-boot.dtsi, drop "#include...dts" from those new u-boot.dtsi files, and update board configuration accordingly. The rename, '#include...dts` scrubbing and configuration update has been done using the following script: ``` $ find . -name r[78]\*-u-boot.dts | sort -u | while read line ; do \ git mv ${line%-u-boot.dts}-u-boot.dts ${line%-u-boot.dts}-u-boot.dtsi ; \ done $ sed -i '/^#include.*dts"/ d' `find . -name r[78]\*-u-boot.dtsi` $ sed -i 's@-u-boot@@g' `git grep -li renesas configs` ``` The Salvator-X and ULCB board files have been updated manually. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Acked-by: Adam Ford <aford173@gmail.com>
2024-04-15arm: socfpga: arria10: add option to reprogram the FPGA every rebootMichał Barnaś
Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10. This option allows to change the bitstream on the filesystem and apply changes with warm reboot without the need for a power cycle. Signed-off-by: Michał Barnaś <barnas@google.com>
2024-04-12Merge patch series "Introduce ICSSG Ethernet driver"Tom Rini
MD Danish Anwar <danishanwar@ti.com> says: Introduce ICSSG PRUETH support in uboot. The ICSSG driver is used in TI AM654 SR2.0. The ICSSG PRU Sub-system runs on EMAC firmware. This series Introduces support for ICSSG driver in uboot. This series has been tested on AM65x SR2.0, and the ICSSG interface is able to ping / dhcp and boot kernel using tftp in uboot. To use ICSSG2 ethernet, the ICSSG firmware needs to be loaded to PRU RPROC cores and RPROC cores need to be booted with the firmware. This step is done inside driver similar to kernel. The remoteproc driver uses request_fw_into_buf() API from fs-loader driver to load and start rproc with the required firmwares. This series only introduces driver files. The device tree and config changes to enable ICSSG driver will be introduced later.
2024-04-12net: ti: icssg: Add ICSSG ethernet driverMD Danish Anwar
This is the PRUSS Ethernet driver for TI AM654 SR2.0 and later SoCs with the ICSSG PRU Sub-system running EMAC firmware. ICSSG Subsystem supports two slices per instance. This driver caters to both slices / ports of the icssg subsystem. Since it is not possible for Ethernet driver to register more than one port for a given instance, this patch introduces top level PRUETH as UCLASS_MISC and binds UCLASS_ETH to individual ports in order to support bringing up more than one Ethernet interface in U-Boot. Since top level driver is UCLASS_MISC, board files would need to instantiate the driver explicitly. Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
2024-04-12ARM: uniphier: Move uniphier_mem_map_init() call into dram_init()Kunihiko Hayashi
The function uniphier_mem_map_init() is to change global variable 'mem_map', which is referenced to get_page_table_size() to calculate the size of page table. However, uniphier_mem_map_init() is called after get_page_table_size(), so the size of page table and 'mem_map' become inconsist each other. After all, U-Boot fails to boot on chip with memory map different from default map, uniphier_mem_map_init() should be moved to dram_init(), which is called before get_page_table_size(). Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
2024-04-12sandbox: improve description of CONFIG_SANDBOX_CRASH_RESETHeinrich Schuchardt
Mentions that command line option --signal is needed to make use of this configuration option. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-04-12sandbox: move sandbox specifics to booti_setup()Heinrich Schuchardt
Instead of checking a configuration setting in booti_start() adjust the sandbox implementation of booti_setup(). Write a console message when trying to run the booti command on the sandbox indicating that it is not supported. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-04-12sandbox: missing return value checks in eth-raw-osHeinrich Schuchardt
We should check the return value of fcntl(). Addresses-Coverity-ID: 131108 ("Unchecked return value from library") Addresses-Coverity-ID: 131109 ("Unchecked return value from library") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-04-11arm: mach-k3: am625: Provide a way to obtain boot device for non SPLsWadim Egorov
Introduce get_boot_device() to obtain the booting device. Make it also available for non SPL builds so u-boot can also know the device it is booting from. Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2024-04-11arm: mach-k3: am625: copy bootindex to OCRAM for main domain SPLWadim Egorov
Relocate booindex to OCRAM region after it gets opened by TIFS so the main domain bootloaders can have access to this data. Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2024-04-11arm: dts: k3: binman: am625: add support for signing TIFSSTUB ImagesKamlesh Gurudasani
Add support for signing of TIFSSTUB images for HSSE, HSFS and GP devices and include them in tispl.bin and tispl.bin_unsigned. Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2024-04-11arm: mach-k3: add support for detecting TIFSSTUB imagesKamlesh Gurudasani
Add support for detecting and processing TIFSSTUB images for HS, HSFS and GP devices. TIFSSTUB image for related device type will be loaded, rest TIFSSTUB images will be discarded. Example, for GP device, tifsstub-gp will be loaded, tifsstub-hs and tifsstub-fs will be discarded. Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2024-04-11verdin-am62: move verdin am62 to OF_UPSTREAMMarcel Ziswiler
Move verdin-am62 to OF_UPSTREAM: - handle the fact that dtbs now have a 'ti/' prefix - imply OF_UPSTREAM - remove redundant files from arch/arm/dts leaving only the *-u-boot.dtsi files - update MAINTAINERS file Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2024-04-11arm: dts: k3: Remove unneeded ti, sci-sysreset binding and nodesAndrew Davis
This extra binding is non-standard and now unneeded as we bind the sysreset driver automatically. This matches what is done in Linux and allows us to more closely match the DTBs. Remove the binding and all users. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Tested-by: Jonathan Humphreys <j-humphreys@ti.com>
2024-04-11arm: mach-k3: common: EFI loader map memory below ram topVitor Soares
During the boot, the EFI loader maps the memory from ram_top to ram_end as EFI_BOOT_SERVICES_DATA. When LMB does boot_fdt_add_mem_rsv_regions() to OPTEE, TFA, R5, and M4F DMA/memory "no-map" for the kernel it produces the following error message: ERROR: reserving fdt memory region failed (addr=9cb00000 size=100000 flags=4) ERROR: reserving fdt memory region failed (addr=9cc00000 size=e00000 flags=4) ERROR: reserving fdt memory region failed (addr=9da00000 size=100000 flags=4) ERROR: reserving fdt memory region failed (addr=9db00000 size=c00000 flags=4) ERROR: reserving fdt memory region failed (addr=9e780000 size=80000 flags=4) ERROR: reserving fdt memory region failed (addr=9e800000 size=1800000 flags=4) To avoid this, don't flag with EFI_BOOT_SERVICES_DATA the memory from ram_top to ram_end by the EFI loader. Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
2024-04-11arm: mach-k3: am625: Fixup a53 cpu frequency by speed gradeJoao Paulo Goncalves
The maximum frequency of the A53 CPU on the AM62 depends on the speed grade of the SoC. However, this value is hardcoded in the DT for all AM62 variants, potentially causing specifications to be exceeded. Moreover, setting a common lower frequency for all variants increases boot time. To prevent these issues, modify the DT at runtime from the R5 core to adjust the A53 CPU frequency based on its speed grade. Suggested-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
2024-04-11arm: mach-k3: am62: Get a53 max cpu frequency by speed gradeJoao Paulo Goncalves
AM62 SoC has multiple speed grades. Add function to return max A53 CPU frequency based on grade. Fastest grade's max frequency also depends on PMIC voltage, to simplify implementation use the smaller value. Suggested-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
2024-04-10Merge patch series "Resolve issues with booting distros on x86"Tom Rini
Simon Glass <sjg@chromium.org> says: This little series reprises the EFI-video fix, fixes a USB problem and enables a boot script for coreboot. It also moves to truetype fonts for coreboot and qemu-x86, since the menus look much better and there are no strong size constraints. With these changes it is possible to boot a Linux distro automatically with U-Boot on x86, including when U-Boot is the second-stage bootloader.
2024-04-10x86: coreboot: Enable truetype fontsSimon Glass
Truetype fonts look better in the menu, so enable them. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-04-10x86: Enable SSE in 64-bit modeSimon Glass
This is needed to support Truetype fonts. In any case, the compiler expects SSE to be available in 64-bit mode. Provide an option to enable SSE so that hardware floating-point arithmetic works. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Suggested-by: Bin Meng <bmeng.cn@gmail.com>
2024-04-10Merge patch series "pxe: Allow extlinux booting without CMDLINE enabled"Tom Rini
Simon Glass <sjg@chromium.org> says: This series is the culmanation of the current line of refactoring series. It adjusts pxe to call the booting functionality directly rather than going through the command-line interface. With this is is possible to boot using the extlinux bootmeth without the command line enabled. It also updates fastboot to do a similar thing.
2024-04-10x86: Drop message about features being missing with 64-bitSimon Glass
At this point most things work, including booting a distro, so drop this message. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-04-10treewide: Make arch-specific bootm code depend on BOOTMSimon Glass
Allow these functions to be compiled in when CONFIG_BOOTM is enabled, even if CONFIG_CMD_BOOTM is not. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Angelo Dureghello <angelo@kernel-space.org>
2024-04-10Merge patch series "Complete decoupling of zboot logic from commands"Tom Rini
Simon Glass <sjg@chromium.org> says: This series refactors the zboot code to allow it to be used with CONFIG_COMMAND disabled. A new zboot_run() function is used to boot a zimage.
2024-04-10x86: zboot: Use zboot_start() in zboot_run()Simon Glass
Now that we have a function to start the process of booting a zimage, use it in zboot_run() to avoid duplicated logic. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-04-10x86: zboot: Separate logic functions from commandsSimon Glass
Move zboot_start() and zboot_info() in with the other logic functions. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2024-04-10x86: zboot: Rename zboot_start() to zboot_run()Simon Glass
The term 'start' is used withint bootm and zboot to indicate the first phase of booting an image. Since zboot_start() does the whole boot, rename it to zboot_run() to align with bootm_run() etc. Fix a log message while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-04-10x86: zboot: Move environment setting into zboot_load()Simon Glass
The only difference between the command and the underlying logic is the setting of envrionment variables. Move this out of the command processing since it needs to be done in any case. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-04-10x86: zboot: Create a separate ZBOOT option for zboot logicSimon Glass
Most of the functionality of zboot is contained in the logic which handles a zimage. Create a separate Kconfig for the logic so that it can (later) be used without the command itself being enabled. Enable ZBOOT by default on x86, with the command depending on that. The existing 'imply' can therefore be removed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2024-04-10x86: zboot: Move command code into its own fileSimon Glass
Much of the code in zimage.c deals with the zboot command. Move it into a sepatate zboot.c file within the cmd/ directory. This will eventually allow use of the zimage logic without the command being enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-04-10x86: zboot: Move zimage definitions to the header fileSimon Glass
In preparation for splitting the zboot-command code into a separate file, move the definitions into the header file. While we are here, mention when load_address and base_ptr are set up and explain bzimage_addr better. Make cmdline const since it cannot be changed. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-04-10Merge tag 'xilinx-for-v2024.07-rc1' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2024.07-rc1 xilinx: - Do not call env_get_location when !ENV_IS_NOWHERE - Add FDT_FIXUP_PARTITIONS support - Fix legacy format MAC decoding zynqmp: - Enable semihosting SPL support - DT updates - Kconfig resort/cleanup - Don't describe second image/capsule if !SPL - Add support for dfu/capsule description via MTD - Support JTAG as alternative boot mode - Add support for TEG soc variant zynqmp-kria: - Wire usb4 boot device - Update SDIO tristate pin configuration - Disable SPI_FLASH_BAR to avoid issue with SPI after update mbv: - Enable SPL and binman - Small platform changes zynqmp-nand: - Error out in case of unsupported SW ECC - Clean error path versal-net: - Support multiple locations for variables
2024-04-10arm64: Fix map_range() not splitting mapped blocksPierre-Clément Tosi
The implementation of map_range() creates the requested mapping by walking the page tables, iterating over multiple PTEs and/or descending into existing table mappings as needed. When doing so, it assumes any pre-existing valid PTE to be a table mapping. This assumption is wrong if the platform code attempts to successively map two overlapping ranges where the latter intersects a block mapping created for the former. As a result, map_range() treats the existing block mapping as a table mapping and descends into it i.e. starts interpreting the previously-mapped range as an array of PTEs, writing to them and potentially even descending further (extra fun with MMIO ranges!). Instead, pass any valid non-table mapping to split_block(), which ensures that it actually was a block mapping (calls panic() otherwise) before splitting it. Fixes: 41e2787f5ec4 ("arm64: Reduce add_map() complexity") Signed-off-by: Pierre-Clément Tosi <ptosi@google.com> Tested-by: Fabio Estevam <festevam@gmail.com> Tested-by: Hiago De Franco <hiago.franco@toradex.com> # Toradex Verdin AM62 Reviewed-by: Marc Zyngier <maz@kernel.org>
2024-04-09eeprom: starfive: function get_product_id_from_eeprom()Heinrich Schuchardt
Export a function get_product_id_from_eeprom() to read the product ID. This value can be used for fixing up the device-tree on JH7110 based products. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-04-09riscv: starfive: MMC card detectHeinrich Schuchardt
The VisionFive 2 board uses GPIO 41 as card detect as documented in https://doc-en.rvspace.org/VisionFive2/PDF/SCH_RV002_V1.2A_20221216.pdf. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by: Minda Chen <minda.chen@starfivetech.com>
2024-04-09riscv: Move virtio scan to board_late_init()Łukasz Stelmach
When virtio_init() gets called from board_init() PCI isn't ready. Thus, virtio-over-PCI (e.g. network interfaces) devices can't be detected and used without additional `virtio scan` scan in the shell or a script. Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-04-09riscv: support extension probing using riscv, isa-extensionsConor Dooley
A new property has been added, with an extensive rationale at [1], that can be used in place of "riscv,isa" to indicate what extensions are supported by a given platform that is a list of strings rather than a single string. There are some differences between the new property, "riscv,isa-extensions" and the incumbent "riscv,isa" - chief among them for the sake of parsing being the list of strings, as opposed to a string. Another advantage is strictly defined meanings for each string in a dt-binding, rather than deriving meaning from RVI standards. This will likely to some divergence over time, but U-Boot's current use of extension detection is very limited - there are just four callsites of supports_extension() in mainline U-Boot. These checks are limited to two checks for FPU support and two checks for "s" and "u". "s" and "u" are not supported by the new property, but they were also not permitted in "riscv,isa". These checks are only meaningful (or run) in M-Mode, in which case supports_extension() does not parse the devicetree anyway. Add support for the new property in U-Boot, prioritising it, before falling back to the, now deprecated, "riscv,isa" property if it is not present. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-04-09riscv: don't read riscv, isa in the riscv cpu's get_desc()Conor Dooley
cpu_get_desc() for the RISC-V CPU currently reads "riscv,isa" to get the description, but it is no longer a required property and cannot be assummed to always be present, as the new "riscv,isa-extensions" and "riscv,isa-base" properties may be present instead. On RISC-V, cpu_get_desc() has two main uses - firstly providing an informational name for the CPU for smbios or at boot with DISPLAY_CPUINFO etc and secondly it forms the basis of ISA extension detection in supports_extension() as it returns (a portion of) an ISA string. cpu_get_desc() returns a string, which aligned with "riscv,isa" but the new property is a list of strings. Rather than add support for the list of strings property, which would require creating an isa string from "riscv,isa-extensions", modify the RISC-V CPU's implementaion of cpu_get_desc() return the first compatible as the cpu description instead. This may be fine for the informational cases, but it would break extension dtection, given supports_extension() expects cpu_get_desc() to return an ISA string. Call dev_read_string() directly in supports_extension() to get the contents of "riscv,isa" so that extension detection remains functional. As a knock-on affect of this change, extension detection is no longer broken for long ISA strings. Previously if the ISA string exceeded the 32 element array that supports_extension() passed to cpu_get_desc(), it would return ENOSPC and no extensions would be detected. This bug probably had no impact as U-Boot does not currently do anything meaningful with the results of supports_extension() and most SoCs supported by U-Boot don't have anywhere near that complex of an ISA string. The QEMU virt machine's CPUs do however, so extension detection doesn't work there. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-04-09riscv: dts: sophgo: Add clk node and sdhci nodeKongyang Liu
Add clk node and sdhci node for cv18xx SoCs according to patches from Linux kernel. clk: https://lore.kernel.org/all/IA1PR20MB4953F9AD6792013B54636F05BB4F2@IA1PR20MB4953.namprd20.prod.outlook.com/ sdhci: https://lore.kernel.org/all/20240217144826.3944-1-jszhang@kernel.org/ Signed-off-by: Kongyang Liu <seashell11234455@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-04-09riscv: cache: Implement dcache for cv1800bKongyang Liu
Add dcache operations invalidate_dcache_range and flush_dcache_range for cv1800b. Signed-off-by: Kongyang Liu <seashell11234455@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-04-09riscv: cpu: cv1800b: Add support for cv1800b SoCKongyang Liu
Add Sophgo cv1800b SoC to support RISC-V arch. Signed-off-by: Kongyang Liu <seashell11234455@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-04-09riscv: add backtrace supportBen Dooks
When debugging, it is useful to have a backtrace to find out what is in the call stack as the previous function (RA) may not have been the culprit. Since this adds size to the build, do not add it by default and avoid putting it in the SPL build if not needed. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Tested-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-04-08efi_loader: move HOST_ARCH to version_autogenerated.hHeinrich Schuchardt
efi_default_filename.h requires HOST_ARCH to be defined. Up to now we defined it via a CFLAGS. This does not scale. Add the symbol to version_autogenerated.h instead. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-04-08sandbox: capsule: binman: generate some capsules as part of buildSughosh Ganu
Currently, all the capsules for the sandbox platform are generated at the time of running the capsule tests. To showcase generation of capsules through binman, generate all raw(non FIT payload) capsules needed for the sandbox platform as part of the build. This acts as an illustrative example for generating capsules as part of a platform's build. Make corresponding change in the capsule test's configuration to get these capsules from the build directory. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2024-04-05Merge tag 'u-boot-imx-master-20240405' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/20228 - Convert imx8mp-beacon and verdin-imx8mm/verdin-imx8mp to OF_UPSTREAM. - Enable PCIe NVMe support on imx8mp_beacon. - Fix Ethernet and board detection on mx6cuboxi. - Fix signature_block_hdr struct fields. - Fix imx9_probe_mu prototype and make it to get called in EVT_DM_POST_INIT_R. - Test whether ethernet node is enabled before reading MAC EEPROM on DHSOM SoMs.
2024-04-05Merge tag 'qcom-next-2024Apr04' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-snapdragon - Ethernet, i2c, and USB support are now enabled by default - The clock driver gets some bug fixes and cleanup - Invalid FDTs are now properly detected in board_fdt_blob_setup(). - The pinctrl driver gains preparatory support for per-pin function muxes. - Support is added for two generations of Qualcomm HighSpeed USB PHY - A power domain driver is added for the Globall Distributed Switch Controllers on the GCC hardware block. - SDM845 gains USB host mode support. - OF_LIVE is enabled by default for Qualcomm platforms - Some U-Boot devicetree compatibility fixups are added during init to improve compatbility with upstream DT.
2024-04-05Merge tag 'u-boot-amlogic-20240404' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-amlogic - jethubj100: fix config, MAINTAINERS & update docs - Switch GXL, GXM, AXG, G12A, G12B & SM1 to using upstream DT
2024-04-05verdin-imx8mm/verdin-imx8mp: move imx verdins to OF_UPSTREAMMarcel Ziswiler
Move verdin-imx8mm and verdin-imx8mp to OF_UPSTREAM: - handle the fact that dtbs now have a 'freescale/' prefix - imply OF_UPSTREAM - remove redundant files from arch/arm/dts leaving only the *-u-boot.dtsi files - update MAINTAINERS files Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2024-04-05arm: imx9: Call imx9_probe_mu for DM post in board_rYe Li
This event callback imx9_probe_mu needs to be called in board_r as well, because many ELE APIs depending on this MU probed Signed-off-by: Ye Li <ye.li@nxp.com>
2024-04-05arm: imx9: Correct imx9_probe_mu prototypeYe Li
Since the event callback imx9_probe_mu is re-defined, update its prototype. Signed-off-by: Ye Li <ye.li@nxp.com>