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2023-10-04ARM: dts: stm32f429: put can2 in secondary modeDario Binacchi
commit 6b443faa313c519db755ff90be32758fd9c66453 Linux upstream. This is a preparation patch for the upcoming support to manage CAN peripherals in single configuration. The addition ensures backwards compatibility. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20230427204540.3126234-3-dario.binacchi@amarulasolutions.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04ARM: dts: stm32: add pin map for CAN controller on stm32f4Dario Binacchi
commit 559a6e75b4bcf0fc9e41d34865e72cf742f67d8e Linux upstream. Add pin configurations for using CAN controller on stm32f469-disco board. They are located on the Arduino compatible connector CN5 (CAN1) and on the extension connector CN12 (CAN2). Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20230328073328.3949796-5-dario.binacchi@amarulasolutions.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04ARM: dts: stm32: add CAN support on stm32f429Dario Binacchi
commit 7355ad1950f41e755e6dc451834be3b94f82acd4 Linux upstream. Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The chip contains two CAN peripherals, CAN1 the primary and CAN2 the secondary, that share some of the required logic like clock and filters. This means that the secondary CAN can't be used without the primary CAN. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20230328073328.3949796-4-dario.binacchi@amarulasolutions.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04ARM: dts: stm32: support display on stm32f746-disco boardDario Binacchi
The patch applies the changes from Linux commit 10a970bc3ebfa ("ARM: dts: stm32: support display on stm32f746-disco board") and removes the same settings from stm32f746-disco-u-boot.dtsi. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-discoDario Binacchi
commit e4e724099f04072053cf411456e3e9aae48c4af1 Linux upstream. In the schematics of document UM1907, the power supply for the micro SD card is the same 3v3 voltage that is used to power other devices on the board. By generalizing the name of the voltage regulator, it can be referenced by other nodes in the device tree without creating misunderstandings. This patch is preparatory for future developments. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04ARM: dts: stm32: add pin map for LTDC on stm32f7Dario Binacchi
commit ba287d1a0137702a224b1f48673d529257b3c4bf Linux upstream. Add pin configurations for using LTDC (LCD-tft Display Controller) on stm32f746-disco board. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Raphaël Gallais-Pou <raphael.gallais-pou@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04ARM: dts: stm32: add ltdc support on stm32f746 MCUDario Binacchi
The patch applies the changes from Linux commit 008ef8b3a1a00 ("Add LTDC (Lcd-tft Display Controller) support") and removes the same settings from stm32f746-disco-u-boot.dtsi. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04ARM: dts: stm32: add touchscreen on stm32f746-disco boardDario Binacchi
commit f0215440069c4fb12958d2d321e05faa2708a11d Linux upstream. The patch adds support for touchscreen on the stm32f746-disco board. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04ARM: dts: stm32: add pin map for i2c3 controller on stm32f7Dario Binacchi
commit 0637e66f8250c61f75042131fcb7f88ead2ad436 Linux upstream. Add pin configurations for using i2c3 controller on stm32f7. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04ARM: dts: stm32: use RCC macro for CRC node on stm32f746Dario Binacchi
commit 7a5f349e592c254f3c1ac34665b6c3905576efc2 Linux upstream. The patch replaces the number 12 with the appropriate numerical constant already defined in the file stm32f7-rcc.h. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04ARM: dts: stm32: add CAN support on stm32f746Dario Binacchi
commit 0920ccdf41e3078a4dd2567eb905ea154bc826e6 Linux upstream. Add support for bxcan (Basic eXtended CAN controller) to STM32F746. The chip contains three CAN peripherals, CAN1 and CAN2 in dual peripheral configuration and CAN3 in single peripheral configuration: - Dual CAN peripheral configuration: * CAN1: Primary bxCAN for managing the communication between a secondary bxCAN and the 512-byte SRAM memory. * CAN2: Secondary bxCAN with no direct access to the SRAM memory. This means that the two bxCAN cells share the 512-byte SRAM memory and CAN2 can't be used without enabling CAN1. - Single CAN peripheral configuration: * CAN3: Primary bxCAN with dedicated Memory Access Controller unit and 512-byte SRAM memory. ------------------------------------------------------------------------- | features | CAN1 | CAN2 | CAN 3 | ------------------------------------------------------------------------- | SRAM | 512-byte shared between CAN1 & CAN2 | 512-byte | ------------------------------------------------------------------------- | Filters | 26 filters shared between CAN1 & CAN2 | 14 filters | ------------------------------------------------------------------------- Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20230427204540.3126234-6-dario.binacchi@amarulasolutions.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04ARM: dts: stm32: add pin map for CAN controller on stm32f7Dario Binacchi
commit 011644249686f2675e142519cd59e81e04cfc231 Linux upstream. Add pin configurations for using CAN controller on stm32f7. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20230427204540.3126234-4-dario.binacchi@amarulasolutions.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04riscv: andesv5: Prefer using the generic RISC-V timer driver in S-modeYu Chien Peter Lin
The Andes PLMT driver directly accesses the mtime MMIO region, indicating its intended use in the M-mode boot stage. However, since U-Boot proper (S-mode) also uses the PLMT driver, we need to specifically mark the region as readable through PMPCFGx (or S/U-mode read-only shared data region for Smepmp) in OpenSBI. Granting permission for this case doesn't make sense. Instead, we should use the generic RISC-V timer driver to read the mtime through the TIME CSR. Therefore, we add the SPL_ANDES_PLMT_TIMER config, which ensures that the PLMT driver is linked exclusively against M-mode U-Boot or U-Boot SPL binaries. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Samuel Holland <samuel@sholland.org>
2023-10-04configs: andes: add vender prefix for target nameRandolph
Modify "CONFIG_TARGET_AE350" to "CONFIG_TARGET_ANDES_AE350" Signed-off-by: Randolph <randolph@andestech.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2023-10-04riscv: enable CONFIG_DEBUG_UART by defaultHeinrich Schuchardt
Most boards don't enable the pre-console buffer. So we will not see any early messages. OpenSBI 1.3 provides us with the debug console extension that can fill this gap. For S-Mode U-Boot enable CONFIG_DEBUG_UART by default. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-10-04riscv: bootstage: correct bootstage_report guardChanho Park
Below warning can be occurred when CONFIG_BOOTSTAGE and !CONFIG_SPL_BOOTSTAGE. It should be guarded by using CONFIG_IS_ENABLED for SPL build. arch/riscv/lib/bootm.c:46:9: warning: implicit declaration of function 'bootstage_report' 46 | bootstage_report(); | ^~~~~~~~~~~~~~~~ | bootstage_error Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-10-02Merge branch 'next_pinctrl_sync' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-sh - pinctrl re-sync for Renesas chips
2023-10-02Merge branch 'next'Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-01ARM: dts: renesas: Synchronize RZ R8A774E1 RZ/G2H DTs with Linux 6.5.3Marek Vasut
Synchronize RZ R8A774E1 RZ/G2H DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize RZ R8A774C0 RZ/G2E DTs with Linux 6.5.3Marek Vasut
Synchronize RZ R8A774C0 RZ/G2E DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize RZ R8A774B1 RZ/G2N DTs with Linux 6.5.3Marek Vasut
Synchronize RZ R8A774B1 RZ/G2N DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize RZ R8A774A1 RZ/G2M DTs with Linux 6.5.3Marek Vasut
Synchronize RZ R8A774A1 RZ/G2M DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Adam Ford <aford173@gmail.com>
2023-10-01ARM: dts: renesas: Synchronize RZ R7S72100 RZ/A1 DTs with Linux 6.5.3Marek Vasut
Synchronize RZ R7S72100 RZ/A1 DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize R-Car R8A779G0 V4H DTs with Linux 6.5.3Marek Vasut
Synchronize R-Car R8A779G0 V4H DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize R-Car R8A779F0 S4 DTs with Linux 6.5.3Marek Vasut
Synchronize R-Car R8A779F0 S4 DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize R-Car R8A779A0 E3 DTs with Linux 6.5.3Marek Vasut
Synchronize R-Car R8A779A0 E3 DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize R-Car R8A77995 D3 DTs with Linux 6.5.3Marek Vasut
Synchronize R-Car R8A77995 D3 DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize R-Car R8A77990 E3 DTs with Linux 6.5.3Marek Vasut
Synchronize R-Car R8A77990 E3 DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize R-Car R8A77980 V3H DTs with Linux 6.5.3Marek Vasut
Synchronize R-Car R8A77980 V3H DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize R-Car R8A77970 V3M DTs with Linux 6.5.3Marek Vasut
Synchronize R-Car R8A77970 V3M DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize R-Car R8A77965 M3-N DTs with Linux 6.5.3Marek Vasut
Synchronize R-Car R8A77965 M3-N DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ DTs ↵Marek Vasut
with Linux 6.5.3 Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize R-Car R8A77951 H3 DTs with Linux 6.5.3Marek Vasut
Synchronize R-Car R8A77951 H3 DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize R-Car R8A7794 E2 DTs with Linux 6.5.3Marek Vasut
Synchronize R-Car R8A7794 E2 DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize R-Car R8A7791 M2-W and R8A7793 M2-N DTs with ↵Marek Vasut
Linux 6.5.3 Synchronize R-Car R8A7791 M2-W and R8A7793 M2-N DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Synchronize R-Car R8A7790 H2 DTs with Linux 6.5.3Marek Vasut
Synchronize R-Car R8A7790 H2 DTs with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01ARM: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs on ↵Marek Vasut
Salvator-X boards Add compatible values to Ethernet PHY subnodes representing Micrel KSZ9031 PHYs on R-Car Gen3 Salvator-X boards. This allows software to identify the PHY model at any time, regardless of the state of the PHY reset line. This is a fix for missed addition of these properties on Salvator-X boards. Ported from Linux kernel commit 722d55f3a9bd810f3a1a31916cc74e2915a994ce . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-30Convert CFG_SYS_UBOOT_START to KconfigJesse Taube
Commit 65cc0e2a65d2 ("global: Move remaining CONFIG_SYS_* to CFG_SYS_*") renamed CONFIG_SYS_UBOOT_START to CFG_SYS_UBOOT_START. Unfortunately, this meant that the value was no longer available to the Makefile. This caused imxrt to fail to boot. All the other boards that used this variable were unaffected because they were using the default value which is CONFIG_TEXT_BASE. This commit converts CFG_SYS_UBOOT_START to Kconfig and sets the default value to CONFIG_TEXT_BASE. Suggested-by: Marek Vasut <marek.vasut+renesas@gmail.com> Suggested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-26riscv: set fdtfile on VisionFive 2Heinrich Schuchardt
Multiple revisions of the StarFive VisionFive 2 board exist. They can be identified by reading their EEPROM. Linux uses two differently named device-tree files. To load the correct device-tree we need to set $fdtfile to the device-tree file name that matches the board revision. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Tested-by: Milan P. Stanić <mps@arvanta.net>
2023-09-24Merge tag 'u-boot-imx-20230923' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-imx Fixes for 2023.10 ----------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/17831
2023-09-24Merge tag 'dm-next-23sep23' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-dm into next buildman file-keeping and build-progress improvements dm tree enhancement adjust meaning of bootph-pre-ram/sram
2023-09-24common: Drop linux/printk.h from common headerSimon Glass
This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-09-23kontron_sl28: Use u-boot-update.bin instead of u-boot.updateSimon Glass
A '.update' extension does not get preserved by buildman, so change it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Michael Walle <michael@walle.cc>
2023-09-23imx7: Disable CAAM Job Ring 0Fabio Estevam
Trying to boot a fitImage after a successful hab_auth_img operation causes the following error: ## Loading kernel from FIT Image at 88000000 ... Using 'conf-imx7d-smegw01.dtb' configuration Trying 'kernel-1' kernel subimage Description: Linux kernel Type: Kernel Image Compression: uncompressed Data Start: 0x8800010c Data Size: 9901752 Bytes = 9.4 MiB Architecture: ARM OS: Linux Load Address: 0x80800000 Entry Point: 0x80800000 Hash algo: sha256 Hash value: 28f8779bbf010780f16dd3d84ecb9b604c44c5c2cf7acd098c264a2d3f68e969 Verifying Hash Integrity ... sha256Error in SEC deq CAAM was not setup properly or it is faulty error! The reason for this error is that the BootROM uses the CAAM Job Ring 0, so disable its node in U-Boot to avoid the resource conflict. imx8m dtsi files also have the Job Ring 0 disable since the following kernel commit: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch?h=v6.5&id=dc9c1ceb555ff661e6fc1081434600771f29657c For a temporary solution, disable the Job Ring 0 in imx7s-u-boot.dtsi. Reported-by: Eduard Strehlau <eduard@lionizers.com> Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-23imx: hab: Explain that ivt_offset is optionalFabio Estevam
The ivt_offset parameter is optional for both hab_auth_img_or_fail and hab_auth_img commands. Document it in their usage texts to make it clearer. Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-23imx: hab: Improve the hab_auth_img_or_fail usage textFabio Estevam
Split the hab_auth_img_or_fail usage text in two sentences to make it clearer. Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-23imx: hab: Allow hab_auth_img_or_fail to be called without ivt_offsetEduard Strehlau
Since commit ea91031b2232 ("imx: hab: extend hab_auth_img to calculate ivt_offset"), it is possible to call the hab_auth_img command without the last ivt_offset argument. Currently, calling hab_auth_img_or_fail without the last ivt_offset parameter causes a failure and the command usage text is shown. Fix this problem by adjusting the argc logic to allow calling hab_auth_img_or_fail with only the address and size parameters. This way, both hab_auth_img and hab_auth_img_or_fail have the same behavior with respect to the allowed number of command parameters. Signed-off-by: Eduard Strehlau <eduard@lionizers.com> Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-23mach-imx: bootaux: fix building with disabled bootelfOleksandr Suvorov
If CMD_ELF disabled and IMX_BOOTAUX enabled, the u-boot building ends up with a linking error [1]. Select LIB_ELF to fix the building issue. [1] ld: /tmp/ccaF1rpv.ltrans0.ltrans.o: in function `do_bootaux': arch/arm/mach-imx/imx_bootaux.c:108: undefined reference to `valid_elf_image' Fixes: c0f037f6a2a ("mach-imx: bootaux: elf firmware support") Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2023-09-23sandbox: test: Fix typo in test.dtsMichal Simek
s/parititon/partition/ Signed-off-by: Michal Simek <michal.simek@amd.com> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-22x86: coreboot: Record the position of the SMBIOS tablesSimon Glass
Make a note of where coreboot installed the SMBIOS tables so that we can pass this on to EFI. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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