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2015-10-29armv8/fsl_lsch3: Change arch to fsl-layerscapeMingkai Hu
There are two LS series processors are built on ARMv8 Layersacpe architecture currently, LS2085A and LS1043A. They are based on ARMv8 core although use different chassis, so create fsl-layerscape to refactor the common code for the LS series processors which also paves the way for adding LS1043A platform. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29net: Move some header files to include/Shaohui Xie
The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM and PPC, move it out of ppc to include/, and change the path in drivers accordingly. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv7/ls1021a: move ns_access to common fileMingkai Hu
Config Security Level Register is different between different SoCs, so put the CSL register definition into the arch specific directory. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29arm: ls102xa: enable snooping for CAAM transactionshoria.geanta@freescale.com
Enable snooping for CAAM read & write transactions by programming the SCFG snoop configuration register: SCFG_SNPCNFGCR[SECRDSNP] SCFG_SNPCNFGCR[SECWRSNP] Signed-off-by: Horia Geantă <horia.geanta@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29Data types defined for 64 bit physical addressAneesh Bansal
Data types and I/O functions have been defined for 64 bit physical addresses in arm. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29ls102xa: fdt: Disable IFC in SD boot for QSPIAlison Wang
As QSPI/DSPI and IFC are pin multiplexed, IFC is disabled in SD boot for QSPI. This patch will add fdt support for this rule. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-26armv8/fsl-lsch3: fdt: Check the pointer returned from call to a function may ↵Alison Wang
be NULL Pointer 'reg' returned from call to function 'fdt_getprop' may be NULL, will be passed to function and may be dereferenced there by passing argument 1 to function 'of_read_number'. So check pointer 'reg' first. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-24arm, powerpc: select SYS_GENERIC_BOARDMasahiro Yamada
We have finished Generic Board conversion for ARM and PowerPC, i.e. all the boards have been converted except OpenRISC, SuperH, SPARC, which have not supported Generic Board framework yet. Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro defines in include/configs/*.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-10-24zynq: Move SPL console init out of board_init_f()Simon Glass
We should not init the console this early since it precludes using driver model for the UART, since it is not set up at the start of board_init_f(). See the README for more information. The debug UART does not have this restriction. If we want to do early init with the console on it can be done in spl_board_init(). Move the preloader_console_init() call from board_init_f() to board_init_r(). Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Michal Simek <michal.simek@xilinx.com>
2015-10-24microblaze: Add a TODO to call board_init_f_mem()Simon Glass
This C function should be used to do the early memory layout and init. This is beyond my powers, so just add a TODO for the maintainer. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Michal Simek <michal.simek@xilinx.com>
2015-10-24arm: Switch 32-bit ARM to using generic global_data setupSimon Glass
There is quite a bit of assembler code that can be removed if we use the generic global_data setup. Less arch-specific code makes it easier to add new features and maintain the start-up code. Drop the unneeded code and adjust the hooks in board_f.c to cope. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-10-24arm: Switch aarch64 to using generic global_data setupSimon Glass
There is quite a bit of assembler code that can be removed if we use the generic global_data setup. Less arch-specific code makes it easier to add new features and maintain the start-up code. Drop the unneeded code and adjust the hooks in board_f.c to cope. Tested on LS2085ARDB and LS2085AQDS (armv8 SoC). Tested-by: York Sun <yorksun@freescale.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2015-10-23nios2: fix virt_to_phys for nios2 with MMUThomas Chou
As the virtual address and physical address mapping of nios2 with MMU are different. Add a check of MMU, and fix the mapping. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Ley Foon Tan <lftan@altera.com>
2015-10-23nios2: zap nios2-generic board dirThomas Chou
As we use device tree to control u-boot now, the generic board can be removed. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-10-23nios2: convert dma_alloc_coherent to use malloc_cache_alignedThomas Chou
Convert dma_alloc_coherent to use memalign. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
2015-10-23nios2: convert copy_exception_trampoline to use dm cpu dataThomas Chou
Convert copy_exception_trampoline() to use dm cpu data. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-10-23nios2: convert cache flush to use dm cpu dataThomas Chou
Convert cache flush to use dm cpu data. The original cache flush functions are written in assembly and use CONFIG_SYS_{I,D}CACHE_SIZE... macros. It is difficult to convert to use cache configuration in dm cpu data which is extracted from device tree. The cacheflush.c of Linux nios2 arch uses cpuinfo structure, which is very close to our dm cpu data. So we copy and modify it to arch/nios2/lib/cache.c to replace the old cache.S. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-10-23nios2: set default cache configuration in start.SThomas Chou
Set default icache and dcache configuration for start.S. We want to remove the CONFIG_SYS_{I,D}CACHE_SIZE... configuration macros. As we are just barely starting from reset, there is no luxury of device tree. We will set some maximum cache configuration so that it will work for most configurations. This is used only in this start.S. The speed penalty is only once here. After start up, during board initialization, cpu information will be extracted from device tree. Then cache flush operations will have correct cache configurations. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
2015-10-23nios2: clean up comments style in start.SThomas Chou
Clean up comments style in start.S. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-10-23nios2: convert ioremap to use dm cpu dataThomas Chou
Convert ioremap() to use io_region_base in dm cpu global data. Also remove three unused io functions, which have style issue and are replaced by macros already. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-10-23nios2: convert do_reset to use dm cpu dataThomas Chou
Convert do_reset to use dm cpu data. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-23nios2: remove asm/psr.hThomas Chou
Remove asm/psr.h, which is not used. Also clean up asm/sections.h and unaligned.h. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
2015-10-23nios2: convert altera sysid to driver modelThomas Chou
Convert altera sysid to driver model with misc uclass. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-23nios2: convert altera timer to driver modelThomas Chou
Convert altera timer to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com>
2015-10-23nios2: convert nios2 cpu to driver modelThomas Chou
Convert nios2 cpu to driver model. The cpu parameters are extracted from device tree and saved to global data structure. We will use them to replace the custom_fpga.h . Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-23nios2 : convert altera_pio to driver modelThomas Chou
Convert altera_pio to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-23nios2: add clear and set bits macrosThomas Chou
These macros can be used to clear and set multiple bits in a register using a single call. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Chin Liang See <clsee@altera.com>
2015-10-23nios2: convert altera_jtag_uart to driver modelThomas Chou
Convert altera_jtag_uart to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-23nios2: map physical address to uncached virtual addressThomas Chou
Add ioremap() to map physical address to uncached virtual address. We need this to convert the reg address from the device tree. The order of headers inclusion in interrupts.c is changed because common.h will include board header that contains IO_REGION_BASE. In the future, the IO_REGION_BASE should be decided from the device tree. tree Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-23nios2: call board_init_f_memThomas Chou
We will need CONFIG_SYS_MALLOC_F_LEN to use serial uclass. So we shall undefine CONFIG_SYS_GENERIC_GLOBAL_DATA, and call board_init_f_mem() to allocates early malloc() memory with size of CONFIG_SYS_MALLOC_F_LEN in board_f.c. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
2015-10-23nios2: zap version_stringThomas Chou
There is a weak version_string[] at common/cmd_version.c . Remove the one in start.S. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
2015-10-23nios2: zap dly_clksThomas Chou
The dly_clks() in start.S is no use after switching to generic timer. Remove it. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
2015-10-23nios2: Split timer code into timer.cThomas Chou
Move the timer code from interrupts.c into timer.c . Eliminate the installation of timer interrupt handler, which is no longer used. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-10-23nios2: Switch to generic timerThomas Chou
Zap almost all of the ad-hoc timer code from interrupts.c and use the code in lib/time.c instead. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-10-23nios2: enable device tree control of U-BootThomas Chou
This patch adds device tree control of U-Boot to nios2 boards. The example dts is taken from Linux kernel. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
2015-10-23nios2: define _end in link scriptThomas Chou
Since commit 44c6e6591cb451ae606f8bde71dd5fb7b4002544 "rename _end to __bss_end__" , the _end was removed. But we need it now for separated device tree control, ie, CONFIG_OF_SEPARATE . The _end is used by fdtdec_setup() to find the blob. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-23nios2: remove gp assignments in link scriptThomas Chou
Since we don't use gp for small data with option "-G0", we use gp as global data pointer. The _gp location is not needed. The ALIGN(16) was for gp only. It is removed, so that we can get correct address of dtb in u-boot-dtb.bin image. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
2015-10-23nios2: enlarge the code relocation rangeThomas Chou
As we will use u-boot-dtb.bin, the code relocation range should be adjusted to accommodate the additional dtb. It might be overkilled to look into dtb header to find the dtb size, so we will simply use CONFIG_SYS_MONITOR_LEN. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-10-23nios2: BSS should be cleared only after board_init_fThomas Chou
As dtb in u-boot-dtb.bin overlapped the BSS section, we should delay the clearing of BSS until dtb is relocated in board_init_f(). Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
2015-10-23nios2: permit device tree control of U-BootThomas Chou
Enable this in the Kconfig so that nios2 boards can use device tree to configure U-Boot. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
2015-10-22am437x: Add am57xx_evm_defconfig using CONFIG_DMMugunthan V N
Import various DT files for am57xx-beagle-x15 from Linux Kernel v4.2 Add config file for this board, enable DM, DM_GPIO, DM_SERIAL and DM_MMC. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2015-10-22am437x: Add am437x_sk_evm_defconfig using CONFIG_DMMugunthan V N
Import various DT files for am437x-sk-evm from Linux Kernel v4.2 Add config file for this board, enable DM, DM_GPIO, DM_SERIAL and DM_MMC. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-10-22am437x: Add am437x_gp_evm_defconfig using CONFIG_DMMugunthan V N
Import various DT files for am4372, an43xx pinctrl and am437x-gp-evm from Linux Kernel v4.2 Add config file for this board, enable DM, DM_GPIO, DM_SERIAL and DM_MMC. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-10-22omap_hsmmc: update struct hsmmc to accomodate base address from DTMugunthan V N
Existing driver gets the actual omap hammc base address + 0x100 bytes as the first 0x100 bytes is not used by the driver. But with DM conversion the base address from DT is different, to accommodate the offset adding res0[0x100] to struct hsmmc. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-10-22dra7xx: Add dra74_evm_defconfig using CONFIG_DMMugunthan V N
Import various DT files for dra7-evm from Linux Kernel v4.2 Add config file for this board, enable DM and DM_GPIO Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-10-22ARM: dts: k2g: Add DT supportLokesh Vutla
Add basic DT support for k2g evm. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-10-22ARM: k2g: add SD card and eMMC supportRoger Quadros
Add MMC support for k2g Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
2015-10-22driver: net: keystone_net: add support for rgmii phyVitaly Andrianov
In K2G, Ethernet doesn't support SGMII instead it support RGMII, adding support to the driver to connect to RGMII phy. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-10-22driver: net: keystone_net: fix phy mode configurationMugunthan V N
Phy mode is a board property and it can be different between multiple board and ports, so it should not be hardcoded in driver to one specific mode. So adding a field in eth_priv_t structure to pass phy mode to driver. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-10-22ARM: k2g: update keystone nav rx queue numbersVitaly Andrianov
update K2G nav rx queue number Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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