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2020-01-17common: Move clock functions into a new fileSimon Glass
These three clock functions don't use driver model and should be migrated. In the meantime, create a new file to hold them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17common: Move upmconfig() to ppc.hSimon Glass
This file is only used by PowerPC so move it to an arch-specific header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17common: Move ll_boot_init() to init.hSimon Glass
This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17common: arm: Move s_init() to an ARM-specific headerSimon Glass
This function is only used on ARM devices so does not belong in the global common header file. Move it to an ARM header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17common: Move device-tree setup functions to fdt_support.hSimon Glass
These functions relate to setting up the device tree for booting the OS. The fdt_support.h header file supports similar functions, so move these there. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17common: Move reset_phy() to net.hSimon Glass
This is a network function so let's move it into that header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17common: Move relocate_code() to init.hSimon Glass
This is an init function so move it out of the common header. Avoid using the typedef so that we don't have to include the global_data header file. Also tidy up the function style in comments while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17aes: add support of aes192 and aes256Philippe Reynes
Until now, we only support aes128. This commit add the support of aes192 and aes256. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-16Merge tag 'mmc-1-16-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini
- Cleanup of fsl_esdhc driver together with arch/defconfig change - Add quirk for APP_CMD retry
2020-01-16Merge tag 'xilinx-for-v2020.04' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx/FPGA changes for v2020.04 ARM64: - Add INIT_SPL_RELATIVE dependency SPL: - FIT image fix - Enable customization of bl2_plat_get_bl31_params() Pytest: - Add test for octal/hex conversions Microblaze: - Fix manual relocation for one SPI instance Nand: - Convert zynq/zynqmp drivers to DM Xilinx: - Enable boot script location via Kconfig - Support OF_SEPARATE in board FDT selection - Remove low level uart setup it is done later by code - Add support for DEVICE_TREE variable passing for SPL Zynq: - Enable jtag boot mode via distro boot - Removing unused baseaddresses from hardware.h - DT fixups ZynqMP: - Fix emmc boot sequence - Simplify spl logic around bss and board_init_r() - Support psu_post_config_data() calling - Tune mini-nand DTS - Fix psu wiring for a2197 boards - Add runtime MMC device boot order filling in spl - Clear ATF handoff handling with custom bl2_plat_get_bl31_params() - Add support u-boot.its generation - Use single image configuration for all platforms - Enable PANIC_HANG via Kconfig - DT fixups - Firmware fixes - Add support for zcu208 and zcu1285 Versal: - Fix emmc boot sequence - Enable board_late_init() by default
2020-01-16arm: dts: mediatek: move u-boot properties to -u-boot.dtsi fileSam Shih
This patch move u-boot properties to -u-boot.dtsi file. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16Add support for MT7622 reference boardSam Shih
This adds a general board file based on MT7622 SoCs from MediaTek. This commit is adding the basic boot support for the MT7622 rfb. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com> Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-01-16ARM: MediaTek: Add support for MediaTek MT7622 SoCSam Shih
Add support for MediaTek MT7622 SoC. This include the file that will initialize the SoC after boot and its device tree. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16ARM: MediaTek: add basic support for MT8512 boardsmingming lee
This adds a general board file based on MT8512 SoCs from MediaTek. Apart from the generic parts (cpu) we add some low level init codes and initialize the early clocks. This commit is adding the basic boot support for the MT8512 eMMC board. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16ARM: MediaTek: Add support for MediaTek MT8512 SoCmingming lee
Add support for MediaTek MT8512 SoC. This include the file that will initialize the SoC after boot and its device tree. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16Drop CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK usageYangbo Lu
The eSDHC reference clocks should be provided by speed.c in arch/. And we do not need CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK option to select which clock to use. Because we can make the driver to select the periperhal clock which is better (provides higher frequency) automatically if its value is provided by speed.c. This patch is to drop this option and make driver to select clock automatically. Also fix peripheral clock calculation issue in fsl_lsch2_speed.c/fsl_lsch3_speed.c. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-01-16Add global variable sdhc_per_clk for arm/powerpcYangbo Lu
The QorIQ eSDHC controller supports two reference clocks. They are platform clock and periperhal clock. The global variable sdhc_clk has already been used for platform clock. This patch is to add another global variable sdhc_per_clk for periperhal clock, which provides higher frequency and is required to be used for SD UHS and eMMC HS200/HS400 speed modes. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-01-16powerpc/mpc85xx: drop eSDHC periperhal clock codeYangbo Lu
The below patch added eSDHC periperhal clock code initially. 2d9ca2c mmc: fsl_esdhc: Add peripheral clock support The purpose was to fix up device tree properties "peripheral-frequency" so that linux could get the periperhal clock by it. However the implementation on both u-boot and linux was only for a Freescale SDK release. The linux part implementation had never been upstreamed. These code should not have been exist on u-boot mainline. Let's remove the powerpc part changes but keep the changes in fsl_esdhc driver. The changes in fsl_esdhc driver could be utilized to support SD UHS and eMMC HS200/HS400 speed modes for current Layerscape ARM platforms. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-01-15Merge tag 'u-boot-imx-20200115' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx ----------------------------------- - imx8: add capricorn giedi deneb boards - imx6: fixed fow wandboard - imx7: DM_ETHER for pico-imx7d - fsl_esdhc_imx: add broken-cd property - New SOC: IMXRT10xx Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/637126531
2020-01-14imx: imxrt1050-evk: Add support for the NXP i.MXRT1050-EVKGiulio Benetti
This commit adds board support for i.MXRT1050-EVK from NXP. This board is an evaluation kit provided by NXP for i.MXRT105x processor family. More information about this board can be found here: https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK The initial supported/tested devices include: - Debug serial - SD Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14imx: Add basic support for the NXP IMXRT10xx SoC familyGiulio Benetti
Add i.IMXRT family basic support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14ARM: dts: imxrt1050: add dtsi fileGiulio Benetti
Add dtsi file for i.MXRT1050. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14armv7m: cache: add mmu_set_region_dcache_behaviour() stub for compatibilityGiulio Benetti
Since some driver requires this function add it as an empty stub when DCACHE is OFF. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14imx: dts: imx8dx: add I2C IPG clock for bus 0 and 2Anatolij Gustschin
IPG clock description is missing for I2C0 and I2C2 busses, add it. Otherwise we see -ENODATA error when trying to get I2C clock for these busses. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2020-01-14ARM: dts: imx6ul-14x14-evk: Pass the "broken-cd" propertyFabio Estevam
imx6ul-14x14-evk does not have a GPIO dedicated for reading the card detect pin on the eSDHC2 port. In such cases the "broken-cd" property must be passed, otherwise the card cannot be detected. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-01-14imx: add imx8x based deneb boardAnatolij Gustschin
Add support for Capricorn Deneb SoM variant. Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-01-14imx: add imx8x capricorn giedi boardAnatolij Gustschin
Add support for i.MX8X based Capricorn Giedi SoM. Supported interfaces: GPIO, ENET, eMMC, I2C, UART. Console output: U-Boot SPL 2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100) Trying to boot from MMC1 Load image from MMC/SD 0x3e400 U-Boot 2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100) ##v01.07 CPU: NXP i.MX8QXP RevB A35 at 1200 MHz at 30C Model: Siemens Giedi Board: Capricorn Boot: MMC0 DRAM: 1022 MiB MMC: FSL_SDHC: 0 Loading Environment from MMC... OK In: serial@5a080000 Out: serial@5a080000 Err: serial@5a080000 Net: eth1: ethernet@5b050000 [PRIME] Autobooting in 1 seconds, press "<Esc><Esc>" to stop Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-01-14tegra: fdt: Add tegra186-u-boot.dtsiStephen Warren
All Tegra chips except Tegra186 have a tegraNNN-u-boot.dtsi. Duplicate Tegra210's copy of this file for Tegra186. This ensures that a /binman node exists in U-Boot's control DT. Subsequent to 3c10dc95bdd0 ("binman: Add a library to access binman entries") this appears to be required. I haven't really investigated why all this is necessary or how it works, but simply observed the boot failure listed below, bisected it, noticed the inconsistency in DT files, and found that fixing it resolved the boot issue. U-Boot 2020.01-rc4-00256-g3c10dc95bdd0 (Jan 07 2020 - 10:25:00 -0700) SoC: tegra186 Model: NVIDIA P2771-0000-500 Board: NVIDIA P2771-0000 DRAM: 7.8 GiB initcall sequence 00000000fffb7858 failed at call 00000000800955a8 (err=-22) ### ERROR ### Please RESET the board ### Fixes: 3c10dc95bdd0 ("binman: Add a library to access binman entries") Fixes: f2faffecb016 ("binman: tegra: Convert to use binman") Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-14ARM: dts: zynq: enablement of coresight topologyZumeng Chen
This patch is to build the coresight topology structure of zynq-7000 series according to the docs of coresight and userguide of zynq-7000. Signed-off-by: Zumeng Chen <zumeng.chen@windriver.com> Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Sync gem clock nodes with mainline LinuxMichal Simek
Just fixing indentation and update year in Copyright. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Sync gpio-controller name locationMichal Simek
Sync location with mainline kernel. Added by Linux kernel commit 75926f07baae ("arm64: dts: zynqmp: Add missing gpio-controller to ps gpio"). Fixes: 0b33e0b15600 ("arm64: zynqmp: Add missing gpio property to dtsi") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: dts: zynqmp: replace gpio-key,wakeup with wakeup-source propertySudeep Holla
Most of the legacy "gpio-key,wakeup" boolean property is already replaced with "wakeup-source". However few occurrences of old property has popped up again, probably from the remnants in downstream trees. This patch replaces the legacy properties with the unified "wakeup-source" property introduced by: "Input: gpio_keys - switch to using generic device properties" (sha1: 700a38b27eefc582099fdf69effacfad0ad738a4) Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: dts: zcu100-revC: Give wifi some time after power-onJan Kiszka
Somewhere along recent changes to power control of the wl1831, power-on became very unreliable on the Ultra96, failing like this: wl1271_sdio: probe of mmc2:0001:1 failed with error -16 wl1271_sdio: probe of mmc2:0001:2 failed with error -16 After playing with some dt parameters and comparing to other users of this chip, it turned out we need some power-on delay to make things stable again. In contrast to those other users which define 200 ms, Ultra96 is already happy with 10 ms. Fixes: 5869ba0653b9 ("arm64: zynqmp: Add support for Xilinx zcu100-revC") Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: dts: zynqmp: Fix node names which contain "_"Michal Simek
s/_/-/ for node names. It fixes warnings like this: ... Warning (node_name_chars_strict): /cpu_opp_table: Character '_' not recommended in node name ... Issues reported by make dtbs W=12 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: dts: Remove inconsistent use of 'arm,armv8' compatible stringRob Herring
The 'arm,armv8' compatible string is only for software models. It adds little value otherwise and is inconsistently used as a fallback on some platforms. Remove it from those platforms. This fixes warnings generated by the DT schema. Reported-by: Michal Simek <michal.simek@xilinx.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Chanho Min <chanho.min@lge.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Wei Xu <xuwei5@hisilicon.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Chunyan Zhang <zhang.lyra@gmail.com> Acked-by: Robert Richter <rrichter@cavium.com> Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-01-14arm64: zynqmp: Remove incorrect phy from DT for zcu102-revB upMichal Simek
zcu102-revB/up are not removing phy from revA properly because of incorrect name. Fixes: 2975a42b42c5 ("arm64: zynqmp: Use ethernet-phy as node name for ethernet phys") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Add support for zcu1285 revA boardMichal Simek
zcu1285 is the same as zcu1275 but it is using Avnet FMC http://www.ultrazed.org/product/network-fmc-module Unfortunately not everything is connected now that's why this is only describing system which Xilinx is using. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Switch zcu100 revC to use firmware clock driverMichal Simek
There is no issue with using firmware based driver instead of fixed clock one. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14zynqmp: dts: Cleanup no-1-8-v property from sdhci dt nodesT Karthik Reddy
Removed no-1-8-v property from zynqmp sdhci devicetree nodes to allow UHS-I capable SD cards to work in SD3.0 UHS modes. Boards that does not have level shifter for SD, does not support 1.8v. so no-1-8-v property to sdhci dt nodes should be present in zcu102 Rev-A,B, zcu104 Rev-A,C, zcu100, zcu1275 Rev-B boards. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Add support for zcu208Michal Simek
The board is very similar to zcu216 with zu49dr device. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14ARM: zynq: Add missing nand/smcc nodesMichal Simek
Add missing nand/smcc description. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Correct the type of eeprom for zcu216 boardsRaviteja Narayanam
Corrected the type of eeprom in device tree for zcu216 boards according to schematic. Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Fix ina226 shunt resistor valueMichal Simek
Fix shunt resistor value for ina226 vccint_ams and vccint_io_bram_ps. 2mOhm shunt was only in early board revision schematics but never got to real revA board. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Add support for u-boot.itb generation with ATFMichal Simek
Follow i.MX, Sunxi, RISC-V and Rockchip to generate u-boot.itb which includes U-Boot proper, ATF and DTBs in FIT format. ZynqMP supports FIT for quite a long time but with using out of tree solution. The patch is filling this gap. Tested on zcu102, zcu104 and zcu100/Ultra96. zcu100/Ultra96 v2.2 ATF build by: make DEBUG=0 ZYNQMP_CONSOLE=cadence1 RESET_TO_BL31=1 PLAT=zynqmp bl31 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14ARM: zynq: Remove unused QSPI and USB addressesMichal Simek
All drivers should be converted to DM already that's why these hardcoded base addresses are not needed anymore. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14zynq: mtd: nand: Remove hardcoded base addressesAshok Reddy Soma
Remove hardcoded base addresses of smc controller and nand controller. Get those addresses from dt and replace wherever they are used. Remove smc and nand base address from header file too. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm: zynqmp: Wire SPL/ATF handoff structure properlyMichal Simek
handoff_setup() was used to generate fixed handoff structure for ATF on ZynqMP platform. Switching to bl2_plat_get_bl31_params() platform brings more flexibility because information can be taken from fit image where /fit-images node is created at run time. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Fix return value of board_fit_config_name_matchMichal Simek
Empty implementation should not return 0 (success) because that mean that passed name matches the board configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Add board_boot_order for MMC boot extensionMichal Simek
In past SPL_ZYNQMP_TWO_SDHCI symbol was introduced to handle boards with two sdhci controllers. The problem was that U-Boot is registering controllers based on aliases in DT but bootmode targets specific controller ID. That's why on boards with one "second" sdhci controller bootmode was pointing to second controller(MMC2) but alias was setup to mmc0 (the first controller). And SPL requires to point to mmc0 in this case. Long time ago commit f101e4bd3703 ("spl: add support for alternative boot device") added support for handling multiple bootmodes in SPL. Use this functionality and setup second sdhci controller as backup boot device. Below is table with behavior: HW/bootmode bootorder sd0/sd0 mmc0/mmc1 (mmc1 never called) sd1/sd1 mmc1/mmc0 (mmc0 fails and mmc1 is called) sd0+sd1/sd0 mmc0/mmc1 (mmc1 never called) sd0+sd1/sd1 mmc1/mmc0 (mmc0 never called) All other bootmodes are not affected but order can be extended to cover advance boot flows. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Remove nand partition description from mini-nandMichal Simek
There shouldn't be a need to use any partition description because it can be used for writing data anywhere. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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