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2023-02-23Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-tegraTom Rini
2023-02-23ARM: tegra20: implement BCT patchingSvyatoslav Ryhel
This function allows updating bootloader from u-boot on production devices without need in host PC. Be aware! It works only with re-crypt BCT. Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Signed-off-by: Ramin Khonsari <raminterex@yahoo.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23ARM: tegra30: implement BCT patchingRamin Khonsari
This function allows updating bootloader from u-boot on production devices without need in host PC. Be aware! It works only with re-crypted BCT. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by: Ramin Khonsari <raminterex@yahoo.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23ARM: tegra: crypto: extend crypto functionalSvyatoslav Ryhel
Add support for encryption, decryption and signinig with non-zero key saving backward compatibility. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23ARM: tegra: expose crypto module for all Tegra SoCsSvyatoslav Ryhel
Move crypto module from T20 only into common Tegra dir. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23board: tegra30: switch to updated pre-dm i2c writeSvyatoslav Ryhel
Configure PMIC voltages for early stages using updated early i2c write. Tested-by: Thierry Reding <treding@nvidia.com> # Beaver T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23ARM: tegra: create common pre-dm i2c writeSvyatoslav Ryhel
This implementation allows pwr i2c writing on early SPL stages when DM is not yet setup. Such writing is needed to configure main voltages of PMIC on early SPL for bootloader to boot properly. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Tested-by: Thierry Reding <treding@nvidia.com> # T30 and T124 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23ARM: tegra: add late init supportSvyatoslav Ryhel
Late init function allows passing values like identifiers and perform device specific configurations of pre-boot stage. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23ARM: tegra: Fix Tegra PWM parent clockSvyatoslav Ryhel
Default parent clock for the PWM on Tegra is a 32kHz clock and is unable to support the requested PWM period. Fix PWM support on Tegra20, Tegra30, Tegra114, Tegra124 and Tegra210 by updating the parent clock for the PWM to be the PLL_P. This commit is equivalent to Linux kernel commit: https://lore.kernel.org/all/20221010100046.6477-1-jonathanh@nvidia.com/ Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # ASUS TF201 T30 Tested-by: Thierry Reding <treding@nvidia.com> # T30 and T124 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23ARM: tegra30: add PLLD to pll setupSvyatoslav Ryhel
On T30 unlike T20 dsi panels are wider used on devices and PLLD is used as DISP1 parent more often, so lets enable it as well for this cases. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF700T T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30 Tested-by: Thierry Reding <treding@nvidia.com> # Beaver T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23ARM: tegra: clock: add clock_decode_pair helperSvyatoslav Ryhel
Get periph clock id and its parent from device tree. This works by looking up the peripheral's 'clocks' node and reading out the second and fourth cells, which are the peripheral and PLL clock numbers. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23ARM: tegra: clock: add clk_id_to_pll_id helperSvyatoslav Ryhel
This function allows to convert a device tree clock ID to PLL ID. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23ARM: t20/t30: swap host1x and disp1 clock parentsSvyatoslav Ryhel
According to mainline clock tables and TRM HOST1X parent is PLLC, while DISP1 usually uses PLLP as parent clock. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Tested-by: Thierry Reding <treding@nvidia.com> # Beaver T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23tegra30: clock: add EXTPERIPHSvyatoslav Ryhel
This mappings were missing for some reason. Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23x86: Pass -z execstack for EFI payload flagsTom Rini
To match how we link EFI executables elsewhere, and to silence a linker warning, pass -z execstack here as well. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2023-02-22arm: dts: chameleonv3: Add 270-2 variantPaweł Anikiel
Add devicetree for chameleonv3 with the 270-2I2-D11E variant of the Mercury+ AA1 module Signed-off-by: Paweł Anikiel <pan@semihalf.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-22arm: dts: chameleonv3: Rename chameleonv3.dts to .dtsiPaweł Anikiel
This file is included by the different chameleonv3 variants. Change the name to .dtsi. Signed-off-by: Paweł Anikiel <pan@semihalf.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-22arm: dts: chameleonv3: Override chameleonv3 bitstream namesPaweł Anikiel
Set the bitstream name per Chameleon variant. This allows the same boot filesystem with all bitstream variants to be used on different boards. Signed-off-by: Paweł Anikiel <pan@semihalf.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-17riscv: binman: Add help message for missing blobsRick Chen
Add the 'missing-msg' for more detailed output on missing system firmware. Signed-off-by: Rick Chen <rick@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
2023-02-17riscv: Rename Andes cpu and board namesLeo Yu-Chi Liang
The current ae350-related defconfigs could also support newer Andes CPU IP, so modify the names of CPU from ax25 to andesv5, and board name from ax25-ae350 to ae350. Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
2023-02-17configs: ae350: Enable v5l2 cache for AE350 platforms in SPLYu Chien Peter Lin
To reduce the code size, CONFIG_V5L2_CACHE was disabled since commit: ca06444aac2c643db3a3f2eb37afc60fae15177e Turing on does not significantly increase the size of u-boot-spl.bin, so we enable it by default to improve performance. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
2023-02-17riscv: ax25: cache.c: Cleanups to L1/L2 cache function used in SPLYu Chien Peter Lin
This patch refines L1 cache enable/disable and v5l2-cache enable functions. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
2023-02-17riscv: ae350: dts: Update L2 cache compatible stringYu Chien Peter Lin
Update the compatible string of L2 cache. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
2023-02-17riscv: cpu: ax25: Simplify cache enabling logic in harts_early_init()Yu Chien Peter Lin
As the OpenSBI v1.2 does not enable the cache [0], we enable the i/d-cache in harts_early_init() and do not disable in cleanup_before_linux(). This patch also simplifies the logic and moves the CSR encoding to include/asm/arch-andes/csr.h. [0] https://github.com/riscv-software-src/opensbi/commit/bd7ef4139829da5c30fa980f7498d385124408fa Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
2023-02-17riscv: Remove redundant Kconfig "RISCV_NDS_CACHE"Leo Yu-Chi Liang
There is no need for RISCV_NDS_CACHE config to control cache switches. Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
2023-02-17riscv: global_data.h: Correct the comment for PLICSWYu Chien Peter Lin
PLIC is used for external interrupt, while PLICSW is an Andes-specific design for software interrupt. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
2023-02-13clocks: qcs404: Add support for I2C clocksSumit Garg
Co-developed-by: Mike Worsfold <mworsfold@impinj.com> Signed-off-by: Mike Worsfold <mworsfold@impinj.com> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-13Merge tag 'i2c-updates-for-v2023.04' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-i2c i2c updates for v2023.04 - add new i2c driver ast2600 from Ryan Chen - i2c-cdns: make read fifo-depth configurable through device tree from Pei Yue Ho - mxc i2c driver: print base address in hex, not in decimal from Fabio
2023-02-13arm: kirkwood: Enable uart0 dm-pre-reloc for Pogoplug V4 boardTony Dinh
When DM_SERIAL is enabled, the device-tree tag u-boot,dm-pre-reloc is required for this board to boot over UART with kwboot. Enable this in kirkwood-pogoplug-series-4-u-boot.dtsi. Added by Stefan while applying: Please note that it's not fully understood, why this property really is needed. Here a link to the discussion about this: https://lore.kernel.org/r/20230201080210.ypz4nrj4y2igwxz3@pali/ Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2023-02-13arm: mvebu: Add support for Synology DS116 (Armada 385)Tony Dinh
Synology DS116 is a NAS based on Marvell Armada 385 SoC. Board Specification: - Marvel MV88F6820 Dual Core at 1.8GHz - 1 GiB DDR3 RAM - 8MB Macronix mx25l6405d SPI flash - I2C - 2x USB 3.0 - 1x GBE LAN port (PHY: Marvell 88E1510) - 1x SATA (6 Gbps) - 3x LED - PIC16F1829 (connected to uart1) - GPIO fan - serial console Note that this patch depends on the add-support for Thecus N2350 patch: https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/ Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2023-02-13arm: mvebu: Add support for Thecus N2350 (Armada 385) boardTony Dinh
Thecus N2350 is a NAS based on Marvell Armada 385 SoC. Specification: - Processor: Marvel MV88F6820 Dual Core at 1GHz - 1 GiB DDR4 RAM - 4MB Macronix mx25l3205d SPI flash - 512MB Hynix H27U4G8F2DTR-BC NAND flash - I2C - 2x USB 3.0 - 1x GBE LAN port (PHY: Marvell 88E1510) - 2x SATA (hot swap slots) - 3x buttons - 10x LEDS - serial console Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2023-02-13arm: kirkwood: Use CONFIG_SYS_NS16550 with DM_SERIAL for Kirkwood boardsTony Dinh
CONFIG_SYS_NS16550 is required when DM_SERIAL is enabled for Kirkwood boards. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefan Roese <sr@denx.de>
2023-02-13arm: aspeed: dtsi: add reg for i2cRyan Chen
The i2c driver have global register that i2c bus use ofnode_get_parent to get parent register address. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2023-02-12socfpga: fix the serial console on DE1-SoCJade Lovelace
Previously, the TX LED would flash but nothing would appear on the serial port, and the board would appear dead with a build of the socfpga_cyclone5_defconfig. I have verified that adding the frequency to the uart will fix the serial console on my board. Thanks to @ehoffman on the Rocketboards forum: https://forum.rocketboards.org/t/cyclonev-programming-fpga-from-u-boot/2230/30 Signed-off-by: Jade Lovelace <lists@jade.fyi> Reviewed-by: Marek Vasut <marex@denx.de>
2023-02-12Merge branch 'for-2023.04' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-mpc8xx - A fix for a long standing bug that has been exposed by commit 50128aeb0f8 ("cyclic: get rid of cyclic_init()") preventing 8xx boards from booting since u-boot 2023.01 - A GPIO driver for powerpc 8xx chip - Fixup for powerpc 8xx SPI driver - A new powerpc 8xx board - The two devices having that board.
2023-02-11board: cssi: Add new board MCR3000_2GChristophe Leroy
This adds a new board from CS GROUP. The board is called MCR3000_2G, and has a CPU board called CMPC885. That CPU board is shared with another equipment that will be added in a later patch. That board stores Ethernet MAC addresses in an EEPROM which is accessed using SPI bus. This patch was originally written by Charles Frey who's email address is not valid anymore as he left the company. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
2023-02-11driver, gpio: Add support for MPC 8xx CPU portsChristophe Leroy
Ports A, C and D are 16 bits ports. Ports B and E are 32 bits ports. The "compatible" is used to determine each port type. This patch was originally written by Charles Frey who's email address is not valid anymore as he left the company. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
2023-02-10board: MCR3000: Use lowercase filenamesChristophe Leroy
Rename MCR3000.* to mcr3000.* to be more in line with other boards. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-02-10powerpc/mpc8xx: Zero boot_flags arg for calling board_init_f()Christophe Leroy
Copied from e83a7e94532 ("powerpc/mpc83xx: Zero boot_flags arg for calling board_init_f()") The argument boot_flags of board_init_f() is not used at all in the powerpc specific board.c init sequence. Now with the generic init sequence, this boot_flags arg is used by board_init_f(). This patch sets the r3 register that is used to pass the boot_flags argument from the start.S board_init_f() call to 0 prior to the function call to avoid unknown content to end up in gd->flags. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Fixes: 09f3ca3dd53 ("arm, powerpc: select SYS_GENERIC_BOARD")
2023-02-10dm: button: add support for linux_code in button-gpio.c driverDzmitry Sankouski
Linux event code must be used in input devices, using buttons. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-10test: create dedicated fdt node for ofnode_for_each_prop testDzmitry Sankouski
Property count may change in /buttons node, if more button tests added, and this will break ofnode_for_each_prop. Add separate node for mentioned test. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-10dts: add missing linux,code in gpio-keysDzmitry Sankouski
gpio-keys linux driver enforces user to specify linux,code. Add missing linux,code before implementing button input support. - arch/arm/dts/rk3288-popmetal.dtsi -> KEY_POWER - arch/arm/dts/rk3288-tinker.dtsi -> KEY_POWER - arch/arm/dts/am3517-evm-ui.dtsi -> KEY_RECORD - sandbox/dts/sandbox.dtsi -> BTN_1 - sandbox/dts/sandbox.dts -> BTN_1 Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-10dts: qcs404-evb: Add I2C controller nodesSumit Garg
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10pinctrl: qcs404: Enable I2C pinmux optionsSumit Garg
Co-developed-by: Mike Worsfold <mworsfold@impinj.com> Signed-off-by: Mike Worsfold <mworsfold@impinj.com> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10clock-snapdragon: Add clk_rcg_set_rate() with mnd_width=0Sumit Garg
Add clk_rcg_set_rate() which allows to configure clocks without programming MND values. This is required for configuring I2C clocks on QCS404. Co-developed-by: Mike Worsfold <mworsfold@impinj.com> Signed-off-by: Mike Worsfold <mworsfold@impinj.com> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10dts: qcs404-evb: Add ethernet controller nodeSumit Garg
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10pinctrl-snapdragon: Get rid of custom drive-strength valuesSumit Garg
Use standard pinconf drive-strength values from Linux DT bindings rather than ones based on custom u-boot header. These changes are in direction to make u-boot DTs for Qcom SoCs to be compatible with standard Linux DT bindings. Also, add support for pinconf bias-pull-up. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10pinctrl: qcs404: Enable ethernet pinmux optionsSumit Garg
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10clocks: qcs404: Add support for ethernet clocksSumit Garg
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10qcs404-evb: Enable msm_gpio driver supportSumit Garg
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
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