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HiFive Unleashed A00 support is25wp256 spi-nor flash,
So enable the same and add test result log for future
reference.
Tested on SiFive FU540 board.
Thanks to Sagar for various use cases and tests.
[QUAD mode in dt with spi-tx-bus-width: <4>]
pp opcode = 0x34 [QUAD MODE]
read opcode = 0x6c [QUAD MODE]
erase opcode = 0x21
SPI-NOR:
1. erase entire flash: Pass
2. write entire flash: Pass
3. read entire flash: Pass
4. cmp 32MiB read back data: Pass
5. MMC: Booted Linux and dtb from mmc
[SPI MODE in dt with spi-tx-bus-width: <1>]
pp opcode = 0x12 [SPI MODE]
read opcode = 0xc [SPI MODE]
erase opcode = 0x21
SPI-NOR:
1. erase entire flash: Pass
2. write entire flash: Pass
3. read entire flash: Pass
4. cmp 32MiB read back data: Pass
5. MMC: Booted Linux and dtb from mmc
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
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Enable the DM based GPIO driver for FU540-C000 SoC.
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
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This patch sets the serial# environment variable by reading the
board serial number from the OTP memory region.
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
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This patch enables SiFive SPI and MMC SPI drivers for the
SiFive Unleashed board.
Signed-off-by: Bhargav Shah <bhargavshah1988@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
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This patch extends SiFive FU540 board support to setup ethaddr
env variable based on board serialnum read from OTP.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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The GEMGXL clock driver is now directly part of Cadence MACB
ethernet driver in upstream Linux kernel. There is no separate
GEMGXL clock driver in upstream Linux kernel hence we drop
GEMGXL clock driver from U-Boot as well.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Enable the new GEMGXL MGMT driver so that GEM 10/100 Mbps works now.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
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Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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This patch adds SiFive FU540 board support. For now, only
SiFive serial, SiFive PRCI, and Cadance MACB drivers are
only enabled. The SiFive FU540 defconfig by default builds
U-Boot for S-Mode because U-Boot on SiFive FU540 will run
in S-Mode as payload of BBL or OpenSBI.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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