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2016-11-15ARM64: zynqmp: Add support for SD1 with level shifters bootmodeSiva Durga Prasad Paladugu
Add support for SD1 with level shifters bootmode. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: Record board name as serial number for DFU/FASTBOOTMichal Simek
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM64: zynqmp: Adjust to new SMC interface to get silicon versionSoren Brinkmann
The new FW interface returns the IDCODE and version register, leaving extracting bitfields to the caller. Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM: zynq: Add support for Zynq 7000S 7007s/7012s/7014s devicesMichal Simek
Zynq 7000S (Single A9 core) devices is using different ID code. This patch adds this new codes and assign them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15ARM: zynq: Add support for the topic-miami system-on-modules and carrier boardsMike Looijmans
The topic-miami SoMs contain a Zynq xc7z015 or xc7z030 SoC, 1GB DDR3L RAM, 32MB QSPI NOR flash and 256MB NAND flash. The topic-miamiplus SoMs contain a Zynq xc7z035, xc7z045 or xc7z100 SoC, 2x 1GB DDR3L RAM, 64MB dual-parallel QSPI flash, clock sources and a fan controller. The "Florida" carrier boards add SD, USB, ethernet and other interfaces. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-13ARM: k2g: Update PLL Multiplier and divider valuesLokesh Vutla
Only a certain set of PLLM/D values are recommended to configure the DDR at the required speeds for a given clock input frequency. Updating these values as specified in Data Sheet[1] Table 5-18 [1] http://www.ti.com/lit/ds/symlink/66ak2g02.pdf Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-11-13mx6ull_14x14_evk: Add README fileDiego Dorta
Add a README file to help users getting started with the board. Signed-off-by: Diego Dorta <diego.dorta@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-11-13davinci: omapl138_lcdk: keep booting even when MAC address is invalidFabien Parent
If the MAC address specified on the EEPROM is invalid (multicast or zero address), then u-boot fails to boot. Having a bad MAC address in the EEPROM should not prevent the system from booting. This commit changes the error path to just print an error messages in case of bad MAC address. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-11-13board: am335x/mux: Do not hang when encountering a bad EEPROMAlex G
In most cases, the SPL and u-boot.img will be on the same boot media. Since the SPL was loaded by the boot rom, the pinmux will already have been configured for this media. This, the board will still be able to boot successfully, or at least reach the u-boot console, where more recovery options are available. I've encountered this on a beaglebone black with a corrupted EEPROM. Removing this check allowed the board to boot successfully. I've also seen this on EVM-based boards with an unprogrammed EEPROM. On those boards, for some reason there were no UART messages. This made it look as if the SOC was dead. Remove the hang(), as it is not a fatal error. Also reformat the error message to be clearer as to the cause. The original message made it appear as if the wrong binary was being loaded. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-11-13igep00x0: add Hynix timingsLadislav Michl
Tested on IGEPv2 with Micron MT29F4G16ABBDA3W and Hynix H27S4G6F2DKA-BM Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Javier Martinez Canillas <javier@samsung.com> Tested-by: Javier Martinez Canillas <javier@samsung.com>
2016-11-13igep00x0: disable CONFIG_DISPLAY_BOARDINFOLadislav Michl
As a single U-Boot binary can now run on various board modifications, drop CONFIG_DISPLAY_BOARDINFO as it prints flash memory information too early to give us chance to easily detect it. Also saves few bytes as a bonus. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Javier Martinez Canillas <javier@samsung.com> Tested-by: Javier Martinez Canillas <javier@samsung.com>
2016-11-06wandboard: Make Ethernet functional againFabio Estevam
Since commit ce412b79e7255770 ("drivers: net: phy: atheros: add separate config for AR8031") ethernet does not work on mx6sabresd. This commit correctly assigns ar8031_config() as the configuration function for AR8031 in the same way as done in the Linux kernel. However, on wandboard design we need some additional configuration, such as enabling the 125 MHz AR8031 output that needs to be done in the board file. This also aligns with the same method that the kernel performs the AR8031 fixup in arch/arm/mach-imx/mach-imx6q.c. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-11-06mx6sabresd: Make Ethernet functional againFabio Estevam
Since commit ce412b79e7255770 ("drivers: net: phy: atheros: add separate config for AR8031") ethernet does not work on mx6sabresd. This commit correctly assigns ar8031_config() as the configuration function for AR8031 in the same way as done in the Linux kernel. However, on mx6sabresd design we need some additional configuration, such as enabling the 125 MHz AR8031 output that needs to be done in the board file. This also aligns with the same method that the kernel performs the AR8031 fixup in arch/arm/mach-imx/mach-imx6q.c. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-11-05engicam: icorem6: Fix config filesJagan Teki
Config file names on MAINTAINERS and README in board/engicam/icorem6 seems to be wrong, hence fixed the same. Cc: Stefano Babic <sbabic@denx.de> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-31Fix spelling of "occur".Vagrant Cascadian
Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Acked-by: Angelo Dureghello <angelo@sysam.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-31omap3logic: Fix Auto detect Logic PD ModelsAdam Ford
The autodetect feature doesn't allow users to specify the device tree. This fix will make it only autodetect if 'fdtimage' is not defined. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-31ti: common: board_detect: Return a valid empty string for un-initialized eepromNishanth Menon
Current logic for query of revision, board_name, config returns NULL. Users of these functions do a direct strncmp to compare. Unfortunately, as per conventions require two valid strings to compare against and the current implementation causes a crash when compared with NULL. We'd still like to maintain the simplistic usage of these APIs instead of redundant if (string) res=strncmp(fn(),"cmp",n); flowing all over the place. Hence, since the version, name and config is already pre-initialized with empty string, just dont check for invalid header in the first place and return the empty string to the caller. Reported-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Correct was'nt -> wasn't typo] Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-31ti: common: board_detect: Setup initial default value for config as wellNishanth Menon
config should have been initialized along with others as defaults. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-31ti: common: board_detect: Replace hardcoded value with macroNishanth Menon
We should have used TI_DEAD_EEPROM_MAGIC in the first place. Fixes: d3b98a9eb941 ("ti: common: dra7: Add standard access for board description EEPROM") Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-30Merge branch 'sun9i-a80-spl' of http://git.denx.de/u-boot-sunxiTom Rini
2016-10-30sunxi: Add support for Cubieboard4Chen-Yu Tsai
The Cubieboard4 is an A80 SoC based development board from Cubietech. This board has a UART port, 4 USB host ports, a USB 3.0 OTG connector, HDMI and VGA outputs, a micro SD slot, 8G eMMC flash, 2G DRAM, a WiFi/BT combo chip, headphone and microphone jacks, IR receiver, and GPIO headers. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30sunxi: Enable SPL support for A80 Optimus boardChen-Yu Tsai
The A80 Optimus Board was launched with the Allwinner A80 SoC. It was jointly developed by Allwinner and Merrii. This board has a UART port, a JTAG connector, 2 USB host ports, a USB 3.0 OTG connector, an HDMI output, a micro SD slot, 16G eMMC flash, 2G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone jack, IR receiver, and additional GPIO headers. Signed-off-by: Chen-Yu Tsai <wens@csie.org> [hdegoede@redhat.com: update existing Merrii_A80_Optimus_defconfig instead of adding a new defconfig] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30sunxi: Add default zq value for sun9i (A80)Chen-Yu Tsai
Both the A80 Optimus board and the Cubieboard 4 use a zq value of 4145117, or 0x3f3fdd. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30sunxi: Set default CPU clock rate to 1008 MHz for sun9i (A80)Chen-Yu Tsai
In Allwinner's SDK the A80 is clocked to 1008 MHz by default. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30sunxi: add MMC pinmux setup for SDC2 on sun9iPhilipp Tomsich
The A80 can support 8-bit eMMC with reset on the PC pingroups. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30sunxi: enable SPL for sun9iPhilipp Tomsich
Now that DRAM initialization and clock setup is supported, we can enable SPL for the A80. [wens@csie.org: Added commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30sunxi: DRAM initialisation for sun9iPhilipp Tomsich
This adds DRAM initialisation code for sun9i, which calculates the appropriate timings based on timing information for the supplied DDR3 bin and the clock speeds used. With this DRAM setup, we have verified DDR3 clocks of up to 792MHz (i.e. DDR3-1600) on the A80-Q7 using a dual-channel configuration. [wens@csie.org: Moved dram_sun9i.c to arch/arm/mach-sunxi/; style cleanup] Signed-off-by: Chen-Yu Tsai <wens@csie.org> [hdegoede@redhat.com: Drop some huge non-documenting #if 0 ... #endif blocks] [hdegoede@redhat.com: Fix checkpatch warnings] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-29Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2016-10-28Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini
2016-10-28board: sama5d2_xplained: Enable an early debug UARTWenyou Yang
Enable an early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-10-28board: sama5d2_xplained: Set 'ethaddr' got from AT24MACWenyou Yang
If 'ethaddr' is not set, we will get the ethernet address from AT24MAC, and set it to 'ethaddr' variable. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Songjun Wu <songjun.wu@microchip.com> Reviewed-by: Andreas Bießmann <biessmann@corscience.de>
2016-10-28board: sama5d2_xplained: Clean up codeWenyou Yang
Since the introduction of pinctrl and clk driver, and the dts file, remove unneeded the pin configurations and the clock enabling code. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-10-28board: sama5d2_xplained: Move config options to defconfigsWenyou Yang
Move the config options from the include/configs/sama5d2_xplained.h to configs/sama5d2_xplained_*_defconfig. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-10-28arm, at91: add icache supportHeiko Schocher
add at least icache support for at91 based boards. This speeds up NOR flash access on an at91sam9g15 based board from 15.2 seconds reading 8 MiB from a SPI NOR flash to 5.7 seconds. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-10-28Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: common/Kconfig configs/dms-ba16_defconfig
2016-10-27arm: socfpga: sockit: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27arm: socfpga: de0-nano-soc: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27arm: socfpga: sr1500: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27arm: socfpga: vining_fpga: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27arm: socfpga: is1: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27arm: socfpga: socrates: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27arm: socfpga: mcvevk: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27arm: socfpga: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-26imx6: icorem6: Add NAND supportJagan Teki
Add NAND support for Engicam i.CoreM6 qdl board. Boot Log: -------- U-Boot SPL 2016.09-rc2-30755-gd3dc581-dirty (Sep 28 2016 - 23:00:43) Trying to boot from NAND NAND : 512 MiB U-Boot 2016.09-rc2-30755-gd3dc581-dirty (Sep 28 2016 - 23:00:43 +0530) CPU: Freescale i.MX6SOLO rev1.3 at 792MHz CPU: Industrial temperature grade (-40C to 105C) at 55C Reset cause: WDOG Model: Engicam i.CoreM6 DualLite/Solo Starter Kit DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 icorem6qdl> Cc: Scott Wood <oss@buserror.net> Cc: Stefano Babic <sbabic@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-26arm: imx6q: Add devicetree support for Engicam i.CoreM6 Quad/DualJagan Teki
i.CoreM6 Quad/Dual modules are system on module solutions manufactured by Engicam with following characteristics: CPU NXP i.MX6 DQ, 800MHz RAM 1GB, 32, 64 bit, DDR3-800/1066 NAND SLC,512MB Power supply Single 5V MAX LCD RES FULLHD and more info at http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-26engicam: icorem6: Add DM_GPIO, DM_MMC supportJagan Teki
Add DM_GPIO, DM_MMC support for u-boot and disable for SPL. Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-26arm: imx6q: Add devicetree support for Engicam i.CoreM6 DualLite/SoloJagan Teki
i.CoreM6 DualLite/Solo modules are system on module solutions manufactured by Engicam with following characteristics: CPU NXP i.MX6 DL, 800MHz RAM 1GB, 32, 64 bit, DDR3-800/1066 NAND SLC,512MB Power supply Single 5V MAX LCD RES FULLHD and more info at http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-26imx: s/docs\/README.imximage/doc\/README.imximage/gJagan Teki
Fixed typo for doc/README.imximage on respective imximage.cfg files. Cc: Tom Rini <trini@konsulko.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-26imx6: icorem6: Add ENET supportJagan Teki
Add enet support for engicam icorem6 qdl starter kit. - Add pinmux settings - Add board_eth_init TFTP log: -------- Net: FEC [PRIME] Hit any key to stop autoboot: 0 icorem6qdl> tftpboot {fdt_addr} imx6dl-icore.dtb Using FEC device TFTP from server 192.168.2.96; our IP address is 192.168.2.75 Filename 'imx6dl-icore.dtb'. Load address: 0x0 Loading: ###### 1.3 MiB/s done Bytes transferred = 28976 (7130 hex) CACHE: Misaligned operation at range [00000000, 00007130] icorem6qdl> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-26arm: imx: Add Engicam i.CoreM6 QDL Starter Kit initial supportJagan Teki
Boot Log for i.CoreM6 DualLite/Solo Starter Kit: ----------------------------------------------- U-Boot SPL 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46) Trying to boot from MMC1 U-Boot 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46 +0530) CPU: Freescale i.MX6SOLO rev1.3 at 792MHz CPU: Industrial temperature grade (-40C to 105C) at 31C Reset cause: POR DRAM: 256 MiB MMC: FSL_SDHC: 0 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device switch to partitions #0, OK mmc0 is current device reading boot.scr ** Unable to read file boot.scr ** reading zImage 6741808 bytes read in 341 ms (18.9 MiB/s) Booting from mmc ... reading imx6dl-icore.dtb 30600 bytes read in 19 ms (1.5 MiB/s) Booting using the fdt blob at 0x18000000 Using Device Tree in place at 18000000, end 1800a787 Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 Boot Log for i.CoreM6 Quad/Dual Starter Kit: -------------------------------------------- U-Boot SPL 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46) Trying to boot from MMC1 U-Boot 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46 +0530) CPU: Freescale i.MX6Q rev1.2 at 792MHz CPU: Industrial temperature grade (-40C to 105C) at 28C Reset cause: POR DRAM: 512 MiB MMC: FSL_SDHC: 0 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 icorem6qdl> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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