Age | Commit message (Collapse) | Author |
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Defining this as 0 results in bootm causing a null pointer exception...
Define it at a safe default which is valid RAM on most qcom boards.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Use our new ft_board_setup().
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Support for Schneider Electric HMIBSC. Features:
- Qualcomm Snapdragon 410C SoC - APQ8016 (4xCortex A53, Adreno 306)
- 2GiB RAM
- 64GiB eMMC, SD slot
- WiFi and Bluetooth
- 2x Host, 1x Device USB port
- HDMI
- Discrete TPM2 chip over SPI
Features enabled in U-Boot:
- RAUC updates
- Environment protection
- USB based ethernet adaptors
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Give us lots of room for the appended FDT.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Switch to using upstream DT from dts/upstream.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Enable the SM8550 & SM8650 clock driver in the Qualcomm defconfig.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Enable three new clock drivers.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Enable the clock and pinctrl drivers for qcm2290, sm6115, and sm8250.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Enable the SM8550 & SM8650 pinctrl drivers for Qualcomm defconfig.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Enable the Qualcomm Synopsys eUSB2 PHY driver in Qualcomm defconfig.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
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Janne Grunau <j@jannau.net> says:
This series contains a few misc config changes for Apple silicon
systems:
- switch from the deprecated distro boot scripts to standard boot
- allows EFI console resizing based on the video console size
- enables 16x32 bitmap fonts as Apple devices come with high DPI
displays
- enables 64-bit LBA addressing
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The bootflow list is only seen briefly and is probably more confusing
than helpful.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
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Apple devices have high DPI displays so the larger fonts are preferable
for improved readability. This does not yet change the used font based
on the display's pixel density so the standard 8x16 font is still used
by default.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
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This makes USB HDDs >2TiB work. The only reason this hasn't bitten us
for the internal NVMe yet is the 4K sector size, because the largest SSD
Apple sells is 8TB and we can handle up to 16TiB with that sector size.
Close call.
Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Janne Grunau <j@jannau.net>
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Use recently added ability to assign commands to buttons via env.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
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Of all T30 transformers, only the TF600T uses SPI flash and
needs SLINK driver to work with it. Move this configuration
to the tf600t fragment from common defconfig.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
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CONFIG_SYS_L2CACHE_OFF is not affecting these devices in any way.
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
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Switch transformer, endeavoru, grouper and x3_t30 boards
to bootflow scan.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
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Paz00 can have multiple panels with different timings, but they
all share common feature - panel exposes EDID.
Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
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https://source.denx.de/u-boot/custodians/u-boot-video
CI: https://source.denx.de/u-boot/custodians/u-boot-video/-/pipelines/20466
- simple_panel: support timing parsing from EDID
- dw_hdmi: fix gcc-14 compiler warnings
- dw_hdmi: support vendor PHY for HDMI
- rockchip: add Rockchip INNO HDMI PHY driver
- rockchip: RK3328 HDMI and VOP support
- evb-rk3328: enable vidconsole support
- Tegra DC and DSI improvements and Tegra 114 support
- add LG LG070WX3 MIPI DSI panel driver
- add Samsung LTL106HL02 MIPI DSI panel driver
- add Toshiba TC358768 RGB to DSI bridge support
- add basic support for the Parade DP501 transmitter
- Tegra 3 panel and bridge driver improvements
- simplefb: modernise DT parsing
- fdt_simplefb: Enumerate framebuffer info from video handoff
- preserve framebuffer if SPL is passing video hand-off
- fdt_support: allow reserving FB region without simplefb
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U-Boot 2024.01-00901-g75d07e0e6e-dirty (Jan 17 2024 - 12:50:56 +0530)
Model: Firefly roc-rk3328-cc
DRAM: 4 GiB
PMIC: RK8050 (on=0x40, off=0x00)
Core: 236 devices, 26 uclasses, devicetree: separate
MMC: mmc@ff500000: 1, mmc@ff520000: 0
Loading Environment from MMC... *** Warning - bad CRC, using default environment
In: serial,usbkbd
Out: serial,vidconsole
Err: serial,vidconsole
Model: Firefly roc-rk3328-cc
Net: eth0: ethernet@ff540000
Hit any key to stop autoboot: 0
=> dm tree
Class Index Probed Driver Name
-----------------------------------------------------------
root 0 [ + ] root_driver root_driver
firmware 0 [ ] psci |-- psci
clk 0 [ + ] fixed_clock |-- xin24m
syscon 0 [ + ] rockchip_rk3328_grf |-- syscon@ff100000
serial 0 [ + ] ns16550_serial |-- serial@ff130000
i2c 0 [ + ] rockchip_rk3066_i2c |-- i2c@ff160000
pmic 0 [ + ] rockchip_rk805 | `-- pmic@18
sysreset 0 [ ] rk8xx_sysreset | |-- rk8xx_sysreset
regulator 0 [ + ] rk8xx_buck | |-- DCDC_REG1
regulator 1 [ + ] rk8xx_buck | |-- DCDC_REG2
regulator 2 [ + ] rk8xx_buck | |-- DCDC_REG3
regulator 3 [ + ] rk8xx_buck | |-- DCDC_REG4
regulator 4 [ + ] rk8xx_ldo | |-- LDO_REG1
regulator 5 [ + ] rk8xx_ldo | |-- LDO_REG2
regulator 6 [ + ] rk8xx_ldo | `-- LDO_REG3
video 0 [ + ] rk3328_vop |-- vop@ff370000
vidconsole 0 [ + ] vidconsole0 | `-- vop@ff370000.vidconsole0
display 0 [ + ] rk3328_hdmi_rockchip |-- hdmi@ff3c0000
phy 0 [ + ] inno_hdmi_phy |-- phy@ff430000
clk 1 [ + ] rockchip_rk3328_cru |-- clock-controller@ff440000
sysreset 1 [ ] rockchip_sysreset | |-- sysreset
reset 0 [ + ] rockchip_reset | `-- reset
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Enable PCIe/NVMe support. Also, enable the reset
driver which is a prerequisite for PCIe support.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Enable ipv6, wget, and tftpput support
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Enable support for TPM2 devices. As the ATTPM20P TPM2 used on the
Gateworks Venice boards hangs off the SPI bus we enable SPI support
as well.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Enable BUTTON_GPIO flag for STM32MP15.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
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Enable BUTTON_GPIO flag for STM32MP15.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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Enable BUTTON_GPIO flag for STM32MP15.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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Enable BUTTON_GPIO flag for STM32MP15.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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Enable FASTBOOT relative flags for stm32mp13_defconfig.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
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The OHCI HCD is mandatory for USB 1.1 FS/LS device support, enable it.
This used to be enabled implicitly before, now that implicit dependency
disappeared and this got disabled. Enable it manually.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
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store bootcount in RTC block scratch register
Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
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https://source.denx.de/u-boot/custodians/u-boot-mpc8xx
This pull request adds support for temperature sensors et FPGA loading
on boards from CS GROUP France.
CI: https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/pipelines/20416
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enabled""
As reported by Jonas Karlman this series breaks booting on some AArch64
platforms with common use cases. For now the best path forward is to
revert the series.
This reverts commit 777c28460947371ada40868dc994dfe8537d7115, reversing
changes made to ab3453e7b12daef47b9e91da2a2a3d48615dc6fc.
Link: https://lore.kernel.org/u-boot/50dfa3d6-a1ca-4492-a3fc-8d8c56b40b43@kwiboo.se/
Signed-off-by: Tom Rini <trini@konsulko.com>
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All CSSI boards have an LM74 chip as temperature sensor.
Enable it.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
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MCR3000 board has some components tied to the SPI bus, like the Texas
Instruments LM74 temperature sensor.
Add support for SPI bus. The SPI chipselects are a bit special in the
way that they are driven by 3 bits in a register of the board's CPLD
where the value writen in those bits exclusively activates one of the
7 possible chipselects and value 0 sets all chipselets to inactive.
So add a special GPIO driver that simulates GPIOs for those chipselect.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
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Enable OF_UPSTREAM to use upstream DT and add renesas/ prefix to the
DEFAULT_DEVICE_TREE and OF_LIST. And thereby directly build DTB from
dts/upstream/src/ including *-u-boot.dtsi files from arch/$(ARCH)/dts/
directory.
The configuration update has been done using the following script:
```
sed -i '/^CONFIG_DEFAULT_DEVICE_TREE/ s@="@&renesas/@' `git grep -li renesas configs`
sed -i '/^CONFIG_OF_LIST/ s@r8a@renesas/&@g' `git grep -li renesas configs`
```
The RZN1 Snarc board does not seem to have a matching Linux kernel
DT counterpart, this is currently not switched to OF upstream.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
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Enable OF_UPSTREAM to use upstream DT and add renesas/ prefix to the
DEFAULT_DEVICE_TREE and OF_LIST. And thereby directly build DTB from
dts/upstream/src/ including *-u-boot.dtsi files from arch/$(ARCH)/dts/
directory.
The configuration update has been done using the following script:
```
sed -i '/^CONFIG_DEFAULT_DEVICE_TREE/ s@="@&renesas/@' `git grep -li renesas configs`
sed -i '/^CONFIG_OF_LIST/ s@r8a@renesas/&@g' `git grep -li renesas configs`
```
There are SoCs which are not included in this patch. The 32bit SoCs
require further infrastructure work. R8A779H0 is coming during the
next upstream DT synchronization cycle as it is not included in
current upstream DTs yet.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Adam Ford <aford173@gmail.com> # Beacon boards
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
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R-Car R8A77950 H3 ES1.* was only available to an internal development
group and needed a lot of quirks and workarounds. Public users only
have R-Car R8A77950 H3 ES2 and newer. Switch existing systems to use
R8A77951 device trees.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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The U-Boot build system can automatically paste -u-boot.dtsi at the
end of matching .dts during build. Stop emulating this behavior and
rename the -u-boot.dts files to -u-boot.dtsi, drop "#include...dts"
from those new u-boot.dtsi files, and update board configuration
accordingly.
The rename, '#include...dts` scrubbing and configuration update has
been done using the following script:
```
$ find . -name r[78]\*-u-boot.dts | sort -u | while read line ; do \
git mv ${line%-u-boot.dts}-u-boot.dts ${line%-u-boot.dts}-u-boot.dtsi ; \
done
$ sed -i '/^#include.*dts"/ d' `find . -name r[78]\*-u-boot.dtsi`
$ sed -i 's@-u-boot@@g' `git grep -li renesas configs`
```
The Salvator-X and ULCB board files have been updated manually.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Adam Ford <aford173@gmail.com>
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EMMC boot can fail due to the size of R5 SPL image growing beyond the
500KB of memory allocated in eMMC. Update offsets for eMMMC raw boot
to load each binary from the correct address in eMMC according to the
following eMMC layout:
boot0/1 partition
0x0+----------------------------------+
| tiboot3.bin (1 MB) |
0x800+----------------------------------+
| tispl.bin (2 MB) |
0x1800+-----------------------------------+
| u-boot.img (4 MB) |
0x3800+-----------------------------------+
| environment (128 KB) |
0x3900+-----------------------------------+
Signed-off-by: Judith Mendez <jm@ti.com>
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Modify defconfig to use generic timer and npcm reset driver
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
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Jonathan Humphreys <j-humphreys@ti.com> says:
Set basic settings needed for System Ready IR ACS testing, for several TI SoC
based platforms: AM64, AM62, AM62p, BeaglePlay, J7, and BeagleboneAI.
For AM64, AM62, and AM62p, also includes some config cleanup. Should be no
functional change.
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Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
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Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
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This is required to pass SystemReadyIR tests.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
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This is required to pass SystemReadyIR tests.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
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Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
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This is required to pass SystemReadyIR tests.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
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