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path: root/drivers/gpio
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2020-04-16test: pinmux: add pincontrol-gpio for pin configurationPatrick Delaunay
Add a simple pincontrol associated to the sandbox gpio driver, that allows to check pin configuration with the command pinmux. The pinmux test is also updated to test behavior with 2 pincontrols. Example to check LED pin configuration: => pinmux list | Device | Driver | Parent | pinctrl-gpio | sandbox_pinctrl_gpio | root_driver | pinctrl | sandbox_pinctrl | root_driver => pinmux dev pinctrl-gpio => pinmux status a0 : gpio input . a1 : gpio input . a2 : gpio input . a3 : gpio input . a4 : gpio input . a5 : gpio output . a6 : gpio output . ... Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16test: dm: update test for pins configuration in gpioPatrick Delaunay
Add tests for new API set_dir_flags and set_dir_flags and associated code in gpio uclass. Test support for new flags GPIO_OPEN_DRAIN, GPIO_OPEN_SOURCE GPIO_PULL_UP and GPIO_PULL_DOWN. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16gpio: sandbox: cleanup binding supportPatrick Delaunay
Cleanup binding support, use the generic binding by default (test u-class gpio_xlate_offs_flags function) and add specific binding for added value. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16gpio: add ops to set dir flagsPatrick Delaunay
Add the ops for GPIO driver set_dir_flags() to set the dir flags. The user can update the direction and configuration of each GPIO with a only call to dm_gpio_set_dir_flags() or dm_gpio_set_dir() and respecting the configuration provided by device tree (saved in desc->flags). When these optional ops are absent, the gpio uclass use the mandatory ops (direction_output, direction_input, get_value) and desc->flags to manage only the main dir flags: - GPIOD_IS_IN - GPIOD_IS_OUT - GPIOD_IS_OUT_ACTIVE - GPIOD_ACTIVE_LOW Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16gpio: add ops to get dir flagsPatrick Delaunay
Add the ops for GPIO driver get_dir_flags(), allows to get dynamically the current gpio configuration; it is used by the API function dm_gpio_get_dir_flags(). When these optional ops are absent, the gpio uclass continues to use the mandatory ops (direction_output, direction_input, get_value) and value of desc->flags to manage only the main dir flags: - GPIOD_IS_IN - GPIOD_IS_OUT - GPIOD_IS_OUT_ACTIVE - GPIOD_ACTIVE_LOW Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16gpio: add support of new GPIO direction flagPatrick Delaunay
This commit manages the new dir flags that can be used in gpio specifiers to indicate the pull-up or pull-down resistor configuration for output gpio (GPIO_PULL_UP, GPIO_PULL_DOWN) or the Open Drain/Open Source configuration for input gpio (GPIO_OPEN_DRAIN, GPIO_OPEN_SOURCE). These flags are already supported in Linux kernel in gpio lib. This patch only parse and save the direction flags in GPIO descriptor (desc->flags), it prepares the introduction of new ops to manage them. The GPIO uclass supports new GPIO flags from device-tree (GPIO_XXX define in include/dt-bindings/gpio/gpio.h) and translate them in the dir flags (GPIOD_XXX): - GPIO_PULL_UP => GPIOD_PULL_UP - GPIO_PULL_DOWN => GPIOD_PULL_DOWN - GPIO_OPEN_DRAIN => GPIOD_OPEN_DRAIN - GPIO_OPEN_SOURCE => GPIOD_OPEN_SOURCE This patch also adds protection in the check_dir_flags function for new invalid configuration of the dir flags. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16gpio: update dir_flags managementPatrick Delaunay
Update the flag management in GPIO uclass: the desc->flags is always combined with the requested flags and the GPIO descriptor is updated for further call. Add a function dm_gpio_get_dir_flags to get dynamically the current dir_flags (configuration and value). This patch prepare introduction of the dir flags support with new ops. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16gpio: add helper GPIOD_FLAGS_OUTPUTPatrick Delaunay
Add a macro to provide the GPIO output value according the dir flags content. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16gpio: add function check_dir_flagsPatrick Delaunay
Add a dir flags validity check with a new function check_dir_flags. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16gpio: add function _dm_gpio_set_dir_flagsPatrick Delaunay
Introduce the function _dm_gpio_set_dir_flags to set dir flags without check if the GPIO is reserved. Separate the reserved check for "set_dir" and "set_dir_flags". This patch is a preliminary step to add new ops. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16gpio: add function _gpio_get_valuePatrick Delaunay
Introduce the function _gpio_get_value to get the GPIO value without check if it is reserved. This patch prepare new ops introduction. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16gpio: add gpio descriptor initialization helperPatrick Delaunay
Add a helper function gpio_desc_init() to initialize the gpio descriptor; with this function the flags will be always set to 0. It wasn't the case before this patch in dm_gpio_lookup_name. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16gpio: remove the open_drain API and opsPatrick Delaunay
This patch removes the ops get_open_drain/set_open_drain and the API dm_gpio_get_open_drain/dm_gpio_set_open_drain. The ops only provided in one driver (mpc8xxx gpio) and the associated API is never called in boards. This patch prepare a more generic set/get_dir_flags ops, including the open drain property. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-03-31gpio/mpc83xx_spisel_boot.c: gpio driver for SPISEL_BOOT signalKlaus H. Sorensen
Some SoCs in the mpc83xx family, e.g. mpc8309, have a dedicated spi chip select, SPISEL_BOOT, that is used by the boot code to boot from flash. This chip select will typically be used to select a SPI boot flash. The SPISEL_BOOT signal is controlled by a single bit in the SPI_CS register. Implement a gpio driver for the spi chip select register. This allows a spi driver capable of using gpios as chip select, to bind a chip select to SPISEL_BOOT. It may be a little odd to do this as a GPIO driver, since the signal is neither GP or I, but it is quite convenient to present it to the spi driver that way. The alternative it to teach mpc8xxx_spi to handle the SPISEL_BOOT signal itself (that is how it's done in the linux kernel, see commit 69b921acae8a) Signed-off-by: Klaus H. Sorensen <khso@prevas.dk> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-03-31gpio: mpc8xxx: don't do RMW on gpdat register when setting valueRasmus Villemoes
The driver correctly handles reading back the value of an output gpio by reading from the shadow register for output, and from gpdat for inputs. Unfortunately, when setting the value of some gpio, we do a RMW cycle on the gpdat register without taking the shadow register into account, thus accidentally setting other output gpios (at least those whose value cannot be read back) to 0 at the same time. When changing a gpio from input to output, we still need to make sure it initially has the requested value. So, the procedure is - update the shadow register - compute the new gpdir register - write the bitwise and of the shadow and new gpdir register to gpdat - write the new gpdir register Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-03-31gpio: mpc8xxx: don't modify gpdat when setting gpio as inputRasmus Villemoes
Since some chips don't support reading back the value of output gpios from the gpdat register, we should not do a RMW cycle (i.e., the clrbits_be32) on the gpdat register when setting a gpio as input, as that might accidentally change the value of some other (still configured as output) gpio. The extra indirection through mpc8xxx_gpio_set_in() does not help readability, so just fold the gpdir update into mpc8xxx_gpio_direction_input(). Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-02-11Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dmTom Rini
sandbox conversion to SDL2 TPM TEE driver Various minor sandbox video enhancements New driver model core utility functions
2020-02-09gpio: Let DM_74X164 be built without CONFIG_SPL_GPIOFabio Estevam
Since commit bcee8d6764f9 ("dm: gpio: Allow control of GPIO uclass in SPL") CONFIG_DM_74X164 is no longer built for mx7dsabresd_defconfig, as this target does not use CONFIG_SPL_GPIO. Remove such dependency and let the the 74X164 GPIO driver be built again. This restores Ethernet functionality on the imx7-sdb board as the Ethernet reset PHY comes from a GPIO driven by a 74LV595PW I/O expander. Fixes: bcee8d6764f9 ("dm: gpio: Allow control of GPIO uclass in SPL") Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Alifer Moraes <alifer.wsdm@gmail.com>
2020-02-07gpio: cortina_gpio: add DM_GPIO driver for CAxxxx SoCsJason Li
DM_GPIO based GPIO controller driver for CAxxxx SoCs. This driver support multiple CPU architectures and Cortina Access SoC platforms. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: core: Require users of devres to include the headerSimon Glass
At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05gpio: Rename free() to rfree()Simon Glass
This function name conflicts with our desire to #define free() to something else on sandbox. Since it deals with resources, rename it to rfree(). Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-04Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- Various minor fixes for x86 - Switch to ACPI mode on Intel edison - Support run-time configuration for NS16550 driver - Update coreboot and slimbootloader serial drivers to use NS16550 run-time configuration - ICH SPI driver fixes to hardware sequencing erase case - Move ITSS from Apollo Lake to a more generic location - Intel GPIO driver bug fixes - Move to vs2017-win2016 platform build host for Azure pipelines
2020-02-04gpio: intel_gpio: Fix register/bit offsets intel_gpio_get_value()Wolfgang Wallner
Fix the following in intel_gpio_get_value(): * The value of the register is contained in the variable 'reg', not in 'mode'. The variable 'mode' contains only the configuration whether the gpio is currently an input or an output. * The correct bitmasks for the input and output value are PAD_CFG0_RX_STATE and PAD_CFG0_TX_STATE. Use them instead of the currently used PAD_CFG0_RX_STATE_BIT and PAD_CFG0_TX_STATE_BIT. Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04gpio: intel_gpio: Clear tx state bit when setting outputWolfgang Wallner
Add missing 'PAD_CFG0_TX_STATE' to the clear mask for pcr_clrsetbits32(). Otherwise this bit cannot be cleared again after it has been set once. Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04gpio: intel_gpio: Pass pinctrl device to pcr_clrsetbits32()Wolfgang Wallner
The function pcr_clrsetbits32() expects a device with a P2SB parent device. In intel_gpio_direction_output() and intel_gpio_set_value() the device 'dev' is passed to pcr_clrsetbits32(), which is a gpio-controller with a device 'pinctrl' as parent. This does not match the expectations of pcr_clrsetbits32(). But the 'pinctrl' device has a P2SB as parent. Pass the 'pinctrl' device instead of the 'dev' device to pcr_clrsetbits32(). Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04gpio: da8xx_gpio: Add "ti,keystone-gpio" compatibleVignesh Raghavendra
Add "ti,keystone-gpio" compatible so as be able to use Linux DT files as is. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04gpio: da8xx_gpio: Fix compiler warningVignesh Raghavendra
Fix below compiler warning for 64bit builds drivers/gpio/da8xx_gpio.c: In function ‘davinci_get_gpio_bank’: drivers/gpio/da8xx_gpio.c:446:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] return (struct davinci_gpio *)addr; Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04gpio: pca953x_gpio: Add support for 24 bit IO expanderVignesh Raghavendra
J721e EVM has a TCA6424 IO expander that has 24 GPIOs. Add support for the same Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-23gpio: bcm6345: allow to use this driver on arm bcm68360Philippe Reynes
This IP is also used on some arm SoC, so we allow to use it on arm bcm68360 too. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-01-14gpio: mxc_gpio: add support for i.MXRT1050Giulio Benetti
Add i.MXRT1050 support, there are 5 GPIO banks. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2019-12-15x86: Add a generic Intel GPIO driverSimon Glass
Add a GPIO driver which uses the pinctrl driver to access the pad information. This driver relies on the GPIO nodes being subnodes to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15dm: gpio: Allow control of GPIO uclass in SPLSimon Glass
At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass is included in SPL/TPL without any control for boards. Some boards may want to disable this to reduce code size where GPIOs are not needed in SPL or TPL. Add a new Kconfig option to permit this. Default it to 'y' so that existing boards work correctly. Change existing uses of CONFIG_DM_GPIO to CONFIG_IS_ENABLED(DM_GPIO) to preserve the current behaviour. Also update the 74x164 GPIO driver since it cannot build with SPL. This allows us to remove the hacks in config_uncmd_spl.h and Makefile.uncmd_spl (eventually those files should be removed). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-03gpio: at91_gpio: Add bank namesJames Byrne
Make the at91_gpio driver set sensible GPIO bank names in the platform data. This makes the 'gpio status' command a lot more useful. Signed-off-by: James Byrne <james.byrne@origamienergy.com> Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-30gpio: da8xx_gpio: Fix the _gpio_direction_output functionKeerthy
_gpio_direction_output function currently calls gpio_set_value with the wrong gpio number. gpio_set_value in the uclass driver expects a different gpio number and the _gpio_direction_output is currently providing the number specific to the bank. Hence fix it by calling the _gpio_set_value function instead. Reported-by: Faiz Abbas <faiz_abbas@ti.com> Fixes: 8e51c0f254 ("dm: gpio: Add DM compatibility to GPIO driver for Davinci") Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-10-24gpio: zynq: Add gpio driver support for PMC gpioShubhrajyoti Datta
This patch adds support for gpio driver for pmc gpio. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24gpio: zynq: Add gpio driver support for VersalAshok Reddy Soma
This patch adds support for gpio driver for versal platform Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-18gpio: sifive: add support for DM based gpio driver for FU540-SoCSagar Shrikant Kadam
This patch adds a DM based driver model for gpio controller present in FU540-C000 SoC on HiFive Unleashed A00 board. This SoC has one GPIO bank and 16 GPIO lines in total, out of which GPIO0 to GPIO9 and GPIO15 are routed to the J1 header on the board. This implementation is ported from linux based gpio driver submitted for review by Wesley W. Terpstra <wesley@sifive.com> and/or Atish Patra <atish.patra@wdc.com> (many thanks !!). The linux driver can be referred here [1] [1]: https://lkml.org/lkml/2018/10/9/1103 Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-09Merge tag 'xilinx-for-v2020.01' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx/FPGA changes for v2020.01 FPGA: - Enable fpga loading on Versal - Minor fix Microblaze: - Fix LMB configurations to support initrds - Some other cleanups Zynq: - Minor config/dt changes - Add distro boot support for usb1 and mmc1 - Remove Xilinx private boot commands and use only distro boot ZynqMP: - Kconfig cleanups, defconfig updates - Update some dt files - Add firmware driver for talking to PMUFW - Extend distro boot support for jtag - Add new IDs - Add system controller configurations - Convert code to talk firmware via mailbox or SMCs Versal: - Add board_late_init() - Add run time DT memory setup - Add DFU support - Extend distro boot support for jtag and dfu - Add clock driver - Tune mini configurations Xilinx: - Improve documentation (boot scripts, dt binding) - Enable run time initrd_high calculation - Define default SYS_PROMPT - Add zynq/zynqmp virtual defconfig Drivers: - Add Xilinx mailbox driver for talking to firmware - Clean zynq_gem for Versal - Move ZYNQ_HISPD_BROKEN to Kconfig - Wire genphy_init() in phy.c - Add Xilinx gii2rgmii bridge - Cleanup zynq_sdhci - dwc3 fix - zynq_gpio fix - axi_emac fix Others: - apalis-tk1 - clean config file
2019-10-09Merge tag 'u-boot-imx-20191009' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20191009 ------------------- Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/595148532 - MX6UL / ULZ - Toradex board - Allow to set OCRAM for MX6Q/D - MX7ULP - MX8: (container image, imx8mq_mek), SCU API - fix several board booting from SD/EMMC (cubox-i for example) - pico boards [trini: display5 merged manually] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-10-08spi: Add support for SPL_OF_PLATDATA to mxs_gpio.c driverLukasz Majewski
After this patch the mxs_gpio.c DM/DTS driver can be used at early SPL to read states of gpio pins (and for example alter the boot flow). It was necessary to adjust its name to 'fsl_imx_2{38}_gpio' to match requirements for SPL_OF_PLATDATA usage. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08gpio: zynq: fix issue in set gpio output directionAshok Reddy Soma
This patch fixes zynq_gpio_direction() to call driver specific zynq_gpio_set_value function rather than top level gpio_set_value. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08spl: Allow tiny printf() to be controlled in SPL and TPLSimon Glass
At present there is only one control for this and it is used for both SPL and TPL. But SPL might have a lot more space than TPL so the extra cost of a full printf() might be acceptable. Split the option into two, providing separate SPL and TPL controls. The TPL setting defaults to the same as SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08sandbox: spmi: Add ranges property for address translationSimon Glass
At present address translation does not work since there is no ranges property in the spmi nodes. Add empty ranges properties and a little more logging so that this shows the error: /tmp/b/sandbox/u-boot -d /tmp/b/sandbox/arch/sandbox/dts/test.dtb \ -c "ut dm spmi_access_peripheral" -L7 -v ... pm8916_gpio_probe() bad address: returning err=-22 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-23kconfig: Convert CONFIG_MXS_GPIO to KconfigLukasz Majewski
This converts the following to Kconfig: CONFIG_MXS_GPIO Travis-CI: https://travis-ci.org/lmajewski/u-boot-dfu/builds/571260789 Signed-off-by: Lukasz Majewski <lukma@denx.de> Acked-by: Peng Fan <peng.fan@nxp.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-29gpio: fixes for gpio-hog supportHeiko Schocher
recently added gpio hog patch was "in discussion" state with Simon Glass. This patch now adds most of comments from Simon Glass. Signed-off-by: Heiko Schocher <hs@denx.de>
2019-07-19gpio: Add missing parenthesis to the GPIO_TO_PORT defineLukasz Majewski
Add missing parenthesis to the GPIO_TO_PORT macro. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-19gpio: mxs: Add support for DM/DTS in the mxs_gpio.c driver (DM_GPIO)Lukasz Majewski
This patch adds support for DM/DTS in the mxs_gpio.c driver. Information regarding per gpio controller pin number is passed via DTS. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
2019-07-16Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
- Beelink-x2 STB support (Marcus) - H6 DDR3, LPDDR3 changes (Andre, Jernej) - H6 pin controller, USB PHY (Andre)
2019-07-16sunxi: gpio: Enable support for H6 pin controllerAndre Przywara
The Allwinner H6 pin controller is not really special, at least not when it comes to normal GPIO operation. Add the H6 compatible strings to the list of recognised strings, to make GPIOs work for H6 boards. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64 Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
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