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2022-07-19i2c: avoid dynamic stack use in dm_i2c_writeRasmus Villemoes
The size of the dynamic stack allocation here is bounded by the if() statement. However, just allocating the maximum size up-front and doing malloc() if necessary avoids code duplication (the i2c_setup_offset() until the invocation of ->xfer), and generates much better (smaller) code: bloat-o-meter drivers/i2c/i2c-uclass.o.{0,1} add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-144 (-144) Function old new delta dm_i2c_write 552 408 -144 Total: Before=3828, After=3684, chg -3.76% It also makes static analysis of maximum stack usage (using the .su files that are automatically generated during build) easier if there are no lines saying "dynamic". [This is not entirely equivalent to the existing code; this now uses the stack for len <= 64 rather than len <= 63, but that seems like a more natural limit.] Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Heiko Schocher <hs@denx.de>
2022-07-19i2c: nuvoton: Add NPCM7xx i2c driverJim Liu
Add Nuvoton BMC NPCM750 i2c driver Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2022-07-19i2c: ast_i2c: Remove SCL direct drive modeEddie James
SCL direct drive mode prevents communication with devices that do clock stretching, so disable. The Linux driver doesn't use this mode, and the engine can handle clock stretching. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: ryan_chen <ryan_chen@aspeedtech.com>
2022-07-12i2c: stm32: add support for the st,stm32mp13 SOCPatrick Delaunay
The stm32mp13 soc differs from the stm32mp15 in terms of clear register offset for controlling the FMP (Fast Mode Plus). Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-08i2c: Remove non-DM_I2C support from davinci_i2c.cTom Rini
As the migration deadline has passed, and all platforms have been migrated, remove the non-DM code here. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07spl: Ensure all SPL symbols in Kconfig have some SPL dependencyTom Rini
Tighten up symbol dependencies in a number of places. Ensure that a SPL specific option has at least a direct dependency on SPL. In places where it's clear that we depend on something more specific, use that dependency instead. This means in a very small number of places we can drop redundant dependencies. Reported-by: Pali Rohár <pali@kernel.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-06i2c/aspeed: Add AST2600 compatibleJoel Stanley
Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2022-07-06i2c/aspeed: Fix reset controlJoel Stanley
The reset control was written for the ast2500 and directly programs the clocking register. So we can share the code with other SoC generations use the reset device to deassert the I2C reset line. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2022-06-28arm: samsung: Migrate a number of symbols to KconfigTom Rini
- In a number of cases, use CONFIG_ARCH_EXYNOS[45] rather than CONFIG_EXYNOS[45] - In other cases, test for CONFIG_ARCH_EXYNOS or CONFIG_ARCH_S5PC1XX - Migrate specific SoC CONFIG values to Kconfig - Use CONFIG_TARGET_x rather than CONFIG_x - Migrate other CONFIG_EXYNOS_x symbols to Kconfig - Reference CONFIG_EXYNOS_RELOCATE_CODE_BASE directly as EXYNOS_RELOCATE_CODE_BASE - Rename CONFIG_S5P_PA_SYSRAM to CONFIG_SMP_PEN_ADDR to match the rest of U-Boot usage. Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-20Merge branch 'master' into nextTom Rini
Merge in v2022.07-rc5.
2022-06-17stm32mp1: fix reference for STMicroelectronicsPatrick Delaunay
Replace reference to the correct name STMicroelectronics Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-13arm: tegra: Update some DT compatiblesPeter Robinson
Some of the DT compatibles have changed upstream so add new DT compatibles to ensure things continue to keep working if the device trees are updated. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2022-05-10i2c: ihs: intel: Fix typo in comments (actual)Michal Simek
s/actucal/actual/g Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2022-05-03pci: Add mask parameter to dm_pci_map_bar()Andrew Scull
Add a mask parameter to control the lookup of the PCI region from which the mapping can be made. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03pci: Map bars with offset and lengthAndrew Scull
Evolve dm_pci_map_bar() to include an offset and length parameter. These allow a portion of the memory to be mapped and range checks to be applied. Passing both the offset and length as zero results in the previous behaviour and this is used to migrate the previous callers. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-02vpl: Add Kconfig options for VPLSimon Glass
Add VPL versions of commonly used Kconfig options. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-05Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
A big part is the DM pinctrl driver, which allows us to get rid of quite some custom pinmux code and make the whole port much more robust. Many thanks to Samuel for that nice contribution! There are some more or less cosmetic warnings about missing clocks right now, I will send the trivial fixes for that later. Another big chunk is the mkimage upgrade, which adds RISC-V and TOC0 (secure images) support. Both features are unused at the moment, but I have an always-secure board that will use that once the DT lands in the kernel. On top of those big things we have some smaller fixes, improving the I2C DM support, fixing some H6/H616 early clock setup and improving the eMMC boot partition support. The gitlab CI completed successfully, including the build test for all 161 sunxi boards. I also boot tested on a A64, A20, H3, H6, and F1C100 board. USB, SD card, eMMC, and Ethernet all work there (where applicable).
2022-04-04i2c: sun8i_rsb: Add support for DM clocks and resetsSamuel Holland
Currently, clock/reset setup for this device is handled by a platform-specific function and is intermixed with non-DM pinctrl setup. Use the devicetree to get clocks/resets, which disentagles it from the pinctrl setup in preparation for moving to DM_PINCTRL. This also has the added benefit of picking the right clock/reset bits for H6 and new SoCs that have a rearranged PRCM MMIO space. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04i2c: sun8i_rsb: Initialize chips in .child_pre_probeSamuel Holland
Chips attached to the RSB bus require an initialization command before they can be used. (Specifically, this command programs the chip's runtime address.) The driver does this in its .probe_chip hook, under the assumption that .probe_chip is called during child probe. This is not the case; .probe_chip is only called by dm_i2c_probe, which is intended for use by board-level code, not for chips with OF nodes. Since this initialization command must be run before a child chip can be used, do it before probing each child. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04i2c: sun6i_p2wi: Add support for DM clocks and resetsSamuel Holland
Currently, clock/reset setup for this device is handled by a platform-specific function and is intermixed with non-DM pinctrl setup. Use the devicetree to get clocks/resets, which disentagles it from the pinctrl setup in preparation for moving to DM_PINCTRL. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04i2c: sun6i_p2wi: Initialize chips in .child_pre_probeSamuel Holland
Chips attached to the P2WI bus require an initialization command before they can be used. (Specifically, this switches the chip from I2C mode to P2WI mode.) The driver does this in its .probe_chip hook, under the assumption that .probe_chip is called during child probe. This is not the case; .probe_chip is only called by dm_i2c_probe, which is intended for use by board-level code, not for chips with OF nodes. Since this initialization command must be run before a child chip can be used, do it before probing each child. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04i2c: sun8i_rsb: Only do non-DM pin setup for non-DM I2CSamuel Holland
When the DM_I2C driver is loaded, the pin setup is done automatically from the device tree by the pinctrl driver. Clean up the code in the process: remove #ifdefs and recognize that the pin configuration is the same for all sun8i/sun50i SoCs, not just those which select CONFIG_MACH_SUN8I. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04i2c: sun6i_p2wi: Only do non-DM pin setup for non-DM I2CSamuel Holland
When the DM_I2C driver is loaded, the pin setup is done automatically from the device tree by the pinctrl driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-03-28Merge tag 'v2022.04-rc5' into nextTom Rini
Prepare v2022.04-rc5
2022-03-23i2c: fix always-true condition in i2c_probe_chip()Nikita Yushchenko
Per dm_i2c_ops.probe_chip documentation, i2c_probe_chip() shall fallback to default probe method when .probe_chip() returns -ENOSYS. Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2022-03-09i2c: i2c-cdns: Prevent early termination of writeSai Pavan Boddu
During sequential loading of data, hold the bus to prevent controller from sending stop signal in case no data is available in fifo. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/2407b39d305999cb42438c5423aebc3b514acabb.1646122610.git.michal.simek@xilinx.com
2022-03-09i2c: i2c-cdns: Fix write transaction stateSai Pavan Boddu
Start write transfer after loading data to FIFO. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/f0b3e443daa7758e00dfdcc245cf6b2120b0e907.1646122610.git.michal.simek@xilinx.com
2022-03-09i2c: i2c-cdns: Start read transaction after write to transfer_size regSai Pavan Boddu
Avoid a race condition where read transaction is started keeping expected bytes as 0. Which sometimes would result in sending STOP signal as no data is expected. Observed on QEMU platform. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/487c8026791bfd60719403a2df2c54bb0ae99232.1646122610.git.michal.simek@xilinx.com
2022-02-21ti: i2c: fix probe_chip() return valueNikita Yushchenko
Per documentation, dm_i2c_ops.probe_chip() shall return -EREMOTEIO if probe fails. Currently, omap_i2c_probe_chip() returns 1 instead. Fix that. Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2022-02-01i2c: muxes: pca954x: add PCA9847 variantVladimir Oltean
This seems to be very similar to the already existing PCA9547, save for the fact that it supports 0.8V and doesn't support 5V. In fact, it is so similar to the PCA9547 that the NXP LS1028A-RDB board has been driving this chip using a "nxp,pca9547" compatible string. Create a new compatible for the PCA9847 (which is the same as in Linux) and define the same operating parameters for it as for PCA9547. Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: Michael Walle <michael@walle.cc>
2022-01-30i2c: mvtwsi: Add compatible string for allwinner, sun4i-a10-i2cChris Morgan
This adds a compatible string for the Allwinner Sun4i-A10 I2C controller. Without this, boards based on the R8 and A13 (at a minimum) fail to boot. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Acked-by: Akash Gajjar <gajjar04akash@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-01-19doc: replace @return by Return:Heinrich Schuchardt
Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-13i2c: at91: add compatible with microchip,sam9x60-i2cEugen Hristev
Add compatible and data platform struct for sam9x60 SoC. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-12-27Convert CONFIG_SYS_IMMR to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_IMMR We do this by consolidating the SYS_IMMR options we have and providing defaults. We also, in the few places where M68K was also sharing code with these platforms, define it within the file to CONFIG_SYS_MBAR to match usage. This should be cleaned up longer term. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-20i2c: mvtwsi: Swab the register address if its size is > 1Stefan Roese
Testing on Armada XP with an EEPROM using register address with size of 2 has shown, that the register address bytes are sent to the I2C EEPROM in the incorrect order. This patch swabs the address bytes so that the correct address is transferred to the I2C device. BTW: This worked without any issues before migrating Armada XP to DM I2C. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Samuel Holland <samuel@sholland.org> Cc: Baruch Siach <baruch@tkos.co.il> Cc: Pali Rohár <pali@kernel.org> Cc: Marek Behún <marek.behun@nic.cz> Tested-by: Marek Behún <marek.behun@nic.cz>
2021-12-02i2c: Add Microchip PolarFire SoC I2C driverPadmarao Begari
Add I2C driver code for the Microchip PolarFire SoC. This driver supports I2C data transfer and probe for I2C slave addresses. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-21Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- Turris MOX and Omnia changes, mostly moving to Kconfig (Marek) - a37xx: pci: Misc smaller fixes (Pali) - cmd: tlv_eeprom: Fix building with DEBUG enabled (Sven) - termios_linux.h: Fix tcsendbreak() implementation (Pali) - mvebu: Add missing "if SPL" (Tom)
2021-10-21arm: mvebu: a3720: Create Kconfig option for I2C_MVMarek Behún
Move the config option CONFIG_I2C_MV to a Kconfig option CONFIG_SYS_I2C_MV and move the default definition from config header files into defconfigs. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-20i2c: ocores: Fix -Wint-to-pointer-cast warningBin Meng
The following warning is seen in ocores_i2c.c in a 32-bit build: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Change to use dev_read_addr_ptr(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-12Merge tag 'u-boot-stm32-20211012' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm - Disable ATAGS for STM32 MCU and MPU boards - Disable bi_boot_params for STM32 MCU and MPU boards - Update stm32-usbphyc node management - Convert CONFIG_STM32_FLASH to Kconfig for STM32 MCU boards - Convert some USB config flags to Kconfig for various boards - Convert CONFIG_BOOTCOMMAND flag to Kconfig for STM32 F429 board - Remove specific CONFIG_STV0991 flags - Remove unused CONFIG_USER_LOWLEVEL_INIT flag - Add ofdata_to_platdata() callback for stm32_spi driver - Update for stm32f7_i2c driver - Remove gpio_hog_probe_all() from STM32 MP1 board - Fix bind command Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-12i2c: Add a DM_I2C driver for the sun8i RSB controllerSamuel Holland
This bus controller is used to communicate with an X-Powers AXP PMIC. Currently, various drivers access PMIC registers through a platform- specific non-DM "pmic_bus" interface, which depends on the legacy I2C framework. In order to convert those drivers to use DM_PMIC, this bus needs a DM_I2C driver. Refactor the rsb functions to take the base address as a parameter, and implement both the existing interface (which is still needed in SPL) and the DM_I2C interface on top of them. The register for switching between I2C/P2WI/RSB mode is the same across all PMIC variants, so move that to the common header. There are only a couple of pairs of hardware/runtime addresses used across all PMIC variants. So far the code expected only the "primary" pair, but some PMICs like the AXP305 and AXP805 use the secondary pair, so add support for that to the DM driver as well. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-12i2c: Add a DM_I2C driver for the sun6i P2WI controllerSamuel Holland
This bus controller is used to communicate with an X-Powers AXP PMIC. Currently, various drivers access PMIC registers through a platform- specific non-DM "pmic_bus" interface, which depends on the legacy I2C framework. In order to convert those drivers to use DM_PMIC, this bus needs a DM_I2C driver. Refactor the p2wi functions to take the base address as a parameter, and implement both the existing interface (which is still needed in SPL) and the DM_I2C interface on top of them. The register for switching between I2C/P2WI/RSB mode is the same across all PMIC variants. Move that to the common header, so it can be used by both interface implementations. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-08i2c: stm32f7: compute i2cclk only one timePatrick Delaunay
Compute i2cclk only one time in stm32_i2c_compute_timing() and remove setup parameter (accessible in i2c_priv). Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08i2c: stm32f7: add support for DNF i2c-digital-filter bindingPatrick Delaunay
Add the support for the i2c-digital-filter binding, allowing to enable the digital filter via the device-tree and indicate its value in the DT Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08i2c: stm32f7: fix configuration of the digital filterPatrick Delaunay
The digital filter related computation are present in the driver however the programming of the filter within the IP is missing. The maximum value for the DNF is wrong and should be 15 instead of 16. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08i2c: stm32f7: support DT binding i2c-analog-filterPatrick Delaunay
Replace driver internally coded enabling/disabling of the analog-filter with the DT binding "i2c-analog-filter". Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08i2c: stm32f7: move driver data of each instance in a privdataPatrick Delaunay
Today all the I2C instance point on the same global variable stm32_i2c_setup according the compatible: i2c_priv->setup = pointer to the same driver data. This patch changes this driver data (stm32f7_setup and stm32mp15_setup) to a const struct and move the timing struct 'setup' as element of i2c privdata, initialized in stm32_ofdata_to_platdata() with the driver configuration data. This patch solves issues when several I2C instance have not the same clock source or not the same configuration: each timing setup is saved is the I2C privdata. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-09-30WS cleanup: remove SPACE(s) followed by TABWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30WS cleanup: remove excessive empty linesWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-28i2c: mvtwsi: Add support for DM clocks and resetsSamuel Holland
The controller may need to have clocks/resets enabled for it to work. Add support for this. Since the clocks/resets are optional on some platforms (per the device tree binding), do not prevent probing the controller if they are missing. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Heiko Schocher <hs@denx.de>
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