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2023-03-09mtd: nand: arasan: Set ofnode valueAshok Reddy Soma
Ofnode value is not set, so all the DT properties are not being read and due to this default values are being used. Find nand node and set chip->flash_node value. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230224050709.30014-3-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09mtd: nand: arasan: Remove hardcoded bbt optionAshok Reddy Soma
Bad block table option is hardcoded to read from flash with NAND_BBT_USE_FLASH option. This decision should be done based on DT property. Remove this hardcoding, to be able to use DT property. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230224050709.30014-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-02mtd: Drop unused kb9202_nand driverSimon Glass
This is not used since time out of mind. Drop the driver and Kconfig option. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-03-01arm: mvebu: Add support for generating NAND kwbimagePali Rohár
Add a new Kconfig option CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND which instruct make to generate kwbimage with NAND header. This image is used for booting from NAND flash (either SPI or parallel). Support is very simple, SPL after finishes DDR training returns back to the BootROM (via CONFIG_SPL_BOOTROM_SUPPORT option) and BootROM then loads and executes U-Boot proper. To generate correct kwbimage NAND header, it is required to set following Kconfig options: CONFIG_SYS_NAND_PAGE_SIZE CONFIG_SYS_NAND_BLOCK_SIZE CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION They are used only by make / mkimage when generating final kwbimage. CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION is a new mvebu specific Kconfig option which is set into kwbimage NAND_BADBLK_LOCATION header field. Signed-off-by: Pali Rohár <pali@kernel.org>
2023-02-27mtd: nand: Show reserved block in chip.eraseMichael Trimarchi
The "nand chip.erase" command always printed as bad blocks even in the case of reserved blocks. Reserved blocks are used for storing bad block tables. The patch displays "bbt reserved" when printing reserved blocks in "nand chip.erase" command. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-02-27mtd: spinand: Fix display of unknown raw IDPatrice Chotard
In case ID is not found in manufacturer table, the raw ID is printed using %*phN format which is not supported by lib/vsprintf.c. The information displayed doesn't reflect the raw ID return by the unknown spi-nand. Use %02x format instead, as done in spi-nor-core.c. For example, before this patch: ERROR: spi-nand: spi_nand flash@0: unknown raw ID f74ec040 after ERROR: spi-nand: spi_nand flash@0: unknown raw ID 00 c2 26 03 Fixes: 0a6d6bae0386 ("mtd: nand: Add core infrastructure to support SPI NANDs") Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-02-27mtd: rawnand: brcmnand: fix OOB R/W with Hamming ECCÁlvaro Fernández Rojas
Hamming ECC doesn't cover the OOB data, so reading or writing OOB shall always be done without ECC enabled. This is a problem when adding JFFS2 cleanmarkers to erased blocks. If JFFS2 clenmarkers are added to the OOB with ECC enabled, OOB bytes will be changed from ff ff ff to 00 00 00, reporting incorrect ECC errors. Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller") Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210224080210.23686-1-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-02-27mtd: rawnand: brcmnand: support v2.1-v2.2 controllersÁlvaro Fernández Rojas
v2.1: tested on Netgear DGND3700v1 (BCM6368) v2.2: tested on Netgear DGND3700v2 (BCM6362) Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-6-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-02-27mtd: rawnand: brcmnand: rename page sizesÁlvaro Fernández Rojas
Current pages sizes apply to controllers after v3.4 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-4-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-02-27mtd: rawnand: brcmnand: fix CS0 layoutÁlvaro Fernández Rojas
Only v3.3-v5.0 have a different CS0 layout. Controllers before v3.3 use the same layout for every CS. Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller") Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-3-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-02-27mtd: rawnand: brcmnand: rename v4 registersÁlvaro Fernández Rojas
These registers are also used on v3.3. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-2-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-02-27mtd: rawnand: brcmnand: correctly verify erased pagesÁlvaro Fernández Rojas
The current code checks that the whole OOB area is erased. This is a problem when JFFS2 cleanmarkers are added to the OOB, since it will fail due to the usable OOB bytes not being 0xff. Correct this by only checking that data and ECC bytes aren't 0xff. Fixes: 02b88eea9f9c ("mtd: brcmnand: Add check for erased page bitflips") Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200512082451.771212-1-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-02-27mtd: nand: brcmnand: Add support for flash-dma v0Kamal Dasu
This change adds support for flash dma v0.0. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-02-27mtd: rawnand: brcmnand: Fix ecc chunk calculation for erased page bitfipsClaire Lin
In brcmstb_nand_verify_erased_page(), the ECC chunk pointer calculation while correcting erased page bitflips is wrong, fix it. Fixes: 02b88eea9f9c ("mtd: brcmnand: Add check for erased page bitflips") Signed-off-by: Claire Lin <claire.lin@broadcom.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-02-27mtd: rawnand: brcmnand: Add support for v7.3 controllerKamal Dasu
This change adds support for brcm NAND v7.3 controller. This controller uses a newer version of flash_dma engine and change mostly implements these differences. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-02-27mtd: rawnand: brcmnand: Refactored code to introduce helper functionsKamal Dasu
Refactored NAND ECC and CMD address configuration code to use helper functions. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-02-27mtd: nand: Mark reserved blocksAshok Reddy Soma
Reserved blocks are used for storing bad block tables. With "nand bad" command, these reserved blocks are shown as bad blocks. This is leading to confusion when compared with Linux bad blocks. Hence, display "bbt reserved" when printing reserved blocks with "nand bad" command. To acheive this, return 2 which represents reserved from nand_isbad_bbt() instead of 1 in case of reserved blocks and catch it in cmd/nand.c. "nand bad" command display's hexadecimal numbers, so add "0x" prefix. Example log will show up as below. ZynqMP> nand bad Device 0 bad blocks: 0x00400000 0x16800000 0x16c00000 0x17000000 0x3d800000 0x3e400000 0xe8400000 0xff000000 (bbt reserved) 0xff400000 (bbt reserved) 0xff800000 (bbt reserved) 0xffc00000 (bbt reserved) 0x116800000 0x116c00000 0x1ff000000 (bbt reserved) 0x1ff400000 (bbt reserved) 0x1ff800000 (bbt reserved) 0x1ffc00000 (bbt reserved) Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-By: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-02-07mtd: Drop unused nand_plat driverSimon Glass
This is not used since this commit: 936478e797a SPARC: Remove Drop the driver and Kconfig option. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07mtd: Drop unused fsmc_nand driverSimon Glass
This is not used since this commit: 570c3dcfc15 arm: Remove spear600 boards and the rest of SPEAr support Drop the driver and Kconfig option. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-02-07mtd: Drop unused fsl_upm driverSimon Glass
This is not used since this commit: 8d1e3cb1400 powerpc: mpc83xx: remove MPC8360ERDK, EMPC8360EMDS support Drop the driver and Kconfig option. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
2023-02-07nand: Drop CONFIG_NAND_SPEARSimon Glass
This is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-01-27Merge tag 'xilinx-for-v2023.04-rc1' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx chnages for v2023.04-rc1 makefile: - Add multi_dtb_fit dependency clk: - Handle error cases microblaze: - Disable falcon mode and cleanup code around xilinx: - Enable regular expression matching in board_fit_config_name_match() - Fix FRU handling for 0xC1 format - Fix Xilinx legacy format eeprom parsing zynqmp: - Some DT updates/cleanups - Fix IDcode for xck24 - Remove empty mini config files - Add support for k24 versal: - Remove empty mini config files versal_net: - Setup timer when runs in EL3 - Build u-boot.elf for mini configurations zynq-gem: - Add support for new compatible strings - Remove support for Avnet Ultrazedev SOM - Handle SGMII with PCS phy spi: - Add support for gigadevice parts misc: - Remove CONFIG_TARGET_VENUS ifdef - Add missing headers to remove sparse warnings
2023-01-26mtd: spi-nor: Add support for Infineon s25fs256tTakahiro Kuwano
Infineon S25FS256T is 256Mbit Quad SPI NOR flash. The key features and differences comparing to other Spansion/Cypress flash familes are: - 4-byte address mode by factory default - Quad mode is enabled by factory default - Supports mixture of 128KB and 64KB sectors by OTP configuration (this patch supports uniform 128KB only) Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26mtd: spi-nor: Rename s25hx_t prefixTakahiro Kuwano
Rename s25hx_t prefix to s25 so that the single set of fixup hooks can support all other S25 families. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Acked-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26mtd: spi-nor-core: Make CFRx reg fields genericTakahiro Kuwano
Cypress defines two flavors of configuration registers, volatile and non volatile, and both use the same bit fields. Rename the bitfields in the configuration registers so that they can be used for both flavors. Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-23bootstd: Add a new pre-scan priority for bootdevsSimon Glass
We need extensions to be set up before we start trying to boot any of the bootdevs. Add a new priority before all the others for tht sort of thing. Also add a 'none' option, so that the first one is not 0. While we are here, comment enum bootdev_prio_t fully and expand the test for the 'bootdev hunt' command. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23bootstd: Add a SPI flash bootdevSimon Glass
Add a bootdev for SPI flash so that these devices can be used with standard boot. It only supports loading a script. Add a special case for the label, since we want to use "spi", not "spi_flash". Enable the new bootdev on sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-20global: Finish CONFIG -> CFG migrationTom Rini
At this point, the remaining places where we have a symbol that is defined as CONFIG_... are in fairly odd locations. While as much dead code has been removed as possible, some of these locations are simply less obvious at first. In other cases, this code is used, but was defined in such a way as to have been missed by earlier checks. Perform a rename of all such remaining symbols to be CFG_... rather than CONFIG_... Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-20nxp: Finish migration of SYS_FSL_IFC_BANK_COUNT to KconfigTom Rini
As this is used on both ARM and PowerPC platforms, this needs to be asked in arch/Kconfig.nxp. Set the PowerPC defaults based on arch/powerpc/include/asm/config_mpc85xx.h and remove the default set in drivers/mtd/nand/raw/fsl_ifc_nand.c Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20global: Remove unused CONFIG definesTom Rini
Remove some CONFIG symbols and related comments, etc, that are unused within the code itself at this point. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-10mtd: spi-nor-ids: add gigadevice part #Victor Lim
adding gigadevice part numbers Signed-off-by: Victor Lim <vlim@gigadevice.com> Link: https://lore.kernel.org/r/20230109234946.14540-2-vlim@gigadevice.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-08Merge tag 'u-boot-nand-20230108' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-nand-flash into next Pull request for u-boot-nand-20230108 - rawnand: omap_gpmc: driver model support
2023-01-08mtd: rawnand: omap_elm: u-boot driver model supportRoger Quadros
Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
2023-01-08mtd: rawnand: omap_gpmc: Enable SYS_NAND_PAGE_COUNT for OMAP_GPMCRoger Quadros
The symbol is required for NAND support in SPL when using OMAP_GPMC driver. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-7-rogerq@kernel.org
2023-01-08mtd: rawnand: omap_gpmc: Add SPL NAND supportRoger Quadros
Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
2023-01-08mtd: rawnand: omap_gpmc: support u-boot driver modelRoger Quadros
Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
2023-01-08mtd: rawnand: nand_base: Allow base driver to be used in SPL without nand_bbtRoger Quadros
nand_bbt.c is not being built with the nand_base driver during SPL build. This results in build failures if we try to access any nand_bbt related functions. Don't use any nand_bbt functions for SPL build. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-3-rogerq@kernel.org
2023-01-08mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correctionRoger Quadros
The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
2023-01-06Merge tag 'u-boot-at91-2023.04-a' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-at91 into next First set of u-boot-at91 features for the 2023.04 cycle: This feature set includes the new DM-based NAND flash driver (old non-DM driver is still kept for backwards compatibility), and the move to DM NAND flash driver for sam9x60ek board. Feature set also includes devicetree alignment for sama7g5 with Linux, devicetree alignment on USB with Linux for all boards (sama5, sam9x60), chip id for sama7g5, minor configs and tweaks.
2023-01-02Add CONFIG_SYS_NAND_SELF_INIT to Kconfig for NAND DENALI driverLokanathan, Raaj
Add the CONFIG_SYS_NAND_SELF_INIT to the Kconfig to follow the changes from mainline. Signed-off-by: Lokanathan, Raaj <raaj.lokanathan@intel.com> Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
2022-12-23global: Migrate CONFIG_MXC_NAND_REGS_BASE to CFGTom Rini
Perform a simple rename of CONFIG_MXC_NAND_REGS_BASE to CFG_MXC_NAND_REGS_BASE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_MXC_NAND_IP_REGS_BASE to CFGTom Rini
Perform a simple rename of CONFIG_MXC_NAND_IP_REGS_BASE to CFG_MXC_NAND_IP_REGS_BASE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_LPC32XX_NAND_SLC_WWIDTH to CFGTom Rini
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WWIDTH to CFG_LPC32XX_NAND_SLC_WWIDTH Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_LPC32XX_NAND_SLC_WSETUP to CFGTom Rini
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WSETUP to CFG_LPC32XX_NAND_SLC_WSETUP Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_LPC32XX_NAND_SLC_WHOLD to CFGTom Rini
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WHOLD to CFG_LPC32XX_NAND_SLC_WHOLD Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_LPC32XX_NAND_SLC_WDR_CLKS to CFGTom Rini
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WDR_CLKS to CFG_LPC32XX_NAND_SLC_WDR_CLKS Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_LPC32XX_NAND_SLC_RWIDTH to CFGTom Rini
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_RWIDTH to CFG_LPC32XX_NAND_SLC_RWIDTH Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_LPC32XX_NAND_SLC_RSETUP to CFGTom Rini
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_RSETUP to CFG_LPC32XX_NAND_SLC_RSETUP Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_LPC32XX_NAND_SLC_RHOLD to CFGTom Rini
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_RHOLD to CFG_LPC32XX_NAND_SLC_RHOLD Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_LPC32XX_NAND_SLC_RDR_CLKS to CFGTom Rini
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_RDR_CLKS to CFG_LPC32XX_NAND_SLC_RDR_CLKS Signed-off-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-13 14:32:09 +0000