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path: root/drivers/spi/Makefile
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2019-07-25spi: Drop obsolete mtk_qspi driver referencesWeijie Gao
Since u-boot has added the spi-mem framework and replaced the spi-nor framework, the mtk_qspi is no longer compatible with the new spi-nor driver. Remove this driver along with replacing config item with new mtk spi-nor driver. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> [jagan: squash related changes and update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-25spi: add spi-mem driver for MediaTek MT7629 SoCWeijie Gao
This patch adds spi-mem driver for MediaTek MT7629 SoC to access SPI-NOR and SPI-NAND flashes. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> [jagan: squash MAINTAINERS file] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18spi: Add SiFive SPI driverBhargav Shah
This patch adds SiFive SPI driver. The driver is 100% DM driver and it determines input clock using clk framework. The SiFive SPI block is found on SiFive FU540 SOC and is used to access flash and MMC devices on SiFive Unleashed board. This driver implementation is inspired from the Linux SiFive SPI driver available in Linux-5.2 or higher and SiFive FSBL sources. Signed-off-by: Bhargav Shah <bhargavshah1988@gmail.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-10spi: Add SPI controller driver for UniPhier SoCsKunihiko Hayashi
Add SPI controller driver implemented in Socionext UniPhier SoCs. This controller has the SPI master mode only. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
2019-07-09spi: Add Atmel QuadSPI driverTudor Ambarus
Backport the driver from linux v5.1-rc5 and adapt it for u-boot. Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-06spi: stm32: Add Serial Peripheral Interface driver for STM32MPPatrice Chotard
Add SPI driver support for STM32MP SoCs family. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-17spi: ti_qspi: Drop non DM codeVignesh Raghavendra
Now that all boards using TI QSPI have moved to DM and DT, drop non DM code completely. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> [jagan: update MIGRATION.txt, rebase config_whitelist.txt] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-03-04spi: Rename sun4i_spi.c into spi-sunxi.cJagan Teki
Now the same SPI controller driver is reusable in all Allwinner SoC variants, so rename the existing sun4i_spi.c into spi-sunxi.c which eventually look like a common sunxi driver. Also update the function, variable, structure names in driver from sun4i into sunxi. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-02-07spi: Add non DM version of SPI_MEMVignesh R
Add non DM version of SPI_MEM to support easy migration to new SPI NOR framework. This can be removed once DM_SPI conversion is complete. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-01-16mips: spi: mscc: Add fast bitbang SPI driverLars Povlsen
This patch add a new SPI driver for MSCC SOCs that does not sport the designware SPI hardware controller. Performance gain: 7.664 seconds vs. 17.633 for 1 Mbyte write. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-24spi: mtk_qspi: add qspi driver for MT7629 SoCGuochun Mao
This patch adds MT7629 qspi driver for accessing SPI NOR flash. Signed-off-by: Guochun Mao <guochun.mao@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-24spi: Add Amlogic Meson SPI Flash Controller driverNeil Armstrong
The Amlogic Meson SoCs embeds a Flash oriented SPI Controller name SPIFC. This driver, ported from the Linux meson-spi-spifc driver, add support for this controller on the Amlogic Meson GX SoCs in U-Boot. Tested-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-10-04spi: Add SPI driver for MT76xx SoCsStefan Roese
This patch adds the SPI driver for the MediaTek MT7688 SoC (and derivates). Its been tested on the LinkIt Smart 7688 and the Gardena Smart Gateway with and SPI NOR on CS0 and on the Gardena Smart Gateway additionally with an SPI NAND on CS1. Note that the SPI controller only supports a max transfer size of 32 bytes. This driver implementes a workaround to enable bigger xfer sizes to speed up the transfer especially for the SPI NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Jagan Teki <jagan@openedev.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Piotr Dymacz <pepe2k@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-10-02Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini
This is the PR for SPI-NAND changes along with few spi changes. [trini: Re-sync changes for ls1012afrwy_qspi*_defconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-25spi: add support for ARM PL022 SPI controllerQuentin Schulz
This adds support for the ARM PL022 SPI controller for the standard variant (0x00041022) which has a 16bit wide and 8 locations deep TX/RX FIFO. A few parts were borrowed from the Linux kernel driver. Cc: Armando Visconti <armando.visconti@st.com> Cc: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
2018-09-20spi: Extend the core to ease integration of SPI memory controllersBoris Brezillon
Some controllers are exposing high-level interfaces to access various kind of SPI memories. Unfortunately they do not fit in the current spi_controller model and usually have drivers placed in drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI memories in general. This is an attempt at defining a SPI memory interface which works for all kinds of SPI memories (NORs, NANDs, SRAMs). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-08-03arm: sunxi: Allwinner A10 SPI driverStefan Mavrodiev
Add spi driver for sun4i, sun5i and sun7i SoCs. The driver is adapted from mailine kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16spi: zynqmp_gqspi: Add support for ZynqMP qspi driverSiva Durga Prasad Paladugu
This patch adds qspi driver support for ZynqMP SoC. This driver is responsible for communicating with qspi flash devices. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> [jagan: removed GQSPI_MIO_NUM_ macros] Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-10board: arm: Add support for Broadcom BCM7445Thomas Fitzsimmons
Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-11mtd: spi: Add Renesas RPC SPI-flash driverMarek Vasut
Add driver for the RPC block in SPI-flash mode. This driver allows access to a SPI NOR flash attached to the RPC block and does not support RPC in Hyperflash mode. Note that this block is extremely selective when communicating with the SPI NOR. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24dm: spi: add BCM63xx HSSPI driverÁlvaro Fernández Rojas
This driver is a simplified version of linux/drivers/spi/spi-bcm63xx-hsspi.c Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24dm: spi: add BCM63xx SPI driverÁlvaro Fernández Rojas
This driver is a simplified version of linux/drivers/spi/spi-bcm63xx.c Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-11-30spi: nds_ae3xx: Rename nds_ae3xx_spi as atcspi200_spiRick Chen
atcspi200 is Andestech spi ip which is embedded in AE3XX and AE250 platforms. So rename as atcspi200 will be more reasonable to be used in different platforms. Signed-off-by: Rick Chen <rick@andestech.com>
2017-10-16spi: Drop CONFIG_ATMEL_DATAFLASH_SPITuomas Tynkkynen
Last user of this option went away in commit: fdc7718999 ("board: usb_a9263: Update to support DT and DM") Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-09-21nds32: spi: Support spi dm driver.rick
Support spi driver and can detect MX25U1635E flash on AE3XX board. Verification: sf probe 0:0 50000000 0 spi_flash_std_probe(sf_Probr.c) spi_flash_probe_slave(sf_Probr.c) SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB NDS32 # sf test 0x100000 0x1000 SPI flash test: 0 erase: 34 ticks, 117 KiB/s 0.936 Mbps 1 check: 15 ticks, 266 KiB/s 2.128 Mbps 2 write: 21 ticks, 190 KiB/s 1.520 Mbps 3 read: 11 ticks, 363 KiB/s 2.904 Mbps Test passed 0 erase: 34 ticks, 117 KiB/s 0.936 Mbps 1 check: 15 ticks, 266 KiB/s 2.128 Mbps 2 write: 21 ticks, 190 KiB/s 1.520 Mbps 3 read: 11 ticks, 363 KiB/s 2.904 Mbps Signed-off-by: rick <rick@andestech.com>
2017-07-08powerpc, 8xx: move SPI driver to drivers/spi/Christophe Leroy
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2017-04-05Blackfin: RemoveTom Rini
The architecture is currently unmaintained, remove. Cc: Benjamin Matthews <mben12@gmail.com> Cc: Chong Huang <chuang@ucrobotics.com> Cc: Dimitar Penev <dpn@switchfin.org> Cc: Haitao Zhang <hzhang@ucrobotics.com> Cc: I-SYST Micromodule <support@i-syst.com> Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de> Cc: Marek Vasut <marex@denx.de> Cc: Martin Strubel <strubel@section5.ch> Cc: Peter Meerwald <devel@bct-electronic.com> Cc: Sonic Zhang <sonic.adi@gmail.com> Cc: Valentin Yakovenkov <yakovenkov@niistt.ru> Cc: Wojtek Skulski <info@skutek.com> Cc: Wojtek Skulski <skulski@pas.rochester.edu> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-28ARM: SPI: stm32: add stm32f746 qspi driverMichael Kurz
This patch adds support for the QSPI IP found in stm32f7 devices. Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
2017-01-15spi: Zap cf_qspi driver and related codeJagan Teki
Dropped becuase - driver not used any board. - no dm conversion. Cc: Angelo Dureghello <angelo@sysam.it> Cc: Richard Retanubun <richardretanubun@ruggedcom.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Acked-by: Angelo Dureghello <angelo@sysam.it>
2017-01-13spi: Zap ep93xx_spi driver and related codeJagan Teki
Dropped becuase - driver and related configs not used any board. - no dm conversion. Cc: Heiko Schocher <hs@denx.de> Cc: Sergey Kostanbaev <sergey.kostanbaev@gmail.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
2016-12-21spi: Zap armada100_spi.c and envJagan Teki
armada100_spi.c and related env is zapping becuase of "no DM conversion". Cc: Ajay Bhargav <ajay.bhargav@einfochips.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
2016-12-21spi: Zap mpc52xx_spi.c, config and related codeJagan Teki
armada100_spi.c, related config options and related codes are zapping becuase of "no DM conversion". Cc: Werner Pfister <Pfister_Werner@intercontrol.de> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-09-27spi: Add driver for Marvell Armada 3700 SoCStefan Roese
The SPI IP core in the Marvell Armada 3700 is similar to the one in the other Armada SoCs. But the differences are big enough that it makes sense to introduce a new driver instead of cluttering the old kirkwood driver with #ifdef's. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-06-10spi: pic32_spi: add SPI master driver for PIC32 SoC.Purna Chandra Mandal
This driver implements SPI protocol in master mode to communicate with the SPI device connected on SPI bus. It handles /CS explicitly by controlling respective pin as gpio ('cs-gpios' property in dt node) and uses PIO mode for SPI transaction. It is configurable based on driver-model only. Cc: Jagan Teki <jteki@openedev.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21drivers: spi: add spi support for QCA/Atheros ath79 SOCsWills Wang
This patch add a compatible spi driver for ath79 series SOC. Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-11-12Tegra: T210: Add QSPI driverTom Warren
This is the normal Tegra SPI driver modified to work with the QSPI controller in Tegra210. It does not do 2x/4x transfers or any other QSPI protocol. Signed-off-by: Yen Lin <yelin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-10-25spi: Add zynq qspi controller driverJagan Teki
Added zynq qspi controller driver for Xilinx Zynq APSOC, this driver is driver-model driven with devicetree support. => sf probe SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB => mw.b 0x100 0xCC 0x1000000 => sf update 0x100 0x0 0x1000000 device 0 whole chip 16777216 bytes written, 0 bytes skipped in 59.842s, speed 289262 B/s => sf read 0x3000000 0x0 0x1000000 device 0 whole chip SF: 16777216 bytes @ 0x0 Read: OK => cmp.b 0x3000000 0x100 0x1000000 Total of 16777216 byte(s) were the same Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Jagan Teki <jteki@openedev.com>
2015-09-02rockchip: Add SPI driverSimon Glass
Add a SPI driver for the Rockchip RK3288, using driver model. It should work for other Rockchip SoCs also. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-01spi: Makefile: Use object file alphabetic orderJagan Teki
Use object files as incresing alphabetic order, so-that it's easy for readability. Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-07-01spi: Zap oc_tiny_spi driverJagan Teki
Zap oc_tiny_spi driver since the boards used this driver is no longer been active. Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Thomas Chou <thomas@wytron.com.tw>
2015-07-01spi: Zap ftssp010_spi driverJagan Teki
Zap ftssp010_spi driver since the boards used this driver is no longer been active. Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Axel Lin <axel.lin@ingics.com>
2015-07-01spi: Zap andes_spi driverJagan Teki
Zap andes_spi driver since the boards used this driver is no longer been active. Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Macpaul Lin <macpaul@andestech.com>
2015-04-18dm: spi: Convert Freescale DSPI driver to driver modelHaikun.Wang@freescale.com
Move the Freescale DSPI driver over to driver model. Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-10lpc32xx: add LPC32xx SSP support (SPI mode)Albert ARIBAUD \(3ADEV\)
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2014-12-06spi: Add designware master SPI DM driver used on SoCFPGAStefan Roese
This patch adds the driver for the Designware master SPI controller. This IP core is integrated on the Altera SoCFPGA. This implementation is a driver model (DM) implementation. So multiple SPI drivers can be used. Thats necessary, since SoCFPGA also integrates the Cadence QSPI controller used to connect the SPI NOR flashes. Without DM, using multiple SPI drivers is not possible. This driver is very loosely based on the Linux driver. Most of the Linux driver is removed. Only the polling loop for the transfer is really used from this driver, as we don't support interrupts and DMA right now. This is tested on the SoCrates SoCFPGA board using the SPI pins on the P14 header. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-12-06spi: Add Cadence QSPI DM driver used by SoCFPGAStefan Roese
This driver is cloned from the Altera Rockerboard.org U-Boot repository. I used this git tag: ACDS14.0.1_REL_GSRD_RC2. With Some modification to support the U-Boot driver model (DM). As mentioned above, in this new version I ported this driver to the new driver model (DM). One big advantage of this move is that now multiple SPI drivers can be enabled on one platform. And since the SoCFPGA also has the Designware SPI master controller integrated, this feature is really needed to support both controllers. Because of this, this series needs the DT support for SoCFPGA to be applied. For DT based probing in the SPI DM. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22dm: tegra: spi: Convert to driver modelSimon Glass
This converts the Tegra SPI drivers to use driver model. This is tested on: - Tegra20 - trimslice - Tegra30 - beaver - Tegra124 - dalmore (not tested on Tegra124) Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22dm: spi: Add soft_spi implementationSimon Glass
Add a new implementation of soft_spi that uses device tree to specify the GPIOs. This will replace soft_spi_legacy for boards which use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22dm: spi: Rename soft_spi.c to soft_spi_legacy.cSimon Glass
Reserve the 'normal' name for use by driver model, and rename the old driver so that it is clear that it is for 'legacy' drivers only. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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