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Import R8A779A0 V3U PFC tables from Linux 5.12, commit 9f4ad9e425a1
("Linux 5.12") . Add parts of PFC table integration from
pinctrl: renesas: Add R8A779A0 V3U PFC tables
by Hai Pham <hai.pham.ud@renesas.com>" .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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The R8A779A0 V3U GPIO block has additional "General Input Enable" INEN
register. Add new R8A779A0 compatible string with a new quirk and also
a handler for this quirk which toggles the INEN register in the right
place. INEN register handling is based on "gpio: renesas: Add R8A779A0
V3U support" by Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Add clock tables for R8A779A0 V3U SoC from Linux 5.12,
commit 9f4ad9e425a1 ("Linux 5.12")
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
--
Marek: - Add .reset_modemr_offset
- Sync tables from Linux 5.12
- Rebase on latest u-boot
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On R8A779A0 V3U SoC, PLL1 and PLL5 use a divider value
from cpg_pll_configs table while PLL{20,21,30,31,4} use
different control offset. Introduce new types to handle
this and handle those types in the Gen3 clock code.
Based on "clk: renesas: Add support for R8A779A0 V3U PLLn"
by Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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- x86: Discard .note.gnu.property sections
- nvme: Skip block device creation for inactive namespaces
- nvme: Convert NVMe doc to reST, and various minor fixes
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A udevice's priv space is cleared in alloc_priv() in the DM core.
Don't do it again in its probe() routine.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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mode_select_num_blocks and mode_select_block_len in 'struct nvme_ns'
are not useful. Drop them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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At present there is an offset of one added during the creation of
block device. This can be very confusing as we wanted to encode the
namespace id in the block device name but namespae id cannot be zero.
This changes to use the namespace id directly in the block device
name, eliminating the offset of one effectively.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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At present for each namespace there is a block device created for it.
There is no issue if the number of supported namespaces reported from
the NVMe device is only 1.
Since QEMU commit 7f0f1acedf15 ("hw/block/nvme: support multiple namespaces"),
the number of supported namespaces reported has been changed from 1
to 256, but not all of them are active namespaces. The actual active
one depends on the QEMU command line parameters. A common case is
that namespace 1 being active and all other 255 being inactive.
If a namespace is inactive, the namespace identify command returns a
zero filled data structure. We can use field NSZE (namespace size) to
decide whether a block device should be created for it.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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At present the block device creation happens in the NVMe uclass
driver post_probe() phase. In preparation to support multiple
namespaces, we should issue namespace identify before creating
block devices but that touches the underlying hardware hence it
is not appropriate to do such in the uclass driver post_probe().
Let's move it to driver probe() phase instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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AQA (Admin Queue Attributes) register is a dword size with
lower word of ASQS, and higher word of ACQS.
The code set the variable aqa twice, but it is redundant.
Signed-off-by: Wesley Sheng <wesleyshenggit@sina.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Each prp is 8 bytes, calculate the number of prps
per page should just divide page size by 8
there is no need to minus 1
Signed-off-by: Wesley Sheng <wesleyshenggit@sina.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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writel() and co. already include the endian swap; doing the swap twice
is, er, unhelpful.
Tested on a P4080DS, which boots perfectly fine off NVMe with this.
Signed-off-by: David Lamparter <equinox@diac24.net>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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clock output"
This reverts commit 63756575b42b8b4fb3f59cbbf0cedf03331bc2d2.
Since this commit a imx6qdl-pico board boots extremely slowly
in both SPL as well as U-Boot proper.
Fix this regression by reverting the offending commit for now.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Pierre-Jean Texier <texier.pj2@gmail.com>
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Change to static about dm function.
They can be used with wrapper functions.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
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Use mmc_send_cmd instead of dm_mmc_send_cmd.
It doesn't need to distinguish this function.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
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Add FIFO mode support for SoCFPGA dwmmc, read "fifo-mode" property from DT.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
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The data read is not working when using FIFO mode.
From DesignWare databook, when a Data_Transfer_Over (DTO) interrupt is
received, the software should read the remaining data from FIFO.
Add DTO interrupt checking on data read path and clear interrupts before
start reading from FIFO. So, it doesn't clear the next pending
interrupts unintentionally after read from FIFO.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
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With a 48MHz input clock, the lowest bus frequency can be as low as
48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause
the mmc framework take seconds to finish the initialization.
Limiting the minimum bus frequency to a slightly higher value can solve the
issue without any side effects.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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clean up octeontx_smi_probe by using the live-tree API.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
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Commit 4f0278dac56a ("net: sun8i-emac: Lower MDIO frequency") leads to
network failure on the OrangePi PC.
=> dhcp
sun8i_emac_eth_start: Timeout
According to the commit message the change of the MDIO frequency is only
required for external PHYs.
Fixes: 4f0278dac56a ("net: sun8i-emac: Lower MDIO frequency")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Add SynQuacer's NETSEC GbE controller driver.
Since this driver will load the firmware from SPI NOR flash,
this depends on CONFIG_SYNQUACER_SPI=y.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
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Revert some changes of commit 3a97da12ee7b ("net: dwc_eth_qos: add dwc
eqos for imx support") that were probably added by mistake.
One of these changes can lead to received data corruption (enabling
FUP and FEP bits). Another causes invalid register rxq_ctrl0 settings
for some platforms. And another makes some writes at unknown memory
location.
Fixes: 3a97da12ee7b ("net: dwc_eth_qos: add dwc eqos for imx support")
Signed-off-by: Daniil Stas <daniil.stas@posteo.net>
Cc: Ye Li <ye.li@nxp.com>
Cc: Fugang Duan <fugang.duan@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
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Disabling clk_ck clock leads to link up status loss in phy, which
leads to auto-negotiation restart before each network command
execution.
This issue is especially big for PXE boot protocol because of
auto-negotiation restarts before each configuration filename trial.
To avoid this issue don't disable clk_ck clock after it was enabled.
Signed-off-by: Daniil Stas <daniil.stas@posteo.net>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
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commit f1bcad22dd19 ("net: e1000: add support for writing to EEPROM")
adds support for storing hwaddr in EEPROM however i210 devices do not
support this and thus results in errors such as:
Warning: e1000#0 failed to set MAC address'
Check if a flash device is present and if not return -ENOSYS indicating
this is not supported.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
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Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
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- fsl-qoriq: Bug fixes related pfe, eth, thermal node, vid.c, cpu release,
mmc, usb, env, etc for Layerscape boards
- powerpc: Update Maintainers for some boards.
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Current tsec adapter sets adapter gigabit capabilities by default, and in
reality this must not always be the case.
It is possible that tsec adapter is used for 100Mbps connection, and in
this case setting 1000Mbps capabilities can lead to some side effects such
longer autoneg process.
In our ls102x designs this problem leads to long autoneg times (> 4 sec)
in case board rgmii link is 100Mbps capable only.
Limiting the rgmii link capabilities provides faster and smoother
link establishment.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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There is no i.MX board using such option. Drop it.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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For eSDHC, power supply is through peripheral circuit.
Some eSDHC versions have value 0 of the bit but that
does not reflect the truth. 3.3V is common for SD/MMC,
and is supported for all boards with eSDHC in current
u-boot. So, make 3.3V is supported in default in code.
CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT can be enabled if
future board does not support 3.3V.
This is also a fix-up for one previous patch, which converted
to use IS_ENABLED() for CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
that is not a Kconfig option.
Fixes: 52faec31827e ("mmc: fsl_esdhc: replace most #ifdefs by IS_ENABLED()")
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Stop to initialize the PCIe controller if it's disabled by RCW.
Fixes: 118e58e26eba ("pci: layerscape: Split the EP and RC driver")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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Read Linux PPFE firmware from flash partition and pass it to Linux through
FDT entry. So that we can avoid placing PPFE firmware in Linux rootfs.
(FDT may increase at max by 64KB)
Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Signed-off-by: Anji J <anji.jagarlmudi@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20210616
-------------------
- imxrt : fixes, USB, imxrt1020-evk
- imx8m:
fix for verdin-imx8mm
Add conga-QMX8 board
- imx6 :
documentation for pico-imx6:
Add SeeedStudio NPI-IMX6ULL Support
ventana: DM PCI
- imx7d:
added SMEGW01 board
CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7765
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When using bootefi to boot a EFI binary, u-boot is supposed to
provide networking service for EFI application. Currently, 'pfe stop'
command is called from bootcmd before running bootefi. As a result
network stops working for EFI applications and console is flooded with
"Rx pkt not on expected port" messages.
Implement board_quiesce_devices() for ls1012a boards and call
pfe_command_stop() from it instead of calling 'pfe stop' from
*_bootcmd and bootcmd.
Tested-by: Anji Jagarlmudi <anji.jagarlmudi@nxp.com>
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
[Fixed checkpatch space error]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2021.07-rc5
zynqmp:
- Fix ANALOG_BUS value after powerup
- Disable EFI_CAPSULE_ON_DISK_EARLY
zynqmp-gqspi:
- Fix write issue
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Enable manual start in zynqmp_qspi_fill_gen_fifo().
Also enable GQSPI_IXR_GFNFULL_MASK and check for it instead of
GQSPI_IXR_GFEMTY_MASK.
Add dummy write to genfifo register in chipselect.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
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- dwc2 and cdns3 fixes
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Add support for usb1 and usb2 present on i.IMXRT.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to
clock driver.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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Lcd peripheral needs 2 different gates to be enable to work, so let's
introduce the missing one(LCDIF_PIX) and rename the existing one
(LCDIF_APB).
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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Some SoC needs "disp_axi" clock to be enabled, so let's try to retrieve it
and enabling. If it fails it gives only a debug(), but this clock as well
as "axi" clock is not mandatory.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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On some SoC mxsfb needs more than one clock gate(actual "per" clock). So
let's introduce "axi" clock that can be provided but it's not mandatory.
This is inspired from linux mxsfb driver. Also let's rename "per" clock to
"pix" clock for compatibility with already existing .dts lcdif nodes
implementation.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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This timer driver uses GPT Timer (General Purpose Timer) available on
a lot of i.MX SoCs family. This driver deals with both 24Mhz oscillator
as well as peripheral clock.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
[Giulio: added the driver's stub and handled peripheral clock prescaler
setting making driver to work correctly]
Signed-off-by: Jesse Taube <mr.bossman075@gmail.com>
[Jesse: added init, setting prescaler for 24Mhz support and enabling
timer]
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When `usb start` is called on the terminal, the dwc2 driver will try
to start every USB device as host first, even if it is explicitly
configured as peripheral in the device tree (dr_mode = "peripheral").
So to avoid an unwanted 15 seconds delay when initializing the usb
(one second per channel = 1s x 15), this patch adds a check to the
initialization, and will skip host initialization of the device is
explicitly set as peripheral. The checking is already done similarly
in the `drivers/usb/gadget/dwc2_udc_otg.c` driver.
Signed-off-by: João Loureiro <joaofl@gmail.com>
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Kernel device tree got updated to use clock name as "ref" instead of
"usb2_refclk". Fix cdns3-ti.c to use the correct name.
Fixes: 70e167495ab2 ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot")
Fixes: 6239cc8c4e84 ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
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Synchronize R-Car Gen2/Gen3 pinctrl tables with Linux 5.12,
commit 9f4ad9e425a1 ("Linux 5.12") . This is a rather large
commit, since the macros in sh-pfc.h also got updated, so
all the PFC tables must be updated in lockstep.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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Removed call of ofnode_translate_address() after ofnode_read_resource
in luton_switch.c:luton_probe(); it is unnecessary since
the commit feb7ac457c20 ("dm: core: Add address translation in
fdt_get_resource").
Fixes: feb7ac457c20 ("dm: core: Add address translation in fdt_get_resource")
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reported-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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With commit 41575d8e4c33 ("dm: treewide: Rename auto_alloc_size members
to be shorter") "priv_auto_alloc_size" was renamed to "priv_auto". This
driver was sent to the mailing list before that change, merged after it,
and still has the old form. Apply the rename here as well.
Fixes: 1b9ee2882e6b ("pwm: Add a driver for Chrome OS EC PWM")
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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In of_get_address(), there is:
dev_count_cells(dev, &na, &ns);
followed by:
bus->count_cells(dev, &na, &ns);
but no codes in between use na/ns, hence the first call is useless.
By dropping the first call, dev_count_cells() is now useless too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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'dma-ranges' frequently exists without parent nodes having 'dma-ranges'.
While this is an error for 'ranges', this is fine because DMA capable
devices always have a translatable DMA address. Also, with no
'dma-ranges' at all, the assumption is that DMA addresses are 1:1 with
no restrictions unless perhaps the device itself has implicit
restrictions.
This keeps in sync with Linux kernel commit:
81db12ee15cb: of/address: Translate 'dma-ranges' for parent nodes missing 'dma-ranges'
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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