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2022-07-26misc: s4mu: Support iMX93 with Sentinel MUPeng Fan
Support iMX93 communicate with Sentinel Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26misc: imx: S400_API: Move S400 MU and API to a common placeYe Li
Since iMX9 uses S401 which shares the API with iMX8ULP. So move S400 MU driver and API to a common place and selected by CONFIG_IMX_SENTINEL Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26mmc: fsl_esdhc_imx: Support i.MX9Peng Fan
Support i.MX9 for fsl_esdhc_imx driver Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26imx: pinctrl: add pinctrl and pinfunc file for i.MX93Peng Fan
Add the pinctrl driver and pinfunc header file to support iMX93 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26gpio: pca953x: support pcal6524Peng Fan
Support pcal6524 IO expander driver Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-25usb: ehci-mx6: Remove MX6Q_ARM2 related ifdeferyFabio Estevam
The imx6q arm2 board support has been removed from U-Boot as it did not get converted to DM. Remove the MX6Q_ARM2 related ifdefery in the driver. Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-07-24Merge commit '90ba25b7cb78bd85c6af0b6429226c6616dedefa' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-nand-flash In preparation of re-sync of mtd stack, we opt to move the current stack slowly in order to have a more easy sync and test. We would like to prepare uboot to support no-jedec and no-onfi compliant nand so we need to clean up a bit the code we have now and upstream some of the support. In this series we expect no functional change Tested on: - imx6ull Micron MT29F2G08ABAGAH4 - imx8mn Macronix MX30LF4G18AC
2022-07-22Merge https://source.denx.de/u-boot/custodians/u-boot-watchdogTom Rini
- octeontx_wdt: Add MIPS Octeon support (Stefan) - watchdog: add amlogic watchdog support (Philippe) - watchdog: add pulse support to gpio watchdog driver (Paul)
2022-07-22mtd: decommission the NAND museumMichael Trimarchi
Upstream linux commit f7025a43a9da26. The MTD subsystem has its own small museum of ancient NANDs in a form of the CONFIG_MTD_NAND_MUSEUM_IDS configuration option. The museum contains stone age NANDs with 256 bytes pages, as well as iron age NANDs with 512 bytes per page and up to 8MiB page size. It is with great sorrow that I inform you that the museum is being decommissioned. The MTD subsystem is out of budget for Kconfig options and already has too many of them, and there is a general kernel trend to simplify the configuration menu. We remove the stone age exhibits along with closing the museum REMARK Don't apply this part from upstream: Some of the iron age ones are transferred to the regular NAND depot. Namely, only those which have unique device IDs are transferred, and the ones which have conflicting device IDs are removed. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: toshiba: Retrieve ECC requirements from extended IDMichael Trimarchi
Upstream linux commit fb3bff5b407e58. This patch enables support to read the ECC strength and size from the NAND flash using Toshiba Memory SLC NAND extended-ID. This patch is based on the information of the 6th ID byte of the Toshiba Memory SLC NAND. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move Macronix specific initialization in nand_macronix.cMichael Trimarchi
Upstream linux commit 3b5206f4be9b65. Move Macronix specific initialization logic into nand_macronix.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move AMD/Spansion specific init/detection logic in nand_amd.cMichael Trimarchi
Upstream linux commit 229204da53b31d. Move AMD/Spansion specific initialization/detection logic into nand_amd.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move Micron specific init logic in nand_micron.cMichael Trimarchi
Upstream linux commit 10d4e75c36f6c1. Move Micron specific initialization logic into nand_micron.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move Toshiba specific init/detection logic in nand_toshiba.cMichael Trimarchi
Upstream linux commit 9b2d61f80b060c. Move Toshiba specific initialization and detection logic into nand_toshiba.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move Hynix specific init/detection logic in nand_hynix.cMichael Trimarchi
Upstream linux commit 01389b6bd2f4f7. Move Hynix specific initialization and detection logic into nand_hynix.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move Samsung specific init/detection logic in nand_samsung.cMichael Trimarchi
Upstream linux commit c51d0ac59f2420. Move Samsung specific initialization and detection logic into nand_samsung.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Export symbol nand_decode_ext_idMichael Trimarchi
In preparation of moving specific nand support that are not jedec or onfi Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Fix MediaTek MT7621 SoC buildMichael Trimarchi
nand_get_flash_type was reworked in commit 1ca6f9483e9ab5. This change break the Mediatek MT721. Fix it adjust the function call parameters +include/linux/mtd/rawnand.h:32:62: note: expected 'struct nand_chip *' but argument is of type 'struct mtd_info *' + 32 | struct nand_flash_dev *nand_get_flash_type(struct nand_chip *chip, + | ~~~~~~~~~~~~~~~~~~^~~~ +drivers/mtd/nand/raw/mt7621_nand.c:1189:48: error: passing argument 2 of 'nand_get_flash_type' from incompatible pointer type [-Werror=incompatible-pointer-types] + | ^~~~ + | | + | struct nand_chip * +include/linux/mtd/rawnand.h:33:49: note: expected 'int *' but argument is of type 'struct nand_chip *' + 33 | int *maf_id, int *dev_id, Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Get rid of mtd variable in function callsMichael Trimarchi
chip points to mtd. Passing chip is enough to have a reference to mtd when is necessary Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Add manufacturer specific initialization/detection stepsMichael Trimarchi
Upstream linux commit abbe26d144ec22. A lot of NANDs are implementing generic features in a non-generic way, or are providing advanced auto-detection logic where the NAND ID bytes meaning changes with the NAND generation. Providing this vendor specific initialization step will allow us to get rid of full-id entries in the nand_ids table or all the vendor specific cases added over the time in the generic NAND ID decoding logic. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Store nand ID in struct nand_chipMichael Trimarchi
Upstream linux commit 7f501f0a72036d. Store the NAND ID in struct nand_chip to avoid passing id_data and id_len as function parameters. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Get rid of busw parameterMichael Trimarchi
Upstream linux commit 29a198a1592d83. Auto-detection functions are passed a busw parameter to retrieve the actual NAND bus width and eventually set the correct value in chip->options. Rework the nand_get_flash_type() function to get rid of this extra parameter and let detection code directly set the NAND_BUSWIDTH_16 flag in chip->options if needed. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-21treewide: Fix Marek's name and change my e-mail addressMarek Behún
Fix diacritics in some instances of my name and change my e-mail address to kabel@kernel.org. Add corresponding .mailmap entries. Signed-off-by: Marek Behún <kabel@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21arch: mvebu: Disable by default unused peripherals in SPLPali Rohár
SPL on mvebu loads proper U-Boot from custom Marvell kwbimage format and therefore support for other binary formats is not required to be present in SPL. Boot source of proper U-Boot is defined by compile time options and therefore it is not required to enable all possible and unused peripherals in SPL by default. This change decrease size of SPL binaries. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21watchdog: add pulse support to gpio watchdog driverPaul Doelle
A common external watchdog circuit is kept alive by triggering a short pulse on the reset pin. This patch adds support for this use case, while making the algorithm configurable in the devicetree. The "linux,wdt-gpio" driver being modified is based off the equivalent driver in the Linux kernel, which provides support for this algorithm. This patch brings parity to this driver, and is kept aligned with the functionality and devicetree configuration in the kernel. It should be noted that this adds a required property named 'hw_algo' to the devicetree binding, following suit with the kernel. I'm happy to make this backward-compatible if preferred. Signed-off-by: Paul Doelle <paaull.git@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21watchdog: add amlogic watchdog supportPhilippe Boos
Add support for hardware watchdog timer for Amlogic SoCs. This driver has been heavily inspired by his Linux equivalent (meson_gxbb_wdt.c). Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Philippe Boos <pboos@baylibre.com> Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21watchdog: octeontx_wdt: Add MIPS Octeon supportStefan Roese
This patch adds support for the Marvell Octeon watchdog driver, which currently only support the ARM64 Octeon TX & TX2 platforms. Since the IP is pretty similar, it makes sense to extend this driver to also support the MIPS Octeon SoC. A follow-up patch will enable this watchdog support on the EBB7304 eval board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com>
2022-07-20Merge tag 'for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-ubiTom Rini
ubifs changes for 2022.10 UBIFS fixes from Pali Rohar: - ubifs: Fix ubifs_assert_cmt_locked - ubifs: Use U-Boot assert() from <log.h>
2022-07-20ubifs: Use U-Boot assert() from <log.h> in UBI/UBIFS codePali Rohár
U-Boot already provides assert function, so it use also in ubi and ubifs code. Signed-off-by: Pali Rohár <pali@kernel.org>
2022-07-19Merge https://source.denx.de/u-boot/custodians/u-boot-usbTom Rini
2022-07-19Merge tag 'for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-i2cTom Rini
i2c changes for 2022.10 - new driver nuvoton, NPCM7xx from Jim Liu Fixes: - ast_i2c: Remove SCL direct drive mode from Eddie James - avoid dynamic stack use in dm_i2c_write bloat-o-meter drivers/i2c/i2c-uclass.o.{0,1} add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-144 (-144) Function old new delta dm_i2c_write 552 408 -144 Total: Before=3828, After=3684, chg -3.76% patch from Rasmus Villemoes
2022-07-19Merge https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
To quote Andre: One prominent feature is the restructering of the clock driver, which allows to end up with one actual driver for all variants, although we still only compile in support for one SoC. Also contained are some initial SPI fixes, which should fix some problems, and enable SPI flash support for the F1C100s SoC. Those patches revealed more problems, I will queue fixes later on, but for now it should at least still work. Apart from some smaller fixes (for instance for NAND operation), there is also preparation for the upcoming Allwinner D1 support, in form of the USB PHY driver. There are more driver support patches to come. The gitlab CI completed successfully, including the build test for all 160 sunxi boards. I also boot tested on a few boards, but didn't have time for more elaborate tests this time.
2022-07-19i2c: avoid dynamic stack use in dm_i2c_writeRasmus Villemoes
The size of the dynamic stack allocation here is bounded by the if() statement. However, just allocating the maximum size up-front and doing malloc() if necessary avoids code duplication (the i2c_setup_offset() until the invocation of ->xfer), and generates much better (smaller) code: bloat-o-meter drivers/i2c/i2c-uclass.o.{0,1} add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-144 (-144) Function old new delta dm_i2c_write 552 408 -144 Total: Before=3828, After=3684, chg -3.76% It also makes static analysis of maximum stack usage (using the .su files that are automatically generated during build) easier if there are no lines saying "dynamic". [This is not entirely equivalent to the existing code; this now uses the stack for len <= 64 rather than len <= 63, but that seems like a more natural limit.] Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Heiko Schocher <hs@denx.de>
2022-07-19i2c: nuvoton: Add NPCM7xx i2c driverJim Liu
Add Nuvoton BMC NPCM750 i2c driver Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2022-07-19i2c: ast_i2c: Remove SCL direct drive modeEddie James
SCL direct drive mode prevents communication with devices that do clock stretching, so disable. The Linux driver doesn't use this mode, and the engine can handle clock stretching. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: ryan_chen <ryan_chen@aspeedtech.com>
2022-07-18phy: sun4i-usb: Add D1 variantSamuel Holland
D1 has a register layout like A100 and H616, with the moved SIDDQ bit. Unlike H616 it does not have any dependencies between PHY instances. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18phy: sun4i-usb: Rework HCI PHY (aka "pmu_unk1") handlingAndre Przywara
As Icenowy pointed out, newer manuals (starting with H6) actually document the register block at offset 0x800 as "HCI controller and PHY interface", also describe the bits in our "PMU_UNK1" register. Let's put proper names to those "unknown" variables and symbols. While we are at it, generalise the existing code by allowing a bitmap of bits to clear and set, to cover newer SoCs: The A100 and H616 use a different bit for the SIDDQ control. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18phy: sun4i-usb: Drop use of arch-specific headersSamuel Holland
Since commit 089ffd0aedb7 ("phy: sun4i-usb: Use CLK and RESET support") neither of these headers is used. Dropping them allows the driver to be architecture-independent. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18sunxi: Move INITIAL_USB_SCAN_DELAY to driver KconfigSamuel Holland
This option is used only by the phy-sun4i-usb driver, which does not inherently depend on the ARM architecture. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18mtd: spi-nor-ids: add winbond w25q512nw family supportJae Hyun Yoo
Add Winbond w25q512nwq/n and w25q512nwm support. datasheet: https://www.winbond.com/resource-files/W25Q512NW%20RevB%2007192021.pdf Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18mtd: spi-nor-core: Add support for Macronix Octal flashJaimeLiao
Adding Macronix Octal flash for Octal DTR support. The octaflash series can be divided into the following types: MX25 series : Serial NOR Flash. MX66 series : Serial NOR Flash with stacked die.(Size larger than 1Gb) LM/UM series : Up to 250MHz clock frequency with both DTR/STR operation. LW/UW series : Support simultaneous Read-while-Write operation in multiple bank architecture. Read-while-write feature which means read data one bank while another bank is programing or erasing. MX25LM : 3.0V Octal I/O -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7841/MX25LM51245G,%203V,%20512Mb,%20v1.1.pdf MX25UM : 1.8V Octal I/O -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7525/MX25UM51245G%20Extreme%20Speed,%201.8V,%20512Mb,%20v1.0.pdf MX66LM : 3.0V Octal I/O with stacked die -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7929/MX66LM1G45G,%203V,%201Gb,%20v1.1.pdf MX66UM : 1.8V Octal I/O with stacked die -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7721/MX66UM1G45G,%201.8V,%201Gb,%20v1.1.pdf MX25LW : 3.0V Octal I/O with Read-while-Write MX25UW : 1.8V Octal I/O with Read-while-Write MX66LW : 3.0V Octal I/O with Read-while-Write and stack die MX66UW : 1.8V Octal I/O with Read-while-Write and stack die About LW/UW series, please contact us freely if you have any questions. For adding Octal NOR Flash IDs, we have validated each Flash on plateform zynq-picozed. As below are the SFDP table dump. zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2943c zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx66uw2g345gx0 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx66uw2g345gx0 zynq> hexdump mx66uw2g345gx0 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 7fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7987 0001 1284 e200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 237c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 001f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2853b zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx66lm1g45g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx66lm1g45g zynq> hexdump mx66lm1g45g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 3fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 6987 0001 1282 e200 02cc 3867 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 6666 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0000 0000 0000130 3514 001c 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2853a zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25lm51245g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25lm51245g zynq> hexdump mx25lm51245g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 1fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7989 0001 128d e200 02cc 4467 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 6666 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0000 0000 0000130 3514 001c 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2863a zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25lw51245g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25lw51245g zynq> hexdump mx25lw51245g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 0000 0000 0000 0000 0000040 20e5 ff8a ffff 1fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 798b 0001 128f e200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 6666 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0000 0000 0000130 3514 001c 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28539 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25lm25645g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25lm25645g zynq> hexdump mx25lm25645g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 0fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 6987 0001 1282 d200 02cc 3867 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 6666 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0000 0000 0000130 3514 001c 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2843c zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx66uw2g345g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx66uw2g345g zynq> hexdump mx66uw2g345g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 7fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7987 0001 1284 e200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 237c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 001f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2803b zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx66um1g45g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx66um1g45g zynq> hexdump mx66um1g45g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 3fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7989 0001 128d e200 02cc 4467 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 3514 809c 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2813b zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx66uw1g45g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx66uw1g45g zynq> hexdump mx66uw1g45g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 3fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 798b 0001 128f e200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2813a zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw51245g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw51245g zynq> hexdump mx25uw51245g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 1fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 798b 0001 128f e200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 7777 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0000 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2843a zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw51345g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw51345g zynq> hexdump mx25uw51345g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 1fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 798b 0001 128f e200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 237c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28039 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25um25645g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25um25645g zynq> random: fast init done zynq> hexdump mx25um25645g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 0fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7987 0001 1284 d200 02cc 3867 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 3514 809c 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28139 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw25645g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw25645g zynq> hexdump mx25uw25645g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 0fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7989 0001 128d d200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28339 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25um25345g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25um25345g zynq> hexdump mx25um25345g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 0fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 6987 0001 1282 d200 02cc 3867 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 237c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0904 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28439 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw25345g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw25345g zynq> hexdump mx25uw25345g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 0fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7987 0001 1284 d200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 237c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28138 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw12845g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw12845g zynq> hexdump mx25uw12845g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 0000 0000 0000 0000 0000040 20e5 ff8a ffff 07ff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 798b 0001 128f c900 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28438 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw12345g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw12345g zynq> hexdump mx25uw12345g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 07ff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 798b 0001 128f c900 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 237c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28137 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw6445g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw6445g zynq> hexdump mx25uw6445g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 03ff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7989 0001 128d c400 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28437 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw6345g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw6345g zynq> hexdump mx25uw6345g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 03ff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 798b 0001 128f c400 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 237c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18mtd: spi: Convert is_locked callback to is_unlockedJan Kiszka
There was no user of this callback after 5b66fdb29dc3 anymore, and its semantic as now inconsistent between stm and sst26. What we need for the upcoming new usecase is a "completely unlocked" semantic. So consolidate over this. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18mtd: spi-nor: Parse SFDP SCCR MapJaimeLiao
Parse SCCR 22nd dword and check DTR Octal Mode Enable Volatile bit for Octal DTR enable Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18mtd: spi-nor-core: Adding different type of command extension in Soft ResetJaimeLiao
Power-on-Reset is a method to restore flash back to 1S-1S-1S mode from 8D-8D-8D in the begging of probe. Command extension type is not standardized across flash vendors in DTR mode. For suiting different vendor flash devices, adding a flag to seperate types for soft reset on boot. Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18mtd: spi-nor: add support for Macronix Octal flashJaimeLiao
Follow patch <f6adec1af4b2f5d3012480c6cdce7743b74a6156> (Allow using Micron mt35xu512aba in Octal DTR mode). Enable Octal DTR mode with 20 dummy cycles to allow running at the maximum supported frequency for adding Macronix flash in Octal DTR mode. -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7841/MX25LM51245G,%203V,%20512Mb,%20v1.1.pdf Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18sunxi-nand: fix the PIO instead of DMA implementationMarkus Hoffrogge
The sunxi nand SPL loader was broken at least for SUN4I, SUN5I and SUN7I SOCs since the implementation change from DMA to PIO usage - commit 6ddbb1e. Root cause for this issue is the NFC control flag NFC_CTL_RAM_METHOD being set by method nand_apply_config. This flag controls the bus being used for the NFCs internal RAM access. It must be set for the DMA use case only. See A33_Nand_Flash_Controller_Specification.pdf page 12. This fix is tested by myself on a Cubietruck A20 board. Others should test it on new generation SOCs as well. Signed-off-by: Markus Hoffrogge <mhoffrogge@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18spi: sunxi: Add support for F1C100s SPI controllerAndre Przywara
The SPI controllers in the Allwinner F1Cx00 series of SoCs are compatible to the H3 IP. The only difference in the integration is the missing mod clock in the F1C100, instead the SPI clock is directly derived from the AHB clock. We *should* be able to model this through the DT, but the addition of get_rate() requires quite some refactoring, so it's not really worth in this simple case: We programmed both the PLL_PERIPH to 600 MHz and the PLL/AHB divider to 3 in the SPL, so we know the SPI base clock is 200 MHz. Since we used a hard coded fixed clock rate of 24 MHz for all the other SoCs so far, we can as well do the same for the F1C100. Define the SPI input clock and maximum frequency differently when compiling for the F1C100 SoC. Also adjust the power-of-2 divider programming, because that uses a "minus one" encoding, compared to the other SoCs. This allows to enable SPI flash support for the F1C100 boards. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18spi: sunxi: improve SPI clock calculationAndre Przywara
The current SPI clock divider calculation has two problems: - We use a normal round-down division, which results in a divider typically being too small, resulting in a too high frequency on the bus. - The calculaction for the power-of-two divider is very inaccurate, and again rounds down, which might lead to wild bus frequencies. This wasn't a real problem so far, since most chips can handle slightly higher bus frequencies just fine. Also the actual speed was mostly lost anyway, due to release_bus() reseting the device. And the power-of-2 calculation was probably never used, because it only applies to frequencies below 47 KHz. However this will become a problem for the F1C100s support, due to its much higher base frequency. Calculate a safe divider correctly (using round-up), and re-use that value when calculating the power-of-2 value. We also separate the maximum frequency and the input clock on the way, since they will be different for the F1C100s. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18spi: sunxi: refactor SPI speed/mode programmingAndre Przywara
As George rightfully pointed out [1], the spi-sunxi driver programs the speed and mode settings only when the respective functions are called, but this gets lost over a call to release_bus(). That asserts the reset line, thus forces each SPI register back to its default value. Adding to that, trying to program SPI_CCR and SPI_TCR might be pointless in the first place, when the reset line is still asserted (before claim_bus()), so those setting won't apply most of the time. In reality I see two nested claim_bus() calls for the first use, so settings between the two would work (for instance for the initial "sf probe"). However later on the speed setting is not programmed into the hardware anymore. So far we get away with that default frequency, because that is a rather tame 24 MHz, which most SPI flash chips can handle just fine. Move the actual register programming into a separate function, and use .set_speed and .set_mode just to set the variables in our priv structure. Then we only call this new function in claim_bus(), when we are sure that register accesses actually work and are preserved. [1] https://lore.kernel.org/u-boot/20210725231636.879913-17-me@yifangu.com/ Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reported-by: George Hilliard <thirtythreeforty@gmail.com>
2022-07-18spi: sunxi: use XCH status to detect in-progress transferIcenowy Zheng
The current detection of RX FIFO depth seems to be not reliable, and XCH will self-clear when a transfer is done. Check XCH bit when polling for transfer finish. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-13 08:31:55 +0000