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2016-03-29WIP: sniper: Mainline kernel boot firstomap/sniper/next-v2016.03Paul Kocialkowski
2016-03-29WIP: sniper: MUIC USB routing to UART on G key pressPaul Kocialkowski
2016-03-28kc1: Add some sysboot and devicetree-related environment variablesPaul Kocialkowski
This adds some environment variables for sysboot and devicetree. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2016-03-28kc1: Include explicit serial baudrate on bootargsPaul Kocialkowski
This makes the baudrate for the kernel command line explicit. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2016-03-28sniper: Include explicit serial baudrate on bootargsPaul Kocialkowski
This makes the baudrate for the kernel command line explicit. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2016-03-24ARM: uniphier: switch to raw U-Boot imageMasahiro Yamada
Now everything is done to load a raw U-Boot proper image instead of an mkimage-processed one (as far as I tested on NAND, eMMC, NOR). The SPL already knows the load address of the U-Boot proper without parsing its uImage header because the load address is defined by CONFIG_SYS_TEXT_BASE, assuming that the two images are generated from the same build. My main motivation of this switch is to use u-boot-with-spl.bin, a concatenation of u-boot-spl.bin and u-boot.bin. (I wish there were a concatenation of u-boot-spl.bin and u-boot.img...) Anyway, this commit would be useful for one-shot image burn. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24ARM: uniphier: add NOR boot supportMasahiro Yamada
This allows to boot from NOR flash (or SRAM) with help of an external loader (NOR-loader). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24ARM: uniphier: drop PH1- prefix from CONFIG options and file namesMasahiro Yamada
The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too long. It would not hurt to drop "PH1_" because "UNIPHIER_" already well specifies the SoC family. Also, rename files for consistency. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24ARM: uniphier: fix bogus commentMasahiro Yamada
This comment line is telling the opposite of the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24ARM: uniphier: remove commented out defineMasahiro Yamada
This TODO is no longer useful. CONFIG_SYS_NS16550_SERIAL is just ignored on DM serial. If one wants to use the 16550A UART device on the UniPhier Micro Support Card, it can be enabled by CONFIG_SYS_NS16550 via Kconfig. Please notice CONFIG_SPL_OF_TRANSLATE must be enabled as well and the device tree must be treaked in order to use the NS16550 serial on SPL. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-22net: Move CONFIG_RTL8169 to KconfigBin Meng
Introduce CONFIG_RTL8169 in Kconfig and move over boards' defconfig to use that. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Stephen Warren <swaren@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-03-22net: Move CONFIG_RTL8139 to KconfigBin Meng
Introduce CONFIG_RTL8139 in Kconfig and move over boards' defconfig to use that. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> [trini: Fixup MPC8641HPCN* and r2dplus configs] Signed-off-by: Tom Rini <trini@konsulko.com>
2016-03-22Fix spelling of "transferred".Vagrant Cascadian
Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-22cmd: Fix license commandTom Rini
The license command isn't usually built and has a few problems: - The rules to generate license.h haven't worked in a long time, re-write these based on the bmp_logo.h rules. - 'tok' is unused and the license text size has increased - bin2header.c wasn't grabbing unistd.h to know the prototype for read(). Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2016-03-22serial: pl01x: Add support for devices with the rate pre-configured.Eric Anholt
For Raspberry Pi, we had the input clock rate to the pl011 fixed in the rpi.c file, but it may be changed by firmware due to user changes to config.txt. Since the firmware always sets up the uart (default 115200 output unless the user changes it), we can just skip our own uart init to simplify the boot process and more reliably get serial output. Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
2016-03-22Drop various features when the command line is not availableSimon Glass
Some features are only useful or meaningful when the command line is present. Ensure that these features are not compiled in when CONFIG_CMDLINE is not enabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-22Allow command code to compile to nothingSimon Glass
When CONFIG_CMDLINE is disabled we need to remove all the command-line code. Most can be removed by dropping the appropriate linker lists from the images, but sub-commands must be dealt with specially. A simple mechanism is used to avoid 'unused static function' errors. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-22ti: k2g: increase phy autoneg timeoutVitaly Andrianov
After power cycle of a K2G EVM dhcp fails due to a auto-negotiation timeout. This commit increases the timeout to fix the issue. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-22Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini
2016-03-21armv8/ls1043aqds: Enable ID_EEPROM support for ls1043aqdsWenbin Song
Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-03-21arm: ls102xa: Enable CONFIG_SYS_CONSOLE_IS_IN_ENV supportAlison Wang
CONFIG_SYS_CONSOLE_IS_IN_ENV needs to be enabled, so we could set stdout environment variable to specify the vga for the console output when LCD/HDMI is connected to the boards. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-03-21driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discreteShengzhou Liu
Add support of address parity for DDR4 UDIMM or discrete memory. It requires to configurate corresponding MR5[2:0] and TIMING_CFG_7[PAR_LAT]. Parity can be turned on by hwconfig, e.g. hwconfig=fsl_ddr:parity=on. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-03-21pci: make pci_get_hose_head() available to external usersStuart Yoder
Put pci_get_hose_head() prototype in header so it is available to external users, allowing them to find and iterate over all pci controllers. Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-03-21boards: ls2080: Fix default bootargsYork Sun
A white space is missing in multiple-line string for bootargs. Signed-off-by: York Sun <york.sun@nxp.com>
2016-03-21armv8: ls2080ardb: invert irq pins polarity for AQR405 PHYShaohui Xie
To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins polarity by setting IRQCR register, because AQR405 interrupt is low active but GIC accepts high active. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-03-21strider: use optimised bus timing for FPGA accessReinhard Pfau
Use optimised bus timing for FPGA access. Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc> Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2016-03-21strider: Define pca593x widthsDirk Eibach
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2016-03-20Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2016-03-20arm: socfpga: sr1500: Misc updates (SPI speed, env location)Stefan Roese
This patch makes the following changes to the SR1500 board port: - Update defconfig to support SPI NOR (use make savedefconfig). - Increase SPI speed to a maximum of 100MHz for faster system bootup. - Change environment location, so that its not between SPL and main U-Boot. This way the combined SPL / U-Boot image can be used for updates. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de>
2016-03-20arm: socfpga: Allow boards to define a custom environment sizeStefan Roese
This patch makes it possible that boards can define a board-specific env size. This is used by the SR1500 SoCFPGA board port. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Marek Vasut <marex@denx.de>
2016-03-20arm: socfpga: Fix SR1500 env positionMarek Vasut
Move the inclusion of the common socfpga configuration file further down in the sr1500 configuration, so that the socfpga_common.h can check if environment is in SPI NOR and it's location is defined and if it is not, define default location. This fixes "arm: socfpga: Enabling U-Boot environment support in QSPI" which introduced a minor warning. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
2016-03-20arm: socfpga: Enabling U-Boot environment support in QSPIChin Liang See
Enabling the support of storing U-Boot environment within serial NOR flash. By default, its still store into SDMMC Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
2016-03-20usb: Change power-on / scanning timeout handlingStefan Roese
This patch changes the USB port scanning procedure and timeout handling in the following ways: a) The power-on delay in usb_hub_power_on() is now reduced to a value of max(100ms, "hub->desc.bPwrOn2PwrGood * 2"). The code does not wait using mdelay, instead usb_hub_power_on() will wait before querying the device in the scanning loop later. The total timeout for this hub, which is 1 second + "hub->desc.bPwrOn2PwrGood * 2" is calculated and will be used in the following per-port scanning loop as the timeout to detect active USB devices on this hub. b) Don't delay the minimum delay (for power to stabilize) in usb_hub_power_on(). Instead skip querying these devices in the scannig loop until the delay time is reached. c) The ports are now scanned in a quasi parallel way. The current code did wait for each (unconnected) port to reach its timeout and only then continue with the next port. This patch now changes this to scan all ports of all USB hubs quasi simultaneously. For this, all ports are added to a scanning list. This list is scanned until all ports are ready by either a) reaching the connection timeout (calculated earlier), or by b) detecting a USB device. This results in a faster USB scan time as the recursive scanning of USB hubs connected to the hub that's currently being scanned will start earlier. One small functional change to the original code is, that ports with overcurrent detection will now get rescanned multiple times (PORT_OVERCURRENT_MAX_SCAN_COUNT). Without this patch: starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 9 USB Device(s) found time: 20.163 seconds With this patch: starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 9 USB Device(s) found time: 1.822 seconds So ~18.3 seconds of USB scanning time reduction. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Stephen Warren <swarren@nvidia.com>
2016-03-17dm: ns16550: Add support for reg-offset propertyMichal Simek
reg-offset is the part of standard 8250 binding in the kernel. It is shifting start of address space by reg-offset. On Xilinx platform this offset is typically 0x1000. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Moved the new field to the end of the struct to avoid problems: Signed-off-by: Simon Glass <sjg@chromium.org>
2016-03-17x86: Add congatec conga-QA3/E3845-4G (Bay Trail) supportStefan Roese
This patch adds support for the congatec conga-QA3/E3845-4G eMMC8 SoM, installed on the congatec Qseven 2.0 evaluation carrier board (conga-QEVAL). Its port is very similar to the MinnowboardMAX port and also uses the Intel FSP as described in doc/README.x86. Currently supported are the following interfaces / devices: - UART (via Winbond legacy SuperIO chip on carrier board) - Ethernet (PCIe Intel I210 / E1000) - SPI including SPI NOR as boot-device - USB 2.0 - SATA via U-Boot SCSI IF - eMMC - Video (HDMI output @ 800x600) - PCIe Not supported yet is: - I2C - USB 3.0 Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17x86: Add support for the samus chromebookSimon Glass
This adds basic support for chromebook_samus. This is the 2015 Pixel and is based on an Intel broadwell platform. Supported so far are: - Serial - SPI flash - SDRAM init (with MRC cache) - SATA - Video (on the internal LCD panel) - Keyboard Various less-visible drivers are provided to make the above work (e.g. PCH, power control and LPC). The platform requires various binary blobs which are documented in the README. The major missing feature is USB3 since the existing U-Boot support does not work correctly with Intel XHCI controllers. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17x86: dts: Drop memory SPD compatible stringSimon Glass
This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17x86: Fix a header nit in x86-chromebook.hSimon Glass
There is an extra line in the comment in the header. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17x86: Use white on black for the console on chromebooksSimon Glass
This is a little easier on the eyes, particularly when the backlight is set to maximum. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17x86: Add a default address for reference codeSimon Glass
Add an address which can be used for loading and running the reference code when needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17x86: broadwell: Add a pinctrl driverSimon Glass
GPIO pins need to be set up on start-up. Add a driver to provide this, configured from the device tree. The binding is slightly different from the existing ICH6 binding, since that is quite verbose. The new binding should be just as extensible. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17x86: Drop all the old pin configuration codeSimon Glass
We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17input: i8042: Make sure the keyboard is enabledSimon Glass
Add one more step into the init sequence. This fixes the keyboard on samus, which otherwise does not work. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17pci: Correct a few comments and nitsSimon Glass
Two comments are missing a parameter and there is an extra blank line. Also two of the region access macros are misnamed. Correct these problems. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17pci: Add functions to update PCI configuration registersSimon Glass
It is common to read a config register value, clear and set some bits, then write back the updated value. Add functions to do this in one step, for convenience. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17gpio: Use const where possibleSimon Glass
Some functions do not change the struct gpio_desc parameter. Update these to use const so this is clear. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17gpio: Add a function to obtain a GPIO vector valueSimon Glass
We can use GPIOs as binary digits for reading 'strapping' values. Each GPIO is assigned a single bit and can be set high or low on the circuit board. We already have a legacy function for reading these values. Add one that supports driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17cpu: Add support for microcode version and CPU IDSimon Glass
Some CPUs use microcode and each core can have a different version of microcode loaded. Also some CPUs support the concept of an integer ID used for identification purposes. Add support for these in the CPU uclass. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-15ti_armv7_common: env: Add NFS loading support to default enviromentAndrew F. Davis
NFS loading is similar to net loading except initial files are loaded over NFS instead of TFTP, this removes the need for multiple different protocol servers running on the host and allows the use of a single network file system containing boot related files in their usual in-filesystem directory. Add defaults for this boot style here. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-15keystone2: env: Set mmc as default boot for k2g-evmYan Liu
For k2l, k2e and k2hk, ubi is set to default boot in uboot environment settings; while for k2g, mmc should be the default boot. This patch is to set mmc as default for k2g-evm Signed-off-by: Yan Liu <yan-liu@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-15 01:49:20 +0000